On-chip integrated structure and method of single-row carrier photodiode

By integrating optical waveguide and reflective film structures on silicon-based units and flip-chip bonding single-row carrier photodiodes, the challenge of heterogeneous integration on silicon-based substrates is solved, improving the optical signal transmission efficiency and device performance of THz band communication links, making it suitable for high data transmission requirements.

CN117310901BActive Publication Date: 2026-05-26WUXI INST OF INTERCONNECT TECH CO LTD

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
WUXI INST OF INTERCONNECT TECH CO LTD
Filing Date
2023-09-22
Publication Date
2026-05-26

AI Technical Summary

Technical Problem

In the existing technology, silicon-based heterogeneous integrated single-row carrier photodiodes (UTC-PDs) are difficult to realize, and in THz frequency band communication links, they have problems such as system complexity, large size and high power consumption, which make it difficult to meet the high data transmission requirements.

Method used

The device employs a silicon-based unit structure, including an optical waveguide unit and a reflective film. A single-row carrier photodiode is integrated via flip-chip bonding. The optical signal is reflected to the active region using a tilted groove and a high-reflectivity reflective film. The device is supported and powered by a power supply support connection unit.

Benefits of technology

It realizes silicon-based heterogeneous integration of UTC-PD, improves optical signal transmission efficiency, reduces system complexity and power consumption, is easy to mass-produce, and ensures high-power output of carrier signals.

✦ Generated by Eureka AI based on patent content.

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Abstract

This invention relates to an on-chip integrated structure and method for single-row carrier photodiodes. It includes: a silicon-based unit comprising a silicon substrate and a plurality of optical waveguide units disposed on the silicon substrate, wherein each optical waveguide unit includes two optical waveguides for propagating optical signals, a groove for separating the two optical waveguides, and a reflective film disposed within the groove; and a single-row carrier photodiode unit heterogeneously integrated on the silicon-based unit, comprising a plurality of single-row carrier photodiodes, wherein one single-row carrier photodiode corresponds to a groove within one optical waveguide unit; an optical signal propagating along the optical waveguide enters the groove corresponding to the optical waveguide and is reflected by the reflective film, and the reflected optical signal is incident on the active region of the single-row carrier photodiode directly corresponding to the groove. This invention can effectively realize silicon-based heterogeneous integration of UTC-PDs, improve optical signal transmission efficiency and long-term operating performance of optical signal transmitting devices, and is easily scalable.
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Description

Technical Field

[0001] This invention relates to an on-chip integrated structure and method, and more particularly to an on-chip integrated structure and method for a single-row carrier photodiode. Background Technology

[0002] In the field of wireless communication, with the development of technologies such as artificial intelligence (AI), virtual reality (VR), big data, the Internet of Things (IoT), and ultra-high-definition video, the demand for network bandwidth and data transmission rates is increasing daily. In the foreseeable future, the network bandwidth based on 5G will be insufficient to meet the massive data exchange needs of these emerging technologies. Therefore, attention is turning to the terahertz (THz) band, which has a higher carrier frequency. Theoretically, THz wireless LANs can provide data transmission rates of up to hundreds of Gbps or even several Tbps.

[0003] Currently, researchers have developed communication links with carrier frequencies of hundreds of GHz, achieving single-channel transmission rates of over 50 Gbps. The transmitting end of such THz band communication links typically consists of lasers, signal amplifiers, optical combiners, signal modulators, mixers, etc. The transmitting system, composed of these discrete components, is complex and bulky, and suffers significant signal loss during transmission, requiring multiple amplifications, thus increasing overall power consumption.

[0004] As research progresses, silicon-based lasers, optical combiners, and signal modulators have been designed and fabricated, and applied to wireless communication transmitters to reduce system complexity and power consumption. However, the mixer commonly used in transmitters—uni-traveling carrier photodiodes (UTC-PDs)—is a key device for carrier signal transmission. Due to its fabrication using III-V group semiconductor materials, silicon-based heterogeneous integration is quite difficult.

[0005] Research on on-chip integrated THz signal transmission systems and their applications in high-speed wireless communication is still in its early stages, and reports on on-chip integration of UTC-PDs are relatively scarce. French Group III-V laboratories have reported on the epitaxial growth of UTC-PD materials on InP substrates, fabricating lasers, signal amplifiers, and UTC-PD devices on the InP substrates using semiconductor processes, thereby achieving on-chip integration of a signal transmission system. This on-chip integration method requires growing semiconductor materials for specific devices at different locations on the chip, placing high demands on material preparation and hindering large-scale fabrication applications. Furthermore, InP substrates have low mechanical strength and are expensive, making them difficult to meet the needs of practical applications. Summary of the Invention

[0006] The purpose of this invention is to overcome the shortcomings of the prior art and provide an on-chip integrated structure and method for a single-row carrier photodiode, which can effectively realize silicon-based heterogeneous integration of UTC-PD, improve the optical signal transmission efficiency and the long-term working performance of optical signal transmitting devices, and is easy to scale up.

[0007] According to the technical solution provided by the present invention, a single-row carrier photodiode on-chip integrated structure is provided, the on-chip integrated structure comprising:

[0008] A silicon-based unit includes a silicon substrate and a plurality of optical waveguide units disposed on the silicon substrate, wherein the optical waveguide unit includes two optical waveguides for propagating optical signals, a groove for separating the two optical waveguides, and a reflective film disposed in the groove.

[0009] A single-row carrier photodiode unit, heterogeneously integrated on a silicon-based unit, comprises several single-row carrier photodiodes, among which...

[0010] A single-row charge carrier photodiode corresponds to a slot in an optical waveguide unit;

[0011] The optical signal propagating along the optical waveguide enters the groove corresponding to the optical waveguide and is reflected by the reflective film. The reflected optical signal is then incident on the active region of the single-row carrier photodiode corresponding to the groove.

[0012] The slot corresponding to the optical waveguide is the slot in the optical waveguide unit where the optical waveguide is located.

[0013] Along the direction of optical signal propagation within the optical waveguide, the cross-sectional shape of the groove is trapezoidal;

[0014] Within the tank, the area where the reflective film is arranged includes at least the bottom area of ​​the tank corresponding to the opening of the tank.

[0015] The thickness of the reflective film is 2%-20% of the depth of the groove in which the reflective film is located;

[0016] The reflectivity of the reflective film is not less than 95%.

[0017] Along the direction of optical signal propagation in the optical waveguide, the front and rear side walls of the groove are both inclined, and the angle θ between the side wall of the groove and the bottom surface of the groove is 17° to 45°.

[0018] The single-row carrier photodiode unit is integrated onto the silicon-based unit using a flip-chip bonding method.

[0019] A power supply support connection unit adapted to a single-row carrier photodiode unit is disposed on the silicon substrate, wherein one power supply support unit corresponds to one single-row carrier photodiode unit;

[0020] The power supply support connection unit includes a power supply connection unit for supplying power to a single-row carrier photodiode unit and a support connection unit for supporting the single-row carrier photodiode unit.

[0021] The power supply connection unit includes at least two power supply connection metal posts;

[0022] The supporting connection unit includes a plurality of supporting connection metal pillars, which are symmetrically distributed on both sides of the corresponding optical waveguide unit;

[0023] For the single-row carrier photodiode unit corresponding to the power supply support unit, the single-row carrier photodiode unit is simultaneously welded to the power supply connection metal post and the support connection metal post, and the power supply connection metal post is used to supply power to the single-row carrier photodiode unit.

[0024] The single-row charge carrier photodiode unit also includes an antenna that is electrically connected to the single-row charge carrier photodiode.

[0025] A single-carrier photodiode converts the received optical signal into an electromagnetic wave signal and radiates the terahertz electromagnetic wave signal outward through an antenna.

[0026] A method for on-chip integration of a single-row carrier photodiode, characterized in that the method for fabricating the above-mentioned on-chip integrated structure includes:

[0027] A silicon-based unit is provided, the silicon-based unit including a silicon substrate and an optical waveguide unit, wherein the optical waveguide unit is located on the silicon substrate; the optical waveguide unit includes two optical waveguides for propagating optical signals, a groove for separating the two optical waveguides, and a reflective film disposed in the groove;

[0028] A single-row carrier photodiode unit is provided and integrated on a silicon-based unit, wherein the single-row carrier photodiode in the single-row carrier photodiode unit corresponds to a slot in an optical waveguide unit, so that the active region of the single-row carrier photodiode receives the optical signal reflected by the reflective film in the corresponding slot.

[0029] The method for fabricating the provided silicon-based unit includes:

[0030] A silicon substrate is provided, and an optical waveguide substrate is fabricated at a predetermined position on the silicon substrate;

[0031] Determine the location of the target area on the optical waveguide substrate, and set an etched protective film on the non-target area on the optical waveguide substrate;

[0032] The first etching is performed on the target area of ​​the determined optical waveguide substrate based on focused ion beam etching.

[0033] The optical waveguide substrate, after the first etching, is adjusted to the desired position, and a second etching is performed on the target area of ​​the optical waveguide substrate based on a focused ion beam to form two optical waveguides and a groove for separating the optical waveguides.

[0034] In the cross section of the optical waveguide in the direction of optical signal propagation, the cross section of the groove is trapezoidal. In the cross section of the groove, the sidewalls of the groove are inclined, and the angle θ between the sidewalls of the groove and the bottom surface of the groove is 17° to 45°.

[0035] The thickness of the reflective film is 2%-20% of the depth of the groove in which the reflective film is located;

[0036] The reflectivity of the reflective film is not less than 95%;

[0037] The reflective film is a metallic film;

[0038] The reflective film can be prepared by electron beam evaporation, magnetron sputtering, or ion beam sputtering.

[0039] When integrating a single-row carrier photodiode unit above a silicon-based unit, the following is included:

[0040] A power supply support connection unit is fabricated on a silicon substrate, wherein,

[0041] The single-row charge-carrier photodiode unit is aligned and bonded to the power supply support connection unit to achieve flip-chip integration of the single-row charge-carrier photodiode unit on top of the silicon substrate.

[0042] During alignment bonding, alignment is performed using a first alignment mark unit fabricated on a silicon substrate and a second alignment mark unit fabricated on a single-row carrier photodiode unit.

[0043] Advantages of this invention: An optical waveguide unit is set within a silicon-based unit, and a single-row carrier photodiode unit is flip-chip integrated on top of the silicon-based unit. The optical signal propagating along the optical waveguide enters the groove and is reflected by the reflective film. The reflected optical signal is then incident on the active region of the single-row carrier photodiode. The single-row carrier photodiode unit can be supported and powered by a power supply support connection unit, and heat dissipation can also be achieved. Therefore, the resulting integrated structure has the characteristics of simple structure, high optical signal transmission efficiency, no performance degradation of optical signal transmitting device over long-term operation, and easy scalability. It can also achieve a large bandwidth and saturation current of the UTC-PD device, thereby ensuring high-power output of the carrier signal. Attached Figure Description

[0044] Figure 1This is a schematic diagram of one embodiment of the on-chip integrated structure of the present invention.

[0045] Figure 2 This is a schematic diagram of one embodiment of the optical signal processing structure of the present invention within a silicon-based unit.

[0046] Figure 3 This is a top view of one embodiment of the silicon-based unit of the present invention.

[0047] Figure 4 This is a cross-sectional view of one embodiment of the silicon-based unit of the present invention.

[0048] Figure 5 This is a schematic diagram of one embodiment of the single-row carrier photodiode unit of the present invention.

[0049] Figure 6 This is a distribution diagram of the cross-sectional light field of one embodiment of the present invention.

[0050] Figure 7 This is a schematic diagram of an embodiment of the optical field distribution at 0.5 μm above the optical waveguide of the present invention.

[0051] Explanation of reference numerals in the attached figures: 1-Silicon substrate, 2-First optical waveguide, 3-Reflective film, 4-Groove, 5-Supporting connecting metal pad, 6-Connecting electrode, 7-Power supply connecting metal pad, 8-Device substrate, 9-Single-row carrier photodiode, 10-First alignment mark unit, 11-Vivaldi antenna negative electrode, 12-Vivaldi antenna positive electrode, 13-Second alignment mark unit, 14-Second optical waveguide, 15-Supporting connecting metal pad, 16-Power supply connecting metal pad. Detailed Implementation

[0052] The present invention will be further described below with reference to specific accompanying drawings and embodiments.

[0053] To effectively achieve silicon-based heterogeneous integration of UTC-PDs and improve optical signal transmission efficiency, in one embodiment of the present invention, the on-chip integrated structure for single-row carrier photodiodes includes:

[0054] A silicon-based unit includes a silicon substrate 1 and a plurality of optical waveguide units disposed on the silicon substrate 1. The optical waveguide unit includes two optical waveguides for propagating optical signals, a groove 4 for separating the two optical waveguides, and a reflective film 3 disposed in the groove 4.

[0055] A single-row carrier photodiode unit, heterogeneously integrated on a silicon-based unit, includes several single-row carrier photodiodes 9, wherein...

[0056] A single-row charge carrier photodiode 9 corresponds to a slot 4 in an optical waveguide unit;

[0057] The optical signal propagating along the optical waveguide enters the groove 4 corresponding to the optical waveguide and is reflected by the reflective film 3. The reflected optical signal is then incident on the active region of the single-row carrier photodiode 9 corresponding to the groove 4.

[0058] The slot 4 corresponding to the optical waveguide is the slot 4 in the optical waveguide unit where the optical waveguide is located.

[0059] To achieve heterogeneous integration on silicon, the on-chip integrated structure must include at least a silicon-based unit and at least a single-row carrier photodiode unit containing a UTC-PD. Specifically, heterogeneous integration refers to integrating the single-row carrier photodiode unit onto the silicon-based unit. Figure 1 An embodiment of an on-chip integrated architecture is shown in the figure.

[0060] To be compatible with the single-row carrier photodiode 9, the silicon-based unit includes a silicon substrate 1 and an optical waveguide unit. The silicon substrate 1 can be made of commonly used silicon materials. After the optical waveguide unit is placed on the silicon substrate 1, light propagation in a planar direction can be achieved using the optical waveguide within the optical waveguide unit. At this time, the plane of light propagation formed by the optical waveguide is parallel to the surface of the silicon substrate 1. The optical waveguide can be made of commonly used materials, as long as it meets the requirements for light propagation. Figure 2 and Figure 3 The figure illustrates an embodiment of two optical waveguides on a silicon substrate 1. The two waveguides are a first optical waveguide 2 and a second optical waveguide 14, which may be strip-shaped on the silicon substrate 1. Generally, the first optical waveguide 2 and the second optical waveguide 14 are coaxially distributed. The first optical waveguide 2 and the second optical waveguide 14 are separated by a groove 4.

[0061] A single-row carrier photodiode unit must include at least a single-row carrier photodiode 9. Generally, a single-row carrier photodiode unit also includes structures or components that work with the single-row carrier photodiode 9 to achieve wireless communication, such as the device substrate 8 mentioned below and an antenna, etc. The specific form of the single-row carrier photodiode unit can be selected as needed.

[0062] A single-row carrier photodiode unit generally includes at least one single-row carrier photodiode 9. When a single-row carrier photodiode unit includes multiple single-row carrier photodiodes 9, each single-row carrier photodiode 9 must correspond to an optical waveguide unit. Specifically, corresponding to an optical waveguide unit means corresponding to the groove 4 and the reflective film 3 within the optical waveguide unit, so that the light signal reflected by the reflective film 3 is absorbed by the corresponding single-row carrier photodiode 9.

[0063] In one embodiment of the present invention, the number of optical waveguide units and single-row carrier photodiode units can be set according to actual needs. Under normal circumstances, setting an optical waveguide unit and a corresponding single-row carrier photodiode unit is sufficient to meet the requirements. Of course, in order to meet higher requirements or other requirements, the number of optical waveguide units and the corresponding number of single-row carrier photodiode units can be set according to actual needs.

[0064] In order to direct the optical signal propagating within the optical waveguide onto the active region of the single-row carrier photodiode 9, in one embodiment of the present invention, a reflective film 3 is disposed within the groove 4. Figure 2 and Figure 3 The figure shows an embodiment of a groove 4 and a reflective film 3 within the groove 4. The reflective film 3 is disposed at the bottom of the groove 4. In operation, optical signals propagating along the first optical waveguide 2 and / or the second optical waveguide 14 enter the groove 4 and are reflected by the reflective film 3. The reflected optical signals can then be incident on the active region of the single-row charge carrier photodiode 9, meaning the optical signals can be wirelessly received by the single-row charge carrier photodiode 9.

[0065] In one embodiment of the present invention, the cross section of the groove 4 is trapezoidal along the propagation direction of the optical signal in the optical waveguide 2. Generally, the groove opening of the groove 4 is located on the surface of the optical waveguide 2 away from the silicon substrate 1, and the groove opening of the groove 4 makes the area above the reflective film 3 in the groove 4 unobstructed.

[0066] Within the tank 4, the area where the reflective film 3 is arranged includes at least the bottom area of ​​the tank corresponding to the opening of the tank.

[0067] Figure 2 An embodiment of the groove 4 is shown in the figure. The cross-section of the groove 4 is trapezoidal. The width of the groove 4 gradually increases along the direction from the groove opening to the bottom. The depth of the groove 4 is generally consistent with the thickness of the first optical waveguide 2 and the second optical waveguide 14. The opening of the groove 4 corresponds to the surface of the first optical waveguide 2 and the second optical waveguide 14. Through the groove opening of the groove 4, the reflective film 3 can be fabricated at the bottom of the groove 4, and the reflective film 3 can be in an unobstructed state through the groove opening. Therefore, the light signal reflected by the reflective film 3 can be incident on the active region of the single-row carrier photodiode 9 through the groove opening of the groove 4.

[0068] Figure 2 and Figure 3 Since the groove 4 separates the first optical waveguide 2 and the second optical waveguide 14, the reflective film 3 generally needs to be supported on the silicon substrate 1.

[0069] In one embodiment of the present invention, the sidewalls of the tank 4 are inclined in cross-section, and the angle θ between the sidewalls of the tank 4 and the bottom surface of the tank 4 is 17° to 45°.

[0070] Depend on Figure 2 As explained above, when the cross-section of the groove 4 is trapezoidal, the sidewalls of the groove 4 are inclined. To allow the optical signal propagating within the first optical waveguide 2 and the second optical waveguide 14 to be reflected by the reflective film 3, the angle θ between the sidewall of the groove 4 and the bottom surface of the groove 4 can be between 17° and 45°. The specific angle θ can be found by referring to... Figure 2 The bottom surface of the tank 4 is the surface of the silicon substrate 1 corresponding to the tank 4. In the figure, the bottom surface of the tank 4 is parallel to the plane where the groove opening of the tank 4 is located.

[0071] Specifically, whether the angles between the front and rear side walls of the tank 4 and the bottom surface of the tank 4 are the same can be determined according to the optical signal required by the corresponding single-row carrier photodiode. For example, if the optical signal intensity required by the single-row carrier photodiode 9 is the sum of the optical signal intensity transmitted by the first optical waveguide 2 and the optical signal intensity transmitted by the second optical wave 14, then the angles between the side walls and the bottom surface of the tank 4 are set to be the same. In other cases, the angles between the side walls of the tank 4 and the bottom surface of the tank 4 can be set according to the relationship between the optical signal intensity required by the single-row carrier photodiode, the optical signal intensity transmitted by the first optical waveguide, and the optical signal intensity transmitted by the second optical wave 14, and may not be different. It should be noted here that "front" and "back" are only for ease of description and are not a specific limitation of this solution.

[0072] In specific implementation, the thickness of the reflective film 3 is 2%-20% of the depth of the groove 4 where the reflective film 3 is located; the reflectivity of the reflective film 3 is not less than 95%. Generally, the reflective film 3 can be a metal film, and the specific thickness and reflectivity of the reflective film 3 can be selected as needed.

[0073] In one embodiment of the present invention, the single-row carrier photodiode unit is integrated onto a silicon-based unit using a flip-chip bonding method, wherein,

[0074] A power supply support connection unit adapted to a single-row carrier photodiode unit is provided on the silicon substrate 1, wherein one power supply support unit corresponds to one single-row carrier photodiode unit;

[0075] The power supply support connection unit includes a power supply connection unit for supplying power to a single-row carrier photodiode unit and a support connection unit for supporting the single-row carrier photodiode unit.

[0076] The power supply connection unit includes at least two power supply connection metal posts 7;

[0077] The supporting connection unit includes a plurality of supporting connection metal pillars 15, which are symmetrically distributed on both sides of the corresponding optical waveguide unit;

[0078] For the single-row carrier photodiode unit corresponding to the power supply support unit, the single-row carrier photodiode unit is simultaneously welded to the power supply connection metal post 7 and the support connection metal post 15, and the power supply connection metal post 7 is used to supply power to the single-row carrier photodiode unit.

[0079] When a single-row carrier photodiode unit is heterogeneously integrated onto a silicon-based unit, it specifically refers to the use of flip-chip bonding to assemble the single-row carrier photodiode unit onto the silicon-based unit using power supply support connection units and support connection units, such as... Figure 1 As shown, the single-row carrier photodiode unit is located above the silicon substrate 1. Alternatively, the single-row carrier photodiode unit can also be located below the silicon substrate 1, specifically to ensure that the light signal, after being reflected by the reflective film 3, is incident on the active region of the single-row carrier photodiode 9. To support and connect the single-row carrier photodiode unit, a power supply support connection unit is provided on the silicon substrate 1.

[0080] Figure 1 , Figure 3 and Figure 4 The figure illustrates one embodiment of the power supply connection unit. The power supply connection unit includes two power supply connection metal pillars 7, which are vertically distributed on the silicon substrate 1. A power supply connection metal pillar pad 16 can be provided at the lower end of each power supply connection metal pillar 7 to allow the power supply connection metal pillar 7 to be adapted and connected to the silicon substrate 1. The upper end of each power supply connection metal pillar 7 is connected to a single-row charge carrier photodiode unit. Specifically, during flip-chip bonding, the single-row charge carrier photodiode is bonded to the power supply connection metal pillars 7. Figure 3 In the middle, two power supply connection metal pillars 7 are symmetrically distributed on both sides of the optical waveguide unit.

[0081] Figure 1 , Figure 3 and Figure 4The figure also illustrates one embodiment of the support connection unit. The support connection unit includes several support connection metal pillars 15, which are vertically distributed on the silicon substrate 1 and uniformly and symmetrically distributed on both sides of the corresponding optical waveguide unit. In this case, a support connection metal pillar pad 5 can be provided at the lower end of the support connection metal pillar 15 to adapt and connect the support connection metal pillar 15 to the silicon substrate 1. The upper end of the support connection metal pillar 15 is connected to the single-row charge carrier photodiode unit. Specifically, during flip-chip bonding, the single-row charge carrier photodiodes are simultaneously bonded to the support connection metal pillars 15. At this time, the single-row charge carrier photodiode unit can be supported simultaneously using the support connection metal pillars 15 and the power supply connection metal pillars 7, while the power supply connection metal pillars 7 provide power to the single-row charge carrier photodiode unit pair.

[0082] Figure 1 In this process, the single-row carrier photodiode unit includes a device substrate 8, which can be a substrate that meets the requirements for fabricating the single-row carrier photodiode 9, such as an InP substrate. When the single-row carrier photodiode unit is bonded to the power supply support connection unit, it generally means that the entire single-row carrier photodiode unit is bonded to the power supply connection metal pillar 7 and the support connection metal pillar 15 through the device substrate 8.

[0083] Figure 3 and Figure 4 In the figure, a row of metal pillars is distributed on both sides of the first optical waveguide 2 and the second optical waveguide unit 14. Each row of metal pillars is arranged sequentially along the length of the first optical waveguide 2, and each row of metal pillars includes the aforementioned power supply connection metal pillar 7 and support connection metal pillar 15. Figure 3 and Figure 4 The illustration shows an embodiment in which five metal pillars are respectively arranged on both sides of the first optical waveguide 2. Each row of metal pillars includes one power supply connection metal pillar 7 and four support connection metal pillars 15. In specific implementation, the number of support connection metal pillars 15 in the support connection unit can be selected as needed to meet the requirements such as flip-chip bonding support for single-row carrier photodiode units.

[0084] Generally, a support connection metal pillar pad 5 and a power supply connection metal pillar pad 16 can be first fabricated on a silicon substrate 1, and then a support connection metal pillar 15 can be fabricated on the support connection metal pillar pad 5, and a power supply connection metal pillar 7 can be fabricated on the power supply connection metal pillar pad 16.

[0085] To enable power supply and electrical connection, a connection electrode 6 corresponding to each power supply connection metal pillar 7 is fabricated on the silicon substrate 1. The connection electrode 6 is electrically connected to its corresponding power supply connection metal pillar 7, allowing connection to an external power supply or signal device. Furthermore, when the single-row carrier photodiode unit is supported by the supporting connection metal pillar 15, the heat dissipation characteristics of the supporting connection metal pillar 15 can be utilized to improve the heat dissipation efficiency of the single-row carrier photodiode unit during operation.

[0086] Generally, when the single-row carrier photodiode unit is bonded to the supporting connecting metal post 15 and the power supply connecting metal post 7, the single-row carrier photodiode unit is parallel to the first optical waveguide 2 and the second optical waveguide 14, and the active region of the single-row carrier photodiode 9 corresponds to the reflective film 3 in a groove 4.

[0087] In one embodiment of the present invention, the single-row charge carrier photodiode unit further includes an antenna that is adapted and electrically connected to the single-row charge carrier photodiode 9. The antenna is used to radiate the electromagnetic wave signal converted from the optical signal received by the single-row charge carrier photodiode 9 outward, that is, to radiate the terahertz electromagnetic wave signal outward through the antenna.

[0088] Figure 5 The figure shows an antenna that works in conjunction with a single-row carrier photodiode 9. The antenna is a Vivaldi antenna, which radiates the optical signal received by the single-row carrier photodiode 9 into a converted electromagnetic wave signal. Generally, the Vivaldi antenna is fabricated on a device substrate 8. In the figure, the negative electrode 11 and the positive electrode 12 of the Vivaldi antenna are distributed on both sides of the single-row carrier photodiode 9.

[0089] This invention also provides an on-chip integration method for fabricating the above-described on-chip integrated structure, the on-chip integration method comprising:

[0090] A silicon-based unit is provided, the silicon-based unit including a silicon substrate 1 and an optical waveguide unit, wherein the optical waveguide unit is located on the silicon substrate 1; the optical waveguide unit includes two optical waveguides for propagating optical signals, a groove 4 for separating the two optical waveguides, and a reflective film 3 disposed in the groove 4;

[0091] A single-row carrier photodiode unit is provided and integrated on a silicon-based unit. The single-row carrier photodiode 9 in the single-row carrier photodiode unit corresponds to a slot 4 in an optical waveguide unit, so that the active region of the single-row carrier photodiode 9 receives the light signal reflected by the reflective film 3 in the corresponding slot 4.

[0092] During on-chip integration, silicon-based cells are typically fabricated first, including optical waveguide units. After the silicon-based cells are fabricated, single-row carrier photodiode units are integrated onto them using flip-chip bonding. The following section provides a detailed explanation of the fabrication of silicon-based cells and the specific flip-chip bonding integration methods and processes.

[0093] In one embodiment of the present invention, the method for fabricating the provided silicon-based unit includes:

[0094] A silicon substrate is provided, and an optical waveguide substrate is fabricated at a predetermined position on the silicon substrate;

[0095] Determine the location of the target area on the optical waveguide substrate, and set an etched protective film on the non-target area on the optical waveguide substrate;

[0096] The first etching is performed on the target area of ​​the determined optical waveguide substrate based on focused ion beam etching.

[0097] The optical waveguide substrate, after the first etching, is adjusted to the desired position, and a second etching is performed on the target area of ​​the optical waveguide substrate based on a focused ion beam to form two optical waveguides and a groove 4 for separating the optical waveguides.

[0098] In the cross section of the optical signal propagation direction in the optical waveguide, the cross section of the groove 4 is trapezoidal. In the cross section of the groove 4, the sidewalls of the groove 4 are inclined, and the angle θ between the sidewalls of the groove 4 and the bottom surface of the groove 4 is 17° to 45°.

[0099] Because the optical waveguide substrate on the silicon substrate 1 is relatively small (cross-section 220nm*500nm), conventional dry etching methods (inductively coupled plasma etching, deep silicon etching, etc.) and wet etching methods are not suitable for etching the trench 4 within the optical waveguide substrate. As explained above, the optical waveguide substrate can be made of commonly used optical waveguide materials. The trench 4 is fabricated using the optical waveguide substrate, simultaneously forming two optical waveguides. The two optical waveguides can be the first optical waveguide 2 and the second optical waveguide 14 as described above.

[0100] In one embodiment of the present invention, a focused ion beam (FIB) method is used for small-size precision etching. First, the location to be etched, i.e., the target area, is located under a scanning electron microscope. After determining the etching size, an etch protection film is deposited on both sides of the target area to be protected using ion beam-assisted deposition. The etch protection film is generally located in a non-target area of ​​the optical waveguide substrate, and the etch protection film is generally made of metal Pt.

[0101] After depositing and etching the protective film, the middle part of the trapezoidal cavity is first etched using a focused ion beam (FIB). Then, the angle of the optical waveguide substrate is adjusted, with an angle θ range of 17°-45°. Adjusting the angle of the optical waveguide substrate can be achieved by tilting the substrate. After adjusting the optical waveguide substrate to the required angle θ range, the two sides of the trapezoidal cavity are etched. In the specific process, the etching stop point is controlled by real-time scanning images using an electron microscope, and the cavity outline is gradually etched out. Then, the two cavities are etched out sequentially, ultimately achieving the fabrication of the groove 4. Of course, at this time, the first optical waveguide 2 and the second optical waveguide 14 are formed based on the etching of the optical waveguide substrate.

[0102] After preparing the tank 4, a reflective film 3 is prepared on the bottom of the tank 4. In one embodiment of the present invention, the reflectivity of the reflective film 3 is not less than 95%;

[0103] Reflective film 3 is a metal film;

[0104] The reflective film 3 can be prepared by electron beam evaporation, magnetron sputtering or ion beam sputtering.

[0105] Specifically, when fabricating the reflective film 3, a photomask can be fabricated on the first optical waveguide 2 and the second optical waveguide 14 using photoresist. The fabricated photomask includes a window corresponding to the bottom of the groove 4. Subsequently, the reflective film 3 can be fabricated using methods such as electron beam evaporation. The metal material of the reflective film 3 can be selected as needed, ensuring that the reflectivity of the reflective film 3 is not less than 95%. Generally, the thickness of the reflective film 3 can be 2% to 20% of the depth of the groove 4. In a specific implementation, the thickness of the reflective film 3 can be 20 nm.

[0106] After the reflective film 3 is prepared at the bottom of the tank 4, the other metal parts can be removed by a metal lift-off process. Simultaneously, the aforementioned etched protective film also needs to be removed using techniques commonly used in this technical field.

[0107] In one embodiment of the present invention, when a single-row carrier photodiode unit is integrated above a silicon-based unit, it includes:

[0108] When integrating a single-row carrier photodiode unit above a silicon-based unit, the following is included:

[0109] A power supply support connection unit is fabricated on silicon substrate 1, wherein,

[0110] The single-row charge-carrier photodiode unit is aligned and bonded to the power supply support connection unit to achieve flip-chip integration of the single-row charge-carrier photodiode unit on top of the silicon substrate 1.

[0111] During alignment bonding, alignment is performed using a first alignment mark unit 10 fabricated on a silicon substrate 1 and a second alignment mark unit 13 fabricated on a single-row carrier photodiode unit.

[0112] After the reflective film 3 is prepared, a power supply connection unit is prepared on the silicon substrate 1. During the preparation of the power supply connection unit, a supporting connection metal pad 5 and a power supply connection metal pad 16 are first prepared on the silicon substrate 1. As described above, the supporting connection metal pad 5 and the power supply connection metal pad 16 can be symmetrically distributed on both sides of the second optical waveguide 14. The supporting connection metal pad 5 and the power supply connection metal pad 16 can be prepared using existing commonly used processes, such as electron beam evaporation on the silicon substrate 1. The supporting connection metal pad 5 and the power supply connection metal pad 16 can be composite metal thin films. Furthermore, a connection electrode 6 is prepared on the silicon substrate 1. The connection electrode 6 is electrically connected to a power supply connection metal pad 16 to form a power supply connection pad.

[0113] Generally, the silicon substrate 1 can be an SOI substrate, or an insulating layer can be prepared on the silicon substrate 1 to achieve insulation isolation between the supporting connection metal pillar pad 5, the connecting electrode 6, and the power supply connection metal pillar pad 16 and the silicon substrate 1.

[0114] After fabricating the supporting metal pad 5, the power supply connecting metal pad 16, and the connecting electrode 6, metal pillars can be fabricated on each supporting metal pad 5 and power supply connecting metal pad 16 using electron beam evaporation to form supporting metal pad 15 and power supply connecting metal pillar 7, respectively. The height of supporting metal pad 15 and power supply connecting metal pillar 7 is generally 2μm to 4μm, and the height can be selected according to actual needs. The specific process conditions and procedures for fabricating supporting metal pad 5, connecting electrode 6, power supply connecting metal pad 16, supporting metal pad 15, and power supply connecting metal pillar 7 can be selected as needed. In specific implementation, the materials of supporting metal pad 15 and power supply connecting metal pillar 7 are different, and the specific materials should meet the heat dissipation requirements of the aforementioned power supply connection and support connection.

[0115] After the power supply connection unit is fabricated, the single-row carrier photodiode unit can be integrated on top of the silicon-based unit. The single-row carrier photodiode unit can be fabricated using techniques commonly used in this field, such as the fabrication of single-row carrier photodiodes and antennas on an InP substrate as mentioned above.

[0116] To improve the reliability of integrating a single-row carrier photodiode unit on top of a silicon-based unit, it is generally necessary to fabricate a first alignment mark unit 10 on the silicon substrate 1 and a second alignment mark unit 13 on the single-row carrier photodiode unit. Figure 3 An embodiment of the first alignment mark unit 10 is shown in the figure. Figure 5 An embodiment of the second alignment mark unit 13 is shown in the figure.

[0117] In specific implementation, when fabricating the power supply connection unit, the first alignment mark unit 10 can be fabricated on the silicon substrate 1. For example, the first alignment mark unit 10 can be fabricated simultaneously with the connection electrode 6. The corresponding alignment mark shapes of the first alignment mark unit 10 and the second alignment mark unit 13 can be selected as needed, so as to enable the alignment of the single-row carrier photodiode unit with the silicon-based unit using the first alignment mark unit 10 and the second alignment mark unit 13. The method and process of alignment using the first alignment mark unit 10 and the second alignment mark unit 13 can be consistent with the existing methods and will not be described in detail here.

[0118] After the single-row carrier photodiode unit is aligned with the silicon-based unit, the device substrate 8 inside the single-row carrier photodiode unit contacts the supporting connection metal pillar 15 and the power supply connection metal pillar 7. At this time, the device substrate 8 and the silicon substrate 1 are parallel to each other. After that, the single-row carrier photodiode unit is bonded to the supporting connection metal pillar 15 and the power supply connection metal pillar 7.

[0119] During pressure welding, ultrasonic heating is used. The required welding force depends on the distance between the top of the UTC-PD platform and the upper surfaces of the first optical waveguide 2 and the second optical waveguide 14, and is generally controlled within 0.5μm-1μm. The ultrasonic heating conditions can be selected as needed. After the single-row charge carrier photodiode unit is pressure welded onto the supporting connecting metal post 15 and the power supply connecting metal post 7, as described above, good electrical contact and heat conduction can be achieved.

[0120] In practice, the optical signal emission efficiency was simulated using Lumerical FDTD. The simulation parameters included: the thickness of the first optical waveguide 2 and the second optical waveguide 14 was 220 nm, the width of the first optical waveguide 2 and the second optical waveguide 14 was 500 nm, the etching angle arctanθ=0.5, the material of the reflective film 3 was Au, the thickness of the reflective film 3 was 10 nm, and the length of the reflective film 3 was 1.02 μm.

[0121] The optical signal is input from both the first optical waveguide 2 and the second optical waveguide 14, with an intensity of 0.5 and a waveguide spacing d of 0.44 μm. The simulation results are as follows: Figure 6 and Figure 7As shown in the figure, the optical signal is effectively reflected into free space. The light intensity at a distance of 0.5 μm above the plane of the first optical waveguide 2 and the second optical waveguide 14 is 0.224. Thus, it can be seen in this technical field that the light intensity has been greatly improved while the optical signal is still focused, which means that the high-efficiency transmission of the optical signal can be achieved.

[0122] In practice, the inclination of the sidewall of the tank 4 can be selected as needed. However, if the intensity of the optical signal in the first optical waveguide 2 and the second optical waveguide 14 is 0.5, and the intensity of the optical signal received by the single-row carrier photodiode 9 is 1, then the inclination of the sidewall of the tank 4 is consistent.

[0123] It should be noted that this method embodiment is a fabrication method embodiment corresponding to the single-row carrier photodiode on-chip integrated structure in this invention. Therefore, the content disclosed in the single-row carrier photodiode on-chip integrated structure embodiment is also applicable to this fabrication method embodiment, and similarly, the content disclosed in this fabrication method embodiment is also applicable to the single-row carrier photodiode on-chip integrated structure embodiment.

[0124] In summary, this invention sets up an optical signal processing structure within a silicon-based unit, and integrates a single-row carrier photodiode unit via flip-chip bonding on top of the silicon-based unit. The optical signal propagating along the first optical waveguide 2 and the second optical waveguide 14 enters the groove 4 and is reflected by the reflective film 3. The reflected optical signal is then incident on the active region of the single-row carrier photodiode 9. Therefore, the resulting integrated structure has the characteristics of simple structure, high optical signal transmission efficiency, long-term performance of the optical signal transmitting device without degradation, and easy scalability. It can also achieve a large UTC-PD device bandwidth and saturation current, thereby ensuring high-power output of the carrier signal.

[0125] After heterogeneously integrating single-row carrier photodiode units onto a silicon-based unit, the on-chip integrated structure emits during operation, causing its temperature to rise. Since the performance of the on-chip integrated structure is primarily affected by temperature, this invention effectively achieves support and heat dissipation through the supporting connecting metal pillar 15 and the power supply connecting metal pillar 7, thereby effectively reducing the operating temperature of the on-chip integrated structure and ensuring its performance. Furthermore, the bandwidth and saturation current of the on-chip integrated structure are positively correlated with the applied bias voltage. The higher the applied bias voltage, the more significant the heat generation of the on-chip integrated structure, and the lower its performance. Therefore, the supporting connecting metal pillar 15 and the power supply connecting metal pillar 7 effectively achieve support and heat dissipation, allowing the on-chip integrated structure to operate under a higher bias voltage, which positively impacts bandwidth and saturation current.

Claims

1. An on-chip integrated structure for a single-row carrier photodiode, characterized in that, The on-chip integrated structure includes: A silicon-based unit includes a silicon substrate and a plurality of optical waveguide units disposed on the silicon substrate, wherein the optical waveguide unit includes two optical waveguides for propagating optical signals, a groove for separating the two optical waveguides, and a reflective film disposed in the groove. A single-row carrier photodiode unit, heterogeneously integrated on a silicon-based unit, comprises several single-row carrier photodiodes, among which... A single-row charge carrier photodiode corresponds to a slot in an optical waveguide unit; The optical signal propagating along the optical waveguide enters the groove corresponding to the optical waveguide and is reflected by the reflective film. The reflected optical signal is then incident on the active region of the single-row carrier photodiode corresponding to the groove. The slot corresponding to the optical waveguide is the slot in the optical waveguide unit where the optical waveguide is located; The single-row carrier photodiode unit is integrated onto the silicon-based unit using a flip-chip bonding method. A power supply support connection unit adapted to a single-row carrier photodiode unit is disposed on the silicon substrate, wherein one power supply support unit corresponds to one single-row carrier photodiode unit; The power supply support connection unit includes a power supply connection unit for supplying power to a single-row carrier photodiode unit and a support connection unit for supporting the single-row carrier photodiode unit. The power supply connection unit includes at least two power supply connection metal posts; The supporting connection unit includes a plurality of supporting connection metal pillars, which are symmetrically distributed on both sides of the corresponding optical waveguide unit; For the single-row carrier photodiode unit corresponding to the power supply support unit, the single-row carrier photodiode unit is simultaneously welded to the power supply connection metal post and the support connection metal post, and the power supply connection metal post is used to supply power to the single-row carrier photodiode unit.

2. The on-chip integrated structure of a single-row carrier photodiode according to claim 1, characterized in that: Along the direction of optical signal propagation within the optical waveguide, the cross-sectional shape of the groove is trapezoidal; Within the tank, the area where the reflective film is arranged includes at least the bottom area of ​​the tank corresponding to the opening of the tank.

3. The on-chip integrated structure of a single-row carrier photodiode according to claim 1, characterized in that: The thickness of the reflective film is 2%-20% of the depth of the groove in which the reflective film is located; The reflectivity of the reflective film is not less than 95%.

4. The on-chip integrated structure of a single-row carrier photodiode according to claim 2, characterized in that: Along the direction of optical signal propagation in the optical waveguide, the front and rear side walls of the groove are both inclined, and the angle θ between the side wall of the groove and the bottom surface of the groove is 17°~45°.

5. The on-chip integrated structure of a single-row carrier photodiode according to any one of claims 1 to 4, characterized in that: The single-row charge carrier photodiode unit also includes an antenna that is electrically connected to the single-row charge carrier photodiode. A single-carrier photodiode converts the received optical signal into an electromagnetic wave signal and radiates the terahertz electromagnetic wave signal outward through an antenna.

6. A method for on-chip integration of a single-row carrier photodiode, characterized in that it is used for... The on-chip integrated structure of claim 1 is prepared by means of: A silicon-based unit is provided, the silicon-based unit including a silicon substrate and an optical waveguide unit, wherein the optical waveguide unit is located on the silicon substrate; the optical waveguide unit includes two optical waveguides for propagating optical signals, a groove for separating the two optical waveguides, and a reflective film disposed in the groove; A single-row carrier photodiode unit is provided and integrated on a silicon-based unit, wherein the single-row carrier photodiode in the single-row carrier photodiode unit corresponds to a slot in an optical waveguide unit, so that the active region of the single-row carrier photodiode receives the optical signal reflected by the reflective film in the corresponding slot.

7. The on-chip integration method for a single-row carrier photodiode according to claim 6, characterized in that, The method for fabricating the provided silicon-based unit includes: A silicon substrate is provided, and an optical waveguide substrate is fabricated at a predetermined position on the silicon substrate; Determine the location of the target area on the optical waveguide substrate, and set an etched protective film on the non-target area on the optical waveguide substrate; The first etching is performed on the target area of ​​the determined optical waveguide substrate based on focused ion beam etching. The optical waveguide substrate, after the first etching, is adjusted to the desired position, and a second etching is performed on the target area of ​​the optical waveguide substrate based on a focused ion beam to form two optical waveguides and a groove for separating the optical waveguides. In the cross section of the optical waveguide in the direction of optical signal propagation, the cross section of the groove is trapezoidal. In the cross section of the groove, the sidewalls of the groove are inclined, and the angle θ between the sidewalls of the groove and the bottom surface of the groove is 17°~45°.

8. The on-chip integration method for a single-row carrier photodiode according to claim 7, characterized in that, The thickness of the reflective film is 2%-20% of the depth of the groove in which the reflective film is located; The reflectivity of the reflective film is not less than 95%; The reflective film is a metallic film; The reflective film can be prepared by electron beam evaporation, magnetron sputtering, or ion beam sputtering.

9. The on-chip integration method for a single-row carrier photodiode according to any one of claims 6 to 8, characterized in that, in When a single-row carrier photodiode unit is integrated above a silicon-based unit, it includes: A power supply support connection unit is fabricated on a silicon substrate, wherein, The single-row charge-carrier photodiode unit is aligned and bonded to the power supply support connection unit to achieve flip-chip integration of the single-row charge-carrier photodiode unit on top of the silicon substrate. During alignment bonding, alignment is performed using a first alignment mark unit fabricated on a silicon substrate and a second alignment mark unit fabricated on a single-row carrier photodiode unit.