A memory mass production device and mass production method based on an embedded platform

Abstract

The present invention discloses a mass production device and a mass production method for a memory based on an embedded platform. The device includes a master controller and a number of mass production fixtures; a number of memories are connected to the number of mass production fixtures one by one, and finally the number of mass production fixtures is connected to the master controller through an industrial bus. The master controller controls all the mass production fixtures to achieve mass production of the memory; each mass production fixture is an embedded SOC platform, including a connector, a control circuit, and an embedded SOC; the connector is used to connect the memory; the embedded SOC is embedded with a linux operating system. By combining the embedded SOC with the control circuit, the memory signal interface and power supply interface are completely controlled, and at the same time, the operation log of the memory is received. The present invention removes the test host, greatly reduces the number of wire harnesses through the interconnection of the industrial bus, thereby reducing the volume of the mass production fixture, and there is no synchronization or competition problem between disks. It can be embedded in an incubator to achieve a one-stop mass production process and reduce the complexity of mass production process control.

Description

Technical Field

[0001] The present invention belongs to the technical field of mass production of memories, and particularly relates to a mass production device and a mass production method for memories based on an embedded platform. Background Art

[0002] Currently, most mass production of memories uses a mass production device consisting of a host (PC or server) and a control board, with a single host connecting to multiple disks (memories). Such a mass production device is often large in size. Since a single host manages multiple disks, the corresponding mass production method needs to solve the correspondence between logical disks and physical disks. Some steps in the mass production process sometimes need to be carried out at high or low temperatures. Generally, the existing mass production devices place the disks in a high and low temperature chamber and connect the data lines and battery lines to the outside of the chamber through connecting wires, which requires customizing the chamber and coordinating the operation of a large number of hosts.

[0003] The memory mass production device in the prior art is as Figure 1 shown. A single host connects to multiple memories (taking SSD as an example, if it is eMMC, a bridging chip is required), and multiple hosts are connected to the master control host through a switch. This method has the following disadvantages:

[0004] Disadvantage 1: The logical number of the memory needs to have a definite correspondence with the physical number. A single host connects to multiple memories, and the operating system assigns logical numbers to each memory, which has an unstable correspondence with its physical number, especially in the Windows system. Since this correspondence is dynamic, obtaining this correspondence requires a relatively complex software program, which will introduce a high degree of complexity. When the memory is connected through an expansion card, this complexity will be further increased.

[0005] Disadvantage 2: In the prior art, the host is large in size and cannot be directly placed in the temperature chamber, and needs to be achieved through a wiring method. Since there are many wiring harnesses, the customization requirements for the temperature chamber are relatively high, thus increasing the mass production cost.

[0006] Disadvantage 3: The management of disks in the prior art is relatively complex. When the master control host wants to find a certain disk, it needs to first find the corresponding host, and then find the corresponding disk through the correspondence mentioned in Disadvantage 1. And when a host has a problem, all the disks connected to this host need to be re-operated.

[0007] Disadvantage 4: The system performance of the prior art is not high. Due to the limited number of CPU cores, the CPU resources that can be allocated to each disk are limited. When multiple disks run simultaneously, the CPU load increases.

[0008] Disadvantage 5: Monitoring the disks in the prior art requires customizing circuits, resulting in an increase in cost. Summary of the Invention

[0009] The object of the present invention is to provide a memory mass production device and a mass production method based on an embedded platform, so as to solve the problems of large volume, high cost of existing memory mass production devices and high complexity of the mass production system.

[0010] The technical solution of the present invention is as follows:

[0011] A memory mass production device based on an embedded platform, the device includes a master control machine and a number of mass production fixtures; a number of memories are connected to the number of mass production fixtures one by one, and finally the number of mass production fixtures is connected to the master control machine through an industrial bus, and the master control machine is used to control all mass production fixtures to realize memory mass production;

[0012] Each mass production fixture is an embedded SOC platform, and each includes a connector, a control circuit and an embedded SOC; wherein, the connector is used to connect the memory; the embedded SOC is embedded with a linux operating system, and through the combination of the embedded SOC and the control circuit, it completely controls the memory signal interface and power interface, and at the same time receives the operation log of the memory.

[0013] Further, the embedded SOC includes at least one bus interface of PCIe, SATA and eMMC, and is connected to the memory through the corresponding bus. The embedded SOC also includes GPIO peripherals to cooperate with the control circuit to control the external behavior of the memory.

[0014] Further, the embedded SOC also includes an SMBUS peripheral, which is connected to the memory through the SMBUS bus.

[0015] Further, the embedded SOC also includes a UART serial port for collecting the memory log.

[0016] Further, the embedded SOC also supplies power to the memory through a monitoring power module and detects the current.

[0017] Further, the external behavior of the memory includes command transceiver, data transceiver, card opening, power control and startup mode control.

[0018] Further, the embedded SOC also displays the operation status or mass production result indication of the current mass production fixture through an indicator light connected thereto.

[0019] Further, the mass production fixture is integrated inside a high and low temperature box, and the master control machine is arranged outside the high and low temperature box, and the two are connected through an industrial bus.

[0020] Further, the industrial bus is an I2C, I3C, 485 or CAN bus.

[0021] A mass production method implemented by using the memory mass production device based on an embedded platform described in any one of the above, including:

[0022] Connect several memories to several mass production fixtures one by one;

[0023] Place the mass production fixture inside the high and low temperature chamber and execute a one-stop mass production process: K1→BIST→K2→SLT→K3; where K1, K2, and K3 are three card openings for burning the offline aging firmware, system test firmware, and user firmware respectively; BIST is the offline aging process, and SLT is the system test process.

[0024] Compared with the prior art, the present invention has the following advantages and beneficial effects:

[0025] (1) The volume of each fixture is significantly reduced, reducing the overall cost. First, the control circuit and the embedded SOC can be integrated onto the backplane or the bottom plate, removing the test host in the prior art; second, through the industrial bus interconnection, the number of wire harnesses is greatly reduced, thereby reducing the volume of the mass production fixture corresponding to each disk, and further reducing the cost.

[0026] (2) The anti-interference ability is increased. In the prior art test, the host and the memory need to be connected through a wire harness, while in the device of the present invention, the test host and the memory under test are directly connected through a connector. First, the connecting wire harness is removed, and second, the number of connectors is reduced, thereby improving the anti-interference ability.

[0027] (3) The system complexity is reduced. Each disk only corresponds to one host, and the test for all disks is a unified scheme, without synchronization or competition problems between disks. Due to the reduced volume, it can be embedded in the temperature chamber, thereby realizing a one-stop mass production process and reducing the complexity of mass production process control.

[0028] (4) There is a wider definition space for the test method and test program. For the test of a single memory, there are more hardware resources (CPU and NPU) for parallel test resources. In the prior art, the test host is generally a general-purpose CPU, and the test scheme is completely defined by software. In the embedded system, in addition to the general-purpose CPU, an NPU (neural network processing unit) can also be used, thereby broadening the definition space of the test method and test program. Description of the Drawings

[0029] Figure 1 is the logic diagram of the memory mass production device in the prior art;

[0030] Figure 2 is the logic diagram of the memory mass production device based on the embedded platform of the present invention;

[0031] Figure 3 is the logic diagram of a single mass production fixture of the present invention. Detailed Embodiment

[0032] In order to make the objectives, technical solutions and advantages of the present invention more clearly understood, the present invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not used to limit the present invention. In addition, the technical features involved in the various embodiments of the present invention described below can be combined with each other as long as they do not conflict with each other.

[0033] The present invention provides a mass production device and a mass production method for a memory based on an embedded platform, which solve the problems of the volume, cost and complexity of the mass production system of the existing memory mass production device.

[0034] In the mass production device based on the embedded platform of the present invention, each memory corresponds to an embedded platform. By combining the embedded platform with the control circuit, the memory signal interface and the power supply interface can be completely controlled, and at the same time, the operation log of the memory can be received. This mass production device based on the embedded platform can be made very small, the cost per disk will also be reduced, and it can be integrated into the high and low temperature box.

[0035] As Figure 2 shown, modern embedded SOC platforms generally have PCIe / SATA / eMMC interfaces. Cooperating with the control circuit, they can completely control the external behavior of memories such as SSDs, including command sending and receiving, data sending and receiving, card opening, power supply control, startup mode control, etc. Each SOC only controls one memory, so that there is no mutual influence between memories. Generally, the mass production fixture is placed in a temperature box and connected by an industrial bus, which can greatly reduce the wire harness connection between the temperature box and the outside world.

[0036] In addition, at the software level, since the main control hardware and system of each disk are exactly the same, they can be controlled in a unified manner, reducing the complexity of the software stack.

[0037] As Figure 3 shown, a single mass production fixture only corresponds to one memory (such as SSD, eMMC, etc.). The mass production fixture is a single PCB board, and all components are industrial grade. It is connected to the memory through the PCIe / SATA / eMMC bus (and at the same time provides the SMBUS bus). The power supply module monitored by the SOC supplies power to the memory and detects the current. The UART serial port collects the memory log, and the GPIO can control the I / O of the memory (such as controlling the startup mode, simulating keys, etc.). The indicator light can display the current operation state of the fixture or the mass production result indication.

[0038] The embedded SOC has the following functions: 1. A CPU architecture and a DDR storage interface that can install the Linux operating system; 2. One or more bus interfaces such as PCIe / SATA / eMMC; 3. Peripherals such as GPIO, SMBUS, and UART; 4. The embedded SOC is a single chip that simultaneously has the above functions.

[0039] As Figure 2 shown in the mass production system, individual mass production fixtures are connected together through an industrial bus (such as I2C, I3C, 485, or CAN bus), and all mass production devices are controlled by a master controller.

[0040] Under the existing technology, the mass production process is roughly divided into five processes: K1→BIST→K2→SLT→K3. Among them, K1, K2, and K3 are three card openings, which respectively burn the offline aging firmware, system test firmware, and user firmware. BIST is the offline aging process, and SLT is the system test process. Under the current technology, these five processes are at five stations and require five insertions and removals of the memory. The present invention can achieve one-stop mass production. Due to the reduction in the volume of the mass production fixture, it can be embedded in an incubator, and all mass production processes can be completed under a single mass production fixture.

[0041] In addition to the CPU computing unit, the embedded system has introduced an NPU neural network processing unit, and the system-level test SLT has a wider definition space. Currently, mainstream embedded SOCs, such as RK3588, etc., provide NPU units, which can enhance the test computing power.

[0042] In summary, the present invention has the following advantages:

[0043] (1) The volume of each fixture is significantly reduced, reducing the overall cost. First, the control circuit and the embedded SOC can be integrated onto the backplane or the bottom plate, removing the test host in the existing technology; second, through the interconnection of the industrial bus, the number of wire harnesses is greatly reduced, thereby reducing the volume of the mass production fixture corresponding to each disk, and further reducing the cost.

[0044] (2) The anti-interference ability is increased. In the existing technology test, the host and the memory need to be connected through a wire harness, while in the device of the present invention, the test host and the memory under test are directly connected through a connector. First, the connecting wire harness is removed, and second, the number of connectors is reduced, thereby improving the anti-interference ability.

[0045] (3) The system complexity is reduced. Each disk only corresponds to one host, and the test for all disks is a unified scheme, and there is no synchronization or competition problem between disks. Due to the volume reduction, it can be embedded in an incubator, so that a one-stop mass production process can be realized, reducing the complexity of mass production process control.

[0046] (4) The test methods and test procedures have a wider definition space. For the test of a single memory, there are more hardware resources (CPU and NPU) for parallel test resources. Under the existing technology, the test host is generally a general-purpose CPU, and the test scheme is completely defined by software. However, in the embedded system, in addition to the general-purpose CPU, an NPU (Neural Network Processing Unit) can also be used, thus broadening the definition space of the test methods and test procedures.

[0047] It should be noted that according to the needs of implementation, each step / component described in this application can be split into more steps / components, or two or more steps / components or partial operations of steps / components can be combined into new steps / components to achieve the purpose of the present invention.

[0048] It is easy for those skilled in the art to understand that the above are only the preferred embodiments of the present invention and are not intended to limit the present invention. Any modifications, equivalent replacements, and improvements made within the spirit and principle of the present invention shall be included within the protection scope of the present invention.

Claims

1. A mass production device for a memory based on an embedded platform, characterized in that, The device includes a master controller and a number of mass production fixtures; a number of memories are connected to the number of mass production fixtures one by one, and finally the number of mass production fixtures are connected to the master controller through an industrial bus, and all mass production fixtures are controlled by the master controller to achieve mass production of memories; Each mass production fixture is an embedded SOC platform, and each includes a connector, a control circuit, and an embedded SOC; among them, the connector is used to connect the memory; the embedded SOC is embedded with a linux operating system, and in combination with the control circuit through the embedded SOC, it completely controls the memory signal interface and power interface, and at the same time receives the operation log of the memory; The embedded SOC includes at least one bus interface among PCIe, SATA, and eMMC, and is connected to the memory through the corresponding bus. The embedded SOC also includes GPIO peripherals to cooperate with the control circuit to control the external behavior of the memory; the external behavior of the memory includes command transceiver, data transceiver, card opening, power control, and startup mode control; The embedded SOC also includes an SMBUS peripheral, which is connected to the memory through the SMBUS bus; the embedded SOC also includes a UART serial port for collecting the memory log.

2. The mass production device of a memory based on an embedded platform according to claim 1, characterized in that The embedded SOC also powers the memory through a monitoring power module and detects the current.

3. The memory mass production device based on an embedded platform according to claim 1, characterized in that, The embedded SOC also displays the operating status or mass production result indication of the current mass production fixture through the indicator light connected to it.

4. The memory mass production device based on an embedded platform according to claim 1, wherein, The mass production fixtures are integrated inside the high and low temperature chamber, and the master controller is located outside the high and low temperature chamber, and the two are connected through an industrial bus.

5. The mass production device of a memory based on an embedded platform according to claim 1, wherein The industrial bus is an I2C, I3C, 485 or CAN bus.

6. A mass production method implemented by using the mass production device based on an embedded platform described in any one of claims 1 to 5, characterized in that, Including: Connect a number of memories to a number of mass production fixtures one by one; The mass production fixtures are placed inside the high and low temperature chamber and execute a one-stop mass production process: K1→BIST→K2→SLT→K3; where K1, K2, and K3 are three card openings, and the offline aging firmware, system test firmware, and user firmware are burned respectively; BIST is the offline aging process, and SLT is the system test process.

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