A Micro LED device and its preparation method

Abstract

The present invention provides a Micro LED device and a method for fabricating the same. The Micro LED device includes a substrate and a light-emitting structure disposed on the substrate. The upper surface of the substrate has a first polarity region, a second polarity region, and a first polarity boundary region. The light-emitting structure includes a light-emitting layer, an electron blocking layer, and a p-type semiconductor layer stacked in sequence. The light-emitting structure is disposed in the first polarity boundary region, which is the boundary region between the first polarity region and the second polarity region. The first polarity region is a region having a first polarity, and the second polarity region is a region having a second polarity. The present invention divides the substrate into two regions of different polarity and simultaneously epitaxially grows LED devices. Micro LEDs are fabricated using the boundary regions of the two polarities, thereby alleviating QCSE and improving the luminous efficiency of the device.

Description

Technical Field

[0001] The present invention belongs to the technical field of light-emitting diode (LED) devices, and particularly relates to a Micro LED device and a preparation method thereof. Background Art

[0002] At present, GaN-based optoelectronic devices are mainly prepared from the polar surface (i.e., the c-axis direction). However, due to the lack of inversion symmetry of the wurtzite structure GaN crystal along the c-axis direction, the polar surface GaN material has strong spontaneous polarization and piezoelectric polarization effects. The quantum wells grown along the polar surface (such as InGaN / GaN quantum wells, Al x Ga 1-x N / A y Ga 1-y N quantum wells, InGaN / AlGaN quantum wells, etc.) will cause the quantum well band to tilt due to the polarization effect, causing the wave functions of electrons and holes to be spatially separated, resulting in a decrease in the quantum well radiative recombination efficiency, which is the so-called quantum-confined Stark effect (QCSE). Due to the existence of QCSE, the emission wavelength of the LED device shifts with the change of the injected current density. For LED devices and Micro LED devices used in the display field, this will lead to display color differences under different driving currents. For the application of Micro LED devices in visible light communication, QCSE increases the carrier recombination lifetime, thereby reducing the modulation bandwidth of the Micro LED device.

[0003] Growing GaN-based devices on semi-polar or non-polar surfaces can alleviate or eliminate the impact of QCSE. However, the material quality of semi-polar and non-polar GaN is far inferior to that of polar GaN. Although GaN-based devices based on non-polar and semi-polar surfaces weaken the negative effects of QCSE, the performance of the devices themselves is not high and cannot be compared with that of polar GaN-based devices.

[0004] Therefore, it is necessary to develop a new Micro LED device to overcome the above problems. Summary of the Invention

[0005] To address the shortcomings of the prior art, the present invention provides a Micro LED device and a method for fabricating the same. This invention divides a substrate into two regions of different polarity, simultaneously epitaxially grows LED devices, and utilizes the boundary region between the two polarities to fabricate the Micro LED, alleviating QCSE and improving the device's luminous efficiency.

[0006] To achieve this object, the present invention adopts the following technical solutions:

[0007] In a first aspect, the present invention provides a Micro LED device, comprising a substrate and a light-emitting structure disposed on the substrate, wherein the upper surface of the substrate has a first polarity region, a second polarity region, and a first polarity boundary region;

[0008] The light-emitting structure includes a light-emitting layer, an electron blocking layer and a p-type semiconductor layer stacked in sequence; the light-emitting structure is arranged in a first polarity junction region, the first polarity junction region is the junction region between the first polarity region and the second polarity region, the first polarity region is a region with a first polarity, and the second polarity region is a region with a second polarity.

[0009] In the prior art, GaN-based light-emitting devices grown along polar surfaces will cause the quantum well energy band to tilt due to the polarization effect, resulting in spatial separation of the wave functions of electrons and holes, which will lead to a decrease in the quantum well radiative recombination efficiency. The present invention utilizes a lateral polarity device structure to set a first polarity region with a first polarity and a second polarity region with a second polarity on the same substrate. Since the built-in polarization electric fields of the first polarity region and the second polarity region are in opposite directions, the energy band of the quantum well is close to a flat band at the boundary between the two polarity regions. At the same time, there is a local potential barrier at the polarity boundary, which has a stronger restriction ability on carriers. The present invention alleviates the QCSE and improves the luminous efficiency of the Micro LED device by setting a light-emitting structure in the boundary region between the first polarity region and the second polarity region (i.e., the first polarity boundary region).

[0010] The following are preferred technical solutions of the present invention, but are not intended to limit the technical solutions provided by the present invention. Through the following preferred technical solutions, the objectives and beneficial effects of the present invention can be better achieved and realized.

[0011] As a preferred technical solution of the present invention, the cross-sectional area of the light-emitting structure is 10%-50% of the cross-sectional area of the substrate, for example, it can be 10%, 15%, 20%, 25%, 30%, 35%, 40%, 45% or 50%, etc.

[0012] As a preferred technical solution of the present invention, the Micro LED device also includes a buffer layer, and the area where the buffer layer is located includes a first area having the first polarity, a second area having the second polarity, and a second polarity junction area, the second polarity junction area is located between the first area and the second area, and the light-emitting structure is arranged on the second polarity junction area.

[0013] It should be noted that the first region with the first polarity in the buffer layer overlaps with the orthographic projection of the above-mentioned first polarity region, the second region with the second polarity in the buffer layer overlaps with the orthographic projection of the above-mentioned second polarity region, and the second polarity boundary region in the buffer layer overlaps with the orthographic projection of the above-mentioned first polarity boundary region.

[0014] As a preferred technical solution of the present invention, the buffer layer includes a first buffer layer and a second buffer layer, the first buffer layer covers a portion of the substrate, and the second buffer layer covers the first buffer layer and the remaining portion of the substrate.

[0015] Preferably, the second buffer layer includes first to third sub-buffer layers, the first sub-buffer layer is arranged in the first region, the second sub-buffer layer is arranged in the second polarity boundary region, the third sub-buffer layer is arranged in the second region, and the light emitting structure is arranged on the second sub-buffer layer.

[0016] The present invention first sets a first buffer layer with a second polarity in the second polarity region, and then sets a second buffer layer in the first polarity region, the first polarity boundary region and the first buffer layer. Since the second buffer layer (i.e., the first sub-buffer layer) set on the first polarity region is in direct contact with the substrate, the first sub-buffer layer has the first polarity; since the second buffer layer (i.e., the third sub-buffer layer) set on the first buffer layer is in direct contact with the first buffer layer, the third sub-buffer layer will continue the polarity of the first buffer layer and have the second polarity; since the built-in polarization electric fields of the first sub-buffer layer and the third sub-buffer layer are in opposite directions, at the boundary of the two polarity regions, the energy band of the quantum well is close to a flat band, and at the same time, a local potential barrier exists at the polarity boundary, which has a stronger restriction ability on carriers. The present invention alleviates QCSE and improves the luminous efficiency of Micro LED devices by setting a second sub-buffer layer at the boundary of the two polarity regions and setting a light-emitting structure on the second sub-buffer layer.

[0017] As a preferred technical solution of the present invention, the Micro LED device further includes an n-type semiconductor layer, wherein the n-type semiconductor layer is disposed between the second buffer layer and the light-emitting structure, and the n-type semiconductor layer covers the second buffer layer;

[0018] The region where the n-type semiconductor layer is located includes a third region having the first polarity, a fourth region having the second polarity, and a third polarity boundary region, and the light emitting structure is disposed on the third polarity boundary region.

[0019] It should be noted that the third region with the first polarity in the n-type semiconductor layer overlaps with the orthographic projection of the above-mentioned first polarity region, the fourth region with the second polarity in the n-type semiconductor layer overlaps with the orthographic projection of the above-mentioned second polarity region, and the third polarity boundary region in the n-type semiconductor layer overlaps with the orthographic projection of the above-mentioned first polarity boundary region.

[0020] The present invention arranges an n-type semiconductor layer on the second buffer layer, so that the n-type semiconductor layer located in the first region of the second buffer layer (i.e., the first sub-buffer layer) continues the first polarity of the first sub-buffer layer, and the n-type semiconductor layer located in the second region of the second buffer layer (i.e., the third sub-buffer layer) continues the second polarity of the third sub-buffer layer. Since the built-in polarization electric fields of the n-type semiconductor layer arranged on the first sub-buffer layer and the n-type semiconductor layer arranged on the third sub-buffer layer are in opposite directions, the energy band of the quantum well is close to a flat band at the boundary of the two polarity regions. At the same time, a local potential barrier exists at the polarity boundary, which has a stronger ability to restrict carriers. The present invention alleviates the QCSE and improves the luminous efficiency of the Micro LED device by arranging a light-emitting structure on the n-type semiconductor layer at the junction of the two polarity regions.

[0021] Preferably, the thickness of the n-type semiconductor layer arranged in the third region is the same as the thickness of the n-type semiconductor layer arranged in the fourth region, and the thickness of the n-type semiconductor layer arranged in the third polarity boundary region is greater than the thickness of the n-type semiconductor layer arranged in the third region.

[0022] As a preferred technical solution of the present invention, the Micro LED device also includes a plurality of columns distributed in an array, a mask layer is provided between adjacent columns, and the surface of the column away from the substrate is flush with the surface of the mask layer away from the substrate; wherein, the area where the columns are provided is a first area with a first polarity, the area where the mask layer is provided is a second area with a second polarity, and the boundary area between the mask layer and the columns is a second polarity boundary area.

[0023] The light emitting structure is arranged on the second polarity boundary region.

[0024] Preferably, the Micro LED device further includes an n-type semiconductor layer, and the n-type semiconductor layer is located between the pillar and the substrate.

[0025] The present invention sequentially arranges an n-type semiconductor layer and a column on a substrate, and a mask layer is arranged between adjacent columns. The mask layer has a second polarity. Since the column is in direct contact with the n-type semiconductor layer, the polarity of the n-type semiconductor layer is continued, and therefore the column has a first polarity. Since the built-in polarization electric fields of the column and the mask layer are in opposite directions, the energy band of the quantum well is close to a flat band at the boundary of the two polarity regions. At the same time, there is a local potential barrier at the polarity boundary, which has a stronger restriction ability on carriers. Therefore, the present invention arranges a light-emitting structure at the junction of the two polarity regions, alleviates the QCSE, and improves the luminous efficiency of the Micro LED device.

[0026] As a preferred technical solution of the present invention, the first polar region is a nitrogen polar region, and the second polar region is a gallium polar region.

[0027] Preferably, the width of the first polarity boundary region is 0.5-5 μm, for example, 0.5 μm, 1 μm, 1.5 μm, 2 μm, 2.5 μm, 3 μm, 3.5 μm, 4 μm, 4.5 μm or 5 μm.

[0028] In this invention, the width of the first polarity interface region is controlled within a specific range to fabricate Micro LED devices of a specific microscopic size. If the width of the polarity interface region is too small, the Micro LED etching process requires high precision, making it difficult to obtain a Micro LED device with the entire luminous area located within the polarity interface region. If the width of the polarity interface region is too large, it is difficult to control its uniformity during the growth process, resulting in a poor improvement in the luminous efficiency of the fabricated device.

[0029] The light-emitting layer has a thickness of 20-200 nm (for example, 20 nm, 40 nm, 60 nm, 80 nm, 100 nm, 120 nm, 140 nm, 160 nm, 180 nm, or 200 nm), the electron blocking layer has a thickness of 10-30 nm (for example, 10 nm, 12 nm, 14 nm, 16 nm, 18 nm, 20 nm, 22 nm, 24 nm, 26 nm, 28 nm, or 30 nm), and the p-type semiconductor layer has a thickness of 50-200 nm (for example, 50 nm, 60 nm, 70 nm, 80 nm, 90 nm, 100 nm, 110 nm, 120 nm, 130 nm, 140 nm, 150 nm, 160 nm, 170 nm, 180 nm, 190 nm, or 200 nm).

[0030] The light-emitting layer is Al x Ga 1-x N / A y Ga 1-yThe electron blocking layer is any one of an AlGaN layer, an AlInN layer, and an AlInGaN layer; and the p-type semiconductor layer is a p-type nitride layer.

[0031] In a second aspect, the present invention provides a method for preparing a Micro LED device, comprising the following steps:

[0032] providing a substrate;

[0033] fabricating an initial light-emitting structure on the substrate;

[0034] Etching the first polarity region and the second polarity region of the initial light-emitting structure to obtain a light-emitting structure;

[0035] In which, the light-emitting structure includes a light-emitting layer, an electron blocking layer and a p-type semiconductor layer stacked in sequence; the light-emitting structure is arranged in a first polarity junction region, the first polarity junction region is the junction region between the first polarity region and the second polarity region, the first polarity region is a region with a first polarity, and the second polarity region is a region with a second polarity.

[0036] In the present invention, the initial light-emitting structure covers the substrate and includes a light-emitting layer, an electron blocking layer, and a p-type semiconductor layer stacked in sequence. In the present invention, the light-emitting structure is obtained by etching the initial light-emitting structures in the first polarity region and the second polarity region, retaining only the initial light-emitting structure in the first polarity boundary region.

[0037] As a preferred technical solution of the present invention, the method for manufacturing an initial light-emitting structure on the substrate includes:

[0038] Preparing a first buffer layer on the substrate, and etching the first buffer layer to expose a portion of the substrate;

[0039] forming a second buffer layer on the exposed substrate and the first buffer layer;

[0040] An n-type semiconductor layer, a light-emitting layer, an electron blocking layer and a p-type semiconductor layer are sequentially prepared on the second buffer layer to obtain the initial light-emitting structure.

[0041] The present invention forms a second buffer layer on an exposed substrate and on a first buffer layer, so that the second buffer layer in direct contact with the substrate has a first polarity, and the second buffer layer in direct contact with the first buffer layer has a second polarity. A polarity boundary region is formed at the junction of the different polarities. In this polarity boundary region, the energy band of the quantum well approaches a flat band, and a local potential barrier exists at the polarity boundary, providing a stronger carrier confinement capability. By providing a light-emitting structure in the polarity boundary region, the present invention alleviates the QCSE and improves the luminous efficiency of the Micro LED device.

[0042] Preferably, the growth conditions of the second buffer layer include a temperature of 1150-1250°C (for example, 1150°C, 1160°C, 1170°C, 1180°C, 1190°C, 1200°C, 1210°C, 1220°C, 1230°C, 1240°C or 1250°C), a pressure of 50-400mbar (for example, 50mbar, 100mbar, 150mbar) r, 200 mbar, 250 mbar, 300 mbar, 350 mbar or 400 mbar, etc.), V-III ratio is 8000-20000 (for example, it can be 8000, 9000, 10000, 11000, 12000, 13000, 14000, 15000, 16000, 17000, 18000, 19000 or 20000, etc.).

[0043] Alternatively, the growth conditions of the second buffer layer include a temperature of 500-650°C (for example, 510°C, 520°C, 530°C, 540°C, 550°C, 560°C, 570°C, 580°C, 590°C, 600°C, 610°C, 620°C, 630°C, 640°C or 650°C, etc.), a pressure of 100-600mbar (for example, 100mbar, 150mbar, 200mbar, 250mbar, 300mbar, 350mbar, 400mbar, 450mbar, 500mbar, 550mbar or 600mbar, etc.), and a V-III ratio of 500-5000 (for example, 500, 1000, 1500, 2000, 2500, 3000, 3500, 4000 or 4500, etc.).

[0044] In the present invention, by regulating the growth conditions of the second buffer layer, the width range of the first polarity boundary region can be regulated to obtain a Micro LED device with higher luminous efficiency.

[0045] As a preferred technical solution of the present invention, the method for manufacturing an initial light-emitting structure on the substrate includes:

[0046] preparing an n-type semiconductor layer on the substrate;

[0047] preparing a mask layer on the n-type semiconductor layer, etching a side of the mask layer away from the n-type semiconductor layer to form a window, and growing a column in the window to obtain a buffer layer;

[0048] Sequentially preparing a light-emitting layer, an electron blocking layer, and a p-type semiconductor layer on the buffer layer to obtain the initial light-emitting structure;

[0049] The pillar is in contact with the n-type semiconductor layer, and a surface of the pillar away from the n-type semiconductor layer is flush with a surface of the mask layer away from the n-type semiconductor layer.

[0050] The present invention prepares an n-type semiconductor layer with a first polarity on a substrate, then prepares a mask layer with a second polarity on the n-type semiconductor layer, and then etches the side of the mask layer away from the n-type semiconductor layer to form a window, and grows a column in the window; because the column is in direct contact with the n-type semiconductor layer, the column continues the polarity of the n-type semiconductor layer, thereby obtaining a column with the first polarity.

[0051] Preferably, the growth conditions of the column include a temperature of 950-1100°C (for example, 950°C, 970°C, 980°C, 1000°C, 1020°C, 1040°C, 1060°C, 1080°C or 1100°C, etc.), a carrier gas of hydrogen or a mixture of hydrogen and nitrogen, a pressure of 50-400 mbar (for example, 50 mbar, 100 mbar, 150 mbar, 200 mbar, 250 mbar, 300 mbar, 350 mbar or 400 mbar, etc.), a V-III ratio of 10-500 (for example, 10, 50, 100, 150, 200, 250, 300, 350, 400, 450 or 500, etc.).

[0052] Compared with the prior art, the present invention has the following beneficial effects:

[0053] (1) The present invention divides two polarity regions on the substrate and simultaneously epitaxially grows LED devices. Micro LEDs are prepared using the boundary regions of the two polarities, which alleviates QCSE and improves the luminous efficiency of the device.

[0054] (2) The present invention controls the growth conditions of the second buffer layer within a specific range so that the first polarity boundary region has an appropriate width range, thereby obtaining a Micro LED device with higher luminous efficiency. BRIEF DESCRIPTION OF THE DRAWINGS

[0055] Figure 1 1 is a schematic structural diagram of a Micro LED device provided by the present invention;

[0056] Figure 2 is a top view of the Micro LED device provided by the present invention;

[0057] Figure 3-7 1 is a schematic structural diagram corresponding to each step in a method for preparing a Micro LED device provided by the present invention;

[0058] Figure 8-12 1 is a schematic structural diagram corresponding to each step in another method for preparing a Micro LED device provided by the present invention;

[0059] Figure 13 This is a graph showing the test results of the width of the second polarity boundary region in the Micro LED device provided in Example 1 of the present invention;

[0060] Figure 14 Schematic diagram of the structure of the Micro LED device provided in Comparative Example 1 of the present invention;

[0061] Among them, 1-substrate, 2-buffer layer, 21-first buffer layer, 22-second buffer layer, 221-first sub-buffer layer, 222-second sub-buffer layer, 223-third sub-buffer layer, 23-pillar, 24-mask layer, 241-window, 3-n-type semiconductor layer, 4-light-emitting structure, 41-light-emitting layer, 42-electron blocking layer, 43-p-type semiconductor layer,

[0062] 1-I: first polarity region, 1-II: second polarity region, 1-III: first polarity boundary region, 2-I: first region, 2-II: second region, 2-III: second polarity boundary region. DETAILED DESCRIPTION

[0063] The technical solution of the present invention will be further described below with reference to the accompanying drawings and through specific implementation methods.

[0064] The present invention is further described in detail below. However, the following embodiments are merely simplified examples of the present invention and do not represent or limit the scope of protection of the present invention. The scope of protection of the present invention shall be subject to the claims.

[0065] It should be understood that, in the description of the present invention, the terms "center", "longitudinal", "lateral", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside" and other knowledge orientations or positional relationships are based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present invention.

[0066] It should be noted that, in the description of the present invention, unless otherwise expressly specified or limited, the terms "disposed," "connected," and "connected" should be understood in a broad sense. For example, they may refer to fixed connections, detachable connections, or integral connections; mechanical connections or electrical connections; direct connections or indirect connections through an intermediate medium; and internal connections between two components. Those skilled in the art will understand the specific meanings of the above terms in the present invention based on specific circumstances.

[0067] See also Figure 1 and Figure 2 , Figure 1 This is a schematic structural diagram of a Micro LED device provided by the present invention. Figure 2 This is a top view of the Micro LED device provided by the present invention, which includes a substrate 1 and a light-emitting structure 4 arranged on the substrate 1. The surface of the substrate 1 has a first polarity region 1-I, a second polarity region 1-II and a first polarity boundary region 1-III.

[0068] The light-emitting structure 4 includes a light-emitting layer 41, an electron blocking layer 42 and a p-type semiconductor layer 43 stacked in sequence; the light-emitting structure 4 is arranged in the first polarity boundary region 1-III, the first polarity boundary region 1-III is the boundary region between the first polarity region 1-I and the second polarity region 1-II, the first polarity region 1-I is a region with a first polarity, and the second polarity region 1-II is a region with a second polarity.

[0069] As a specific example of this embodiment, the material of substrate 1 includes any one of sapphire, SiC, Si, diamond, GaN, and AlN, and the thickness is 300 μm-1 mm (for example, 300 μm, 400 μm, 500 μm, 600 μm, 700 μm, 800 μm, 900 μm, or 1 mm). Specifically, taking substrate 1 as GaN as an example, the first polarity is nitrogen polarity and the second polarity is gallium polarity; alternatively, the first polarity is gallium polarity and the second polarity is nitrogen polarity.

[0070] As a specific example of this embodiment, the light emitting layer 41 may be Al x Ga 1-x N / AlyGa 1-y Any one of the N quantum well light-emitting layer, InGaN / GaN quantum well light-emitting layer or InGaN / InGaN quantum well light-emitting layer has a thickness of 20-200nm, for example, it can be 20nm, 40nm, 60nm, 80nm, 100nm, 120nm, 140nm, 160nm, 180nm or 200nm.

[0071] Furthermore, the light emitting layer 41 is Al x Ga 1-x N / A y Ga 1-y N quantum well light-emitting layer, Al x Ga 1-x The thickness of the N-well layer is 1-3 nm (for example, 1 nm, 1.5 nm, 2 nm, 2.5 nm, or 3 nm), and x is 0.2-0.5 (for example, 0.2, 0.3, 0.4, or 0.5); Al y Ga 1-y The thickness of the N barrier layer is 8-15 nm (for example, 8 nm, 9 nm, 10 nm, 11 nm, 12 nm, 13 nm, 14 nm, or 15 nm), y is 0.3-0.6 (for example, 0.3, 0.4, 0.5, or 0.6), and x is 0. <y。

[0072] Furthermore, the light-emitting layer 41 is an InGaN / GaN quantum well light-emitting layer, the number of periods of the InGaN well layer and the GaN barrier layer is 1-10 (for example, it can be 1, 2, 3, 4, 5, 6, 7, 8, 9 or 10), the thickness of the InGaN well layer is 2-3nm (for example, it can be 2nm, 2.5nm or 3nm, etc.), and the thickness of the GaN barrier layer is 8-15nm (for example, it can be 8nm, 9nm, 10nm, 11nm, 12nm, 13nm, 14nm or 15nm, etc.).

[0073] Furthermore, the light-emitting layer 41 is an InGaN / InGaN quantum well light-emitting layer, the number of periods of the InGaN well layer and the InGaN barrier layer is 1 to 10 (for example, it can be 1, 2, 3, 4, 5, 6, 7, 8, 9 or 10), the thickness of the InGaN well layer is 2 to 3 nm (for example, it can be 2 nm, 2.5 nm or 3 nm, etc.), and the thickness of the InGaN barrier layer is 8 to 15 nm (for example, it can be 8 nm, 9 nm, 10 nm, 11 nm, 12 nm, 13 nm, 14 nm or 15 nm, etc.).

[0074] As a specific example of this embodiment, the material of the electron blocking layer 42 is any one of AlGaN, AlInN, AlInGaN, or a combination of at least two of them, with a thickness of 10-30 nm (for example, 10 nm, 12 nm, 14 nm, 16 nm, 18 nm, 20 nm, 22 nm, 24 nm, 26 nm, 28 nm, or 30 nm, etc.), and the content of the Al component in the electron blocking layer 42 is 0.35-0.65 (for example, 0.35, 0.4, 0.45, 0.5, 0.55, 0.6, or 0.65, etc.).

[0075] As a specific example of this embodiment, the p-type semiconductor layer 43 is a p-type nitride layer, and the material of the p-type semiconductor layer 43 is any one of GaN, AlGaN, InGaN, AlInN, AlInGaN, or a combination of at least two thereof, with a thickness of 50-200 nm (for example, 50 nm, 70 nm, 80 nm, 100 nm, 120 nm, 140 nm, 160 nm, 180 nm, or 200 nm, etc.), and the content of the Al component in the p-type semiconductor layer 43 is 0.2-0.5 (for example, 0.2, 0.3, 0.4, or 0.5, etc.).

[0076] As a specific example of this embodiment, the Micro LED device also includes a buffer layer, which is arranged between the substrate 1 and the light-emitting structure 4. The buffer layer covers the substrate 1. The area where the buffer layer is located includes a first area with a first polarity, a second area with a second polarity, and a second polarity junction area. The second polarity junction area is located between the first area and the second area, and the light-emitting structure 4 is arranged on the second polarity junction area.

[0077] As a specific example of this embodiment, the buffer layer includes a first buffer layer and a second buffer layer. The first buffer layer covers a portion of the substrate 1 , and the second buffer layer covers the first buffer layer and the remaining portion of the substrate 1 .

[0078] As a specific example of this embodiment, the second buffer layer includes a first sub-buffer layer to a third sub-buffer layer, the first sub-buffer layer is arranged in the first region, the second sub-buffer layer is arranged in the second polarity boundary region, the third sub-buffer layer is arranged in the second region, and the light-emitting structure 4 is arranged on the second sub-buffer layer.

[0079] The present invention first sets a first buffer layer with a second polarity in the second polarity region 1-II, and then sets a second buffer layer on the first polarity region 1-I, the first polarity boundary region 1-III, and the first buffer layer; since the second buffer layer (i.e., the first sub-buffer layer) set on the first polarity region 1-I is in direct contact with the substrate 1, the first sub-buffer layer has the first polarity; since the second buffer layer (i.e., the third sub-buffer layer) set on the first buffer layer is in direct contact with the first buffer layer, the third sub-buffer layer will continue the polarity of the first buffer layer and have the second polarity; since the built-in polarization electric fields of the first sub-buffer layer and the third sub-buffer layer are in opposite directions, at the boundary between the two polarity regions, the energy band of the quantum well is close to a flat band, and at the same time, a local potential barrier exists at the polarity boundary, which has a stronger restriction ability on carriers. The present invention alleviates QCSE and improves the luminous efficiency of the Micro LED device by setting a second sub-buffer layer at the boundary between the two polarity regions and setting a light-emitting structure 4 on the second sub-buffer layer.

[0080] As a specific example of this embodiment, the material of the first buffer layer is selected from any one of AlN, GaN, and AlGaN, or a combination of at least two thereof, and the thickness is 5-30 nm.

[0081] As a specific example of this embodiment, the material of the second buffer layer is selected from any one of AlN, GaN, and AlGaN, or a combination of at least two thereof, and the thickness is 10 nm-1 μm.

[0082] It should be noted that the second buffer layer is flush with the surface away from the substrate 1. Therefore, the thickness of the second buffer layer directly in contact with the substrate 1 is different from the thickness of the second buffer layer disposed on the first buffer layer. The thickness of the second buffer layer directly in contact with the substrate 1 is equal to the sum of the thickness of the second buffer layer disposed on the first buffer layer and the thickness of the first buffer layer.

[0083] In the present invention, the thickness of the second buffer layer refers to the thickness of the second buffer layer in direct contact with the substrate 1 .

[0084] As a specific example of this embodiment, the Micro LED device further includes an n-type semiconductor layer, which is disposed between the second buffer layer and the light emitting structure 4 and covers the second buffer layer.

[0085] The region where the n-type semiconductor layer is located includes a third region with the first polarity, a fourth region with the second polarity, and a third polarity boundary region, and the light emitting structure 4 is disposed on the third polarity boundary region.

[0086] The present invention arranges an n-type semiconductor layer on the second buffer layer, so that the n-type semiconductor layer located in the first region (i.e., the first sub-buffer layer) of the second buffer layer continues the first polarity of the first sub-buffer layer, and the n-type semiconductor layer located in the second region (i.e., the third sub-buffer layer) of the second buffer layer continues the second polarity of the third sub-buffer layer. Since the built-in polarization electric fields of the n-type semiconductor layer arranged on the first sub-buffer layer and the n-type semiconductor layer arranged on the third sub-buffer layer are in opposite directions, the energy band of the quantum well is close to a flat band at the boundary between the two polarity regions. At the same time, a local potential barrier exists at the polarity boundary, which has a stronger ability to restrict carriers. The present invention alleviates the QCSE and improves the luminous efficiency of the Micro LED device by arranging a light-emitting structure on the n-type semiconductor layer at the junction of the two polarity regions.

[0087] As a specific example of this embodiment, the thickness of the n-type semiconductor layer set in the third region is the same as the thickness of the n-type semiconductor layer set in the fourth region, and the thickness of the n-type semiconductor layer set in the third polarity boundary region is greater than the thickness of the n-type semiconductor layer set in the third region.

[0088] As a specific example of this embodiment, the material of the n-type semiconductor layer is any one of AlGaN, GaN, and AlInGaN, or a combination of at least two thereof. If the thickness of the n-type semiconductor layer is too thin, the crystal quality is poor, the electron supply is insufficient, and the luminous efficiency and output power of the device are reduced; if the thickness of the n-type semiconductor layer is too thick, the growth time of the n-type semiconductor layer is too long, resulting in high cost. Based on this, in this embodiment, the thickness of the n-type semiconductor layer disposed in the third region and the n-type semiconductor layer disposed in the fourth region is 0.3-1 μm, for example, 0.3 μm, 0.4 μm, 0.5 μm, 0.6 μm, 0.7 μm, 0.8 μm, 0.9 μm, or 1 μm; the thickness of the n-type semiconductor layer disposed in the third polarity boundary region is 0.3-1 μm, for example, 0.3 μm, 0.4 μm, 0.5 μm, 0.6 μm, 0.7 μm, 0.8 μm, 0.9 μm, or 1 μm.

[0089] As a specific example of this embodiment, the first polarity region 1 - I is a nitrogen polarity region, and the second polarity region 1 - II is a gallium polarity region.

[0090] As a specific example of this embodiment, the width of the first polarity boundary region 1-III is 1-5 μm.

[0091] It should be noted that the width of the first polarity boundary region 1-III, the width of the second polarity boundary region, and the width of the third polarity boundary region are the same.

[0092] Based on the structure of the above-mentioned Micro LED device, the present invention provides a method for preparing a Micro LED device, which comprises the following steps:

[0093] S1: Provide a substrate.

[0094] S2: growing a first buffer layer on the substrate, and etching the first buffer layer to expose a portion of the substrate.

[0095] The inclination angle of the substrate is 1°-4°, for example, 1°, 2°, 3° or 4°.

[0096] In one embodiment, the substrate is a C-face SiC substrate; the material of the first buffer layer is AlN, and the thickness of the first buffer layer is 5-30 nm, for example, 5 nm, 7 nm, 10 nm, 12 nm, 15 nm, 18 nm, 20 nm, 23 nm, 25 nm, 27 nm or 30 nm; the method for growing the first buffer layer includes metal-organic chemical vapor deposition (MOCVD), and the temperature for growing the first buffer layer is 900-1100° C., for example, 900° C., 920° C., 940° C., 960° C., 980° C., 1000° C., 1020° C., 1040° C., 1060° C., 1080° C. or 1100° C.; the pressure for growing the first buffer layer is 50-400 mbar, for example, 50 mbar, 100 mbar, 150 mbar. , 200 mbar, 250 mbar, 300 mbar, 350 mbar, or 400 mbar; the V / III ratio of the first buffer layer is 100-3000, for example, 100, 300, 500, 700, 1000, 1200, 1500, 1800, 2000, 2200, 2500, 2800, or 3000; the carrier gas is hydrogen, or a mixture of hydrogen and nitrogen. AlN grown on a C-plane SiC substrate using the above conditions has metallic polarity.

[0097] In another embodiment, the substrate is a C-plane sapphire substrate, the material of the first buffer layer is GaN, and the thickness of the first buffer layer is 10-30 nm, for example, it can be 10 nm, 12 nm, 15 nm, 18 nm, 20 nm, 23 nm, 25 nm, 27 nm or 30 nm; the method of growing the first buffer layer includes MOCVD, and the temperature of growing the first buffer layer is 500-600 ° C, for example, it can be 500 ° C, 510 ° C, 520 ° C, 530 ° C, 540 ° C, 550 ° C, 560 ° C, 570 ° C, 580 ° C, 590 ° C or 600 ° C. 00°C, etc.; the pressure for growing the first buffer layer is 100-400 mbar, for example, 100 mbar, 150 mbar, 200 mbar, 250 mbar, 300 mbar, 350 mbar, or 400 mbar; the V / III ratio for growing the first buffer layer is 500-3000, for example, 500, 700, 1000, 1200, 1500, 1800, 2000, 2200, 2500, 2800, or 3000; the carrier gas is hydrogen, or a mixture of hydrogen and nitrogen. The first buffer layer grown on a C-plane sapphire substrate under the above conditions has gallium polarity.

[0098] Etching methods include photolithography and etching techniques.

[0099] It should be noted that the etched first buffer layer covers the second polarity region.

[0100] S3: growing a second buffer layer on the exposed substrate and the first buffer layer.

[0101] In one embodiment, the material of the second buffer layer is AlN, and the thickness of the second buffer layer is 0.2-1 μm, for example, it can be 0.2 μm, 0.3 μm, 0.4 μm, 0.5 μm, 0.6 μm, 0.7 μm, 0.8 μm, 0.9 μm or 1 μm; the method of growing the second buffer layer includes MOCVD, and the temperature of growing the second buffer layer is 1150-1250°C, for example, it can be 1150°C, 1160°C, 1170°C, 1180°C, 1190°C, 1200°C, 1210°C, 1220°C, 1230°C, 1240°C or 1250℃, etc.; the pressure for growing the second buffer layer is 50-400mbar, for example, it can be 50mbar, 100mbar, 150mbar, 200mbar, 250mbar, 300mbar, 350mbar or 400mbar, etc.; the V / III ratio for growing the second buffer layer is 8000-20000, for example, it can be 8000, 8500, 9000, 9500, 10000, 10500, 11000, 11500 or 20000, etc.; the carrier gas is hydrogen, or the carrier gas is a mixture of hydrogen and nitrogen.

[0102] AlN grown under these conditions on a C-face SiC substrate (i.e., the second buffer layer) has nitrogen polarity, while AlN grown under these conditions on a metal-polarity AlN (i.e., the first buffer layer) inherits the polarity of the underlying layer, maintaining metal polarity. As a result, the first region of the epitaxial wafer has nitrogen polarity, while the second region has metal polarity (i.e., gallium polarity), with a continuous polarity boundary region existing at the junction of the two polarity regions.

[0103] In another embodiment, the material of the second buffer layer is GaN, and the thickness of the second buffer layer is 10-30 nm, for example, 10 nm, 12 nm, 15 nm, 18 nm, 20 nm, 23 nm, 25 nm, 27 nm or 30 nm; the temperature for growing the second buffer layer is 500-650° C., for example, 500° C., 520° C., 540° C., 560° C., 580° C., 600° C., 620° C., 630° C. or 650° C.; the pressure for growing the second buffer layer is 100-600 mbar, for example, it can be 100 mbar, 200 mbar, 300 mbar, 400 mbar, 500 mbar or 600 mbar; the V / III ratio of growing the second buffer layer is 500-5000, for example, it can be 500, 700, 1000, 1500, 2000, 2500, 3000, 3500, 4000, 4500 or 5000; the carrier gas is hydrogen, or the carrier gas is a mixture of hydrogen and nitrogen.

[0104] Furthermore, before growing the second buffer layer, the temperature of the reaction chamber is first raised to 1000-1100°C, for example, it can be 1000°C, 1020°C, 1040°C, 1060°C, 1080°C or 1100°C; then, hydrogen and ammonia are introduced to perform high-temperature nitridation treatment on the substrate, and the treatment time is 3-10 minutes, for example, it can be 3 minutes, 4 minutes, 5 minutes, 6 minutes, 7 minutes, 8 minutes, 9 minutes or 10 minutes.

[0105] The GaN (second buffer layer) grown under these conditions after high-temperature nitridation on a C-plane sapphire substrate has nitrogen polarity, while the GaN (second buffer layer) grown under these conditions on a gallium-polarity GaN (first buffer layer) inherits the polarity of the underlying layer, maintaining gallium polarity. As a result, the first region of the epitaxial wafer has nitrogen polarity, while the second region has gallium polarity, with a continuous polarity boundary region at the junction of the two polarity regions.

[0106] Furthermore, the second buffer layer includes a first sub-buffer layer to a third sub-buffer layer, the first sub-buffer layer is in contact with the substrate and has a first polarity; the third sub-buffer layer is in contact with the first buffer layer, continues the polarity of the first buffer layer, and has a second polarity; the second sub-buffer layer is located between the first sub-buffer layer and the third sub-buffer layer.

[0107] S4: growing an n-type semiconductor layer on the second buffer layer.

[0108] The thickness of the n-type semiconductor layer is 0.3-1 μm, for example, 0.3 μm, 0.4 μm, 0.5 μm, 0.6 μm, 0.7 μm, 0.8 μm, 0.9 μm or 1 μm; the temperature for growing the n-type semiconductor layer is 1000-1200°C, for example, 1000°C, 1020°C, 1040°C, 1060°C, 1080°C, 1100°C, 1120°C, 1140°C, 1160°C, 1180°C or 1200°C; the pressure for growing the n-type semiconductor layer is 5 0-400 mbar, for example, it can be 50 mbar, 100 mbar, 150 mbar, 200 mbar, 250 mbar, 300 mbar, 350 mbar or 400 mbar; the V / III ratio for growing the n-type semiconductor layer is 500-5000, for example, it can be 1000, 1500, 2000, 2500, 3000, 3500, 4000, 4500 or 5000; the carrier gas is hydrogen, or the carrier gas is a mixture of hydrogen and nitrogen.

[0109] S5: preparing a light-emitting layer on the n-type semiconductor layer.

[0110] In one embodiment, the light emitting layer is Al x Ga 1-x N / A y Ga 1-y N quantum well light-emitting layer, the temperature for growing the light-emitting layer is 1050-1200°C, for example, it can be 1050°C, 1070°C, 1080°C, 1100°C, 1120°C, 1140°C, 1160°C, 1180°C or 1200°C; the pressure for growing the light-emitting layer is 50-400mbar, for example, it can be 50mbar, 100mbar, 150mbar, 200mbar, 250mbar, 300mbar, 350mbar or 400mbar; the V / III ratio for growing the light-emitting layer is 1000-5000, for example, it can be 1000, 1500, 2000, 2500, 3000, 3500, 4000, 4500 or 5000; the carrier gas is hydrogen, or the carrier gas is a mixture of hydrogen and nitrogen.

[0111] Furthermore, Al x Ga 1-x N-well layer and AlyGa 1-y The growth temperature of the N barrier layers is independently selected from 1050-1200°C.

[0112] In another embodiment, the light-emitting layer is an InGaN / GaN quantum well light-emitting layer, and the temperature for growing the InGaN well layer is 700-800°C, for example, it can be 700°C, 720°C, 740°C, 760°C, 780°C or 800°C; the pressure for growing the InGaN well layer is 200-600 mbar, for example, it can be 200 mbar, 250 mbar, 300 mbar, 350 mbar, 400 mbar, 450 mbar, 500 mbar, 550 mbar or 600 mbar; the V / III ratio for growing the InGaN well layer is 10000-40000, for example, it can be 10000, 15000, 20000, 25000, 30000, 35000 or 50000, and the carrier gas is nitrogen. The temperature for growing the GaN barrier layer is 830-950°C, for example, 830°C, 850°C, 870°C, 880°C, 900°C, 920°C, or 950°C; the pressure for growing the GaN barrier layer is 200-600 mbar, for example, 200 mbar, 250 mbar, 300 mbar, 350 mbar, 400 mbar, 450 mbar, 500 mbar, 550 mbar, or 600 mbar; the V / III ratio for growing the GaN barrier layer is 5000-20000, for example, 5000, 7000, 10000, 12000, 15000, 18000, or 20000, and the carrier gas is nitrogen.

[0113] In another embodiment, the light-emitting layer is an InGaN / InGaN quantum well light-emitting layer, and the temperature for growing the InGaN well layer is 700-800°C, for example, it can be 700°C, 720°C, 740°C, 760°C, 780°C or 800°C; the pressure for growing the InGaN well layer is 200-600mbar, for example, it can be 200mbar, 250mbar, 300mbar, 350mbar, 400mbar, 450mbar, 500mbar, 550mbar or 600mbar; the V / III ratio for growing the InGaN well layer is 10000-40000, for example, it can be 10000, 15000, 20000, 25000, 30000, 35000 or 50000, and the carrier gas is nitrogen. The temperature for growing the InGaN barrier layer is 780-880°C, for example, 780°C, 790°C, 800°C, 810°C, 820°C, 830°C, 840°C, 850°C, 860°C, 870°C, or 880°C. The pressure for growing the InGaN barrier layer is 200-600 mbar, for example, 200 mbar, 250 mbar, 300 mbar, 350 mbar, 400 mbar, 450 mbar, 500 mbar, 550 mbar, or 600 mbar. The V / III ratio for growing the InGaN barrier layer is 5000-40000, for example, 5000, 7000, 10000, 12000, 15000, 18000, or 20000, and the carrier gas is nitrogen.

[0114] S6: forming an electron-blocking layer (EBL) on the light-emitting layer.

[0115] The thickness of the electron blocking layer is 10-30 nm, for example, 10 nm, 12 nm, 15 nm, 18 nm, 20 nm, 23 nm, 25 nm, 27 nm or 30 nm; the material of the electron blocking layer is AlGaN, and the content of the Al component is 0.35-0.65; the temperature for growing the electron blocking layer is 950-1200° C., for example, 950° C., 970° C., 1000° C., 1050° C., 1100° C., 1120° C., 1150° C., 1180° C. or 1200° C.; the electron blocking layer is grown at a temperature of 950-1200° C. The pressure of the layer is 50-400 mbar, for example, it can be 50 mbar, 100 mbar, 150 mbar, 200 mbar, 250 mbar, 300 mbar, 350 mbar or 400 mbar; the V / III ratio of the growing electron blocking layer is 500-5000, for example, it can be 500, 1000, 1500, 2000, 2500, 3000, 3500, 4000, 4500 or 5000; the carrier gas is hydrogen, or the carrier gas is a mixture of hydrogen and nitrogen.

[0116] S7: preparing a p-type semiconductor layer on the electron blocking layer.

[0117] The temperature for growing the electron blocking layer is 950-1200° C., for example, it can be 950° C., 970° C., 1000° C., 1050° C., 1100° C., 1120° C., 1150° C., 1180° C. or 1200° C.; the pressure for growing the electron blocking layer is 50-400 mbar, for example, it can be 50 mbar, 100 mbar, 150 mbar, 200 mbar, 250 mbar, 300 mbar, 350 mbar or 400 mbar; the V / III ratio for growing the electron blocking layer is 500-5000, for example, it can be 500, 1000, 1500, 2000, 2500, 3000, 3500, 4000, 4500 or 5000; the carrier gas is hydrogen, or the carrier gas is a mixture of hydrogen and nitrogen.

[0118] S8: Etching the n-type semiconductor layer, the light-emitting layer, the electron blocking layer, and the p-type semiconductor layer provided on the first polarity region and the second polarity region to obtain a Micro LED device.

[0119] The etching method includes a photolithography etching process.

[0120] It should be noted that when etching the n-type semiconductor layer provided on the first polarity region and the second polarity region, the n-type semiconductor layer provided on the first polarity region and the second polarity region is not completely removed, but partially etched so that the thickness of the n-type semiconductor layer provided on the first polarity region is the same as the thickness of the n-type semiconductor layer provided on the second polarity region, and the thickness of the n-type semiconductor layer provided on the first polarity boundary region is greater than the thickness of the n-type semiconductor layer provided on the second polarity region.

[0121] The present invention also provides another Micro LED device, which includes a stacked substrate and a light-emitting structure arranged on the substrate.

[0122] The light-emitting structure includes a light-emitting layer, an electron blocking layer and a p-type semiconductor layer stacked in sequence; the light-emitting structure is arranged in a first polarity junction region, the first polarity junction region is the junction region between the first polarity region and the second polarity region, the first polarity region is a region with a first polarity, and the second polarity region is a region with a second polarity.

[0123] As a specific example of this embodiment, the substrate material includes any one of sapphire, SiC, Si, diamond, GaN, and AlN, and has a thickness of 300 μm to 1 mm, for example, 300 μm, 400 μm, 500 μm, 600 μm, 700 μm, 800 μm, 900 μm, or 1 mm. Specifically, taking GaN as an example, the first polarity is nitrogen polarity and the second polarity is gallium polarity; alternatively, the first polarity is gallium polarity and the second polarity is nitrogen polarity.

[0124] As a specific example of this embodiment, the light-emitting layer is Al x Ga 1-x N / A y Ga 1-y Any one of the N quantum well light-emitting layer, the InGaN / GaN quantum well light-emitting layer or the InGaN / InGaN quantum well light-emitting layer has a thickness of 20-200 nm.

[0125] Furthermore, the light emitting layer 41 is Al x Ga 1-x N / A y Ga 1-y N quantum well light-emitting layer, Al x Ga 1-x The thickness of the N-well layer is 1-3 nm (for example, 1 nm, 1.5 nm, 2 nm, 2.5 nm, or 3 nm), and x is 0.2-0.5 (for example, 0.2, 0.3, 0.4, or 0.5); Al y Ga 1-yThe thickness of the N barrier layer is 8-15 nm (for example, 8 nm, 9 nm, 10 nm, 11 nm, 12 nm, 13 nm, 14 nm, or 15 nm), y is 0.3-0.6 (for example, 0.3, 0.4, 0.5, or 0.6), and x is 0. <y。

[0126] Furthermore, the light-emitting layer 41 is an InGaN / GaN quantum well light-emitting layer, the number of periods of the InGaN well layer and the GaN barrier layer is 1-10 (for example, it can be 1, 2, 3, 4, 5, 6, 7, 8, 9 or 10), the thickness of the InGaN well layer is 2-3nm (for example, it can be 2nm, 2.5nm or 3nm, etc.), and the thickness of the GaN barrier layer is 8-15nm (for example, it can be 8nm, 9nm, 10nm, 11nm, 12nm, 13nm, 14nm or 15nm, etc.).

[0127] Furthermore, the light-emitting layer is an InGaN / InGaN quantum well light-emitting layer, the thickness of the InGaN well layer is 2 to 3 nm (for example, it can be 2 nm, 2.5 nm or 3 nm, etc.), and the thickness of the InGaN barrier layer is 8 to 15 nm (for example, it can be 8 nm, 9 nm, 10 nm, 11 nm, 12 nm, 13 nm, 14 nm or 15 nm, etc.).

[0128] As a specific example of this embodiment, the material of the electron blocking layer is any one of AlGaN, AlInN, AlInGaN, or a combination of at least two of them, with a thickness of 10-30 nm (for example, 10 nm, 12 nm, 14 nm, 16 nm, 18 nm, 20 nm, 22 nm, 24 nm, 26 nm, 28 nm, or 30 nm, etc.), and the content of the Al component in the electron blocking layer 42 is 0.35-0.65 (for example, 0.35, 0.4, 0.45, 0.5, 0.55, 0.6, or 0.65, etc.).

[0129] As a specific example of this embodiment, the p-type semiconductor layer is a p-type nitride layer, the material of the p-type semiconductor layer is any one of GaN, AlGaN, InGaN, AlInN, AlInGaN or a combination of at least two thereof, and the thickness is 50-200 nm (for example, it can be 50 nm, 70 nm, 80 nm, 100 nm, 120 nm, 140 nm, 160 nm, 180 nm or 200 nm, etc.), and the content of Al component in the p-type semiconductor layer 43 is 0.2-0.5 (for example, it can be 0.2, 0.3, 0.4 or 0.5, etc.).

[0130] As a specific example of this embodiment, the Micro LED device also includes a plurality of columns distributed in an array, a mask layer is arranged between adjacent columns, and the surface of the column away from the substrate is flush with the surface of the mask layer away from the substrate; the area where the columns are provided is a first area with a first polarity, the second area is the area where the mask layer is provided is a second area with a second polarity, and the second polarity junction area is the junction area between the mask layer and the column is the second polarity junction area.

[0131] As a specific example of this embodiment, the diameter of the column is 500nm-5μm, for example, it can be 500nm, 1μm, 1.5μm, 2μm, 2.5μm, 3μm, 3.5μm, 4μm, 4.5μm or 5μm, etc.; the height of the column is 100nm-2μm, for example, it can be 100nm, 200nm, 500nm, 700nm, 1μm, 1.5μm or 2μm, etc.; the spacing between any two adjacent columns is 1-10μm, for example, it can be 1μm, 2μm, 3μm, 4μm, 5μm, 6μm, 7μm, 8μm, 9μm or 10μm, etc.

[0132] As a specific example of this embodiment, the material of the mask layer is SiO2 or SiN x , with a thickness of 10-100 nm, for example, it can be 10 nm, 20 nm, 30 nm, 40 nm, 50 nm, 60 nm, 70 nm, 80 nm, 90 nm or 100 nm, etc.

[0133] As a specific example of this embodiment, the Micro LED device further includes an n-type semiconductor layer, and the n-type semiconductor layer is located between the pillar and the substrate.

[0134] As a specific example of this embodiment, the n-type semiconductor layer is a nitrogen-polarity n-type nitride layer, and the material of the nitrogen-polarity n-type nitride layer is any one of GaN, AlGaN, InGaN, AlInGaN or a combination of at least two thereof, and the thickness is 100-500nm, for example, it can be 100nm, 200nm, 300nm, 400nm or 500nm, etc.

[0135] In the present invention, an n-type semiconductor layer, a mask layer and a column are sequentially arranged on a substrate, the mask layer is etched to form a window exposing the n-type semiconductor layer, the column covers the mask layer window and contacts the n-type semiconductor layer, and since the column is in direct contact with the n-type semiconductor layer, the polarity of the n-type semiconductor layer is continued, so the column has a first polarity and the mask layer has a second polarity. The polarity of the first region (i.e., the region where the column is arranged) is opposite to that of the second region (i.e., the region where the mask layer is arranged), and the directions of the built-in polarization electric fields are opposite. At the boundary between the two polarity regions, the energy band of the quantum well is close to a flat band, and at the same time, there is a local potential barrier at the polarity boundary, which has a stronger limiting ability for carriers. Therefore, the present invention arranges a light-emitting structure at the junction of the two polarity regions, alleviates the QCSE, and improves the luminous efficiency of the Micro LED device.

[0136] Based on the structure of the above-mentioned Micro LED device, the present invention provides a method for preparing a Micro LED device, which comprises the following steps:

[0137] Step A: Provide a substrate.

[0138] Step B: growing an n-type semiconductor layer on the substrate.

[0139] In one embodiment, when the material of the n-type semiconductor layer is AlGaN, the growth method includes molecular beam epitaxy (MBE) and metal-organic chemical vapor deposition (MOCVD). When the MOCVD process is used, the growth conditions include a temperature of 950-1100° C., a pressure of 50-600 mbar, a V / III ratio of 250-3000, and a carrier gas of hydrogen; when the MBE process is used, the growth conditions include a temperature of 800-900° C., a nitrogen flow rate of 0.5-1.5 sccm, a Ga metal beam equivalent pressure of [5e-8, 5e-6] Torr, and an Al metal beam equivalent pressure of [7e-9, 9e-7] Torr; the thickness of the n-type semiconductor layer is 100-500 nm.

[0140] Step C: depositing a mask layer on the n-type semiconductor layer, and etching a side of the mask layer away from the n-type semiconductor layer to form a plurality of windows.

[0141] The deposition method is PECVD, and the deposition conditions include a deposition pressure of 200-600 mbar, a radio frequency power of 30-70 W, a SiH4 flow rate of 50-250 sccm, and an NH3 flow rate of 10-50 sccm; the etching method includes inductively coupled plasma (ICP) or reactive ion etching (RIE).

[0142] Step D: growing a column with the same thickness as the mask layer in the window, wherein the column contacts the n-type semiconductor layer to obtain a buffer layer.

[0143] The temperature of the growth column is 950-1100° C., for example, 950° C., 960° C., 980° C., 1000° C., 1020° C., 1040° C., 1060° C., 1080° C., or 1100° C. The pressure of the growth column is 50-400 mbar, for example, 50 mbar, 100 mbar, 150 mbar, 200 mbar, 250 mbar, 300 mbar, 350 mbar, or 400 mbar. The V / III ratio of the growth column is 250-2500, for example, 250, 500, 700, 1000, 1200, 1500, 1800, 2000, 2200, or 2500.

[0144] Furthermore, the pillar is in contact with the n-type semiconductor layer, and the pillar continues the polarity of the n-type semiconductor layer, which is a first polarity. The material of the pillar is n-type GaN, the Ga source required for growing n-type GaN is TMGa, the N source is NH3, and the flow ratio of TMGa and NH3 is (0.05-1):1, for example, it can be 0.05:1, 0.1:1, 0.2:1, 0.3:1, 0.4:1, 0.5:1, 0.6:1, 0.7:1, 0.8:1, 0.9:1 or 1:1; the carrier gas is hydrogen, or the carrier gas is a mixture of hydrogen and nitrogen.

[0145] The area where the pillars are set is the first area with the first polarity, the second area where the mask layer is set is the second area with the second polarity, and the second polarity boundary area is the boundary area between the mask layer and the pillars.

[0146] Step E: preparing a light-emitting layer on the pillars and the mask layer.

[0147] In another embodiment, the light emitting layer is Al x Ga 1-x N / A y Ga 1-yN quantum well light-emitting layer, the temperature for growing the light-emitting layer is 1050-1200°C, for example, it can be 1050°C, 1070°C, 1080°C, 1100°C, 1120°C, 1140°C, 1160°C, 1180°C or 1200°C; the pressure for growing the light-emitting layer is 50-400mbar, for example, it can be 50mbar, 100mbar, 150mbar, 200mbar, 250mbar, 300mbar, 350mbar or 400mbar; the V / III ratio for growing the light-emitting layer is 1000-5000, for example, it can be 1000, 1500, 2000, 2500, 3000, 3500, 4000, 4500 or 5000; the carrier gas is hydrogen, or the carrier gas is a mixture of hydrogen and nitrogen.

[0148] Furthermore, Al x Ga 1-x N-well layer and AlyGa 1-y The growth temperature of the N barrier layers is independently selected from 1050-1200°C.

[0149] In another embodiment, the light-emitting layer is an InGaN / GaN quantum well light-emitting layer, and the temperature for growing the InGaN well layer is 700-800°C, for example, it can be 700°C, 720°C, 740°C, 760°C, 780°C or 800°C; the pressure for growing the InGaN well layer is 200-600 mbar, for example, it can be 200 mbar, 250 mbar, 300 mbar, 350 mbar, 400 mbar, 450 mbar, 500 mbar, 550 mbar or 600 mbar; the V / III ratio for growing the InGaN well layer is 10000-40000, for example, it can be 10000, 15000, 20000, 25000, 30000, 35000 or 50000, and the carrier gas is nitrogen. The temperature for growing the GaN barrier layer is 830-950°C, for example, 830°C, 850°C, 870°C, 880°C, 900°C, 920°C, or 950°C; the pressure for growing the GaN barrier layer is 200-600 mbar, for example, 200 mbar, 250 mbar, 300 mbar, 350 mbar, 400 mbar, 450 mbar, 500 mbar, 550 mbar, or 600 mbar; the V / III ratio for growing the GaN barrier layer is 5000-20000, for example, 5000, 7000, 10000, 12000, 15000, 18000, or 20000, and the carrier gas is nitrogen.

[0150] In another embodiment, the light-emitting layer is an InGaN / InGaN quantum well light-emitting layer, and the temperature for growing the InGaN well layer is 700-800°C, for example, 700°C, 720°C, 740°C, 760°C, 780°C or 800°C; the pressure for growing the InGaN well layer is 200-600 mbar, for example, 200 mbar, 250 mbar, 300 mbar, 350 mbar, 400 mbar, 450 mbar, 500 mbar, 550 mbar or 600 mbar; the V / III ratio for growing the InGaN well layer is 10,000-40,000, for example, 10,000, 15,000, 20,000, 25,000, 30,000, 35,000 or 50,000, and the carrier gas is nitrogen. The temperature for growing the InGaN barrier layer is 780-880°C, for example, 780°C, 790°C, 800°C, 810°C, 820°C, 830°C, 840°C, 850°C, 860°C, 870°C, or 880°C. The pressure for growing the InGaN barrier layer is 200-600 mbar, for example, 200 mbar, 250 mbar, 300 mbar, 350 mbar, 400 mbar, 450 mbar, 500 mbar, 550 mbar, or 600 mbar. The V / III ratio for growing the InGaN barrier layer is 5000-40000, for example, 5000, 7000, 10000, 12000, 15000, 18000, or 20000, and the carrier gas is nitrogen.

[0151] Step F: preparing an electron blocking layer on the light-emitting layer.

[0152] The temperature for growing the electron blocking layer is 1050-1200° C., for example, it can be 1050° C., 1070° C., 1080° C., 1100° C., 1120° C., 1140° C., 1160° C., 1180° C. or 1200° C.; the pressure for growing the electron blocking layer is 50-400 mbar, for example, it can be 50 mbar, 100 mbar, 150 mbar, 200 mbar, 250 mbar, 300 mbar, 350 mbar or 400 mbar; the V / III ratio for growing the electron blocking layer is 1000-5000, for example, it can be 1000, 1500, 2000, 2500, 3000, 3500, 4000, 4500 or 5000, and the carrier gas is hydrogen, or the carrier gas is a mixture of hydrogen and nitrogen.

[0153] Step G: preparing a p-type semiconductor layer on the electron blocking layer.

[0154] The temperature for growing the electron blocking layer is 1050-1200° C., for example, it can be 1050° C., 1070° C., 1080° C., 1100° C., 1120° C., 1140° C., 1160° C., 1180° C. or 1200° C.; the pressure for growing the electron blocking layer is 50-400 mbar, for example, it can be 50 mbar, 100 mbar, 150 mbar, 200 mbar, 250 mbar, 300 mbar, 350 mbar or 400 mbar; the V / III ratio for growing the electron blocking layer is 1000-5000, for example, it can be 1000, 1500, 2000, 2500, 3000, 3500, 4000, 4500 or 5000; the carrier gas is hydrogen, or the carrier gas is a mixture of hydrogen and nitrogen.

[0155] Step H: Etching the n-type semiconductor layer, the light-emitting layer, the electron blocking layer, and the p-type semiconductor layer provided on the mask layer to obtain a Micro LED device.

[0156] The etching method includes a photolithography etching process.

[0157] It should be noted that when etching the n-type semiconductor layer provided on the mask layer, the n-type semiconductor layer is not completely removed, but is partially etched so that the thickness of the n-type semiconductor layer provided on the first region is the same as the thickness of the n-type semiconductor layer provided on the second region, and the thickness of the n-type semiconductor layer provided on the second polarity boundary region is greater than the thickness of the n-type semiconductor layer provided on the first region.

[0158] See also Figure 3-7 The present invention provides a Micro LED device, which includes a substrate 1, a buffer layer 2, an n-type semiconductor layer 3 and a light-emitting structure 4 stacked in sequence.

[0159] The material of the substrate 1 includes any one of sapphire, SiC, Si, diamond, GaN, and AlN, and the thickness is 300-1000 μm.

[0160] The buffer layer 2 includes a first region 2-I having a first polarity, a second region 2-II having a second polarity, and a second polarity boundary region 2-III, with the second polarity boundary region 2-III located between the first region 2-I and the second region 2-II. Specifically, the first polarity is nitrogen polarity, and the second polarity is gallium polarity. The width of the second polarity boundary region 2-III is 1-5 μm.

[0161] The buffer layer 2 includes a first buffer layer 21 and a second buffer layer 22, the first buffer layer 21 covers a portion of the substrate 1, and the second buffer layer 22 covers the first buffer layer 21 and the remaining portion of the substrate 1; the second buffer layer 22 includes a first sub-buffer layer 221 to a third sub-buffer layer 223, the first sub-buffer layer 221 is arranged in the first region 2-I, the second sub-buffer layer 222 is arranged in the second polarity boundary region 2-III, and the third sub-buffer layer 223 is arranged in the second region 2-II.

[0162] Furthermore, the material of the first buffer layer 21 is selected from any one of AlN, GaN, AlGaN, AlInGaN or a combination of at least two thereof, with a thickness of 5-30nm; the material of the second buffer layer 22 is selected from any one of AlN, GaN, AlGaN, AlInGaN or a combination of at least two thereof, with a thickness of 200nm-1μm.

[0163] The n-type semiconductor layer 3 covers the second buffer layer 22. The material of the n-type semiconductor layer 3 is any one of AlGaN, GaN, AlGaN, AlInGaN, or a combination of at least two of them. The thickness of the n-type semiconductor layer 3 arranged on the first sub-buffer layer 221 and the n-type semiconductor layer 3 arranged on the third sub-buffer layer 223 are both 300nm-1μm. The thickness of the n-type semiconductor layer 3 arranged on the second sub-buffer layer 222 is 300nm-1μm, and the thickness of the n-type semiconductor layer 3 arranged on the second sub-buffer layer 222 is greater than the thickness of the n-type semiconductor layer 3 arranged on the first sub-buffer layer 221.

[0164] The light emitting structure 4 includes a light emitting layer 41 , an electron blocking layer 42 and a p-type semiconductor layer 43 stacked in sequence. The light emitting structure 4 is disposed on the second sub-buffer layer 222 . The cross-sectional area of the light emitting structure 4 is 10%-50% of the cross-sectional area of the substrate 1 .

[0165] The light emitting layer 41 is Al x Ga 1-x N / A y Ga 1-y The thickness of any one of the N quantum well light emitting layer, InGaN / GaN quantum well light emitting layer or InGaN / InGaN quantum well light emitting layer is 20-200nm. x Ga 1-x N / A y Ga 1-y When the N quantum well light-emitting layer is x Ga 1-x The thickness of the N-well layer is 1-3 nm, and x is 0.2-0.5; Al y Ga 1-yThe thickness of the N barrier layer is 8 - 15 nm, y is 0.3 - 0.6, and x < y. When the light-emitting layer 41 is an InGaN / GaN quantum well light-emitting layer, the number of periods of the InGaN well layer and the GaN barrier layer is 1 - 10, the thickness of the InGaN well layer is 2 - 3 nm, and the thickness of the GaN barrier layer is 8 - 15 nm. When the light-emitting layer 41 is an InGaN / InGaN quantum well light-emitting layer, the number of periods of the InGaN well layer and the InGaN barrier layer is 1 - 10, the thickness of the InGaN well layer is 2 - 3 nm, and the thickness of the InGaN barrier layer is 8 - 15 nm.

[0166] The material of the electron blocking layer 42 is any one or a combination of at least two of AlGaN, AlInN, and AlInGaN, the thickness is 10 - 30 nm, and the content of the Al component in the electron blocking layer 42 is 0.35 - 0.65.

[0167] The p-type semiconductor layer 43 is a p-type nitride layer. The material of the p-type semiconductor layer 43 is any one or a combination of at least two of GaN, AlGaN, InGaN, AlInN, and AlInGaN, the thickness is 50 - 200 nm, and the content of the Al component in the p-type semiconductor layer 43 is 0.2 - 0.5.

[0168] In a specific embodiment, the preparation method of the above Micro LED device includes the following steps:

[0169] S1: Provide a substrate 1.

[0170] The substrate 1 is a C-plane SiC substrate.

[0171] S2: As Figure 3 shown, use MOCVD to grow the first buffer layer 21 on the substrate 1 with an inclination angle of 1° - 4°; then use photolithography and etching techniques to etch the first buffer layer 21 to expose a part of the substrate 1.

[0172] The material of the first buffer layer 21 is AlN. Set the temperature to 900 - 1100 °C, the pressure to 50 - 400 mbar, and the V / III ratio to 100 - 3000 to grow the first buffer layer 21; the carrier gas is hydrogen, or the carrier gas is a mixed gas of hydrogen and nitrogen.

[0173] S3: As Figure 4 shown, set the temperature to 1150 - 1250 °C, the pressure to 50 - 400 mbar, and the V / III ratio to 8000 - 20000, introduce the carrier gas, and grow the second buffer layer 22 made of AlN on the exposed substrate 1 and the first buffer layer 21.

[0174] The carrier gas is hydrogen, or the carrier gas is a mixed gas of hydrogen and nitrogen.

[0175] like Figure 4 As shown, the second buffer layer 22 covers the first buffer layer 21 and the remaining portion of the substrate 1 , and the second buffer layer 22 includes a first sub-buffer layer 221 , a second sub-buffer layer 222 and a third sub-buffer layer 223 .

[0176] Furthermore, the first buffer layer 21 and the second buffer layer 22 constitute a buffer layer 2, and the buffer layer 2 includes a first region 2-I with a first polarity, a second region 2-II with a second polarity, and a second polarity boundary region 2-III, and the second polarity boundary region 2-III is located between the first region 2-I and the second region 2-II.

[0177] S4: As Figure 5 As shown, the temperature is set to 1050-1200° C., the pressure is set to 50-400 mbar, the V / III ratio is set to 1000-5000, a carrier gas is introduced, and the n-type semiconductor layer 3 is grown on the second buffer layer 22 .

[0178] The carrier gas is hydrogen, or a mixed gas of hydrogen and nitrogen.

[0179] S5: Set the temperature to 1050-1200°C, the pressure to 50-400 mbar, the V / III ratio to 1000-5000, introduce the carrier gas, and grow Al on the n-type semiconductor layer 3. x Ga 1-x N / A y Ga 1-y N quantum well light-emitting layer.

[0180] The carrier gas is hydrogen, or a mixed gas of hydrogen and nitrogen.

[0181] S6: setting the temperature to 1050-1200° C., the pressure to 50-400 mbar, the V / III ratio to 1000-5000, introducing a carrier gas, and growing an electron blocking layer 42 on the light-emitting layer 41 .

[0182] The carrier gas is hydrogen, or a mixed gas of hydrogen and nitrogen.

[0183] S7: As Figure 6 As shown, the temperature is set to 1050-1200° C., the pressure is set to 50-400 mbar, the V / III ratio is set to 1000-5000, and a carrier gas is introduced to form a p-type semiconductor layer 43 on the electron blocking layer 42 .

[0184] S8: Etch the n-type semiconductor layer 3, the light-emitting layer 41, the electron blocking layer 42 and the p-type semiconductor layer 43 on the first region 2-I and the second region 2-II using a photolithography technique to obtain a Micro LED device, such as Figure 7 shown.

[0185] In another specific embodiment, the method for preparing the Micro LED device includes the following steps:

[0186] S1: Provide a substrate 1.

[0187] S2: If Figure 3 As shown, a first buffer layer 21 is grown on a substrate 1 using MOCVD; and then the first buffer layer 21 is etched using a photolithography etching technique to expose a portion of the substrate 1.

[0188] The first buffer layer 21 is made of GaN and is grown at a temperature of 500-600° C., a pressure of 100-400 mbar, and a V / III ratio of 500-3000. The carrier gas is hydrogen, or a mixture of hydrogen and nitrogen.

[0189] S3: If Figure 4 As shown, the temperature is set to 1000-1100°C, hydrogen and ammonia are introduced, and the substrate 1 is subjected to high-temperature nitridation treatment for 3-10 minutes; then the temperature is set to 500-650°C, the pressure is 100-600mbar, the V / III ratio is 500-5000, and the carrier gas is introduced to grow a second buffer layer 22 made of GaN on the exposed substrate 1 and the first buffer layer 21.

[0190] The carrier gas is hydrogen, or a mixed gas of hydrogen and nitrogen.

[0191] like Figure 4 As shown, the second buffer layer 22 covers the first buffer layer 21 and the remaining portion of the substrate 1 , and the second buffer layer 22 includes a first sub-buffer layer 221 , a second sub-buffer layer 222 and a third sub-buffer layer 223 .

[0192] Furthermore, the first buffer layer 21 and the second buffer layer 22 constitute a buffer layer 2, and the buffer layer 2 includes a first region 2-I with a first polarity, a second region 2-II with a second polarity, and a second polarity boundary region 2-III, and the second polarity boundary region 2-III is located between the first region 2-I and the second region 2-II.

[0193] S4: As Figure 5 As shown, the temperature is set to 1000-1100° C., the pressure is set to 100-400 mbar, the V / III ratio is set to 500-3000, a carrier gas is introduced, and the n-type semiconductor layer 3 is grown on the second buffer layer 22 .

[0194] The carrier gas is hydrogen, or a mixed gas of hydrogen and nitrogen.

[0195] S5: setting the temperature to 700-800°C, the pressure to 200-600 mbar, and the V / III ratio to 10,000-40,000 to grow an InGaN well layer on the n-type semiconductor layer 3; setting the temperature to 830-950°C, the pressure to 200-600 mbar, and the V / III ratio to 5,000-20,000 to grow a GaN barrier layer on the InGaN well layer to obtain an InGaN / GaN quantum well light-emitting layer.

[0196] The carrier gas is nitrogen.

[0197] S6 : setting the temperature to 950-1100° C., the pressure to 50-400 mbar, the V / III ratio to 500-3000, introducing a carrier gas, and growing an electron blocking layer 42 on the light-emitting layer 41 .

[0198] The carrier gas is hydrogen, or a mixed gas of hydrogen and nitrogen.

[0199] S7: As Figure 6 As shown, the temperature is set to 950-1100° C., the pressure is set to 100-400 mbar, the V / III ratio is set to 500-3000, and a carrier gas is introduced to form a p-type semiconductor layer 43 on the electron blocking layer 42 .

[0200] The carrier gas is hydrogen, or a mixed gas of hydrogen and nitrogen.

[0201] S8: Etch the n-type semiconductor layer 3, the light-emitting layer 41, the electron blocking layer 42 and the p-type semiconductor layer 43 on the first region 2-I and the second region 2-II using a photolithography technique to obtain a Micro LED device, such as Figure 7 shown.

[0202] See also Figure 8-12 The present invention provides another Micro LED device, which includes a substrate 1, an n-type semiconductor layer 3 and a light-emitting structure 4 stacked in sequence.

[0203] The material of the substrate 1 includes any one of sapphire, SiC, Si, diamond, GaN, and AlN, and the thickness is 300 μm-1 mm.

[0204] The n-type semiconductor layer 3 is a nitrogen-polarity n-type nitride layer. The material of the nitrogen-polarity n-type nitride layer is any one of GaN, AlGaN, InGaN, and AlInGaN, or a combination of at least two thereof, and has a thickness of 100-500 nm.

[0205] The Micro LED device further includes a plurality of cylinders 23 arranged in an array on the n-type semiconductor layer 3, a mask layer 24 is provided between adjacent cylinders 23, and the surface of the cylinder 23 away from the substrate 1 is flush with the surface of the mask layer 24 away from the substrate 1; the first region 2-I with the first polarity is the region where the cylinders 23 are provided, the second region 2-II with the second polarity is the region where the mask layer 24 is provided, and the second polarity junction region 2-III is the junction region between the mask layer 24 and the cylinder 23. The first polarity is nitrogen polarity, and the second polarity is gallium polarity; the width of the second polarity junction region 2-III is 1-5 μm.

[0206] Furthermore, the diameter of the cylinder 23 is 100 nm - 5 μm, the height is 10 - 100 nm, and the distance between any two adjacent cylinders 23 is 100 nm - 10 μm; the material of the mask layer 24 is SiO2 or SiN x , and the thickness is 10 - 100 nm.

[0207] The light-emitting structure 4 includes a light-emitting layer 41, an electron blocking layer 42, and a p-type semiconductor layer 43 stacked in sequence, the light-emitting structure is disposed on the second polarity junction region 2-III, and the cross-sectional area of the light-emitting structure 4 is 10% - 50% of the cross-sectional area of the substrate 1.

[0208] The light-emitting layer 41 is any one of an Al x Ga 1-x N / Al y Ga 1-y N quantum well light-emitting layer, an InGaN / GaN quantum well light-emitting layer, or an InGaN / InGaN quantum well light-emitting layer, and the thickness is 20 nm - 200 nm. When the light-emitting layer 41 is an Al x Ga 1-x N / Al y Ga 1-y N quantum well light-emitting layer, the thickness of the Al x Ga 1-x N well layer is 1 - 3 nm, x is 0.2 - 0.5; the thickness of the Al y Ga 1-y N barrier layer is 8 - 15 nm, y is 0.3 - 0.6, and x < y. When the light-emitting layer 41 is an InGaN / GaN quantum well light-emitting layer, the number of periods of the InGaN well layer and the GaN barrier layer is 1 - 10, the thickness of the InGaN well layer is 2 - 3 nm, and the thickness of the GaN barrier layer is 8 - 15 nm. When the light-emitting layer 41 is an InGaN / InGaN quantum well light-emitting layer, the number of periods of the InGaN well layer and the InGaN barrier layer is 1 - 10, the thickness of the InGaN well layer is 2 - 3 nm, and the thickness of the InGaN barrier layer is 8 - 15 nm.

[0209] The electron blocking layer 42 is made of any one of AlGaN, AlInN, and AlInGaN, or a combination of at least two thereof, with a thickness of 10 nm to 30 nm. The content of Al in the electron blocking layer 42 is 0.35 to 0.65.

[0210] The p-type semiconductor layer 43 is a p-type nitride layer. The material of the p-type semiconductor layer 43 is any one of GaN, AlGaN, InGaN, AlInN, AlInGaN, or a combination of at least two thereof. The thickness is 50-200 nm. The Al content in the p-type semiconductor layer 43 is 0.2-0.5.

[0211] The method for preparing the above-mentioned Micro LED device includes the following steps:

[0212] Step A: Provide a substrate 1.

[0213] Step B: If Figure 8 As shown, MOCVD is used with the temperature set at 950-1100° C., the pressure set at 50-600 mbar, the V / III ratio set at 250-3000, and hydrogen gas introduced as a carrier gas to grow an n-type semiconductor layer 3 on the substrate 1 .

[0214] Step C: Figure 9 As shown, under the conditions of a deposition pressure of 200-600 mbar, a RF power of 30-70 W, a SiH4 flow rate of 50-250 sccm, and an NH3 flow rate of 10-50 sccm, a mask layer 24 is deposited on the n-type semiconductor layer 3 by using LPCVD, PECVD, or magnetron sputtering, and the side of the mask layer 24 away from the n-type semiconductor layer 3 is etched to form a plurality of windows 241.

[0215] Step D: Figure 10 As shown, the temperature is set to 950-1100° C., the pressure is 50-400 mbar, the V / III ratio is 250-2500, and a carrier gas is introduced to grow a column 23 with the same thickness as the mask layer 24 in the window 241 , and the column 23 contacts the n-type semiconductor layer 3 .

[0216] The region where the pillars 23 are provided is the first region 2-I with the first polarity, the region where the mask layer 24 is provided is the second region 2-II with the second polarity, and the boundary region between the first region 2-I and the second region 2-II is the second polarity boundary region 2-III.

[0217] The carrier gas may be hydrogen, or a mixture of hydrogen and nitrogen.

[0218] Step E: Setting the temperature to 1050-1200° C., the pressure to 50-400 mbar, the V / III ratio to 1000-5000, introducing a carrier gas, and preparing a light-emitting layer 41 on the pillar 23 and the mask layer 24 .

[0219] The carrier gas is hydrogen, or a mixed gas of hydrogen and nitrogen.

[0220] Step F: setting the temperature to 1050-1200° C., the pressure to 50-400 mbar, the V / III ratio to 1000-5000, introducing a carrier gas, and growing an electron blocking layer 42 on the light-emitting layer 41 .

[0221] The carrier gas is hydrogen, or a mixed gas of hydrogen and nitrogen.

[0222] Step G: If Figure 11 As shown, the temperature is set to 1050-1200° C., the pressure is set to 50-400 mbar, the V / III ratio is set to 1000-5000, and a carrier gas is introduced to form a p-type semiconductor layer 43 on the electron blocking layer 42 .

[0223] The carrier gas is hydrogen, or a mixed gas of hydrogen and nitrogen.

[0224] Step H: The light emitting layer 41, the electron blocking layer 42 and the p-type semiconductor layer 43 provided on the first region 2-I and the second region 2-II are etched by photolithography to obtain a Micro LED device, such as Figure 12 shown.

[0225] The technical solutions of the present invention will be described in more detail below with reference to the accompanying drawings and several examples. However, it should be understood that the following examples are merely intended to illustrate and describe the technical solutions and are not intended to limit the scope of the present invention. Furthermore, unless otherwise specified, the various raw materials, reaction equipment, detection equipment, and methods used in the following examples are all known in the art.

[0226] Example 1

[0227] This embodiment provides a Micro LED device and a method for manufacturing the same. The Micro LED device includes a substrate, a buffer layer, an n-type semiconductor layer, and a light-emitting structure stacked in sequence.

[0228] The substrate is a C-plane SiC substrate with a tilt angle of 2° and a thickness of 650 μm.

[0229] The buffer layer includes a first region having a first polarity, a second region having a second polarity, and a second polarity boundary region. The second polarity boundary region is located between the first region and the second region, and has a width of 1 μm. Specifically, the first polarity is nitrogen polarity, and the second polarity is gallium polarity.

[0230] The buffer layer includes a first buffer layer and a second buffer layer, the first buffer layer covers a portion of the substrate, and the second buffer layer covers the first buffer layer and the remaining portion of the substrate; the second buffer layer includes a first sub-buffer layer to a third sub-buffer layer, the first sub-buffer layer is arranged in the first region, the second sub-buffer layer is arranged in the second polarity boundary region, and the third sub-buffer layer is arranged in the second region.

[0231] The first buffer layer is made of AlN with a thickness of 10 nm; the second buffer layer is made of AlN with a thickness of 500 nm.

[0232] The n-type semiconductor layer covers the second buffer layer. The material of the n-type semiconductor layer is AlGaN. The thickness of the n-type semiconductor layer arranged on the first sub-buffer layer and the n-type semiconductor layer arranged on the third sub-buffer layer are both 500nm, and the thickness of the n-type semiconductor layer arranged on the second sub-buffer layer is 800nm.

[0233] The light emitting structure includes a light emitting layer, an electron blocking layer and a p-type semiconductor layer stacked in sequence. The light emitting structure is arranged on the second sub-buffer layer. The cross-sectional area of the light emitting structure is 30% of the cross-sectional area of the substrate.

[0234] The light-emitting layer is Al x Ga 1-x N / A y Ga 1-y The N quantum well light emitting layer includes 10 overlapping InGaN / GaN quantum well layers, wherein Al x Ga 1-x The thickness of the N-well layer is 2 nm, x = 0.35; Al y Ga 1-y The thickness of the N barrier layer is 12 nm, and y=0.45.

[0235] The electron blocking layer is made of AlGaN, has a thickness of 20 nm, and an Al content of 0.5.

[0236] The material of the p-type semiconductor layer is AlGaN, the thickness is 120 nm, and the Al content is 0.35.

[0237] The method for preparing the above-mentioned Micro LED device includes the following steps:

[0238] S1: Provide a C-plane SiC substrate with a tilt angle of 2°.

[0239] S2: The temperature is set to 1000°C, the pressure is set to 225 mbar, and the V / III ratio is set to 1500. Hydrogen is introduced and a first buffer layer is grown on the C-face SiC substrate using MOCVD. The first buffer layer is then etched using photolithography and etching technology to expose part of the C-face SiC substrate.

[0240] S3: setting the temperature to 1200° C., the pressure to 225 mbar, the V / III ratio to 14000, introducing hydrogen, and growing a second buffer layer on the exposed C-face SiC substrate and the first buffer layer.

[0241] S4: setting the temperature to 1125° C., the pressure to 225 mbar, the V / III ratio to 3000, introducing hydrogen, and growing an n-type semiconductor layer on the second buffer layer.

[0242] S5: Setting the temperature to 1125° C., the pressure to 225 mbar, and the V / III ratio to 3000, introducing hydrogen, and growing a light-emitting layer on the n-type semiconductor layer.

[0243] S6: Setting the temperature to 1125° C., the pressure to 225 mbar, and the V / III ratio to 3000, introducing hydrogen, and growing an electron blocking layer on the light-emitting layer.

[0244] S7: Setting the temperature to 1125° C., the pressure to 225 mbar, and the V / III ratio to 3000, introducing hydrogen gas, and forming a p-type semiconductor layer on the electron blocking layer.

[0245] S8: Etching the n-type semiconductor layer, the light-emitting layer, the electron blocking layer, and the p-type semiconductor layer on the first region and the second region using a photolithography and etching technique to obtain a Micro LED device.

[0246] The width of the second polarity boundary region was tested using a micro-area photoluminescence (PL) test. The test results are shown in Figure 2. Figure 13 As shown by Figure 13 It can be seen that the width of the second polarity boundary region reaches micrometer level. Figure 13 In the figure, IDB is the inversion domain boundary, i.e., the second polar boundary region in the present invention; N-face is the nitrogen face region (i.e., the first region); Ga-face is the gallium face region (i.e., the second region); x is the length, and y is the width.

[0247] Example 2

[0248] This embodiment provides a Micro LED device and a method for manufacturing the same. The Micro LED device includes a substrate, a buffer layer, an n-type semiconductor layer, and a light-emitting structure stacked in sequence.

[0249] The substrate is made of SiC and has a thickness of 300 μm.

[0250] The buffer layer comprises a first region having a first polarity, a second region having a second polarity, and a second polarity boundary region. The second polarity boundary region is located between the first and second regions and has a width of approximately 0.5 μm. Specifically, the first polarity is nitrogen polarity, and the second polarity is gallium polarity.

[0251] The buffer layer includes a first buffer layer and a second buffer layer, the first buffer layer covers a portion of the substrate, and the second buffer layer covers the first buffer layer and the remaining portion of the substrate; the second buffer layer includes a first sub-buffer layer to a third sub-buffer layer, the first sub-buffer layer is arranged in the first region, the second sub-buffer layer is arranged in the second polarity boundary region, and the third sub-buffer layer is arranged in the second region.

[0252] Furthermore, the first buffer layer is made of AlN and has a thickness of 5 nm; the second buffer layer is made of AlN and has a thickness of 20 nm.

[0253] The n-type semiconductor layer covers the second buffer layer. The material of the n-type semiconductor layer is AlGaN. The thickness of the n-type semiconductor layer arranged on the first sub-buffer layer and the n-type semiconductor layer arranged on the third sub-buffer layer are both 150nm, and the thickness of the n-type semiconductor layer arranged on the second sub-buffer layer is 300nm.

[0254] The light emitting structure includes a light emitting layer, an electron blocking layer and a p-type semiconductor layer stacked in sequence. The light emitting structure is arranged on the second sub-buffer layer. The cross-sectional area of the light emitting structure is 10% of the cross-sectional area of the substrate.

[0255] The light-emitting layer is Al x Ga 1-x N / A y Ga 1-y The N quantum well light-emitting layer includes five overlapping Al x Ga 1-x N / A y Ga 1-y N quantum well layer, where Al x Ga 1-x In the N-well layer, x=0.2, thickness is 1nm, Al y Ga 1-y In the N barrier layer, y=0.3 and the thickness is 8 nm.

[0256] The electron blocking layer is made of AlGaN, has a thickness of 10 nm, and has an Al content of 0.35.

[0257] The p-type semiconductor layer is a p-type nitride layer. The material of the p-type semiconductor layer is AlGaN, the thickness is 50 nm, and the content of Al component in the p-type semiconductor layer is 0.2.

[0258] The method for preparing the Micro LED device includes the following steps:

[0259] S1: Provide a substrate.

[0260] The tilt angle of the substrate is 1°.

[0261] S2: Set the temperature to 900°C, the pressure to 50 mbar, the V / III ratio to 100, introduce hydrogen, use MOCVD to grow a first buffer layer on the substrate, and then use photolithography to etch the first buffer layer to expose part of the substrate.

[0262] S3: setting the temperature to 1150° C., the pressure to 50 mbar, the V / III ratio to 8000, introducing hydrogen, and growing a second buffer layer on the exposed substrate and the first buffer layer.

[0263] S4: setting the temperature to 1050° C., the pressure to 50 mbar, the V / III ratio to 1000, introducing hydrogen, and growing an n-type semiconductor layer on the second buffer layer.

[0264] S5: Setting the temperature to 1050° C., the pressure to 50 mbar, and the V / III ratio to 1000, introducing hydrogen, and growing a light-emitting layer on the n-type semiconductor layer.

[0265] S6: Setting the temperature to 1050° C., the pressure to 50 mbar, and the V / III ratio to 1000, introducing hydrogen, and growing an electron blocking layer on the light-emitting layer.

[0266] S7: Setting the temperature to 1050° C., the pressure to 50 mbar, and the V / III ratio to 1000, introducing a carrier gas, and forming a p-type semiconductor layer on the electron blocking layer.

[0267] S8: Etching the n-type semiconductor layer, the light-emitting layer, the electron blocking layer, and the p-type semiconductor layer on the first region and the second region using a photolithography and etching technique to obtain a Micro LED device.

[0268] Example 3

[0269] This embodiment provides a Micro LED device and a method for manufacturing the same. The Micro LED device includes a substrate, a buffer layer, an n-type semiconductor layer, and a light-emitting structure stacked in sequence.

[0270] The substrate is made of SiC and has a thickness of 1 mm.

[0271] The buffer layer comprises a first region having a first polarity, a second region having a second polarity, and a second polarity boundary region. The second polarity boundary region is located between the first and second regions and has a width of approximately 5 μm. Specifically, the first polarity is nitrogen polarity, and the second polarity is gallium polarity.

[0272] The buffer layer includes a first buffer layer and a second buffer layer, the first buffer layer covers a portion of the substrate, and the second buffer layer covers the first buffer layer and the remaining portion of the substrate; the second buffer layer includes a first sub-buffer layer to a third sub-buffer layer, the first sub-buffer layer is arranged in the first region, the second sub-buffer layer is arranged in the second polarity boundary region, and the third sub-buffer layer is arranged in the second region.

[0273] Furthermore, the first buffer layer is made of AlN and has a thickness of 30 nm; the second buffer layer is made of AlN and has a thickness of 1 μm.

[0274] The n-type semiconductor layer covers the second buffer layer. The material of the n-type semiconductor layer is AlGaN. The thickness of the n-type semiconductor layer arranged on the first sub-buffer layer and the n-type semiconductor layer arranged on the third sub-buffer layer are both 750nm, and the thickness of the n-type semiconductor layer arranged on the second sub-buffer layer is 1μm.

[0275] The light emitting structure includes a light emitting layer, an electron blocking layer and a p-type semiconductor layer stacked in sequence. The light emitting structure is arranged on the second sub-buffer layer. The cross-sectional area of the light emitting structure is 50% of the cross-sectional area of the substrate.

[0276] The light-emitting layer is Al x Ga 1-x N / A y Ga 1-y The N quantum well light-emitting layer includes 10 overlapping Al x Ga 1-x N / A y Ga 1-y N quantum well layer, where Al x Ga 1-x In the N-well layer, x=0.5, thickness is 3nm, Al y Ga 1-y In the N barrier layer, y=0.6 and the thickness is 15 nm.

[0277] The electron blocking layer is made of AlGaN, has a thickness of 30 nm, and has an Al content of 0.65.

[0278] The p-type semiconductor layer is a p-type nitride layer. The material of the p-type semiconductor layer is AlGaN, the thickness is 200 nm, and the content of Al component in the p-type semiconductor layer is 0.5.

[0279] The method for preparing the Micro LED device includes the following steps:

[0280] S1: Provide a substrate.

[0281] The tilt angle of the substrate is 4°.

[0282] S2: The temperature is set to 1100°C, the pressure is set to 400 mbar, the V / III ratio is set to 3000, hydrogen is introduced, and a first buffer layer is grown on the substrate with a tilt angle of 4° using MOCVD. The first buffer layer is then etched using photolithography and etching technology to expose part of the substrate.

[0283] S3: setting the temperature to 1250° C., the pressure to 400 mbar, the V / III ratio to 20,000, introducing hydrogen, and growing a second buffer layer on the exposed substrate and the first buffer layer.

[0284] S4: setting the temperature to 1200° C., the pressure to 400 mbar, the V / III ratio to 5000, introducing hydrogen, and growing an n-type semiconductor layer on the second buffer layer.

[0285] S5: Setting the temperature to 1200° C., the pressure to 400 mbar, and the V / III ratio to 5000, introducing hydrogen, and growing a light-emitting layer on the n-type semiconductor layer.

[0286] S6: Setting the temperature to 1200° C., the pressure to 400 mbar, and the V / III ratio to 5000, introducing hydrogen, and growing an electron blocking layer on the light-emitting layer.

[0287] S7: Setting the temperature to 1200° C., the pressure to 400 mbar, and the V / III ratio to 5000, introducing a carrier gas, and forming a p-type semiconductor layer on the electron blocking layer.

[0288] S8: Etching the n-type semiconductor layer, the light-emitting layer, the electron blocking layer, and the p-type semiconductor layer on the first region and the second region using a photolithography and etching technique to obtain a Micro LED device.

[0289] Example 4

[0290] This embodiment provides a Micro LED device and a method for manufacturing the same. The Micro LED device includes a substrate, a buffer layer, an n-type semiconductor layer, and a light-emitting structure stacked in sequence.

[0291] The substrate is a C-plane sapphire substrate with a tilt angle of 2° and a thickness of 650 μm.

[0292] The buffer layer comprises a first region having a first polarity, a second region having a second polarity, and a second polarity boundary region, wherein the second polarity boundary region is located between the first and second regions. Specifically, the first polarity is nitrogen polarity, the second polarity is gallium polarity, and the width of the second polarity boundary region is 2 μm.

[0293] The buffer layer includes a first buffer layer and a second buffer layer, the first buffer layer covers a portion of the substrate, and the second buffer layer covers the first buffer layer and the remaining portion of the substrate; the second buffer layer includes a first sub-buffer layer to a third sub-buffer layer, the first sub-buffer layer is arranged in the first region, the second sub-buffer layer is arranged in the second polarity boundary region, and the third sub-buffer layer is arranged in the second region.

[0294] The first buffer layer is made of GaN and has a thickness of 20 nm; the second buffer layer is made of GaN and has a thickness of 22 nm.

[0295] The n-type semiconductor layer covers the second buffer layer. The material of the n-type semiconductor layer is GaN. The thickness of the n-type semiconductor layer arranged on the first sub-buffer layer and the n-type semiconductor layer arranged on the third sub-buffer layer are both 300nm, and the thickness of the n-type semiconductor layer arranged on the second sub-buffer layer is 500nm.

[0296] The light emitting structure includes a light emitting layer, an electron blocking layer and a p-type semiconductor layer stacked in sequence. The light emitting structure is arranged on the second sub-buffer layer. The cross-sectional area of the light emitting structure is 30% of the cross-sectional area of the substrate.

[0297] The light-emitting layer is an InGaN / GaN quantum well light-emitting layer, which includes 8 overlapping InGaN / GaN quantum well layers. The thickness of each InGaN well layer is 2.5 nm, and the thickness of the GaN barrier layer is 10 nm.

[0298] The electron blocking layer is made of AlGaN and has a thickness of 20 nm.

[0299] The material of the p-type semiconductor layer is GaN and the thickness is 175 nm.

[0300] The method for preparing the Micro LED device includes the following steps:

[0301] S1: Provide a C-plane sapphire substrate.

[0302] The inclination angle of the C-plane sapphire substrate is 2°.

[0303] S2: Set the temperature to 550°C, the pressure to 250 mbar, and the V / III ratio to 2750, introduce hydrogen, and use MOCVD to grow a first buffer layer on the C-side sapphire substrate. Then, use photolithography to etch the first buffer layer to expose part of the C-side sapphire substrate.

[0304] S3: The temperature is set to 1050°C, hydrogen and ammonia are introduced, and the C-side sapphire substrate is subjected to high-temperature nitridation treatment for 8 minutes; then the temperature is lowered to 600°C, the pressure is set to 350 mbar, the V / III ratio is set to 2500, hydrogen is introduced, and a second buffer layer is grown on the exposed C-side sapphire substrate and the first buffer layer.

[0305] S4: setting the temperature to 1050° C., the pressure to 250 mbar, the V / III ratio to 1500, introducing hydrogen, and growing an n-type semiconductor layer on the second buffer layer.

[0306] S5: Setting the temperature to 750°C, the pressure to 400 mbar, and the V / III ratio to 25000, introducing nitrogen gas, and growing an InGaN well layer on the n-type semiconductor layer; setting the temperature to 890°C, the pressure to 400 mbar, and the V / III ratio to 12500, and introducing nitrogen gas, and growing a GaN layer on the InGaN well layer to obtain an InGaN / GaN quantum well layer.

[0307] The above operation was repeated 7 times to obtain an InGaN / GaN quantum well light emitting layer having 8 InGaN / GaN quantum well layers.

[0308] S6: Setting the temperature to 1000° C., the pressure to 200 mbar, and the V / III ratio to 2000, introducing hydrogen, and growing an electron blocking layer on the InGaN / GaN quantum well light-emitting layer.

[0309] S7: Setting the temperature to 1000° C., the pressure to 300 mbar, and the V / III ratio to 2000, introducing hydrogen gas, and forming a p-type semiconductor layer on the electron blocking layer.

[0310] S8: Etching the n-type semiconductor layer, the light-emitting layer, the electron blocking layer, and the p-type semiconductor layer on the first region and the second region using a photolithography and etching technique to obtain a Micro LED device.

[0311] Example 5

[0312] This embodiment provides a Micro LED device and a method for manufacturing the same. The Micro LED device includes a substrate, a buffer layer, an n-type semiconductor layer, and a light-emitting structure stacked in sequence.

[0313] The substrate is a C-plane sapphire substrate with a tilt angle of 1° and a thickness of 300 μm.

[0314] The buffer layer comprises a first region having a first polarity, a second region having a second polarity, and a second polarity boundary region, wherein the second polarity boundary region is located between the first and second regions. Specifically, the first polarity is nitrogen polarity, the second polarity is gallium polarity, and the width of the second polarity boundary region is 0.5 μm.

[0315] The buffer layer includes a first buffer layer and a second buffer layer, the first buffer layer covers a portion of the substrate, and the second buffer layer covers the first buffer layer and the remaining portion of the substrate; the second buffer layer includes a first sub-buffer layer to a third sub-buffer layer, the first sub-buffer layer is arranged in the first region, the second sub-buffer layer is arranged in the second polarity boundary region, and the third sub-buffer layer is arranged in the second region.

[0316] The material of the first buffer layer is GaN, and the thickness is 10 nm; the material of the second buffer layer is GaN, and the thickness is 10 nm.

[0317] The n-type semiconductor layer covers the second buffer layer. The material of the n-type semiconductor layer is GaN. The thickness of the n-type semiconductor layer arranged on the first sub-buffer layer and the n-type semiconductor layer arranged on the third sub-buffer layer are both 150nm, and the thickness of the n-type semiconductor layer arranged on the second sub-buffer layer is 300nm.

[0318] The light emitting structure includes a light emitting layer, an electron blocking layer and a p-type semiconductor layer stacked in sequence. The light emitting structure is arranged on the second sub-buffer layer. The cross-sectional area of the light emitting structure is 10% of the cross-sectional area of the substrate.

[0319] The light-emitting layer is an InGaN / GaN quantum well light-emitting layer, which includes one InGaN / GaN quantum well layer. The thickness of the InGaN well layer is 2nm, and the thickness of the GaN barrier layer is 8nm.

[0320] The electron blocking layer is made of AlGaN and has a thickness of 10 nm.

[0321] The material of the p-type semiconductor layer is GaN and the thickness is 50 nm.

[0322] The method for preparing the Micro LED device includes the following steps:

[0323] S1: Provide a C-plane sapphire substrate.

[0324] The tilt angle of the C-plane sapphire substrate is 1°.

[0325] S2: Set the temperature to 500°C, the pressure to 100 mbar, and the V / III ratio to 500, introduce hydrogen, and use MOCVD to grow a first buffer layer on the C-side sapphire substrate. Then, use photolithography to etch the first buffer layer to expose part of the C-side sapphire substrate.

[0326] S3: Set the temperature to 1000°C, introduce hydrogen and ammonia, and perform high-temperature nitridation treatment on the C-side sapphire substrate for 3 minutes; then reduce the temperature to 500°C, set the pressure to 100 mbar and the V / III ratio to 500, introduce hydrogen, and grow a second buffer layer on the exposed C-side sapphire substrate and the first buffer layer.

[0327] S4: setting the temperature to 1000° C., the pressure to 100 mbar, the V / III ratio to 500, introducing hydrogen, and growing an n-type semiconductor layer on the second buffer layer.

[0328] S5: Setting the temperature to 700°C, the pressure to 200 mbar, and the V / III ratio to 10,000, introducing nitrogen gas, and growing an InGaN well layer on the n-type semiconductor layer; setting the temperature to 830°C, the pressure to 200 mbar, and the V / III ratio to 5,000, introducing nitrogen gas, and growing a GaN barrier layer on the InGaN well layer to obtain an InGaN / GaN quantum well layer.

[0329] S6: Setting the temperature to 950° C., the pressure to 50 mbar, and the V / III ratio to 500, introducing hydrogen, and growing an electron blocking layer on the InGaN / GaN quantum well light-emitting layer.

[0330] S7: Setting the temperature to 950° C., the pressure to 100 mbar, and the V / III ratio to 500, introducing hydrogen gas, and forming a p-type semiconductor layer on the electron blocking layer.

[0331] S8: Etching the n-type semiconductor layer, the light-emitting layer, the electron blocking layer, and the p-type semiconductor layer on the first region and the second region using a photolithography and etching technique to obtain a Micro LED device.

[0332] Example 6

[0333] This embodiment provides a Micro LED device and a method for manufacturing the same. The Micro LED device includes a substrate, a buffer layer, an n-type semiconductor layer, and a light-emitting structure stacked in sequence.

[0334] The substrate is a C-plane sapphire substrate with a tilt angle of 4° and a thickness of 1000 μm.

[0335] The buffer layer comprises a first region having a first polarity, a second region having a second polarity, and a second polarity boundary region, wherein the second polarity boundary region is located between the first and second regions. Specifically, the first polarity is nitrogen polarity, the second polarity is gallium polarity, and the width of the second polarity boundary region is 5 μm.

[0336] The buffer layer includes a first buffer layer and a second buffer layer, the first buffer layer covers a portion of the substrate, and the second buffer layer covers the first buffer layer and the remaining portion of the substrate; the second buffer layer includes a first sub-buffer layer to a third sub-buffer layer, the first sub-buffer layer is arranged in the first region, the second sub-buffer layer is arranged in the second polarity boundary region, and the third sub-buffer layer is arranged in the second region.

[0337] The material of the first buffer layer is GaN, and the thickness is 30 nm; the material of the second buffer layer is GaN, and the thickness is 30 nm.

[0338] The n-type semiconductor layer covers the second buffer layer. The material of the n-type semiconductor layer is GaN. The thickness of the n-type semiconductor layer arranged on the first sub-buffer layer and the n-type semiconductor layer arranged on the third sub-buffer layer are both 750nm, and the thickness of the n-type semiconductor layer arranged on the second sub-buffer layer is 1000nm.

[0339] The light emitting structure includes a light emitting layer, an electron blocking layer and a p-type semiconductor layer stacked in sequence. The light emitting structure is arranged on the second sub-buffer layer. The cross-sectional area of the light emitting structure is 50% of the cross-sectional area of the substrate.

[0340] The light-emitting layer is an InGaN / GaN quantum well light-emitting layer, which includes 10 overlapping InGaN / GaN quantum well layers. The thickness of each InGaN well layer is 3 nm, and the thickness of the GaN barrier layer is 15 nm.

[0341] The electron blocking layer is made of AlGaN and has a thickness of 30 nm.

[0342] The material of the p-type semiconductor layer is GaN, and the thickness is 300 nm.

[0343] The method for preparing the above-mentioned Micro LED device includes the following steps:

[0344] S1: Provide a C-plane sapphire substrate.

[0345] The tilt angle of the C-plane sapphire substrate is 4°.

[0346] S2: Set the temperature to 600°C, the pressure to 400 mbar, and the V / III ratio to 3000, introduce hydrogen, and use MOCVD to grow a first buffer layer on the C-side sapphire substrate. Then, use photolithography to etch the first buffer layer to expose part of the C-side sapphire substrate.

[0347] S3: The temperature is set to 1100°C, hydrogen and ammonia are introduced, and the C-side sapphire substrate is subjected to high-temperature nitridation treatment for 10 minutes; then the temperature is lowered to 650°C, the pressure is set to 600 mbar, the V / III ratio is set to 5000, hydrogen is introduced, and a second buffer layer is grown on the exposed C-side sapphire substrate and the first buffer layer.

[0348] S4: setting the temperature to 1100° C., the pressure to 400 mbar, the V / III ratio to 3000, introducing hydrogen, and growing an n-type semiconductor layer on the second buffer layer.

[0349] S5: Setting the temperature to 800°C, the pressure to 600 mbar, and the V / III ratio to 40,000, introducing nitrogen gas, and growing an InGaN well layer on the n-type semiconductor layer; setting the temperature to 950°C, the pressure to 600 mbar, and the V / III ratio to 20,000, introducing nitrogen gas, and growing a GaN layer on the InGaN well layer to obtain an InGaN / GaN quantum well layer.

[0350] The above operation was repeated 9 times to obtain an InGaN / GaN quantum well light emitting layer having 10 InGaN / GaN quantum well layers.

[0351] S6: Setting the temperature to 1100° C., the pressure to 400 mbar, and the V / III ratio to 3000, introducing hydrogen, and growing an electron blocking layer on the InGaN / GaN quantum well light-emitting layer.

[0352] S7: Setting the temperature to 1100° C., the pressure to 400 mbar, and the V / III ratio to 3000, introducing hydrogen gas, and forming a p-type semiconductor layer on the electron blocking layer.

[0353] S8: Etching the n-type semiconductor layer, the light-emitting layer, the electron blocking layer, and the p-type semiconductor layer on the first region and the second region using a photolithography and etching technique to obtain a Micro LED device.

[0354] Example 7

[0355] This embodiment provides a Micro LED device and a method for manufacturing the same, which differs from Embodiment 1 in that:

[0356] (1) The width of the second polarity boundary region is 0.3 μm.

[0357] (2) In step S3, the temperature is set to 1250°C, the pressure is set to 50 mbar, and the V / III ratio is set to 6500.

[0358] Other conditions are the same as those in Example 1 and will not be described again here.

[0359] Example 8

[0360] This embodiment provides a Micro LED device and a method for manufacturing the same, which differs from Embodiment 1 in that:

[0361] (1) The width of the second polarity boundary region is 6 μm.

[0362] (2) In step S3, the temperature is set to 1100°C, the pressure is set to 400 mbar, and the V / III ratio is set to 20000.

[0363] Other conditions are the same as those in Example 1 and will not be described again here.

[0364] Example 9

[0365] This embodiment provides a Micro LED device and a method for manufacturing the same. The Micro LED device includes a substrate, an n-type semiconductor layer, and a light-emitting structure stacked in sequence.

[0366] The substrate is made of SiC and has a thickness of 500 μm.

[0367] The n-type semiconductor layer 3 is a nitrogen-polarity n-type nitride layer made of GaN and having a thickness of 300 nm.

[0368] The n-type semiconductor layer also includes a plurality of pillars arranged in an array, with a mask layer disposed between adjacent pillars. The surfaces of the pillars facing away from the substrate are flush with the surface of the mask layer facing away from the substrate. The first region having a first polarity is the region where the pillars are disposed, the second region having a second polarity is the region where the mask layer is disposed, and the second polarity boundary region is the boundary region between the mask layer and the pillars. The width of the second polarity boundary region is 3 μm. The first polarity is nitrogen polarity, and the second polarity is gallium polarity.

[0369] The diameter of the pillar is 1 μm, the height is 80 nm, and the distance between any two adjacent pillars is 3 μm; the mask layer is made of SiO2 and has a thickness of 80 nm.

[0370] The light emitting structure includes a light emitting layer, an electron blocking layer and a p-type semiconductor layer stacked in sequence. The light emitting structure is arranged on the second polarity boundary region. The cross-sectional area of the light emitting structure is 20% of the cross-sectional area of the substrate.

[0371] The light-emitting layer is Al x Ga 1-x N / A y Ga 1-y The N quantum well light-emitting layer includes 7 overlapping Al x Ga 1-x N / A y Ga 1-yN quantum well layer, where Al x Ga 1-x In the N-well layer, x=0.3, the thickness is 2 nm, y=0.5, the thickness is 13 nm.

[0372] The electron blocking layer is made of AlGaN, has a thickness of 20 nm, and has an Al content of 0.4.

[0373] The p-type semiconductor layer is a p-type nitride layer. The material of the p-type semiconductor layer is GaN, the thickness is 100 nm, and the content of the Al component in the p-type semiconductor layer is 0.3.

[0374] The method for preparing the above-mentioned Micro LED device includes the following steps:

[0375] Step A: Provide a substrate.

[0376] Step B: Using MOCVD, setting the temperature to 1100° C., the pressure to 600 mbar, the V / III ratio to 3000, introducing hydrogen as hydrogen gas, and growing an n-type semiconductor layer on the substrate.

[0377] Step C: Under the conditions of a deposition pressure of 600 mbar, an RF power of 70 W, a SiH4 flow rate of 250 sccm, and an NH3 flow rate of 50 sccm, a mask layer is deposited on the n-type semiconductor layer by magnetron sputtering, and the side of the mask layer away from the n-type semiconductor layer is etched to form multiple windows.

[0378] Step D: Setting the temperature to 1100° C., the pressure to 400 mbar, and the V / III ratio to 2500, introducing hydrogen, and growing a column with the same thickness as the mask layer in the window, the column being in contact with the n-type semiconductor layer.

[0379] Step E: Setting the temperature to 1050° C., the pressure to 400 mbar, and the V / III ratio to 4000, introducing hydrogen, and preparing a light-emitting layer on the pillars and the mask layer.

[0380] Step F: setting the temperature to 1050° C., the pressure to 400 mbar, the V / III ratio to 4000, introducing hydrogen, and growing an electron blocking layer on the light-emitting layer.

[0381] Step G: Setting the temperature to 1050° C., the pressure to 400 mbar, and the V / III ratio to 4000, introducing hydrogen gas, and preparing a p-type semiconductor layer on the electron blocking layer.

[0382] Step H: etching the light-emitting layer, electron blocking layer, and p-type semiconductor layer provided on the first region and the second region using a photolithography and etching technique to obtain a Micro LED device.

[0383] Example 10

[0384] This embodiment provides a Micro LED device and a method for manufacturing the same, which differs from Embodiment 9 in that:

[0385] (1) The width of the second polarity boundary region is 0.5 μm.

[0386] (2) In step D, the temperature was set to 1100°C, the pressure was set to 50 mbar, and the V / III ratio was set to 250.

[0387] Other conditions are the same as those in Example 9 and will not be repeated here.

[0388] Example 11

[0389] This embodiment provides a Micro LED device and a method for manufacturing the same, which differs from Embodiment 9 in that:

[0390] (1) The width of the second polarity boundary region is 5 μm.

[0391] (2) In step D, the temperature was set to 950°C, the pressure was set to 400 mbar, and the V / III ratio was set to 2500.

[0392] Other conditions are the same as those in Example 9 and will not be repeated here.

[0393] Example 12

[0394] This embodiment provides a Micro LED device and a method for manufacturing the same, which differs from Embodiment 9 in that:

[0395] (1) The width of the second polarity boundary region is 0.3 μm.

[0396] (2) In step D, the temperature was set to 1150°C, the pressure was set to 50 mbar, and the V / III ratio was set to 200.

[0397] Other conditions are the same as those in Example 9 and will not be repeated here.

[0398] Example 13

[0399] This embodiment provides a Micro LED device and a method for manufacturing the same, which differs from Embodiment 9 in that:

[0400] (1) The width of the second polarity boundary region is 6 μm.

[0401] (2) In step D, set the temperature to 950°C, the pressure to 600 mbar, and the V / III ratio to 2500.

[0402] Other conditions are the same as those in Example 9 and will not be repeated here.

[0403] Comparative Example 1

[0404] This comparative example provides a Micro LED device and a method for preparing the same. The structure of the Micro LED device is as follows: Figure 14 As shown, it includes a substrate 1, a buffer layer 2, an n-type semiconductor layer 3 and a light emitting structure 4 which are stacked in sequence.

[0405] The substrate 1 is made of SiC and has a thickness of 350 μm.

[0406] The buffer layer 2 is made of AlN and has a thickness of 500 nm.

[0407] The n-type semiconductor layer 3 is made of AlGaN and has a thickness of 1.3 μm.

[0408] The light emitting structure 4 includes a light emitting layer 41 , an electron blocking layer 42 and a p-type semiconductor layer 43 stacked in sequence. The cross-sectional area of the light emitting structure is 30% of the cross-sectional area of the substrate.

[0409] The light emitting layer 41 is Al x Ga 1-x N / A y Ga 1-y The N quantum well light emitting layer includes 10 overlapping InGaN / GaN quantum well layers, wherein Al x Ga 1-x The thickness of the N-well layer is 2 nm, x = 0.35; Al y Ga 1-y The thickness of the N barrier layer is 12 nm, and y=0.45.

[0410] The electron blocking layer 42 is made of AlGaN, has a thickness of 20 nm, and an Al content of 0.5.

[0411] The material of the p-type semiconductor layer 43 is AlGaN, the thickness is 120 nm, and the Al content is 0.35.

[0412] The method for preparing the Micro LED device includes the following steps:

[0413] Step 1: Provide a substrate 1.

[0414] Step 2: Using MOCVD, set the temperature to 1000° C., the pressure to 225 mbar, the V / III ratio to 1500, introduce hydrogen, and grow the buffer layer 2 on the substrate with a tilt angle of 2°.

[0415] Step 3: Setting the temperature to 1125° C., the pressure to 225 mbar, and the V / III ratio to 3000, introducing hydrogen, and growing an n-type semiconductor layer 3 on the buffer layer.

[0416] Step 4: Setting the temperature to 1125° C., the pressure to 225 mbar, and the V / III ratio to 3000, introducing hydrogen, and growing the light-emitting layer 41 on the n-type semiconductor layer.

[0417] Step 5: Set the temperature to 1125° C., the pressure to 225 mbar, the V / III ratio to 3000, introduce hydrogen, and grow an electron blocking layer 42 on the light-emitting layer.

[0418] Step 6: Set the temperature to 1050° C., the pressure to 50 mbar, the V / III ratio to 1000, introduce hydrogen, and form a p-type semiconductor layer 43 on the electron blocking layer.

[0419] Step 7: Use photolithography to etch the n-type semiconductor layer 3, the light-emitting layer 41, the electron blocking layer 42, and the p-type semiconductor layer 43 to obtain a Micro LED device.

[0420] The Micro LED device with a light-emitting structure in the second polarity boundary region, provided in Example 1, and the Micro LED device with a light-emitting structure in the gallium polarity region, provided in Comparative Example 1, were tested using photoluminescence (PL) testing. The luminous intensity of the Micro LED device provided in Comparative Example 1 was poor, while the luminous intensity of the Micro LED device provided in Example 1 was high.

[0421] It can be seen from this that GaN-based light-emitting devices grown along polar surfaces will have quantum well bands tilted due to polarization effects, resulting in spatial separation of the wave functions of electrons and holes, leading to a decrease in the efficiency of quantum well radiative recombination. The method of the present invention utilizes a lateral polarity device structure to simultaneously grow LED devices with gallium polarity and nitrogen polarity on the same substrate. Because the built-in polarization electric fields of gallium polarity and nitrogen polarity are in opposite directions, the energy band of the quantum well is close to a flat band at the boundary between the two polarities. At the same time, the presence of a local potential barrier at the polarity boundary has a stronger ability to restrict carriers. Therefore, the luminous efficiency of the device at the polarity boundary can be greatly improved.

[0422] The performance of the Micro LED devices provided in the above embodiments and comparative examples was tested using the following specific testing methods: luminous efficiency was measured using an LED integrating sphere, and the standard deviation (STD) of luminous intensity was measured using electroluminescent (EL) (calculated with the average luminous intensity of the test samples as 1). The performance test results are shown in Table 1 below:

[0423] Table 1

[0424]

[0425]

[0426] As can be seen from the above, the present invention utilizes a lateral-polarity GaN-based Micro LED device structure, dividing the substrate into two polarity regions and simultaneously epitaxially growing LED devices. Micro LEDs are fabricated in the boundary region between the two polarities, alleviating QCSE and improving the device's luminous efficiency. Furthermore, by controlling the growth conditions of the second buffer layer within a specific range, the first polarity boundary region has an appropriate width range, resulting in a Micro LED device with higher luminous efficiency.

[0427] Compared with Example 1, if the width of the second polarity boundary region is too small (Example 7) or the width of the second polarity boundary region is too large (Example 8), the luminous efficiency of the prepared Micro LED device is poor.

[0428] Compared with Example 9, if the width of the second polarity boundary region is too small (Example 12) or the width of the second polarity boundary region is too large (Example 13), the luminous efficiency of the prepared Micro LED device is poor.

[0429] Compared with Example 1, if different polarity regions are not divided and the light-emitting structure is directly arranged on the polarity surface (Comparative Example 1), the luminous efficiency of the prepared Micro LED device is poor.

[0430] The applicant declares that the present invention is intended to illustrate the detailed structural features of the present invention through the above-described embodiments, but the present invention is not limited to the above-described detailed structural features. This does not mean that the present invention must rely on the above-described detailed structural features in order to be implemented. Those skilled in the art should understand that any improvements to the present invention, equivalent replacements for selected components, additions of auxiliary components, and selection of specific embodiments, etc., fall within the scope of protection and disclosure of the present invention.

Claims

1. A Micro LED device, characterized in that: The Micro LED device includes a substrate and a light-emitting structure disposed on the substrate, wherein the upper surface of the substrate has a first polarity region, a second polarity region, and a first polarity boundary region; The light-emitting structure includes a light-emitting layer, an electron blocking layer, and a p-type semiconductor layer stacked in sequence; the light-emitting structure is arranged in the first polarity boundary region, the first polarity boundary region is a boundary region between the first polarity region and the second polarity region, the first polarity region is a region having a first polarity, and the second polarity region is a region having a second polarity; The first polarity region is a nitrogen polarity region, and the second polarity region is a gallium polarity region; The Micro LED device further includes a buffer layer, wherein the region where the buffer layer is located includes a first region having the first polarity, a second region having the second polarity, and a second polarity boundary region, wherein the second polarity boundary region is located between the first region and the second region, and the light-emitting structure is disposed on the second polarity boundary region; The buffer layer includes a first buffer layer and a second buffer layer, the first buffer layer covers a portion of the substrate, and the second buffer layer covers the first buffer layer and the remaining portion of the substrate; The second buffer layer includes first to third sub-buffer layers, the first sub-buffer layer is arranged in the first region, the second sub-buffer layer is arranged in the second polarity boundary region, the third sub-buffer layer is arranged in the second region, and the light emitting structure is arranged on the second sub-buffer layer.

2. The Micro LED device according to claim 1, wherein: The cross-sectional area of the light emitting structure is 10% to 50% of the cross-sectional area of the substrate.

3. The Micro LED device according to claim 1, wherein: The Micro LED device further includes an n-type semiconductor layer, wherein the n-type semiconductor layer is disposed between the second buffer layer and the light-emitting structure, and the n-type semiconductor layer covers the second buffer layer; The region where the n-type semiconductor layer is located includes a third region having the first polarity, a fourth region having the second polarity, and a third polarity boundary region, and the light emitting structure is disposed on the third polarity boundary region.

4. The Micro LED device according to claim 3, wherein: The thickness of the n-type semiconductor layer disposed in the third region is the same as that of the n-type semiconductor layer disposed in the fourth region, and the thickness of the n-type semiconductor layer disposed in the third polarity boundary region is greater than that of the n-type semiconductor layer disposed in the third region.

5. The Micro LED device according to claim 1, wherein: The Micro LED device further includes a plurality of pillars distributed in an array, a mask layer is provided between adjacent pillars, and a surface of the pillars away from the substrate is flush with a surface of the mask layer away from the substrate; wherein the region where the pillars are provided is a first region having a first polarity, the region where the mask layer is provided is a second region having a second polarity, and the boundary region between the mask layer and the pillars is a second polarity boundary region; The light emitting structure is arranged on the second polarity boundary region.

6. The Micro LED device according to claim 5, wherein: The Micro LED device further includes an n-type semiconductor layer, wherein the n-type semiconductor layer is located between the pillar and the substrate.

7. The Micro LED device according to claim 1, wherein: The width of the first polarity junction region is 0.5-5 μm; The thickness of the light-emitting layer is 20-200 nm, the thickness of the electron blocking layer is 10-30 nm, and the thickness of the p-type semiconductor layer is 50-200 nm; The light-emitting layer is Al x Ga 1-x N / A y Ga 1-y The electron blocking layer is any one of an AlGaN layer, an AlInN layer, and an AlInGaN layer; and the p-type semiconductor layer is a p-type nitride layer.

8. A method for preparing a Micro LED device according to claim 1, characterized in that: The steps include: providing a substrate; fabricating an initial light-emitting structure on the substrate; Etching the first polarity region and the second polarity region of the initial light-emitting structure to obtain a light-emitting structure; In which, the light-emitting structure includes a light-emitting layer, an electron blocking layer and a p-type semiconductor layer stacked in sequence; the light-emitting structure is arranged in a first polarity junction region, the first polarity junction region is the junction region between the first polarity region and the second polarity region, the first polarity region is a region with a first polarity, and the second polarity region is a region with a second polarity.

9. The preparation method according to claim 8, characterized in that The method for manufacturing an initial light-emitting structure on the substrate includes: Preparing a first buffer layer on the substrate, and etching the first buffer layer to expose a portion of the substrate; forming a second buffer layer on the exposed substrate and the first buffer layer; An n-type semiconductor layer, a light-emitting layer, an electron blocking layer and a p-type semiconductor layer are sequentially prepared on the second buffer layer to obtain the initial light-emitting structure.

10. The preparation method according to claim 9, characterized in that The growth conditions of the second buffer layer include a temperature of 1150-1250° C., a pressure of 50-400 mbar, and a V-III ratio of 8000-20000; or, the growth conditions of the second buffer layer include a temperature of 500-650° C., a pressure of 100-600 mbar, and a V-III ratio of 500-5000.

11. The preparation method according to claim 8, characterized in that The method for manufacturing an initial light-emitting structure on the substrate includes: preparing an n-type semiconductor layer on the substrate; preparing a mask layer on the n-type semiconductor layer, etching a side of the mask layer away from the n-type semiconductor layer to form a window, and growing a column in the window to obtain a buffer layer; Sequentially preparing a light-emitting layer, an electron blocking layer, and a p-type semiconductor layer on the buffer layer to obtain the initial light-emitting structure; The pillar is in contact with the n-type semiconductor layer, and a surface of the pillar away from the n-type semiconductor layer is flush with a surface of the mask layer away from the n-type semiconductor layer.

12. The preparation method according to claim 11, characterized in that The growth conditions of the column include a temperature of 950-1100° C., a carrier gas of hydrogen or a mixture of hydrogen and nitrogen, a pressure of 50-400 mbar, and a V / III ratio of 10-500.

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