Dual three-phase motor drive control method, controller and system for suppressing capacitance ripple
By calculating the zero vector allocation factors k1 and k2 to adjust the action time of the zero vector in the inverter and staggering the capacitor ripple phase, the problems of capacitor ripple current and heat loss in dual three-phase motors are solved, achieving more effective capacitor ripple suppression and loss reduction, and enhancing system reliability.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- HUAZHONG UNIV OF SCI & TECH
- Filing Date
- 2023-09-19
- Publication Date
- 2026-06-02
Smart Images

Figure CN117318578B_ABST
Abstract
Description
Technical Field
[0001] This invention belongs to the field of dual-phase and three-phase motor control, and more specifically, relates to a dual-phase and three-phase motor drive control method, controller, and system for suppressing capacitor ripple. Background Technology
[0002] A dual three-phase motor system consists of two sets of three-phase windings. Dual three-phase motors have the following advantages: (1) Due to neutral point isolation, the sum of the neutral point currents of each set of three-phase windings is zero, which reduces the dimensionality of the mathematical model. (2) Using the three-phase windings as a subset effectively suppresses the third harmonic and its multiples. (3) Under the same voltage level, the motor's power rating is easily expandable to a larger capacity. (4) There is no direct electrical connection between the two sets of windings, resulting in strong fault tolerance. In general, dual three-phase motors have advantages such as strong fault tolerance and power sharing, and therefore have been widely used.
[0003] In dual three-phase motors, different windings are powered independently by different inverters. The size and weight of the supporting capacitors in the inverters are often limited by their heat loss. Severe heat generation can also reduce the lifespan of the supporting capacitors, thereby affecting the lifespan and reliability of the entire controller. The ripple current of the capacitor, which causes losses through the capacitor's equivalent series resistance (ESR), is the main factor contributing to capacitor heat generation. Reducing the capacitor ripple current can effectively reduce capacitor heat generation and is an important method to extend capacitor lifespan and enhance capacitor reliability.
[0004] Since different windings of the dual three-phase motor are powered separately by different inverters, this means that the two inverters can use different modulation methods to achieve independent control of the two windings. Some scholars have proposed a method where the two inverters share a capacitor and use carrier phase shifting to reduce capacitor current ripple. Carrier phase shifting can effectively eliminate harmonic currents at twice the switching frequency in the capacitor, but still retains a significant component at four times the switching frequency. For thin-film capacitors, their equivalent series resistance increases with frequency in the high-frequency range, and even after carrier phase shifting, the high-frequency components of the capacitor still generate significant losses, making the suppression effect of carrier phase shifting on capacitor losses still limited. Summary of the Invention
[0005] To address the shortcomings and improvement needs of existing technologies, this invention provides a dual three-phase motor drive control method, controller, and system for suppressing capacitor ripple. The purpose is to effectively reduce capacitor ripple current and capacitor heat loss in dual three-phase inverters.
[0006] To achieve the above objectives, according to one aspect of the present invention, a dual three-phase motor drive control method for suppressing capacitor ripple is provided, wherein the two sets of three-phase windings of the dual three-phase motor are powered separately by two inverters, namely a first inverter and a second inverter; the drive control method includes the following steps:
[0007] (S1) Determine the space vector that each inverter needs to output;
[0008] (S2) Calculate the modulation ratio of each inverter and the two non-zero vectors participating in modulation in each inverter and their corresponding action times, as well as the total zero vector action time, based on the space vector. Also calculate the proportions k1 and k2 of the action time of the zero vector V7 in the first and second inverters relative to the total zero vector action time, respectively; k1 and k2 satisfy:
[0009]
[0010] (S3) Adjust the action time of zero vectors V7 and V0 in the first inverter according to k1, and adjust the action time of zero vectors V7 and V0 in the second inverter according to k2. Determine the output duty cycle of each phase according to the action time of the two non-zero vectors participating in the modulation in each inverter, and determine the switching signal of each phase arm in each inverter according to the duty cycle of each phase.
[0011] Wherein, zero vector V7 is the vector when all three phase bridge arm transistors in the inverter are turned on, and zero vector V0 is the vector when all three phase bridge arm transistors in the inverter are turned off; M1 and M2 represent the modulation ratios of the first inverter and the second inverter, respectively.
[0012] Furthermore, the values of k1 and k2 are as follows:
[0013]
[0014] Further, in step (S1), for any inverter, determining its required output space vector includes:
[0015] Collect the rotational speed n of the dual three-phase motor, and then input the given rotational speed command value n. dem The difference between the voltage and the rotational speed n is used for PI control to obtain the q-axis voltage command value i. qref ;
[0016] Obtain the q-axis current i of the three-phase windings connected to the inverter. q , change the q-axis voltage command value i qref With q-axis current i q After subtraction, PI control is performed to obtain the q-axis voltage command value U. q ;
[0017] Obtain the d-axis current i of the three-phase windings connected to the inverter. d The given d-axis current command value i dref With d-axis current i d After subtraction, PI control is performed to obtain the d-axis voltage command value U. d .
[0018] Furthermore, for any inverter, the total zero-vector action time is calculated as follows:
[0019] t = T s -t x -t y
[0020] Among them, T s For the switching period, t x and t y These represent the durations of action of the two non-zero vectors.
[0021] According to another aspect of the present invention, a dual three-phase motor drive controller for suppressing capacitor ripple is provided, wherein the two sets of three-phase windings of the dual three-phase motor are respectively powered by two inverters, namely a first inverter and a second inverter; the drive control system includes:
[0022] The speed and current control module is used to determine the space vector that each inverter needs to output;
[0023] The zero-vector allocation module is used to calculate the modulation ratio of each inverter, the two non-zero vectors participating in modulation in each inverter and their corresponding action times, and the total zero-vector action time based on the space vector. It also calculates the proportions k1 and k2 of the action time of the zero vector V7 in the first and second inverters relative to the total zero-vector action time, respectively. k1 and k2 satisfy the following:
[0024]
[0025] And a modulation module, used to adjust the action time of zero vectors V7 and V0 in the first inverter according to k1, and adjust the action time of zero vectors V7 and V0 in the second inverter according to k2, determine the output duty cycle of each phase according to the action time of the two non-zero vectors participating in the modulation in each inverter, and determine the switching signal of each phase bridge arm in each inverter according to the duty cycle of each phase.
[0026] Among them, zero vector V7 is the vector when all three phase bridge arm transistors in the inverter are turned on, and zero vector V0 is the vector when all three phase bridge arm transistors in the inverter are turned off; M1 and M2 represent the modulation ratios of the two inverters, respectively.
[0027] Furthermore, the values of k1 and k2 are as follows:
[0028]
[0029] Furthermore, the speed and current control module includes:
[0030] The speed control unit has a first input terminal for receiving a given n. dem Its second input terminal is used to input the speed n of the dual three-phase motor, and it is used to process the given speed command value n.dem The difference between the voltage and the rotational speed n is used for PI control to obtain the q-axis voltage command value i. qref ;
[0031] The first current control unit has its first input terminal connected to the output terminal of the speed control unit, and its second input terminal used to receive the q-axis current i from the three-phase winding connected to the first inverter. q1 Its third input terminal is used to receive the d-axis current i of the three-phase winding connected to the first inverter. d1 Its fourth input terminal is used to receive the d-axis current reference value i. dref It is used to transfer the q-axis voltage command value i qref With q-axis current i q1 After subtraction, PI control is performed to obtain the q-axis voltage command value U. q1 and the given d-axis current command value i dref With d-axis current i d1 After subtraction, PI control is performed to obtain the d-axis voltage command value U. d1 ;
[0032] The second current control unit has its first input terminal connected to the output terminal of the speed control unit, and its second input terminal used to receive the q-axis current i from the three-phase winding connected to the second inverter. q2 Its third input terminal is used to receive the d-axis current i of the three-phase winding connected to the second inverter. d2 Its fourth input terminal is used to receive the d-axis current reference value i. dref It is used to transfer the q-axis voltage command value i qref With q-axis current i q2 After subtraction, PI control is performed to obtain the q-axis voltage command value U. q2 and the given d-axis current command value i dref With d-axis current i d2 After subtraction, PI control is performed to obtain the d-axis voltage command value U. d2 .
[0033] According to another aspect of the present invention, a dual three-phase motor system is provided, comprising:
[0034] Dual three-phase motors;
[0035] The first inverter and the second inverter are respectively connected to the two sets of three-phase windings of the dual three-phase motor;
[0036] And the dual three-phase motor drive controller for suppressing capacitor ripple provided by the present invention.
[0037] In summary, the above-described technical solutions conceived in this invention can achieve the following beneficial effects:
[0038] This invention allocates the duration of zero vectors V7 and V0 in each inverter according to calculated zero vector allocation factors k1 and k2, thus staggering the phase of the capacitor ripple generated by the two inverters and suppressing the shared capacitor ripple current. Specifically, it effectively suppresses the main components in the spectrum, namely the 1st and 2nd times switching frequency components, while also suppressing high-frequency components (4th times switching frequency components). Compared to traditional carrier phase shifting, it more effectively suppresses capacitor ripple, reduces capacitor losses, and enhances system reliability. Compared to carrier phase shifting, it significantly reduces capacitor heating and enhances system reliability. Compared to traditional SVPWM modulation methods, only zero vector allocation needs to be controlled to suppress capacitor ripple current. Attached Figure Description
[0039] Figure 1 This is a topology diagram of an inverter used to drive a dual three-phase motor.
[0040] Figure 2 A spatial vector diagram of SVPWM modulation provided in an embodiment of the present invention;
[0041] Figure 3 A block diagram of a dual three-phase motor drive control method for suppressing capacitor ripple provided in an embodiment of the present invention;
[0042] Figure 4 The diagram shows a comparison of capacitor ripple current under typical operating conditions using different methods; where (a) is the capacitor ripple current and its spectrum without suppression, (b) is the capacitor ripple current and its spectrum with carrier phase shift, and (c) is the capacitor ripple current and its spectrum after using the method provided in the embodiments of the present invention.
[0043] Figure 5 This provides a comparative schematic diagram of capacitor loss under different methods for embodiments of the present invention. Detailed Implementation
[0044] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the invention. Furthermore, the technical features involved in the various embodiments of this invention described below can be combined with each other as long as they do not conflict with each other.
[0045] In this invention, the terms "first," "second," etc. (if present) in the invention and the accompanying drawings are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence.
[0046] Before explaining the technical solution of the present invention in detail, the principle of the present invention to achieve capacitor ripple suppression is analyzed as follows.
[0047] Figure 1 The diagram shows the topology of a motor controller in a typical dual three-phase motor system. This controller consists of two inverters sharing a single DC support capacitor, with a bus voltage of V. dc The current input to the inverter from the DC bus via the supporting capacitor is defined as the DC link current i. p The capacitor current is i C The DC current is i dc For ease of description, the two inverters are referred to as the first inverter and the second inverter, respectively. The three phases of the first inverter are denoted as A1, B1, and C1, and the three phases of the second inverter are denoted as A2, B2, and C2. The switching function of the upper transistor on phase x (x = A1, B1, C1, A2, B2, C2) is defined as s. x Its spectrum is S x Its value is 1 when it is turned on and 0 when it is turned off. The different combinations of switching states of the three switching transistors in the three-phase bridge arm correspond to... Figure 2 Each spatial vector in the vector. Define the phase current of phase x as i. x Its spectrum is I x The inverter switching frequency is f. c Angular frequency is ω c The fundamental frequency of the motor is f. s Angular frequency is ω s Typically, the fundamental frequency of a motor is much lower than its switching frequency.
[0048] Figure 2 This is the space vector diagram for SVPWM modulation. There are eight vectors in total: zero vectors V0 and V7, and six non-zero vectors. The non-zero vectors have equal amplitudes and are 60° out of phase with each other. Zero vector V0 represents all three-phase bridge arm transistors being off, and V7 represents all three-phase bridge arm transistors being on. Within each switching cycle, the space vector required for the inverter's output can be synthesized from two non-zero vectors.
[0049] according to Figure 1 It can be seen that when the upper phase transistor of a certain phase is turned on, i p It will form a circuit with the motor winding of that phase, providing current to that phase. Therefore, i p It equals the sum of the products of the three-phase current and the switching function, that is:
[0050] i p =s A1 i A1 +s B1 i B1 +s C1 i C1 +s A2 i A2 +s B2 iB2 +s C2 i C2 (1)
[0051] Performing a Fourier transform on both sides of the above equation yields the following equation:
[0052] I p =S A1 *I A1 +S B1 *I B1 +S C1 *I C1 +S A2 *I A2 +S B2 *I B2 +S C2 *I C2 (2)
[0053] Among them, I p Let represent the spectrum of the DC link current. * denotes convolution, which has a distributive property. Taking phase A1 as an example, the high-frequency harmonic current is negligible compared to the fundamental current. After ignoring it, the convolution of the A1 phase switching function spectrum and the A1 phase current spectrum can be expanded to the sum of the convolutions of the fundamental component of the phase current and the frequency components of the switching function. The contribution of the fundamental component of the phase current to the DC link current is ±ω of the switching function spectrum of the transistor on each phase arm. s Due to the superposition after frequency shifting, the spectrum of the DC link current can therefore be expressed as:
[0054]
[0055] Under normal circumstances, for the high-frequency components in the DC link current, the impedance of the DC bus is much greater than the capacitor impedance. Therefore, the DC link current spectrum after removing the DC component can be considered as the capacitor current spectrum.
[0056] Based on the capacitor's spectrum, the capacitor's losses can be calculated. Considering that both the capacitor's equivalent series resistance (ESR) and current change with frequency, they can be expressed as ESR(mω). c +nω s ) and I C (mω c +nω s Accordingly, the loss in a capacitor can be written as:
[0057]
[0058] Where m represents the carrier order and n represents the modulation order, m is a positive integer and n is an integer. c ±nf sThe capacitor ripple current caused by the harmonic components of the frequency is small and can be ignored. Therefore, according to the capacitor loss expression shown in equation (4), as long as mf c ±f s With the carrier sideband harmonics of the frequency eliminated, the capacitor ripple at the m-th switching frequency is also eliminated.
[0059] Let M represent the modulation ratio, and its value range is: The three-phase output voltage of the inverter can then be expressed as:
[0060]
[0061] SVPWM can be considered as a sinusoidal wave injected with a third harmonic, which can be expressed as:
[0062] v cm =-kmax(u an ,u bn ,u bn )-(1-k)min(u an ,u bn ,u bn )+2k-1 (6)
[0063] Where k is the zero vector allocation factor, which represents the proportion of the action time of the zero vector V7 to the total action time of the zero vector, and its value ranges from (0,1).
[0064] In an inverter, the maximum and minimum values of the three-phase modulation voltage can be approximated as:
[0065]
[0066] Based on the approximate expression shown in equation (7), the upper tube switching function s for any term can be obtained. a for:
[0067] s a =1p<ω c t < -p
[0068] in,
[0069] After performing a Fourier expansion on the above switching function, the Fourier extrema of each term are obtained as follows:
[0070]
[0071] Where Y = ω s t; where The value of directly affects the magnitude of the Fourier pole number, which in turn affects the capacitor ripple at the m-th switching frequency.
[0072] Considering that the frequency spectrum of capacitor ripple is mainly concentrated at the switching frequency and its multiples thereof, and f c and 2f c Frequency harmonics are its main component. As analyzed above, as long as mf c ±f s With the carrier sideband harmonics of the frequency eliminated, the capacitor ripple at the m-th switching frequency is also eliminated.
[0073] Let k1 and k2 represent the zero vector allocation factors of the first inverter and the second inverter, respectively. From the above equation, it can be found that when k1 + k2 = 1, the f-axis switching function of the corresponding phase transistors of the two inverters can be optimized. c ±f s The current harmonics of the same frequency have the same amplitude but opposite phase, thus reducing the first carrier component in the capacitor to zero. Based on this, if the second carrier harmonic of the capacitor is minimized, the effective value of the capacitor ripple can be minimized. That is, 2f in the switching function is required. c ±f s The harmonic amplitude should be as small as possible. When k1 or k2 satisfies the following formula, 2f in the switching function can be minimized. c ±f s Minimum harmonic amplitude:
[0074]
[0075] Based on k1+k2=1, we can solve for:
[0076]
[0077] Since the 2x switching frequency component in the capacitor ripple is the component with the largest amplitude in the spectrum, and carrier phase shifting is generally a 90° phase shift of the carrier, its effect on the 4x switching frequency component of the capacitor ripple is not suppressed in any way. However, when this invention analyzes the 1x and 2x switching frequencies and sets the zero vector allocation factor of the inverter according to the above expression, the Fourier series C of the 4x switching frequency component of the capacitor ripple... mn middle The amplitude will be suppressed. Therefore, in addition to suppressing capacitor ripple at 1 times and 2 times the switching frequency, this invention will also have a certain suppression effect on capacitor ripple at 4 times the switching frequency. In general, based on the expression shown in the above formula (11), the zero vector allocation factor in the first inverter and the second inverter is calculated according to the modulation ratio, that is, the ratio of the action time of the zero vector V7 to the total action time of the zero vector. The action times of the zero vectors V7 and V0 in each inverter are adjusted accordingly. This can effectively suppress the main components in the spectrum, that is, the components at 1 times and 2 times the switching frequency, and at the same time suppress the high-frequency components (components at 4 times the switching frequency). Compared with the traditional carrier phase shift, it can more effectively suppress capacitor ripple and reduce capacitor loss. This invention is proposed on the basis of this discovery.
[0078] The following is an example.
[0079] Example 1:
[0080] A method for controlling the drive of a dual three-phase motor to suppress capacitor ripple is proposed. The two sets of three-phase windings of the dual three-phase motor are powered separately by two inverters, namely, a first inverter and a second inverter. The connection topology of the two inverters is as follows: Figure 1 As shown, each set of three-phase windings is connected to the midpoint of the bridge arm of the corresponding inverter.
[0081] like Figure 3 As shown, the drive control method provided in this embodiment includes the following steps:
[0082] (S1) Determine the space vector that each inverter needs to output;
[0083] The required output space vector of the inverter can be calculated using the speed loop and current loop. Specifically, the method is as follows:
[0084] Collect the rotational speed n of the dual three-phase motor, and then input the given rotational speed command value n. dem The difference between the voltage and the rotational speed n is used for PI control to obtain the q-axis voltage command value i. qref ;
[0085] Obtain the q-axis current i of the three-phase windings connected to the inverter. q , change the q-axis voltage command value i qref With q-axis current i q After subtraction, PI control is performed to obtain the q-axis voltage command value U. q ;
[0086] Obtain the d-axis current i of the three-phase windings connected to the inverter. d The given d-axis current command value i dref With d-axis current i d After subtraction, PI control is performed to obtain the q-axis voltage command value U. q ;
[0087] The q-axis voltage command value U is calculated. q and q-axis voltage command value U q Then, the space vector V can be calculated. ref Amplitude Space vector V ref The angle is the rotor position angle of the dual three-phase motor;
[0088] (S2) Calculate the modulation ratio of each inverter and the two non-zero vectors participating in modulation in each inverter and their corresponding action time, as well as the total zero vector action time, according to the space vector. Calculate the ratios k1 and k2 of the action time of the zero vector V7 in the first inverter and the total zero vector action time in the second inverter according to the above formula (11).
[0089] The q-axis voltage command value U is calculated. q and d-axis voltage command value U d After that, according to Calculate the corresponding modulation ratios; for ease of description, the modulation ratios of the first inverter and the second inverter are denoted as M1 and M2, respectively;
[0090] According to the q-axis voltage command value U q and d-axis voltage command value U d The space vector that the inverter needs to output can also be calculated, and then the two non-zero vectors that synthesize this space vector and the corresponding action time t can be determined. x and t y If the remaining time within one switching cycle is filled with the zero vector, then the total zero vector duration is t = T. s -t x -t y T s The switching cycle; In traditional SVPWM modulation, the two zero vectors V0 (000) and V7 (111) each account for half of the total zero vector size. At this time, the capacitor ripple generated by the two inverters has the same amplitude and phase, and they are superimposed on each other in the capacitor, which will lead to a large capacitor loss.
[0091] In this embodiment, the zero vector allocation factor in the two inverters is calculated according to the above formula (11) as follows:
[0092]
[0093]
[0094] (S3) Adjust the action time of zero vectors V7 and V0 in the first inverter according to k1, and adjust the action time of zero vectors V7 and V0 in the second inverter according to k2. Determine the output duty cycle of each phase according to the action time of the two non-zero vectors participating in the modulation in each inverter, and determine the switching signal of each phase arm in each inverter according to the duty cycle of each phase.
[0095] Based on the analysis above, this embodiment calculates the zero vector allocation factors k1 and k2 according to the above formula (11), and allocates the action time of the zero vectors V7 and V0 according to the calculated zero vector allocation factors, so as to make the capacitor ripple phase generated by the two inverters staggered, so as to suppress the shared capacitor ripple current.
[0096] After calculating the duty cycle of each phase in the inverter based on the action time of the non-zero vector, for any phase, the switching signal of that phase arm can be determined by comparing the carrier wave based on its duty cycle. Specifically, when the duty cycle of the arm is greater than that of the triangular carrier wave, the switching signal of the upper switch is high and the switching signal of the lower switch is low; conversely, when the duty cycle of the arm is less than that of the triangular carrier wave, the switching signal of the upper switch is low and the switching signal of the lower switch is high. The switching signals of the upper and lower switches of each arm are always complementary.
[0097] Example 2:
[0098] A dual three-phase motor drive controller for suppressing capacitor ripple, wherein the two sets of three-phase windings of the dual three-phase motor are powered by two separate inverters, namely the first inverter and the second inverter, and the connection topology of the two inverters is as follows. Figure 1 As shown, each set of three-phase windings is connected to the midpoint of the corresponding inverter bridge arm;
[0099] refer to Figure 3 The drive control system provided in this embodiment includes:
[0100] The speed and current control module is used to determine the space vector that each inverter needs to output;
[0101] The zero-vector allocation module is used to calculate the modulation ratio of each inverter, the two non-zero vectors participating in modulation in each inverter and their corresponding action times, and the total zero-vector action time based on the space vector. It also calculates the proportions k1 and k2 of the action time of the zero vector V7 in the first and second inverters relative to the total zero-vector action time, respectively.
[0102]
[0103]
[0104] And a modulation module, used to adjust the action time of zero vectors V7 and V0 in the first inverter according to k1, and adjust the action time of zero vectors V7 and V0 in the second inverter according to k2, determine the output duty cycle of each phase according to the action time of the two non-zero vectors participating in the modulation in each inverter, and determine the switching signal of each phase bridge arm in each inverter according to the duty cycle of each phase.
[0105] Among them, zero vector V7 is the vector when all three phase bridge arm transistors in the inverter are turned on, and zero vector V0 is the vector when all three phase bridge arm transistors in the inverter are turned off; M1 and M2 represent the modulation ratios of the two inverters, respectively.
[0106] Further reference Figure 3 In this embodiment, the speed and current control module includes:
[0107] The speed control unit has a first input terminal for receiving a given n. dem Its second input terminal is used to input the speed n of the dual three-phase motor, and it is used to process the given speed command value n. dem The difference between the voltage and the rotational speed n is used for PI control to obtain the q-axis voltage command value i. qref ;
[0108] The first current control unit has its first input terminal connected to the output terminal of the speed control unit, and its second input terminal used to receive the q-axis current i from the three-phase winding connected to the first inverter. q1 Its third input terminal is used to receive the d-axis current i of the three-phase winding connected to the first inverter. d1 Its fourth input terminal is used to receive the d-axis current reference value i. dref It is used to transfer the q-axis voltage command value i qref With q-axis current i q1 After subtraction, PI control is performed to obtain the q-axis voltage command value U. q1 and the given d-axis current command value i dref With d-axis current i d1 After subtraction, PI control is performed to obtain the d-axis voltage command value U. d1 ;
[0109] The second current control unit has its first input terminal connected to the output terminal of the speed control unit, and its second input terminal used to receive the q-axis current i from the three-phase winding connected to the second inverter. q2 Its third input terminal is used to receive the d-axis current i of the three-phase winding connected to the second inverter. d2 Its fourth input terminal is used to receive the d-axis current reference value i. dref It is used to transfer the q-axis voltage command value i qref With q-axis current i q2 After subtraction, PI control is performed to obtain the q-axis voltage command value U. q2and the given d-axis current command value i dref With d-axis current i d2 After subtraction, PI control is performed to obtain the d-axis voltage command value U. d2 .
[0110] In this embodiment, the specific implementation methods of the remaining modules can be referred to the description in Embodiment 1 above, and will not be repeated here.
[0111] Example 3:
[0112] A dual three-phase motor system, comprising:
[0113] Dual three-phase motors;
[0114] The first inverter and the second inverter are respectively connected to the two sets of three-phase windings of the dual three-phase motor;
[0115] And the dual three-phase motor drive controller for suppressing capacitor ripple provided in Embodiment 2 above.
[0116] In this embodiment, the specific connection relationships of the dual three-phase motor, inverter, and drive controller can be found in [reference]. Figure 3 .
[0117] The following explanation, using a practical dual three-phase motor as the control object, further illustrates the beneficial effects that the present invention can achieve.
[0118] For a 10-pole, speed-ranged, 0-3600rpm, rated load 120Nm dual three-phase motor, under a bus voltage of 380VDC and a switching frequency of 20kHz, the capacitor ripple current and its loss were compared and analyzed by simulation with no suppression, carrier phase shift, and the capacitor ripple current suppression method proposed in this patent. A 330uF film capacitor was selected, and the ESR variation with frequency is shown in Table 1.
[0119] Table 1 Relationship between ESR and frequency
[0120] Frequency / kHz 20 40 60 80 100 120 140 160 ESR / mΩ 0.91 1.25 1.43 1.75 2.10 3.07 3.88 4.68
[0121] As shown in Table 1, the equivalent series resistance (ESR) of the capacitor increases with the frequency of the applied current. This means that when the current amplitude is the same at different frequencies, the higher frequency current will generate greater losses. Therefore, it is possible to suppress high-frequency current ripple and effectively reduce capacitor losses.
[0122] Figure 4 The paper presents a comparison of capacitor ripple current suppression methods, the absence of suppression, and carrier phase shift when the modulation ratio M = 0.8. Figure 4In (a), the left side is the capacitor ripple current without suppression, and the right side is its spectrum; (b) the left side is the capacitor ripple current with carrier phase shift, and the right side is its spectrum; (c) the capacitor ripple current after using the method provided in the embodiments of the present invention, and the right side is its spectrum.
[0123] according to Figure 4 As can be seen from the spectrum under different conditions, both carrier phase shifting and the zero vector allocation method proposed in this paper can reduce capacitor ripple. Furthermore, the capacitor ripple of the method proposed in this embodiment is mainly in the frequency band of twice the carrier frequency, while the carrier phase shift is four times the carrier frequency. As analyzed above, higher frequency currents will generate greater losses. Therefore, compared with carrier phase shifting, the present invention will further reduce capacitor losses because high-frequency current ripple is effectively suppressed.
[0124] Figure 5 This paper demonstrates the capacitor ripple current suppression method proposed in this invention, the relationship between capacitor loss and modulation ratio when no suppression is applied, and when carrier phase shifting. The comparison shows that the method proposed in this invention can effectively reduce capacitor loss; compared to carrier phase shifting, capacitor loss is reduced by up to 10.25W, approximately 37.01%.
[0125] Those skilled in the art will readily understand that the above description is merely a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of the present invention should be included within the scope of protection of the present invention.
Claims
1. A method for controlling the drive of a dual three-phase motor to suppress capacitor ripple, wherein the two sets of three-phase windings of the dual three-phase motor are powered separately by two inverters, namely, a first inverter and a second inverter; characterized in that, The drive control method includes the following steps: (S1) Determine the space vector that each inverter needs to output; (S2) Calculate the modulation ratio of each inverter and the two non-zero vectors participating in modulation in each inverter and their corresponding action times, as well as the total zero vector action time, based on the space vector. Calculate the zero vectors in the first inverter and the second inverter respectively. V 7% of the action time accounts for the proportion of the total zero vector action time. k 1 and k 2; k 1 and k 2. Satisfies: (S3) According to k 1. Adjust the zero vector in the first inverter V 7 and V The duration of action of 0, and according to k 2. Adjust the zero vector in the second inverter V 7 and V The duration of 0 is determined by the duration of the two non-zero vectors involved in modulation in each inverter to determine the output duty cycle of each phase, and the switching signal of each phase arm in each inverter is determined by the duty cycle of each phase. Where, zero vector V 7 is the vector when all three phase bridge arm transistors in the inverter are conducting; zero vector. V 0 is the vector when all the upper transistors of the three-phase bridge arms in the inverter are turned off; M 1 and M 2 represents the modulation ratio of the first inverter and the second inverter, respectively.
2. The dual three-phase motor drive control method for suppressing capacitor ripple as described in claim 1, characterized in that, k 1 and k The possible values for 2 are as follows: 。 3. The dual-phase three-phase motor drive control method for suppressing capacitor ripple as described in claim 1 or 2, characterized in that, In step (S1), for any inverter, determining its required output space vector includes: The rotational speed of the dual three-phase motor was collected. n The given speed command value n dem With rotational speed n After subtraction, PI control is performed to obtain the q-axis voltage command value. i qref ; Obtain the q-axis current of the three-phase windings connected to the inverter. i q The q-axis voltage command value i qref With q-axis current i q After subtraction, PI control is performed to obtain the q-axis voltage command value. U q ; Obtain the d-axis current of the three-phase windings connected to the inverter. i d The given d-axis current command value i dref With d-axis current i d After subtraction, PI control is performed to obtain the d-axis voltage command value. U d .
4. The dual-phase three-phase motor drive control method for suppressing capacitor ripple as described in claim 1 or 2, characterized in that, For any inverter, the total zero vector action time is calculated as follows: in, T s For the switching cycle, t x and t y These represent the durations of action of the two non-zero vectors.
5. A dual three-phase motor drive controller for suppressing capacitor ripple, wherein the two sets of three-phase windings of the dual three-phase motor are respectively powered by two inverters, namely a first inverter and a second inverter; characterized in that, The drive controller includes: The speed and current control module is used to determine the space vector that each inverter needs to output; The zero-vector allocation module is used to calculate the modulation ratio of each inverter, the two non-zero vectors participating in modulation in each inverter and their corresponding durations, and the total zero-vector duration based on the space vector, and to calculate the zero vectors in the first inverter and the second inverter respectively. V 7% of the action time accounts for the proportion of the total zero vector action time. k 1 and k 2, k 1 and k 2. Satisfies: And a modulation module, used to... k 1. Adjust the zero vector in the first inverter V 7 and V The duration of action of 0, and according to k 2. Adjust the zero vector in the second inverter V 7 and V The duration of 0 is determined by the duration of the two non-zero vectors involved in modulation in each inverter to determine the output duty cycle of each phase, and the switching signal of each phase arm in each inverter is determined by the duty cycle of each phase. Where, zero vector V 7 is the vector when all three phase bridge arm transistors in the inverter are conducting; zero vector. V 0 is the vector when all the upper transistors of the three-phase bridge arms in the inverter are turned off; M 1 and M 2 represents the modulation ratio of the two inverters respectively.
6. The dual three-phase motor drive controller for suppressing capacitor ripple as described in claim 5, characterized in that, k 1 and k The possible values for 2 are as follows: 。 7. The dual three-phase motor drive controller for suppressing capacitor ripple as described in claim 5 or 6, characterized in that, The speed and current control module includes: The speed control unit has a first input terminal for receiving a given speed. n dem Its second input terminal is used to input the speed of the dual three-phase motor. n It is used to assign a given speed command value n dem With rotational speed n After subtraction, PI control is performed to obtain the q-axis voltage command value. i qref ; A first current control unit has its first input terminal connected to the output terminal of the speed control unit, and its second input terminal used to receive the q-axis current of the three-phase winding connected to the first inverter. i q1 Its third input terminal is used to receive the d-axis current of the three-phase winding connected to the first inverter. i d1 Its fourth input terminal is used to receive the d-axis current reference value. i dref It is used to transfer the q-axis voltage command value i qref With q-axis current i q1 After subtraction, PI control is performed to obtain the q-axis voltage command value. U q1 and the given d-axis current command value i dref With d-axis current i d1 After subtraction, PI control is performed to obtain the d-axis voltage command value. U d1 ; The second current control unit has its first input terminal connected to the output terminal of the speed control unit, and its second input terminal used to receive the q-axis current of the three-phase winding connected to the second inverter. i q2 Its third input terminal is used to receive the d-axis current of the three-phase winding connected to the second inverter. i d2 Its fourth input terminal is used to receive the d-axis current reference value. i dref It is used to transfer the q-axis voltage command value i qref With q-axis current i q2 After subtraction, PI control is performed to obtain the q-axis voltage command value. U q2 and the given d-axis current command value i dref With d-axis current i d2 After subtraction, PI control is performed to obtain the d-axis voltage command value. U d2 .
8. A dual three-phase motor system, characterized in that, include: Dual three-phase motors; The first inverter and the second inverter are respectively connected to the two sets of three-phase windings of the dual three-phase motor; And the dual three-phase motor drive controller for suppressing capacitor ripple as described in any one of claims 5 to 7.