Data storage method and electronic device

Abstract

Embodiments of the present application provide a data storage method and an electronic device. In the method, in the case that the electronic device fails to read data of a virtual machine, the electronic device can convert a virtual machine exception error into an identifiable data transmission exception, that is, the electronic device modifies the check information corresponding to the data into error check information, so that the storage device can determine the data transmission exception based on the error check information, that is, the storage device can intercept the data to avoid writing the error data into the storage device. The electronic device can only transmit the data of the virtual machine in a normal state at the next transmission, thereby ensuring that the transmission layer connection is not disconnected, the abnormal virtual machine does not affect the data storage of the normal virtual machine, the problem of error propagation is avoided, and the reliability and stability of data storage are effectively improved.

Description

TECHNICAL FIELD

[0001] Embodiments of the present application relate to the field of storage, and in particular to a data storage method and an electronic device. BACKGROUND

[0002] A public cloud storage virtual block service (VBS) is to virtualize hard disks of storage nodes as a storage resource pool, and to provide virtual volume storage for virtual machines. In actual application, IO requests issued by multiple virtual machines are split and scattered to all hard disks in the entire resource pool, so as to realize balanced access to the target storage node.

[0003] However, if the data sending is abnormal due to a fault of the virtual machine in the data writing manner in the prior art, error diffusion may occur, that is, the data of other virtual machines is also sent abnormally. SUMMARY

[0004] Embodiments of the present application provide a data storage method and an electronic device. In the method, the electronic device can convert a virtual machine exception into an identifiable data transmission exception, so as to ensure that a transmission layer connection is not chained, avoid that data transmission of a normal virtual machine is affected by an abnormal virtual machine, and improve the reliability and stability of data storage.

[0005] In a first aspect, embodiments of this application provide a data storage method. The method includes: an electronic device acquiring a first write request and a second write request; the first write request instructs the writing of first data from a first virtual machine to a storage device, and the second write request instructs the writing of second data from a second virtual machine to the storage device. In response to the first and second write requests, the electronic device reads the first data and the second data from local storage. If the electronic device successfully reads the first data but fails to read the second data, it sends a first data message to the storage device; the first data message includes the first data, first verification information, invalid data, and second verification information; wherein the size of the invalid data is the same as the size of the second data; the first verification information is generated based on the first data, and the second verification information is different from the verification information generated based on the invalid data. The electronic device receives a failure response message sent by the storage device; the failure response message includes the location information of the invalid data in the first data message, and the failure response message instructs the storage device to fail to verify the invalid data based on the second verification information. In response to the failure response message, the electronic device sends a second data message to the storage device; the second data message includes the first data and the first verification information. The electronic device receives a success response message sent by the storage device, and the success response message instructs the storage device to write the first data to the storage device. In this way, when an electronic device fails to read data from a virtual machine, it can convert the virtual machine's abnormal error into a recognizable data transmission anomaly. Specifically, the electronic device modifies the checksum information corresponding to the data to erroneous checksum information. This allows the storage device to determine the data transmission anomaly based on the erroneous checksum information, enabling it to intercept the data and prevent erroneous data from being written to the storage device. In the next transmission, the electronic device can only transmit data from virtual machines in a healthy state, ensuring uninterrupted transport layer connections. Abnormal virtual machines will not affect the data storage of healthy virtual machines, preventing error propagation and effectively improving the reliability and stability of data storage.

[0006] For example, an electronic device can be a computing node or a network interface card (NIC) within a computing node.

[0007] For example, if the electronic device is a computing node, the first write request and the second write request can be sent by a virtual machine. For example, if the electronic device is a network interface card (NIC), the first write request and the second write request can be sent by the CPU to the NIC, or they can be sent by the virtual machine to the NIC.

[0008] According to the first aspect, the first write request includes the storage location of the first data in local storage, and the second write request includes the storage location of the second data in local storage. In this way, the network card can directly read data from the host side based on the storage location, thereby achieving data DMA.

[0009] According to the first aspect, or any one of the implementations of the first aspect, the reading, by the electronic device, the first data and the second data from the local storage in response to the first write request and the second write request comprises: reading, by the electronic device, the first data based on a storage location of the first data in the local storage. Reading, by the electronic device, the second data based on a storage location of the second data in the local storage. In this way, the network card can directly read data from the host side based on the storage location, thereby realizing DMA of the data.

[0010] According to the first aspect, or any one of the implementations of the first aspect, if the reading of the first data succeeds and the reading of the second data fails, sending, by the electronic device, the first data message to the storage device comprises: determining that the state of the first virtual machine is normal if the reading of the first data succeeds. Determining that the state of the second virtual machine is abnormal if the reading of the second data fails. In this way, the network card can determine whether the virtual machine is normal based on the reading of the data. If the reading of the data succeeds, the virtual machine is normal. If the reading of the data fails, the virtual machine is determined to be abnormal. In the case where the virtual machine is determined to be abnormal, the network card can perform error conversion, i.e., converting the virtual machine state abnormal error into a data transmission error.

[0011] According to the first aspect, or any one of the implementations of the first aspect, if the reading of the first data succeeds and the reading of the second data fails, sending, by the electronic device, the first data message to the storage device comprises: generating invalid data and adding an abnormality flag to the invalid data; the abnormality flag is used to indicate that the invalid data is not the same as the second data to be written by the second virtual machine; generating third check information based on the invalid data; inverting the third check information based on the abnormality flag to obtain second check information. In this way, the network card can make the data message normally transmitted by generating invalid data. And by setting the error check information, the storage node can intercept the data to avoid storing the error data (i.e., invalid data) to the storage device, and the transmission layer can be guaranteed to be continuous.

[0012] According to the first aspect, or any one of the implementations of the first aspect, sending, by the electronic device, the second data message to the storage device in response to the failure response message comprises: re-generating first check information based on the first data; encapsulating the first data and the first check information to obtain the second data message. In this way, the electronic device re-transmits the correct data to remove the data of the abnormal virtual machine, so that the data of the normal virtual machine can be stored to the storage device, thereby avoiding the error of the abnormal virtual machine to spread to the normal virtual machine, and effectively improving the reliability of data storage.

[0013] In a second aspect, an electronic device is provided. The electronic device includes one or more processors; a memory; and one or more computer programs, wherein the one or more computer programs are stored in the memory and, when executed by the one or more processors, cause the electronic device to perform the following steps: obtaining a first write request and a second write request; the first write request is used to indicate writing first data of a first virtual machine to a storage device, and the second write request is used to indicate writing second data of a second virtual machine to the storage device; in response to the first write request and the second write request, reading the first data and the second data from a local storage; if the reading of the first data is successful and the reading of the second data fails, sending a first data message to the storage device; the first data message includes the first data, first check information, invalid data, and second check information; the invalid data has a same size as the second data; the first check information is generated based on the first data, and the second check information is different from check information generated based on the invalid data; receiving a failure response message sent by the storage device; the failure response message includes position information of the invalid data in the first data message, and the failure response message is used to indicate that the storage device fails to verify the invalid data based on the second check information; in response to the failure response message, sending a second data message to the storage device; the second data message includes the first data and the first check information; and receiving a success response message sent by the storage device, the success response message being used to indicate that the storage device writes the first data to the storage device.

[0014] According to the second aspect, the first write request includes a storage position of the first data in the local storage, and the second write request includes a storage position of the second data in the local storage.

[0015] According to the second aspect, or any possible implementation mode of the second aspect, when the computer program is executed by the one or more processors, the electronic device performs the following steps: reading the first data based on the storage position of the first data in the local storage; and reading the second data based on the storage position of the second data in the local storage.

[0016] According to the second aspect, or any possible implementation mode of the second aspect, when the computer program is executed by the one or more processors, the electronic device performs the following steps: determining that a state of the first virtual machine is normal if the reading of the first data is successful; and determining that a state of the second virtual machine is abnormal if the reading of the second data fails.

[0017] According to a second aspect, or any possible implementation mode of the second aspect, when the computer program is executed by one or more processors, the electronic device performs the following steps: generating invalid data, and adding an exception mark to the invalid data; the exception mark is used to indicate that the invalid data is not the same as the second data required to be written by the second virtual machine; generating third check information based on the invalid data; and inverting the third check information based on the exception mark to obtain the second check information.

[0018] According to a second aspect, or any possible implementation mode of the second aspect, when the computer program is executed by one or more processors, the electronic device performs the following steps: generating invalid data, and adding an exception mark to the invalid data; the exception mark is used to indicate that the invalid data is not the same as the second data required to be written by the second virtual machine; generating third check information based on the invalid data; and inverting the third check information based on the exception mark to obtain the second check information.

[0019] The second aspect and any possible implementation mode of the second aspect correspond to the first aspect and any possible implementation mode of the first aspect respectively. The technical effects corresponding to the second aspect and any possible implementation mode of the second aspect can refer to the technical effects corresponding to the first aspect and any possible implementation mode of the first aspect, which will not be described here.

[0020] In a third aspect, the embodiments of the present application provide a computer readable medium for storing a computer program, the computer program comprising instructions for executing the method in the first aspect or any possible implementation mode of the first aspect.

[0021] In a fourth aspect, the embodiments of the present application provide a computer program comprising instructions for executing the method in the first aspect or any possible implementation mode of the first aspect.

[0022] In a fifth aspect, the embodiments of the present application provide a chip comprising a processing circuit and a transceiver pin. The transceiver pin and the processing circuit communicate with each other through an internal connection path. The processing circuit executes the method in the first aspect or any possible implementation mode of the first aspect to control the receiving pin to receive a signal and control the sending pin to send a signal.

[0023] In a sixth aspect, the embodiments of the present application provide a data storage system, which comprises the electronic device and the storage device related to the first aspect and the second aspect. BRIEF DESCRIPTION OF DRAWINGS

[0024] Figure 1 A schematic diagram of a communication system is provided for the embodiments of the present application;

[0025] Figures 2a-2b A flowchart of a data storage method is shown for example;

[0026] Figure 3A structural diagram of a computing node is shown as an example;

[0027] Figure 4 A module interaction diagram is shown as an example;

[0028] Figure 5 A data and address correspondence diagram is shown as an example;

[0029] Figures 6a-6c A data splitting diagram is shown as an example;

[0030] Figure 7 A message recombination diagram is shown as an example;

[0031] Figure 8a A data portion structural diagram is shown as an example;

[0032] Figure 8b Another check field structural diagram is shown as an example;

[0033] Figure 9 A message structure diagram is shown as an example;

[0034] Figure 10 A message structure diagram is shown as an example;

[0035] Figure 11 An apparatus structure diagram is shown as an example. DETAILED DESCRIPTION

[0036] The technical solutions in the embodiments of the present application will be described clearly and completely below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are some of the embodiments of the present application, but not all the embodiments of the present application. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative work fall within the scope of protection of the present application.

[0037] The term "and / or" in the present application is only used to describe the association relationship of the associated objects, which means that there can be three relationships, for example, A and / or B, which can represent the three cases of A alone, A and B together, and B alone.

[0038] The terms "first" and "second" and the like in the specification and claims of the embodiments of the present application are used to distinguish different objects, and are not used to describe the specific order of the objects. For example, the first target object and the second target object are used to distinguish different target objects, and are not used to describe the specific order of the target objects.

[0039] In the embodiments of the present application, the word "exemplary" or "for example" is used to mean serving as an example, instance, or illustration. Any embodiment or design presented as "exemplary" or "for example" in the embodiments of the present application is not necessarily to be construed as preferred or advantageous over other embodiments or designs. In fact, a variety of implementations of the embodiments of the present application are possible, and the word "exemplary" or "for example" is used herein to present concepts in a concrete manner.

[0040] In the description of the embodiments of the present application, "a plurality of" means two or more, unless otherwise specified. For example, a plurality of processing units means two or more processing units; a plurality of systems means two or more systems.

[0041] Before the technical solutions of the embodiments of the present application are described, the communication system of the embodiments of the present application will be described first in combination with the accompanying drawings. Figure 1 A communication system schematic diagram is provided in the embodiments of the present application. The communication system includes, but is not limited to, a computing node, a storage network, and a storage node. The number of computing nodes and storage nodes can be multiple, and the number of devices is not limited in the embodiments of the present application.

[0042] Exemplarily, a single computing node can be a server, a computer, or the like electronic device. The computing node supports virtual block services. At least one virtual machine (VM) and at least one intelligent network card (which can also be referred to as a network card) are configured in each computing node.

[0043] Optionally, the at least one virtual machine is arranged on the host side of the computing node. The network card can interact with the host through a PCIe interface (which can also be other interfaces, and the present application does not make any limitation). The network card presents to the host as an NVMe (Non Volatile Memory Host Controller Interface Specification) or VirtIO (virtual input / output) device. The network card and the CPU can interact with each other through a PCIe interface. It should be noted that the CPU and the network card are taken as independent devices for example in the embodiments of the present application. In other embodiments, the CPU can also be integrated with the network card, and the CPU and the network card can interact with each other through a bus, and the present application does not make any limitation.

[0044] Exemplarily, an Objective Storage Device (OSD) service is installed in a single storage node.

[0045] In the embodiments of the present application, the VBS service in the computing node can virtualize a plurality of storage nodes as a storage pool to provide virtual storage service for the computing node. It can be understood that the computing node sends to the storage pool through a storage network. The storage pool can write data into a plurality of storage nodes.

[0046] For example, the storage network can be RDMA over Converged Ethernet (RoCE), or a Transmission Control Protocol (TCP) network, which is not limited in the present application.

[0047] Figures 2a-2b The flowchart of the exemplary data storage method is shown. Please refer to Figure 2a , comprising the following steps:

[0048] 1) The host of the computing node includes a plurality of VMs. The plurality of VMs can send an IO (Input / Output) request to the network card, and the request can include the physical address of the data to be written. In the embodiments of the present application, the data to be written is the data that the VM needs to write into the storage node, and the physical address of the data to be written is the storage address of the data to be written on the host side.

[0049] 2) The network card transmits the physical address of the data to be written of the plurality of VMs to the CPU. The CPU splits and recombines the data to be written of the plurality of VMs to form a plurality of messages. Each message can include part of the data to be written of at least one VM. The CPU can indicate the physical address corresponding to the data contained in each message to the network card.

[0050] 3) The network card can extract data from the storage of the host based on the physical address indicated by the CPU. The network card groups the data into a plurality of messages according to the indication of the CPU, and sends the messages to the storage node through the storage network. The storage node receives the messages and extracts the data carried in the messages to store the data into the storage medium of the storage node. It should be noted that, as described above, the plurality of storage nodes are virtualized as a storage pool, and the storage node described in the embodiments of the present application can be optionally any storage in the storage pool, or can be understood as a storage controller in the storage pool, etc., which is not limited in the present application.

[0051] Figure 2aThe way the NIC reads data is DMA (Direct Memory Access). That is, the NIC reads data from the storage of the computing node (which can also be understood as the storage corresponding to the VM) according to the instruction of the CPU. In this way, if an exception occurs in at least one of the plurality of virtual machines, for example, the VM has an FLR (Function Level Reset) function layer reset, so that the NIC cannot extract the correct data from the storage. Correspondingly, the NIC cannot send a message to the storage node. In this scenario, the NIC will repeatedly attempt to retransmit the message, and in the case of a VM exception, the NIC repeatedly fails to send the message. After a certain number of retransmissions, the NIC determines that the connection between the storage is incorrect, and disconnects the connection. In this way, the data of other VMs cannot be normally sent, causing virtual machine error propagation.

[0052] Figure 2b Another data storage method is exemplarily shown. Please refer to Figure 2b , specifically comprising:

[0053] 1) The host of the computing node includes a plurality of VMs. The plurality of VMs can send an IO request to the NIC, and the request can include the physical address of the data to be written. In the embodiment of the present application, the data to be written is the data that the VM needs to write into the storage node, and the physical address of the data to be written is the storage address of the data to be written on the host side.

[0054] The NIC extracts data from the storage of the host based on the IO request, and saves the data to the DDR (Double Data Rate) storage corresponding to the NIC.

[0055] 2) The card transmits the physical addresses of the data to be written by the plurality of VMs to the CPU. The CPU splits and recombines the data to be written by the plurality of VMs to form a plurality of messages. Each message can include part of the data to be written by at least one VM.

[0056] 3) The NIC forms a message based on the instruction of the CPU, and sends the data in the DDR storage to the storage node through the storage network.

[0057] In Figure 2bIn the method shown, if an exception occurs in at least one virtual machine, the network card fails to copy data from the storage, that is, fails to successfully extract data from the storage and copy it to the DDR. That is, step 1) is wrong, and the subsequent steps (including step 2) and step 3)) cannot proceed normally. In this method, since the network card extracts data first, and then the CPU reassembles and encapsulates the data, even if the virtual machine data is wrong, the CPU can avoid the wrong virtual machine, that is, when reassembling the message, the data of the abnormal VM is not added, so as to avoid the problem of error propagation caused by VM exception. However, in this way, since the data needs to be moved from the host side to the DDR of the network card, the network card is burdened, which is easy to become a performance bottleneck.

[0058] In the embodiment of the present application, a data storage method is provided. In the method, after the computing node detects that the VM is abnormal, the network card can convert the data of the abnormal VM into invalid data, and modify the corresponding check field of the data, so that the message containing the message can be normally sent, avoiding the problem of link interruption caused by message sending exception, and preventing error propagation. The storage node can determine that the invalid data is included in the message based on the check field, so as to discard the data in the message, so as to avoid writing invalid data (that is, writing to the storage medium). In this way, while preventing error propagation, writing of error data can be avoided, and the safety and reliability of data storage can be effectively improved.

[0059] Figure 3 The structure diagram of the computing node is shown for example. Please refer to Figure 3 The computing node includes but is not limited to a host, a network card and a CPU. The host can be configured with multiple VMs, for example, including VM1, VM2 and VM3, and the specific number can be set according to actual needs, which is not limited by the present application. For example, the CPU can be integrated with the network card, or can be independent, which is not limited by the present application. In the embodiment of the present application, the network card can include a microcode module and a logic engine module. The microcode module can be used for data interaction with the CPU. The logic engine can be used for data extraction and sending.

[0060] The structure diagram shown in Figure 3 The module interaction diagram shown for example, please refer to Figure 4 The module interaction diagram shown for example, please refer to Figure 4 Specifically, the following steps are included:

[0061] S401, the host sends an IO request to the microcode module.

[0062] For example, the VM in the host needs to write data (hereinafter referred to as to-be-written data) to the storage node in response to the received user operation. The VM in the host sends an IO request to the microcode, and the request includes but is not limited to the identification information of the VM, the physical address of the to-be-written data.

[0063] For example,Figure 5 The data and address correspondence diagram shown is exemplary. Please refer to Figure 5 VM1 needs to write data 1 to the storage node, data 1 is stored in the storage of the computing node, and the storage address is physical address 1. VM2 needs to write data 2 to the storage node, data 2 is stored in the storage of the computing node, and the storage address is physical address 2. VM3 needs to write data 3 to the storage node, data 3 is stored in the storage of the computing node, and the storage address is physical address 3. The size of the data written by the VM can be set according to actual needs, and the present application is only exemplary and is not limited by the present application.

[0064] Still referring to Figure 5 Exemplarily, the IO request sent by VM1 to the microcode module includes but is not limited to: the identification information of VM1 and physical address 1, used to indicate that the data to be written by VM1 is stored in physical address 1. The IO request sent by VM2 to the microcode module includes but is not limited to: the identification information of VM2 and physical address 2, used to indicate that the data to be written by VM2 is stored in physical address 2. The IO request sent by VM3 to the microcode module includes but is not limited to: the identification information of VM3 and physical address 1, used to indicate that the data to be written by VM3 is stored in physical address 3.

[0065] Exemplarily, the VM can send an IO request to the microcode module through the interface between the host and the network card. The IO request conforms to the interface protocol between the host and the network card.

[0066] S402, the microcode module interacts with the CPU for data.

[0067] Exemplarily, as described above, the microcode module receives the IO request sent by the host and parses the IO request to obtain the physical address and other information in the IO request. Exemplarily, the microcode module can interact with the CPU based on the communication protocol between the CPU and the microcode module. For example, in the embodiment of the present application, the CPU and the microcode module can interact for data through VBS messages. In other embodiments, other protocols can also be used, and the present application is not limited thereto.

[0068] Exemplarily, the microcode module encapsulates the obtained physical address and other information into a VBS message and sends it to the CPU.

[0069] The CPU receives the VBS message, parses the VBS message to obtain the physical address and other information therein, and performs data splitting and recombination based on the obtained physical address and other information. Optionally, the recombined message can include the physical addresses of the data of multiple VMs.

[0070] Figures 6a-6c The data splitting diagram shown is exemplary. Please refer to Figure 6a, exemplary, the CPU splits data 1 into 3 data blocks, namely data 11 (abbreviated as D11), data 12 (abbreviated as D12) and data 13 (abbreviated as D13). Wherein, the physical address corresponding to data 11 is physical address 11, the physical address corresponding to data 12 is physical address 12, and the physical address corresponding to data 13 is physical address 13. Similarly, please refer to Figure 6b , exemplary, the CPU splits data 2 into 3 data blocks, namely data 21 (abbreviated as D21), data 22 (abbreviated as D22) and data 23 (abbreviated as D23). Wherein, the physical address corresponding to data 21 is physical address 21, the physical address corresponding to data 22 is physical address 22, and the physical address corresponding to data 23 is physical address 23. Please refer to Figure 6c , exemplary, the CPU splits data 3 into 2 data blocks, namely data 31 (abbreviated as D31), data 32 (abbreviated as D32). Wherein, the physical address corresponding to data 31 is physical address 31, and the physical address corresponding to data 32 is physical address 32.

[0071] It should be noted that, as described above, the CPU receives the physical address corresponding to the data. Correspondingly, the CPU divides the data, which is actually dividing the physical address. It should be further noted that the physical address of the split data block belongs to the physical address of the original data.

[0072] Exemplary, the CPU can recombine the split data. Alternatively, the CPU can recombine the data of multiple VMs into the same or different messages. For example, Figure 7 is an exemplary message recombination diagram. Please refer to Figure 7 , the CPU recombines data D11 of VM1, data D21 of VM2 and data D31 of VM3 into message 1. The CPU recombines data D12 of VM1, data D22 of VM2 and data D32 of VM3 into message 2. The CPU recombines data D13 of VM1, data D23 of VM2 into message 3. It should be noted that the splitting and repeating mode shown in the embodiments of the application is only an exemplary example, and the application is not limited.

[0073] Exemplary, the CPU sends VBS message to microcode module, which includes but is not limited to: each message includes the physical address corresponding to the data and other information. For example, still taking Figure 7The message reorganization manner in the foregoing example is taken as an example. The CPU sends a VBS message to the microcode module to indicate the physical addresses of the data contained in each message. For example, the VBS message 1 contains the physical address 11 of D11, the physical address 21 of D21 and the physical address 31 of D31 of message 1. The VBS message 2 contains the physical address 12 of D12, the physical address 22 of D22 and the physical address 32 of D32 of message 2. The VBS message 3 contains the physical address 13 of D13, the physical address 23 of D23 of message 3. Of course, in other embodiments, the physical addresses of each message can also be sent in the same VBS message, which is not limited in the present application.

[0074] S403, the microcode module sends the physical addresses to the logic engine.

[0075] For example, the microcode module receives the VBS messages (including the VBS message 1 to the VBS message 3) sent by the CPU, and parses the VBS messages to obtain the physical addresses carried in the VBS messages. For example, the microcode module can obtain the physical address 11 of D11, the physical address 21 of D21 and the physical address 31 of D31 of message 1 in the VBS message 1. The microcode module can determine that D11, D21 and D31 need to be encapsulated in one message based on the indication of the VBS message 1. The VBS message 2 and the VBS message 3 are processed in the same manner as the VBS message 1, which will not be described one by one here.

[0076] The microcode module can encapsulate the obtained physical addresses into messages conforming to the communication protocol between the microcode module and the logic engine based on the communication protocol, and send the messages to the logic engine to instruct the logic engine to extract the corresponding data based on the physical addresses indicated by the microcode module, and encapsulate the data in the messages and send the data to the storage node. Alternatively, the microcode module can also encapsulate the information carried in the VBS message 1 into one VBS message and send the VBS message to the logic engine. That is, the microcode module sends the VBS message 1, the VBS message 2 and the VBS message 3 to the logic engine, wherein the information carried therein is the same as described above, which will not be described here.

[0077] S404, the logic engine reads the data.

[0078] Optionally, the logic engine can further include a reading module, an encapsulating module and a transceiving module. The reading module is configured to read (or extract) data from the storage on the host side based on the physical addresses. The encapsulating module is configured to encapsulate the data. The transceiving module is configured to send the encapsulated messages.

[0079] Specifically, the reading module receives the VBS message sent by the microcode module, and parses the VBS message to obtain the physical addresses in the message. For example, the physical addresses 11, 21 and 31 are included, and the reorganization of the data corresponding to each physical address can be determined based on the indication of the microcode module. For example, the logical engine can determine that the data D11 corresponding to the physical address 11, the data D21 corresponding to the physical address 21 and the data D31 corresponding to the physical address 31 belong to message 1 based on the indication of the microcode module. Other data are similar and will not be repeated here.

[0080] For example, the reading module can read the corresponding data from the storage on the host side based on the obtained physical addresses (such as the physical addresses 11, 21 and 31). For example, the reading module reads the data D11 from the storage space corresponding to the physical address 11, reads the data D21 from the storage space corresponding to the physical address 21, and reads the data D31 from the storage space corresponding to the physical address 31. Alternatively, the reading module can perform the subsequent steps after reading the data contained in message 1, that is, after instructing the logical engine to send message 1, read the data contained in message 2 and instruct the logical engine to send. Alternatively, the reading module can also read the data contained in message 1, message 2 and message 3 at the same time, and instruct the logical engine to send message 1, message 2 and message 3. The present application is not limited.

[0081] The reading module outputs the obtained data to the packaging module. The packaging module packages the data. In the embodiment of the present application, the packaged message conforms to the communication protocol between the computing node and the storage node, which can be a TCP message or an RDMA message, and the present application is not limited. In the embodiment of the present application, in order to distinguish other messages, the message (such as message 1) sent by the computing node to the storage node can be referred to as a data message.

[0082] For example, the packaged data message includes a control part and a data part. The control part includes control information, which includes but is not limited to address information of the computing node. The data part includes but is not limited to a data field and a check field, wherein the data field is used to carry data, and the check field, which can also be referred to as a data integrity field (DIF), is used to carry check information, that is, cyclic redundancy check (CRC) information.

[0083] Figure 8a For example, the structure of the data part is shown in the structure diagram. Please refer to Figure 8aIn the embodiment of the present application, the encapsulation module can insert 8B of check information for each 4KB of data, and the check information is used to check the data in the corresponding data field. That is, the data part includes at least one data field and at least one check information, and the length of each data field is 4KB (or 512B, which is not limited in the present application), and the length of the check field is 8B.

[0084] In the embodiment of the present application, the encapsulation module can perform CRC calculation on 4KB of data in the data field to generate CRC information (i.e. check information). The specific calculation method can refer to the prior art embodiment, and will not be described herein. The encapsulation module inserts a check field after the data field, and the check field includes the CRC information.

[0085] Still referring to Figure 8a , the check field includes a Guard field, an App Tag field and a Ref Tag field. The length of the Guard field is 2B, the length of the App Tag field is 2B, and the length of the Ref Tag field is 4B. The Guard field is used to carry the CRC information. The App Tag field is used to carry the application related information. The Ref Tag field can be used to carry the LBA address.

[0086] Figure 8b Another structure diagram of the check field is shown for example. Please refer to Figure 8b , for example, the check field can include a CRC field and a private field. The length of the check field is 64B. That is, the encapsulation module can insert a check field with a length of 64B after each 4KB of data field. For example, the length of the CRC field is 2B, and the length of the private field is 62B. Alternatively, the length of the CRC field can also be 4B, and the length of the private field is 60B, which is not limited in the present application.

[0087] For example, the CRC field can be used to carry the CRC information. The private field can also be called a reserved field, which can be used to carry user-defined information, etc.

[0088] Still with Figure 7The message structure in the message 1 is taken as an example for illustration. The processing of the message 1 is taken as an example for illustration. The processing mode of other messages can be referred to the message 1. The encapsulation module receives the indication message of the reading module. The indication message includes the data D11, D21 and D31. The indication message is used to indicate that the D11, D21 and D31 are carried in the message 1. The encapsulation module detects whether each data block has an abnormal identifier. In the embodiment of the present application, the abnormal identifier is used to indicate that the data is invalid data. The specific example will be described in the following abnormal processing embodiment. In this example, the encapsulation module detects that each data block does not have an abnormal identifier. The encapsulation module can encapsulate the data D11, D21 and D31 into the data field. In the encapsulation process, every 4K data is carried in a data field, and a check field with a length of 8B or 64B is inserted.

[0089] The encapsulation module outputs the message 1 to the transceiving module. The transceiving module can send the message 1 to the storage node through the storage network.

[0090] The storage node (specifically, the storage controller of the storage pool, which will not be repeated hereinafter) receives the message 1. The storage node parses the message 1 to obtain the data in the data field and the check information in the check field. The storage node checks the corresponding data based on the check information. For example, the storage node can perform CRC calculation based on the data in the data field to generate CRC information, and compare the generated CRC information with the CRC information in the check field to determine whether the received data is correct. If the two CRC information are consistent, the check is successful, and the storage node continues to check the next data field. After all the data fields are checked successfully, the storage node determines that the data is correctly received, and writes the received data (for example, including D11, D21 and D31) into the storage medium. It should be noted that, as described above, the plurality of storage nodes are virtually a storage pool. Accordingly, the D11, D21 and D31 can be stored in the storage medium of the same or different storage node, which is not limited in the present application. The storage node sends a successful response message to the computing node, which is used to indicate that the data has been successfully written into the storage node, and can also be understood as indicating that the service plane data processing is successful.

[0091] The data storage process in the scenario where the VM is abnormal will be described in detail below with reference to the accompanying drawings. Still referring to Figure 4 The computing node performs S401-S403. The specific details can be referred to the above, which will not be repeated here.

[0092] For example, if at least one VM in the host abnormally occurs before S404, for example, VM2 abnormally occurs FLR, when the reading module in the logic engine performs S404, the reading module cannot obtain data from the storage, or the data obtained from the storage can be erroneous. After the reading module detects that the VM to be written data abnormally occurs, the reading module generates invalid data, and the invalid data has the same size as the data block of the abnormal VM. In addition, the reading module adds an abnormality mark to the invalid data to indicate that the data is invalid data. Correspondingly, the encapsulation module can determine that the data input by the reading module is invalid data based on the abnormality mark.

[0093] For example, taking the abnormal occurrence of VM2 as an example. At S404, the reading module reads the data of the VM in sequence based on the physical address indicated by the CPU. Still taking message 1 as an example, when the reading module reads the data D21 of VM2, the reading module fails to obtain D21 due to the abnormal occurrence of VM2. The reading module determines that the data reading of VM2 fails. Then, the reading module generates invalid data, and the size of the invalid data is the same as that of D21. The invalid data can be any data, or can be all 0 data, which is not limited in the present application.

[0094] For example, the reading module adds an abnormality mark to the invalid data to indicate that the data is invalid data. In a possible implementation, the reading module can send a message to the encapsulation module every time it reads a data, and the message conforms to the communication protocol between the reading module and the encapsulation module. Optionally, the message can include an abnormality mark field, for example, an abort field. The value of the field is 0 by default, which is used to indicate that the data is correct data. For example, in Figure 4 In S404, that is, in the normal processing flow, the reading module can correctly read the data of the VM, that is, the reading module can determine that the VM does not abnormally occur. The reading module can not modify the value of the abort field. Correspondingly, the encapsulation module receives the message sent by the reading module, detects that the value of the abort field is 0, and determines that the obtained data is correct data, and then continues to perform the subsequent flow. In another example, still taking the abnormality of VM2 as an example, the reading module detects that the data reading of VM2 fails, and after the reading module generates invalid data, the reading module sends a message carrying the invalid data to the encapsulation module, and the value of the abort field in the message is 1, which is used to indicate that the data in the message is invalid data (which can also be understood as abnormal data). Correspondingly, the encapsulation module receives the message and detects that the value of the abort field is 1, and determines that the data carried in the message is invalid data.

[0095] In another possible implementation, the message sent by the reading module to the packaging module can also not include the abort field. After the reading module detects that the data reading of VM2 fails and generates invalid data, the reading module sends a message to the packaging module, and the message carries the invalid data. The invalid data is added with an exception mark before or after the invalid data, and the exception mark can still be "abort=1". It can be understood that the exception mark and the invalid data are both data parts of the message. Correspondingly, the packaging module can determine that the received data is invalid data based on the exception mark. It should be noted that the manner of adding the exception mark described in the embodiments of the present application is only an illustrative example, and in other embodiments, other marking manners can also be used, and the purpose is to distinguish the invalid data from the correct data. The present application does not make any limitation.

[0096] For example, the packaging module still performs packaging in the manner described above, that is, the CRC information is inserted every 4 KB of data. For example, when the packaging module packages the invalid data, the packaging module can detect the exception mark corresponding to the invalid data based on any manner described above. For example, the packaging module can determine that the data is invalid data after receiving the message sent by the reading module, obtaining the data in the message, and detecting that the value of the abort field is 1. For another example, the packaging module can determine that the data is invalid data after receiving the message sent by the reading module, obtaining the data in the message, and detecting that the exception mark, such as "abort=1", is included before or after the data. The manner in which the packaging module detects the exception mark depends on the manner in which the reading module adds the exception mark.

[0097] For example, after the packaging module determines that the received data is invalid data based on the exception mark, the packaging module still processes the invalid data in the manner described above, that is, the packaging module carries 4 KB of invalid data in a data field, and inserts a check field after the data field. In the embodiments of the present application, when the packaging module generates the check information corresponding to the invalid data, the packaging module can perform CRC calculation on 4 KB of invalid data to generate the CRC information. Then, the packaging module negates the CRC information to generate CRC information that is completely different from the correct CRC information, and adds the CRC information to the check field. In other embodiments, the packaging module can also generate any value that is different from the correct CRC information, and the generation manner can be set according to actual requirements, and the present application does not make any limitation.

[0098] Figure 9 For example, the message structure is shown in the message structure diagram. Figure 9The encapsulation module encapsulates D11, invalid data and D31 to generate a data message. In the data message, the CRC information corresponding to each data field of D11 and D31 is correct CRC information, and the CRC information corresponding to each data field of the invalid data is incorrect CRC information.

[0099] Still taking the message 1 as an example, the encapsulation module outputs the message 1 to the transceiving module, and the transceiving module sends the message 1 to the storage node through the storage network. Illustratively, the network card processes the message 2 and the message 3 in the same way, that is, the data of VM2 in the message 2 and the message 3 are all invalid data, and the CRC information corresponding to the invalid data is incorrect information, which will not be repeated hereinafter.

[0100] Still taking the message 1 as an example, the storage node receives the message 1 and parses the message 1. For example, still taking the message 1 as an example, Figure 9 The storage node checks each data field corresponding to D11, and the checking manner can refer to the foregoing, which will not be repeated here. The storage node determines that D11 is checked successfully, and determines that D11 is correctly received. The storage node checks the data field of the invalid data, and the storage node determines that the checking fails based on the fact that the CRC information calculated based on the invalid data is inconsistent with the CRC information in the checking field. The storage node discards the data in the message 1, that is, the data in the message 1 will not be written into the storage node.

[0101] Illustratively, the storage node sends a failure response message to the computing node, and the failure response message can include position information of the invalid data, for indicating that the data corresponding to the position information in the message 1 is received unsuccessfully.

[0102] In one example, the position information can be start position information of the invalid data in the message 1. In another example, the position information can also be start position information of the invalid data in the data field of the message 1. The specific indication manner can be set according to actual requirements, and the present application is not limited.

[0103] In the embodiment of the present application, the transceiving module in the logic engine can receive the failure response message fed back by the storage node. The transceiving module parses the failure response message to obtain the position information carried therein. The transceiving module saves the position information to the DDR. The logic engine can send indication information to the microcode module, for indicating that the storage node feeds back the failure response message. The microcode module can send the indication information to the CPU, for triggering the CPU to perform message response processing. The CPU responds to the indication of the microcode module, obtains the position information from the DDR, and can determine that the data corresponding to the position information in the message 1 is sent unsuccessfully.

[0104] Exemplarily, the network card processes the message 2 and the message 3 in the same way as the message 1 in the case of the VM 2 exception. Correspondingly, the network card also receives the failure response message corresponding to the message 2 and the failure response message corresponding to the message 3 from the storage node. The failure response message corresponding to the message 2 includes the position information indicating the position of the invalid data in the message 2. The failure response message corresponding to the message 3 includes the position information indicating the position of the invalid data in the message 3.

[0105] Exemplarily, the network card processes the message 2 and the message 3 in the same way as the message 1 in the case of the VM 2 exception. Correspondingly, the network card also receives the failure response message corresponding to the message 2 and the failure response message corresponding to the message 3 from the storage node. The failure response message corresponding to the message 2 includes the position information indicating the position of the invalid data in the message 2. The failure response message corresponding to the message 3 includes the position information indicating the position of the invalid data in the message 3.

[0106] Exemplarily, the network card processes the message 2 and the message 3 in the same way as the message 1 in the case of the VM 2 exception. Correspondingly, the network card also receives the failure response message corresponding to the message 2 and the failure response message corresponding to the message 3 from the storage node. The failure response message corresponding to the message 2 includes the position information indicating the position of the invalid data in the message 2. The failure response message corresponding to the message 3 includes the position information indicating the position of the invalid data in the message 3.

[0107] Exemplarily, the network card processes the message 2 and the message 3 in the same way as the message 1 in the case of the VM 2 exception. Correspondingly, the network card also receives the failure response message corresponding to the message 2 and the failure response message corresponding to the message 3 from the storage node. The failure response message corresponding to the message 2 includes the position information indicating the position of the invalid data in the message 2. The failure response message corresponding to the message 3 includes the position information indicating the position of the invalid data in the message 3. Figure 10 Exemplarily, the network card processes the message 2 and the message 3 in the same way as the message 1 in the case of the VM 2 exception. Correspondingly, the network card also receives the failure response message corresponding to the message 2 and the failure response message corresponding to the message 3 from the storage node. The failure response message corresponding to the message 2 includes the position information indicating the position of the invalid data in the message 2. The failure response message corresponding to the message 3 includes the position information indicating the position of the invalid data in the message 3. Figure 10 Exemplarily, the network card processes the message 2 and the message 3 in the same way as the message 1 in the case of the VM 2 exception. Correspondingly, the network card also receives the failure response message corresponding to the message 2 and the failure response message corresponding to the message 3 from the storage node. The failure response message corresponding to the message 2 includes the position information indicating the position of the invalid data in the message 2. The failure response message corresponding to the message 3 includes the position information indicating the position of the invalid data in the message 3. Figure 10 Exemplarily, the network card processes the message 2 and the message 3 in the same way as the message 1 in the case of the VM 2 exception. Correspondingly, the network card also receives the failure response message corresponding to the message 2 and the failure response message corresponding to the message 3 from the storage node. The failure response message corresponding to the message 2 includes the position information indicating the position of the invalid data in the message 2. The failure response message corresponding to the message 3 includes the position information indicating the position of the invalid data in the message 3.

[0108] Exemplarily, the network card processes the message 2 and the message 3 in the same way as the message 1 in the case of the VM 2 exception. Correspondingly, the network card also receives the failure response message corresponding to the message 2 and the failure response message corresponding to the message 3 from the storage node. The failure response message corresponding to the message 2 includes the position information indicating the position of the invalid data in the message 2. The failure response message corresponding to the message 3 includes the position information indicating the position of the invalid data in the message 3. Figure 4 Exemplarily, the network card processes the message 2 and the message 3 in the same way as the message 1 in the case of the VM 2 exception. Correspondingly, the network card also receives the failure response message corresponding to the message 2 and the failure response message corresponding to the message 3 from the storage node. The failure response message corresponding to the message 2 includes the position information indicating the position of the invalid data in the message 2. The failure response message corresponding to the message 3 includes the position information indicating the position of the invalid data in the message 3. Figure 4 Exemplarily, the network card processes the message 2 and the message 3 in the same way as the message 1 in the case of the VM 2 exception. Correspondingly, the network card also receives the failure response message corresponding to the message 2 and the failure response message corresponding to the message 3 from the storage node. The failure response message corresponding to the message 2 includes the position information indicating the position of the invalid data in the message 2. The failure response message corresponding to the message 3 includes the position information indicating the position of the invalid data in the message 3.

[0109] For example, after receiving message 1, the storage node processes it, including but not limited to decapsulation and data field verification. Specific details can be found above and will not be repeated here. After confirming successful verification of each data field, the storage node determines that the data reception was successful. The storage node then writes the data from message 1 (including D11 and D31) to its storage medium. In this way, the data of the abnormal VM will not affect the writing of data to other normal VMs, and normal communication can continue between the compute node and the storage node.

[0110] In one possible implementation, the CPU can instruct the network card to send the next message only after each message has been successfully sent. For example, the CPU instructs the network card to send the data for message 1, and after receiving a successful response message for message 1, it instructs the network card to send message 2. Conversely, if the CPU detects a failure response message for message 1, it executes a reassembly process.

[0111] In another possible implementation, such as Figure 8b As shown, the verification field may include a private field. For example, after the encapsulation module determines that the data contains invalid data based on the instruction from the reading module, it can still perform the encapsulation process using the scheme described above. That is, based on the data, corresponding verification information is generated. The verification information corresponding to invalid data is generated by inverting the values. The encapsulation module can add an exception flag to the private field of the verification field corresponding to the invalid data. In this way, if the storage node detects that the private field contains an exception flag, it can avoid performing CRC verification on the invalid data, thereby reducing the processing burden on the storage. The storage can directly determine that data reception has failed based on the exception flag and execute subsequent processes.

[0112] It is understood that, in order to achieve the above-mentioned functions, electronic devices include hardware and / or software modules that perform the respective functions. Based on the algorithmic steps of the examples described in the embodiments disclosed herein, this application can be implemented in hardware or a combination of hardware and computer software. Whether a function is executed by hardware or by computer software driving hardware depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application in conjunction with the embodiments, but such implementation should not be considered beyond the scope of this application.

[0113] In one example, Figure 11 The schematic block diagram illustrating an embodiment of the present application shows an apparatus 1100. The apparatus 1100 may include a processor 1101 and a transceiver / transceiver pin 1102, and optionally, a memory 1103.

[0114] The various components of the apparatus 1100 are coupled together by a bus 1104, which is configured to enable communications (e.g., data, instructions) to be exchanged among the components. The bus 1104 includes, for example, a power bus, a control signal bus, and a status signal bus in addition to a data bus.

[0115] Optionally, the memory 1103 can be used for storing instructions of the foregoing method embodiments. The processor 1101 can be used for executing the instructions in the memory 1103, and controlling the receiving pin to receive signals and the sending pin to send signals.

[0116] The apparatus 1100 can be a computing node, a storage node, a network card in the computing node, or a chip in the storage node in the foregoing method embodiments.

[0117] All the related contents of the steps involved in the foregoing method embodiments can be referred to the function description of the corresponding function modules, and will not be repeated here.

[0118] The embodiment further provides a computer storage medium, which stores computer instructions, and when the computer instructions run on an electronic device, the electronic device executes the related method steps to implement the method in the foregoing embodiment.

[0119] The embodiment further provides a computer program product, and when the computer program product runs on a computer, the computer executes the related steps to implement the method in the foregoing embodiment.

[0120] In addition, the embodiment of the present application further provides an apparatus, which can be a chip, a component or a module, and the apparatus can include a processor and a memory connected to each other; the memory is used for storing computer execution instructions, and when the apparatus runs, the processor can execute the computer execution instructions stored in the memory to enable the chip to execute the method in the foregoing method embodiments.

[0121] The electronic device, the computer storage medium, the computer program product or the chip provided by the embodiment are used for executing the corresponding method provided in the foregoing, and thus the beneficial effects achieved by the electronic device, the computer storage medium, the computer program product or the chip can refer to the beneficial effects of the corresponding method provided in the foregoing, which will not be repeated here.

[0122] Through the description of the foregoing embodiments, those skilled in the art can understand that, for the convenience and brevity of description, only the division of the foregoing functional modules is taken as an example for illustration, and in actual application, the foregoing functions can be completed by different functional modules according to needs, that is, the internal structure of the apparatus is divided into different functional modules to complete all or part of the functions described above.

[0123] In several embodiments provided in the present application, it should be understood that the disclosed apparatus and method can be implemented by other manners. For example, the apparatus embodiments described above are merely illustrative, for example, the division of the modules or units is merely a logical function division, and actual implementation can have another division manner, for example, a plurality of units or components can be combined or integrated into another apparatus, or some features can be ignored or not executed. In addition, the coupling or direct coupling or communication connection between the units or components shown or discussed can be indirect coupling or communication connection through some interfaces, apparatuses or units, and can be electrical, mechanical or other forms.

[0124] The units described as separate components can or can not be physically separate, and the components shown as units can be one physical unit or a plurality of physical units, that is, can be located in one place, or can be distributed to a plurality of different places. Part or all of the units can be selected according to actual needs to achieve the purpose of the embodiment.

[0125] In addition, the functional units in each embodiment of the present application can be integrated in one processing unit, or each unit can be physically present alone, or two or more units can be integrated in one unit. The integrated unit can be realized in the form of hardware or in the form of a software functional unit.

[0126] Any content of each embodiment of the present application, and any content of the same embodiment, can be freely combined. Any combination of the above is within the scope of the present application.

[0127] If the integrated unit is realized in the form of a software functional unit and sold or used as an independent product, it can be stored in a readable storage medium. Based on this understanding, the technical solutions of the embodiments of the present application essentially or the part that contributes to the prior art or the whole or part of the technical solutions can be embodied in the form of a software product, which is stored in a storage medium and includes a plurality of instructions for making an apparatus (which can be a single-chip microcomputer, a chip, etc.) or a processor execute all or part of the steps of the method of the embodiments of the present application. The foregoing storage medium includes: a U disk, a mobile hard disk, a read only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk, and various program code storage media.

[0128] The embodiments of the present application are described above with reference to the accompanying drawings, but the present application is not limited to the above-described specific embodiments, and the above-described specific embodiments are merely illustrative, but not restrictive, and a person of ordinary skill in the art can make many forms without departing from the purpose of the present application and the scope protected by the claims under the inspiration of the present application, and all of them belong to the protection of the present application.

[0129] The steps of methods or algorithms described in connection with the embodiments disclosed herein can be embodied directly in hardware, in software or in a combination of software and hardware. Software embodied under the present application can be stored in a computer-readable medium, which can include but is not limited to random access memory (RAM), flash memory, read only memory (ROM), erasable programmable ROM (EPROM), electrically EPROM (EEPROM), registers, a hard disk, a removable disk, a CD-ROM, and any other form of storage medium known in the art. An exemplary storage medium is coupled to the processor, so that the processor can read information from the storage medium and write information to the storage medium. Of course, the storage medium can also be a component of the processor. The processor and the storage medium can be located in an ASIC.

[0130] Those skilled in the art should be aware that the functions described in the above one or more examples can be implemented in hardware, software, firmware or any combination thereof. When implemented in software, these functions can be stored in a computer-readable medium or transmitted as one or more instructions or codes on a computer-readable medium. The computer-readable medium includes computer storage medium and communication medium, wherein the communication medium includes any medium that facilitates the transfer of computer programs from one place to another. The storage medium can be any available medium that can be accessed by a general or special purpose computer.

[0131] The embodiments of the present application are described above with reference to the accompanying drawings, but the present application is not limited to the above-described specific embodiments, and the above-described specific embodiments are merely illustrative, but not restrictive, and a person of ordinary skill in the art can make many forms without departing from the purpose of the present application and the scope protected by the claims under the inspiration of the present application, and all of them belong to the protection of the present application.

Claims

1. A data storage method, characterized by, The method comprises: obtaining a first write request and a second write request; the first write request is used to indicate writing first data of a first virtual machine to a storage device, and the second write request is used to indicate writing second data of a second virtual machine to the storage device; reading the first data and the second data from local storage in response to the first write request and the second write request; if the first data is successfully read and the second data fails to be read, sending a first data message to the storage device; the first data message comprises the first data, first check information, invalid data and second check information; the size of the invalid data is the same as that of the second data; the first check information is generated based on the first data, and the second check information is different from check information generated based on the invalid data; receiving a failure response message sent by the storage device; the failure response message comprises position information of the invalid data in the first data message, and the failure response message is used to indicate that the storage device fails to verify the invalid data based on the second check information; in response to the failure response message, sending a second data message to the storage device; the second data message comprises the first data and the first check information; receiving a success response message sent by the storage device, and the success response message is used to indicate that the storage device writes the first data into the storage device.

2. The method of claim 1, wherein, The first write request comprises a storage position of the first data in the local storage, and the second write request comprises a storage position of the second data in the local storage.

3. The method of claim 2, wherein, The reading of the first data and the second data from the local storage in response to the first write request and the second write request comprises: reading the first data based on the storage position of the first data in the local storage; reading the second data based on the storage position of the second data in the local storage.

4. The method of claim 1, wherein, If the first data is successfully read and the second data fails to be read, the first data message is sent to the storage device, which comprises: if the first data is successfully read, it is determined that the state of the first virtual machine is normal; if the second data fails to be read, it is determined that the state of the second virtual machine is abnormal.

5. The method of claim 4, wherein, If the first data is successfully read and the second data fails to be read, the first data message is sent to the storage device, which comprises: generating the invalid data and adding an abnormality mark to the invalid data; the abnormality mark is used to indicate that the invalid data is different from the second data required to be written by the second virtual machine; generating third check information based on the invalid data; based on the abnormality mark, negating the third check information to obtain the second check information.

6. The method of claim 1, wherein, In response to the failure response message, the second data message is sent to the storage device, which comprises: regenerating the first check information based on the first data; encapsulating the first data and the first check information to obtain the second data message.

7. An electronic device, comprising: The method comprises: one or more processors; a memory; and one or more computer programs, wherein the one or more computer programs are stored in the memory and, when executed by the one or more processors, cause the electronic device to perform the following steps: obtain a first write request and a second write request; the first write request is used to indicate writing first data of a first virtual machine to a storage device, and the second write request is used to indicate writing second data of a second virtual machine to the storage device; read the first data and the second data from a local storage in response to the first write request and the second write request; if reading the first data is successful and reading the second data fails, send a first data message to the storage device; the first data message includes the first data, first check information, invalid data, and second check information; the size of the invalid data is the same as the size of the second data; the first check information is generated based on the first data, and the second check information is different from check information generated based on the invalid data; receive a failure response message sent by the storage device; the failure response message includes position information of the invalid data in the first data message, and the failure response message is used to indicate that the storage device fails to verify the invalid data based on the second check information; in response to the failure response message, send a second data message to the storage device; the second data message includes the first data and the first check information; receive a success response message sent by the storage device, and the success response message is used to indicate that the storage device writes the first data to the storage device.

8. The electronic device of claim 7, wherein, The first write request includes a storage location of the first data in the local storage, and the second write request includes a storage location of the second data in the local storage.

9. The electronic device of claim 8, wherein, When the computer program is executed by the one or more processors, the electronic device performs the following steps: read the first data based on the storage location of the first data in the local storage; read the second data based on the storage location of the second data in the local storage.

10. The electronic device of claim 7, wherein, When the computer program is executed by the one or more processors, the electronic device performs the following steps: if reading the first data is successful, determine that the state of the first virtual machine is normal; if reading the second data fails, determine that the state of the second virtual machine is abnormal.

11. The electronic device of claim 10, wherein, When the computer program is executed by the one or more processors, the electronic device performs the following steps: generate the invalid data and add an abnormality mark to the invalid data; the abnormality mark is used to indicate that the invalid data is not the same as the second data required to be written by the second virtual machine; generate third check information based on the invalid data; based on the abnormality mark, negate the third check information to obtain the second check information.

12. The electronic device of claim 7, wherein, When the computer program is executed by the one or more processors, the electronic device performs the following steps: re-generate the first check information based on the first data; The first data is encapsulated with the first check information to obtain the second data message.

13. A computer storage medium, characterized in that Computer program product comprising computer instructions which, when run on an electronic device, cause the electronic device to perform the method of any one of claims 1-6.

14. A computer program product, characterised in that, Computer program product which, when run on a computer, causes the computer to perform the method of any one of claims 1-6.

15. A chip, characterized by Electronic device comprising one or more interface circuits and one or more processors; the interface circuits are configured to receive a signal from a memory of the electronic device and send the signal to the processors, the signal comprising computer instructions stored in the memory; when the processors execute the computer instructions, the electronic device performs the method of any one of claims 1-6.

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