A driving circuit board, display module and display device

Abstract

The application provides a driving circuit board, a display module and a display device, relates to the technical field of display, and can increase the number of output channels of a driving chip, reduce the size of a binding area connected with the driving chip, and make the high-resolution requirement of a display substrate adapt to the narrow-frame requirement. The driving circuit board comprises a driving chip, a circuit board body, a plurality of driving pins and a signal circuit, the driving pins comprise first driving pins and second driving pins, the first driving pins are used for electrically connecting a display substrate, the second driving pins are electrically connected with the signal circuit, the driving chip is electrically connected with the circuit board body through the driving pins, the first driving pins are arranged in at least three rows along a first direction, the first driving pins are arranged in at least three rows along a second direction, the first direction intersects with the second direction, the circuit board body comprises at least two conductive layers, and the number of conductive layers electrically connected with the at least two rows of first driving pins arranged along the second direction is different.

Description

Technical Field

[0001] This application relates to the field of display technology, and in particular to a driver circuit board, a display module, and a display device. Background Technology

[0002] With the development and advancement of display technology, the requirements for display substrate resolution are gradually increasing. Existing display modules typically improve the resolution of the display substrate by increasing the number of output channels of the driver chip.

[0003] However, existing display modules typically use COF (Chip on Film) packaging technology to package driver chips. But as the number of output channels of the driver chip increases, the size of the driver chip also increases, and the size of the bonding area connected to the driver chip also increases, making it difficult to adapt to the narrow bezel requirements of the display substrate. Summary of the Invention

[0004] The present application provides a driver circuit board, display module and display device that can increase the number of output channels of the driver chip and reduce the size of the bonding area connected to the driver chip, so that the high resolution requirement of the display substrate can be adapted to the narrow bezel requirement.

[0005] A first aspect of this application provides a driver circuit board, comprising:

[0006] Driver chip;

[0007] The circuit board body includes multiple driving pins and signal circuits. The driving pins include a first driving pin and a second driving pin. The first driving pin is used to electrically connect to the display substrate, and the second driving pin is electrically connected to the signal circuit.

[0008] The driver chip is electrically connected to the circuit board body via the driver pin;

[0009] The first driving pin is arranged in at least three rows along a first direction, and the first driving pin is arranged in at least three rows along a second direction, wherein the first direction intersects the second direction;

[0010] The circuit board body includes at least two conductive layers, and the number of conductive layers electrically connected to the at least two rows of the first drive pins arranged along the second direction is different.

[0011] In some embodiments, the conductive layer includes signal leads electrically connected to the first drive pins, and the number of conductive layers corresponding to the signal leads of at least two rows of the first drive pins arranged along the second direction is different.

[0012] The signal lead belonging to at least two of the conductive layers includes a bridging via located between two adjacent rows of the first drive pins;

[0013] The bridging via is used to connect the signal leads of different conductive layers.

[0014] In some embodiments, where the display substrate includes data signal lines,

[0015] The first drive pin includes a first polarity pin and a second polarity pin, and the first polarity pin and the second polarity pin are electrically connected to the data signal lines of different polarities respectively;

[0016] The first polarity pin and the second polarity pin belong to the first drive pins in different rows in the second direction.

[0017] In some implementations, the first polarity pin and the second polarity pin are alternately arranged along the second direction.

[0018] In some embodiments, the circuit board body includes a first driving region and a second driving region, wherein the first driving pin is disposed in the first driving region and the second driving pin is disposed in the second driving region;

[0019] The first driving region and the second driving region are alternately arranged along the first direction.

[0020] In some embodiments, the number of the first drive pins in each row arranged along the second direction is equal; and / or,

[0021] In the second direction, the two adjacent rows of the first drive pins are aligned.

[0022] In some embodiments, the conductive layer includes a bridging portion whose orthographic projection on the circuit board body overlaps the orthographic projection of the bridging via on the circuit board body.

[0023] The first driving region includes a first sub-driving region, and the first driving pin in the first sub-driving region is electrically connected to the bridging portion. The distance between the bridging portion electrically connected to the first driving pin in the first sub-driving region and the driving chip is different.

[0024] The distance between adjacent bridging portions along the first direction is less than the dimension of the bridging portion in the first direction.

[0025] In some implementations, the first sub-driving region includes a plurality of first driving pin groups, and the first driving pin group includes at least two first driving pins.

[0026] The distance between the bridging portion electrically connected to the first drive pin in the same first drive pin group and the drive chip increases or decreases along a first direction.

[0027] In some embodiments, the distance between the bridging portions electrically connected to at least two adjacent first drive pin groups arranged in the first direction and the drive chip varies with the same trend; and / or,

[0028] The distance between the bridging portion electrically connected to at least two adjacent first drive pin groups arranged in the first direction and the drive chip changes in opposite directions.

[0029] In some embodiments, the first drive pin group includes at least two rows of the first drive pins arranged along the second direction.

[0030] In some embodiments, the first driving pin group includes a first sub-driving pin group and a second sub-driving pin group, wherein the first sub-driving pin group and the second sub-driving pin group are arranged adjacent to each other in the first direction;

[0031] The first driving pin in the first sub-driving pin group that is closest to the second sub-driving pin group is the first boundary pin, and the first driving pin in the second sub-driving pin group that is closest to the first sub-driving pin group is the second boundary pin;

[0032] When the distance between the bridging portion electrically connected to the second boundary pin and the driver chip is greater than the distance between the bridging portion electrically connected to the first boundary pin and the driver chip, the bridging portion electrically connected to the first boundary pin is disposed between the second boundary pin and the first boundary pin;

[0033] The first driving pins, excluding the second boundary pins, are arranged in different rows along the second direction.

[0034] In some implementations, the number of the first drive pins in the first drive pin group is positively correlated with the size of the bridging portion electrically connected to the first drive pins in the first direction.

[0035] In some implementations, the first driving pins in the first sub-driving pin group, excluding the second boundary pins, are arranged in at least two rows along the second direction.

[0036] In some embodiments, the first driving region further includes a second sub-driving region, wherein the first driving pins in the second sub-driving region are arranged in a row along the first direction.

[0037] In the case where the first driving region includes at least two second sub-driving regions arranged along the second direction, the first sub-driving region is disposed between the two second sub-driving regions arranged along the second direction.

[0038] In some implementations, the second driving pin is arranged in the same row as the first driving pin in the second sub-driving area.

[0039] A second aspect of this application provides a display module comprising:

[0040] Display substrate;

[0041] The driving circuit board as described in any of the first aspects above is electrically connected to the display substrate via a first driving pin.

[0042] A third aspect of the embodiments of this application provides a display device comprising:

[0043] The drive circuit board as described in any of the first aspects above; and / or,

[0044] The display module as described in the second aspect above.

[0045] The driving circuit board provided in this application embodiment has a first driving pin electrically connected to the display substrate to form an output channel of the driving chip, thereby driving pixels. By arranging at least three rows of first driving pins along both the first and second directions, the number of output channels of the driving chip is increased, thereby increasing the number of pixels on the display substrate. By setting the circuit board body to include at least two conductive layers, and the number of conductive layers electrically connected to the at least two rows of first driving pins arranged along the second direction is different, signal leads electrically connected to multiple rows of first driving pins can be connected to different conductive layers through holes, avoiding short circuits between signal leads. The wiring space of the signal leads can be increased in the thickness direction of the conductive layer, thereby further increasing the number of output channels of the driving chip, improving the resolution of the display substrate, and improving the display effect of the display substrate. Attached Figure Description

[0046] To more clearly illustrate the technical solution of this application, the drawings used in the embodiments will be briefly introduced below. Obviously, for those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0047] Figure 1 A schematic structural diagram of a driver circuit board provided in an embodiment of this application;

[0048] Figure 2A schematic structural diagram illustrating the bonding of a display substrate and a driving circuit board, provided for an embodiment of this application;

[0049] Figure 3 A schematic structural diagram of a circuit board body provided for an embodiment of this application;

[0050] Figure 4 A schematic structural diagram of a display substrate provided in an embodiment of this application;

[0051] Figure 5 A schematic structural diagram of another driving circuit board provided in an embodiment of this application;

[0052] Figure 6 A schematic structural diagram of another driving circuit board provided in an embodiment of this application;

[0053] Figure 7 A schematic structural diagram of another driving circuit board provided in an embodiment of this application;

[0054] Figure 8 A schematic structural diagram of a driver circuit board provided in an embodiment of this application;

[0055] Figure 9 A schematic structural diagram of another driving circuit board provided in an embodiment of this application;

[0056] Figure 10 A schematic structural diagram of another driving circuit board provided in an embodiment of this application;

[0057] Figure 11 A schematic partial structural diagram of a driver circuit board provided in an embodiment of this application;

[0058] Figure 12 A schematic structural diagram of another driving circuit board provided in an embodiment of this application;

[0059] Figure 13 A schematic structural diagram of a display module provided in an embodiment of this application;

[0060] Figure 14 A schematic structural diagram of another display module provided in an embodiment of this application;

[0061] Figure 15 This is a schematic structural diagram of a display device provided in an embodiment of this application. Detailed Implementation

[0062] The embodiments will now be described in detail, examples of which are illustrated in the accompanying drawings. When the following description relates to the drawings, unless otherwise indicated, the same numbers in different drawings represent the same or similar elements. The embodiments described below do not represent all embodiments consistent with this application. They are merely examples of systems and methods consistent with some aspects of this application as detailed in the claims. In the several embodiments provided in this application, it should be understood that the disclosed apparatus and methods can also be implemented in other ways, and the apparatus embodiments described below are merely exemplary.

[0063] In this application, for convenience, terms such as "middle," "upper," "lower," "front," "rear," "vertical," "horizontal," "top," "bottom," "inner," and "outer" are used to indicate orientation or positional relationships in conjunction with the accompanying drawings. This is solely for the purpose of facilitating the description of this application and simplifying the description, and does not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, it should not be construed as a limitation of this application. The positional relationships of the constituent elements may be appropriately changed depending on the direction in which the constituent elements are described. Therefore, the terminology used is not limited to those described in the specification and may be appropriately replaced as appropriate.

[0064] This application describes exemplary embodiments with reference to cross-sectional views and / or plan views as idealized exemplary drawings. In the drawings, the thickness of layers and the area of ​​regions are enlarged for clarity. Therefore, variations in shape relative to the drawings are contemplated due to, for example, manufacturing techniques and / or tolerances. Thus, exemplary embodiments should not be construed as limited to the shapes of the regions shown herein, but rather include shape deviations due to, for example, manufacturing processes. For example, etched areas shown as rectangular would typically have curved features. Therefore, the regions shown in the drawings are schematic in nature, and their shapes are not intended to show the actual shapes of areas of the device, nor are they intended to limit the scope of the exemplary embodiments.

[0065] With the development and advancement of display technology, the requirements for display substrate resolution are gradually increasing. Existing display modules typically improve the resolution of the display substrate by increasing the number of output channels of the driver chip. However, existing display modules usually use COF packaging technology to package the driver chip, and the number of output channels of COF-packaged driver chips can typically reach up to 1440.

[0066] As the resolution of display substrates increases, the number of output channels required for driver chips also increases. Due to the limitation of the number of driver chip output channels, it is usually necessary to increase the number of driver chips bonded to the display substrate. However, as the number of driver chips increases, the size of the bonding area connected to the driver chips also needs to increase, making it difficult to reconcile the high resolution requirements of display substrates with the narrow bezel requirements.

[0067] In view of this, embodiments of this application provide a driver circuit board, a display module, and a display device, which can increase the number of output channels of the driver chip and reduce the size of the bonding area connected to the driver chip, so that the high resolution requirements of the display substrate can be adapted to the narrow bezel requirements.

[0068] A first aspect of this application provides a driving circuit board, comprising: a driving chip and a circuit board body. The circuit board body includes a plurality of driving pins and signal circuits. The driving pins include first driving pins and second driving pins. The first driving pins are electrically connected to a display substrate, and the second driving pins are electrically connected to the signal circuits. The driving chip and the circuit board body are electrically connected via the driving pins. The first driving pins are arranged in at least three rows along a first direction and at least three rows along a second direction, the first direction intersecting the second direction. The circuit board body includes at least two conductive layers, and the number of conductive layers electrically connected to the at least two rows of first driving pins arranged along the second direction is different.

[0069] For example, Figure 1 This is a schematic structural diagram of a driver circuit board provided in an embodiment of this application. Figure 1 As shown, the driving circuit board includes: a circuit board body 200, wherein the circuit board body 200 includes driving pins 300, the driving pins 300 include a first driving pin 310 and a second driving pin 320, the first driving pins 310 are arranged in at least three rows along a first direction X and at least three rows along a second direction Y.

[0070] For example, Figure 2 This is a schematic structural diagram illustrating the bonding between a display substrate and a driving circuit board, provided as an embodiment of this application. Figure 2 As shown, the display substrate 100 includes a display area 110 and a non-display area 120. The circuit board body 200 is bonded to the display substrate 100 through the non-display area 120, and the driver chip 400 is electrically connected to the circuit board body 200.

[0071] For example, Figure 3 This is a schematic structural diagram of a circuit board body provided in an embodiment of this application. Figure 3As shown, the circuit board body 200 includes a conductive layer 230 and an insulating layer 240. The circuit board body 200 includes at least two conductive layers 230, and the insulating layer 240 is disposed between the two conductive layers 230. The drive pin 300 is disposed between the conductive layer 230 and the drive chip 400.

[0072] The driving circuit board provided in this application embodiment has a first driving pin 310 electrically connected to the display substrate 100 to form an output channel of the driving chip 400 to drive pixels. By arranging at least three rows of first driving pins 310 along both the first direction X and the second direction Y, the number of output channels of the driving chip 400 is increased, thereby increasing the number of pixels on the display substrate 100. By setting the circuit board body 200 to include at least two conductive layers 230, and the number of conductive layers 230 electrically connected to the at least two rows of first driving pins 310 arranged along the second direction Y is different, signal leads electrically connected to multiple rows of first driving pins 310 can be connected to different conductive layers 230 through holes, avoiding short circuits between signal leads. The wiring space of the signal leads 201 can be increased in the thickness direction of the conductive layer 230, thereby further increasing the number of output channels of the driving chip 400, improving the resolution of the display substrate, and improving the display effect of the display substrate.

[0073] In some feasible embodiments, the conductive layer 230 includes signal leads electrically connected to the first drive pins 310. The number of conductive layers 230 corresponding to the signal leads of at least two rows of the first drive pins 310 arranged along the second direction Y is different. The signal leads belonging to at least two conductive layers 230 include bridging vias located between two adjacent rows of the first drive pins 310. The bridging vias are used to connect signal leads of different conductive layers 230.

[0074] refer to Figure 1 The conductive layer 230 includes signal leads 201, and each signal lead 201 includes a bridging via 203 located between two adjacent rows of first drive pins 310. Two adjacent rows of first drive pins 310 arranged along the first direction X are located on the same conductive layer 230. One row of first drive pins 230 is electrically connected to the display substrate 100 via the signal leads 201 of the same layer, while the other row of first drive pins 230 is electrically connected to other conductive layers 230 via the bridging via 203 of the same layer. Figure 1 Only the routing of the signal leads 201 on the conductive layer 230 is shown, so the signal leads 201 that are electrically connected to one row of first drive pins 230 are only connected to the bridging vias 203.

[0075] The driving circuit board provided in this application embodiment has a bridging via 203 between two adjacent rows of first driving pins 310 along the second direction Y. This allows the first driving pins 310 in different rows to be electrically connected to the conductive layers 230 of different layers through the bridging via 203. This avoids the signal lead 201 from contacting the first driving pin 310 or the signal lead 201 itself due to the same layer routing of the first driving pins 310 in adjacent rows, which could cause a short circuit in the driving circuit board. This improves the accuracy of the displayed image, enhances the safety and stability of the driving circuit board, and allows for an increase in the number of rows of first driving pins 310 in the second direction Y, increasing the number of output channels of the driving chip 400, improving the resolution of the display substrate, and reducing the area of ​​the bonding region of the driving chip 400, so that the high resolution requirements of the display substrate can be adapted to the narrow bezel requirements.

[0076] In some feasible implementations, when the display substrate 100 includes data signal lines, the first drive pin 310 includes a first polarity pin and a second polarity pin, which are electrically connected to data signal lines of different polarities respectively; the first polarity pin and the second polarity pin belong to different rows of first drive pins 310 in the second direction Y.

[0077] For example, Figure 4 This is a schematic structural diagram of a display substrate 100 provided in an embodiment of this application. Figure 4 As shown, the display substrate 100 includes multiple data signal lines 101, multiple gate lines 102, and pixel electrodes 103. The data signal lines 101 and gate lines 102 intersect to form pixel regions. Pixel electrodes 103 are disposed within the pixel regions and are electrically connected to the data signal lines 101 through the gate lines 102. Adjacent data signal lines 101 may have different polarities.

[0078] It should be noted that for liquid crystal display substrates, polarization occurs when liquid crystal molecules maintain the same polarity for an extended period. Therefore, existing liquid crystal display substrates typically require switching the polarity of the pixel electrodes to suppress liquid crystal molecule polarization, improve display performance, and extend the lifespan of the display device. By setting adjacent data signal lines 101 with different polarities, the driving signals transmitted by the data signal lines 101 have different polarities, further resulting in different polarities for the two columns of pixel electrodes 103 driven by adjacent data signal lines 101. Data signal lines 101 with different polarities are used to transmit driving signals of different polarities. The voltage difference between the driving signals with different polarities and the common voltage determines the voltage of the pixel electrode 103. Driving signals with different polarities and the same voltage difference with the common voltage can form an electric field with the same intensity through the pixel electrode 103, causing the liquid crystal molecules corresponding to the pixel electrode 103 to deflect at the same angle in different directions, resulting in the same brightness of the corresponding pixel unit. Therefore, by setting data signal lines 101 with different polarities, column reversal of liquid crystal molecules can be achieved, suppressing the formation of polarization and improving the stability of the display substrate.

[0079] For example, Figure 5 This is a schematic structural diagram of another driving circuit board provided in an embodiment of this application. (See diagram below.) Figure 5 As shown, the driving circuit board includes a circuit board body 200, the circuit board body 200 includes a first driving pin 310, the first driving pin 310 includes a first polarity pin 311 and a second polarity pin 312, the first polarity pin 311 and the second polarity pin 312 are respectively located in different rows arranged along the second direction Y.

[0080] For example, the first polarity pin 311 can be electrically connected to the positive polarity data signal line 101, and the second polarity pin 312 can be electrically connected to the negative polarity data signal line 101. The first polarity pin 311 and the second polarity pin 312 can be alternately arranged with respect to the first direction X. The first polarity pin 311 and the second polarity pin 312 are respectively electrically connected to different numbers of conductive layers 230.

[0081] The driving circuit board provided in this application embodiment has a small spacing between adjacent data signal lines 101 of different polarities. By setting the first polarity pin 311 and the second polarity pin 312 electrically connected to the data signal lines 101 of different polarities, which are respectively located in different rows arranged along the second direction Y, a group of data signal lines 101 with opposite polarities can be electrically connected to the first polarity pin 311 and the second polarity pin 312 arranged along the second direction Y, respectively. This further reduces the size of the driving chip 400 in the first direction X, thereby increasing the number of first driving pins 310 electrically connected to the display substrate 100, increasing the number of output channels of the driving chip 400, and improving the resolution of the display substrate.

[0082] In some feasible implementations, the first polarity pin 311 and the second polarity pin 312 are alternately arranged along the second direction Y.

[0083] For example, two rows of first polarity pins 311 and second polarity pins 312 arranged adjacently along the second direction Y constitute a group of polarity pins. The distance between the two rows of first polarity pins 311 and second polarity pins 312 within a group can be equal to the distance between the two groups of polarity pins to form a uniform arrangement. The distance between the two rows of first polarity pins 311 and second polarity pins 312 within a group can be less than the distance between the two groups of polarity pins to ensure sufficient space between adjacent groups of polarity pins for other circuits, thereby improving the integration level of the conductive layer 230. The signal leads 201 electrically connected to the display substrate 100 within a group of polarity pins have the same routing direction.

[0084] refer to Figure 5 In the case where the drive pin 300 includes two rows of first polarity pins 311 arranged along the first direction X and two rows of second polarity pins 312 arranged along the first direction X, the two rows of second polarity pins 312 can be disposed between the two rows of first polarity pins 311.

[0085] For example, such as Figure 5 The driving circuit board shown includes two sets of polarized pins. One set of polarized pins is close to the display substrate 100, and the other set of polarized pins is away from the display substrate 100. The signal lead 201 of the set of polarized pins close to the display substrate 100 that is electrically connected to the display substrate 100 can be arranged in a direction that points directly to the display substrate 100 along the polarized pins. The signal lead of the set of polarized pins away from the display substrate 100 that is electrically connected to the display substrate 100 can be arranged to bypass the circuit board body 200 through the side of the first driving pin 310 away from the second driving pin 320.

[0086] The driving circuit board provided in this application embodiment has a first polarity pin 311 and a second polarity pin 312 alternately arranged along the second direction Y, so that two adjacent rows of first polarity pins 311 and second polarity pins 312 in the second direction Y can form a polarity pin group for electrical connection with the data signal line 101 in the same area of ​​the display substrate 100, driving the pixels in the same area to emit light, thereby facilitating the shortening of the trace length of the signal lead 201.

[0087] In some feasible implementations, the circuit board body 200 includes a first driving region and a second driving region, a first driving pin 310 is disposed in the first driving region, and a second driving pin 320 is disposed in the second driving region; the first driving region and the second driving region are alternately disposed along a first direction X.

[0088] refer to Figure 1The circuit board body 200 includes a first driving region 210 and a second driving region 220. A first driving pin 310 is disposed in the first driving region 210 and a second driving pin 320 is disposed in the second driving region 220. The first driving region 210 and the second driving region 220 are alternately disposed along a first direction X, and the second driving region 220 is disposed between the two first driving regions 210.

[0089] For example, the first driving region 210 and the second driving region 220 may be alternately arranged along the second direction Y. The first driving region 210 is disposed between the second driving region 220 and the display substrate 100. The driving circuit board may include a plurality of second driving regions 220.

[0090] For example, the data signal line 101 in the display substrate 100 corresponding to the second driving region 220 can be electrically connected to the first driving pin 310 in the first driving region 210 on both sides of the second driving region 220 near the display substrate 100.

[0091] It should be noted that the signal lead 201 connecting the first driving pin 310 and the second driving pin 320 has opposite routing directions, so there will be no short circuit. The first driving region 210 and the second driving region 220 are alternately arranged along the first direction X, which facilitates the electrical connection between the first driving pin 310 near the display substrate 100 and the data signal line 101 in the display substrate 100 corresponding to the second driving region 220. This can reduce the size of the driving chip 400 in the second direction Y, thereby shortening the bezel of the display substrate and improving the display effect of the display substrate.

[0092] In some feasible implementations, the number of first drive pins 310 arranged in each row along the second direction Y is equal.

[0093] The driving circuit board provided in this application embodiment has an equal number of first driving pins 310 arranged in each row along the second direction Y, which can make full use of the space within the circuit board body 200, further increase the number of output channels of the driving chip 400, and improve the resolution of the display substrate.

[0094] In some feasible implementations, in the second direction Y, two adjacent rows of first drive pins 310 are aligned.

[0095] refer to Figure 1 In the second direction Y, the two adjacent rows of first drive pins 310 are aligned.

[0096] The driving circuit board provided in this application embodiment has two adjacent rows of first driving pins 310 aligned, which can further reduce the size difference of each row of first driving pins 310 in the first direction X, making it easier to reduce the size of the first driving area 210 in the first direction X, and making it easier to bond more driving chips 400, thereby increasing the number of output channels of driving chips 400, improving the resolution of the display substrate, and making the narrow bezel of the display substrate adapt to the high resolution requirements.

[0097] In some feasible implementations, the conductive layer 230 includes a bridging portion whose orthographic projection on the circuit board body 200 covers the orthographic projection of the bridging via on the circuit board body 200; the first driving region 210 includes a first sub-driving region, a first driving pin 310 within the first sub-driving region is electrically connected to the bridging portion, and the distance between the bridging portion electrically connected to the first driving pin 310 within the first sub-driving region and the driving chip 400 is different; the distance between adjacent bridging portions along the first direction X is smaller than the size of the bridging portion in the first direction X.

[0098] For example, Figure 6 This is a schematic structural diagram of another driving circuit board provided in an embodiment of this application. For example... Figure 6 As shown, the driving circuit board includes: a circuit board body 200, which includes a first driving region 210 and a first sub-driving region 211, with a first driving pin 310 disposed within the first sub-driving region 211. The circuit board body 200 includes a conductive layer 230, which includes signal leads 201, bridging portions 202, and bridging vias 203. The distance L1 between adjacent bridging portions 202 along the first direction X is less than the dimension L2 of the bridging portion 202 in the first direction X.

[0099] It should be noted that the dimension L2 of the bridging portion 202 in the first direction X is usually larger than the dimension of the electrically connected first driving pin 310 in the first direction X. When the bridging portions 202 arranged in a row along the first direction X are electrically connected to the first driving pins 310 arranged in a row along the first direction X, it usually results in the spacing of the first driving pins 310 in the first direction X being too large, or the signal lead 201 between the first driving pin 310 and the bridging portion 202 being too long, making it difficult to adapt the low manufacturing cost of the display substrate to the requirement of high resolution.

[0100] The driving circuit board provided in this application embodiment can make the arrangement of the first driving pins 310 along the first direction X more dense by shortening the distance L1 of the bridging portion 202 in the first direction X, thereby reducing the size of the driving chip 400 in the first direction X. Furthermore, it can increase the number of driving chips 400, improve the resolution of the display substrate, and also facilitate shortening the length of the signal lead 201 between the first driving pin 310 and the bridging portion 202, reducing the wiring cost of the display substrate, reducing the short circuit risk of the signal lead 201, and improving the safety and stability of the driving circuit board.

[0101] In some feasible implementations, the first sub-driving region 211 includes a plurality of first driving pin groups, each first driving pin group including at least two first driving pins 310; the distance between the bridging portion 202 electrically connected to the first driving pins 310 in the same first driving pin group and the driving chip 400 increases or decreases along the first direction X.

[0102] For example, Figure 7 This is a schematic structural diagram of another driving circuit board provided in an embodiment of this application. Figure 7 As shown, the driving circuit board includes: a circuit board body 200, a first driving region 210, a first sub-driving region 211, and a first driving pin group arranged along a first direction X. The circuit board body 200 includes a conductive layer 230, which includes signal leads 201, bridging portions 202, and bridging vias 203. The first driving pin group contains first driving pins 310 arranged along the first direction X, and the distance between the bridging portion 202 electrically connected to the first driving pins 310 within the same first driving pin group and the driving chip 400 decreases along the first direction X.

[0103] refer to Figures 6 to 7Compared to the staggered arrangement of the jumpers 202, each jumper 202 has jumpers 202 on both sides of the signal lead 201 electrically connected to it. To prevent the circuit board body 200 from breaking, the spacing between each jumper 202 and the signal lead 201 on both sides needs to be considered. However, when the jumpers 202 electrically connected to the first drive pin 310 in the unified first drive pin group are arranged in a stepped shape, the jumpers 202 on both sides of each jumper 202 are respectively a first jumper that is farther away from the display substrate 100 relative to the current jumper and a second jumper that is closer to the display substrate 100 relative to the current jumper. The signal lead 201 electrically connected to the current jumper is respectively the signal lead 201 electrically connected to the first jumper and the second jumper. Since the signal lead 201 is typically electrically connected to the midpoint of the edge of the bridging portion 202 along the first direction X, the distance between the signal lead 201 electrically connected to the current bridging portion and the signal lead 201 electrically connected to the first bridging portion is relatively large, resulting in a lower risk of breakage of the conductive layer 230 between the two signal leads 201. Therefore, to prevent breakage of the circuit board body 200, the drive circuit board provided in this embodiment only needs to consider the distance between the signal lead 201 electrically connected to the current bridging portion and the second bridging portion.

[0104] The driving circuit board provided in this application embodiment can further shorten the distance L1 of the bridging portion 202 in the first direction X, thereby further increasing the density of the first driving pins 310 along the first direction X, reducing the risk of breakage of the driving circuit board, reducing the size of the driving chip 400 in the first direction X, further increasing the number of driving chips 400, improving the resolution of the display substrate, and further shortening the total length of the signal lead 201 required for electrical connection between each first driving pin 310 in the first driving pin group and the bridging portion 202, thereby reducing the wiring cost of the display module, reducing the short circuit risk of the signal lead 201, and improving the safety and stability of the driving circuit board.

[0105] In some feasible implementations, the distance between the bridging portion 202, which is electrically connected to at least two adjacent first drive pin groups arranged in the first direction X, and the drive chip 400 changes in the opposite trend.

[0106] For example, Figure 8 This is a schematic structural diagram of a driver circuit board provided in an embodiment of this application. Figure 8As shown, the driving circuit board includes a circuit board body 200, the circuit board body 200 includes a first driving region 210, the first driving region 210 includes two first sub-driving regions 211 arranged along the first direction X, and a first driving pin group arranged along the first direction X is provided in the first sub-driving region 211. The distance between the bridging portion 202 of two adjacent first driving pin groups arranged in the first direction X and the driving chip 400 changes in opposite trends.

[0107] The driving circuit board provided in this application embodiment has a distance change trend opposite to that between the bridging portion 202 of two adjacent first driving pin groups electrically connected in the first direction X and the driving chip 400. This can increase the spacing between the two adjacent first driving pin groups in the first direction X, reduce the risk of breakage of the driving circuit board, and improve the safety and stability of the driving circuit board.

[0108] In some feasible implementations, the distance between the bridging portion 202, which is electrically connected to at least two adjacent first drive pin groups arranged in the first direction X, and the drive chip 400 changes in the same trend.

[0109] like Figure 7 As shown, the first driving region 210 includes two first sub-driving regions 211 arranged along the first direction X. The first sub-driving region 211 is provided with a first driving pin group arranged along the first direction X. The distance between the bridging portion 202 of two adjacent first driving pin groups arranged in the first direction X and the driving chip 400 changes in the same trend.

[0110] refer to Figure 7 and Figure 8 When the distance between the bridging portion 202 of two adjacent first driving pin groups electrically connected in the first direction X and the driving chip 400 changes in opposite trends, the distance between the first driving pins 310 electrically connected to the two adjacent first driving pins 310 near the boundary of the two first driving pin groups is larger, which will result in a larger size of the first driving region 210 in the first direction X, resulting in a smaller total number of output channels of each driving chip 400 bonded to the display substrate 100.

[0111] The driving circuit board provided in this application embodiment has a distance change trend between the bridging portion 202 of two adjacent first driving pin groups electrically connected in the first direction X and the driving chip 400. This can reduce the spacing between the two adjacent first driving pin groups in the first direction X, reduce the size of the driving chip 400 in the first direction X, and further increase the number of driving chips 400 arranged to improve the resolution of the display substrate.

[0112] In some feasible implementations, the first drive pin group includes at least two rows of first drive pins 310 arranged along the second direction Y.

[0113] The driving circuit board provided in this application embodiment can increase the number of output channels of the driving chip 400 by increasing the number of rows of at least two first driving pins 310 arranged along the second direction Y, thereby increasing the number of pixels of the display substrate 100, improving the resolution of the display substrate, and improving the display effect of the display substrate.

[0114] In some feasible implementations, the first driving pin group includes a first sub-driving pin group and a second sub-driving pin group, which are arranged adjacent to each other in the first direction X. The first driving pin 310 in the first sub-driving pin group that is closest to the second sub-driving pin group is the first boundary pin, and the first driving pin 310 in the second sub-driving pin group that is closest to the first sub-driving pin group is the second boundary pin. When the distance between the bridging portion 202 electrically connected to the second boundary pin and the driving chip 400 is greater than the distance between the bridging portion 202 electrically connected to the first boundary pin and the driving chip 400, the bridging portion 202 electrically connected to the first boundary pin is disposed between the second boundary pin and the first boundary pin. The first driving pins 310 in the first driving pin group, excluding the second boundary pin, are disposed in different rows along the second direction Y.

[0115] For example, Figure 9 This is a schematic structural diagram of another driving circuit board provided in an embodiment of this application. (See diagram below.) Figure 9 As shown, the driving circuit board includes: a circuit board body 200, a first driving region 210, and two first sub-driving regions 211 arranged along a first direction X. A first sub-driving pin group and a second sub-driving pin group are respectively disposed within each first sub-driving region 211. The first sub-driving pin group includes a first boundary pin 313, and the second driving pin group includes a second boundary pin 314. The distance between the bridging portion 202 electrically connected to the second boundary pin 314 and the driving chip 400 is greater than the distance between the bridging portion 202 electrically connected to the first boundary pin 313 and the driving chip 400. The bridging portion 202 electrically connected to the first boundary pin 313 is disposed between the second boundary pin 314 and the first boundary pin 313. The first driving pins 310 (excluding the second boundary pin 314) and the second boundary pin 314 in the first driving pin group are respectively disposed in different rows along the second direction Y.

[0116] It should be noted that the reference Figure 7To prevent the circuit board body 200 between the first boundary pin 313 and the second boundary pin 314 from breaking, it is necessary to control the distance between the signal leads 201 that electrically connect the first boundary pin 313 and the second boundary pin 314.

[0117] The driving circuit board provided in this application embodiment has a bridging portion 202 electrically connected to the first boundary pin 313 disposed between the second boundary pin 314 and the first boundary pin 313. The distance between the signal lead 201 electrically connected to the first boundary pin 313 and the signal lead 201 electrically connected to the first driving pin 310 closest to the second boundary pin 314 in the second sub-driving pin group is relatively large. The distance between the signal lead 201 electrically connected to the second boundary pin 314 and the other first driving pins in the first sub-driving pin group other than the first boundary pin 313 is also relatively large. This can further reduce the risk of the conductive layer 230 breaking, thereby shortening the distance between the first boundary pin 313 and the second boundary pin 314 in the first direction X. This can further reduce the size of the driving chip 400 in the first direction X, increase the number of driving chips 400, improve the resolution of the display substrate, and also shorten the length of the signal lead 201 electrically connected to the second boundary pin 314, reducing the wiring cost of the display module.

[0118] In some feasible implementations, the number of first drive pins 310 in the first drive pin group is positively correlated with the size of the bridging portion 202 electrically connected to the first drive pins 310 in the first direction X.

[0119] It should be noted that, given a fixed number of first drive pins 310, the number of first drive pin groups is positively correlated with the number of first boundary pins 313; the more first drive pin groups there are, the more first boundary pins 313 are generated. The spacing between two adjacent first drive pin groups is positively correlated with the size of the first boundary pin 313 in the first direction X. The larger the size of the first boundary pin 313 in the first direction X, the larger the spacing between the first boundary pin 313 and the adjacent second boundary pin 314 in the first direction X should be to prevent breakage of the circuit board body 200. Therefore, given a fixed number of first drive pins 310, the larger the size of the bridging portion 202 electrically connected to the first drive pins 310 in the first direction X, the smaller the size of the drive chip 400 in the first direction X should be, by reducing the number of first drive pin groups, thereby increasing the number of first drive pins 310 in the first drive pin groups.

[0120] The driver circuit board provided in this application embodiment can reduce the size of the driver chip 400 in the first direction X by increasing the number of first driver pins 310 in the first driver pin group when the size of the bridging portion 202 electrically connected to the first driver pin 310 in the first direction X is large. Conversely, it can reduce the number of first driver pins 310 in the first driver pin group and increase the number of the first driver pin group when the size of the bridging portion 202 electrically connected to the first driver pin 310 in the first direction X is small, thereby shortening the total length of the signal lead 201 electrically connected to the first driver pin 310, reducing the risk of short circuits, and saving wiring costs.

[0121] In some feasible implementations, the first drive pins 310, excluding the second boundary pins 314, are arranged in at least two rows along the second direction Y in the first sub-drive pin group.

[0122] For example, Figure 10 This is a schematic structural diagram of another driving circuit board provided in an embodiment of this application. For example... Figure 10 As shown, the driving circuit board includes: a circuit board body 200, a first driving region 210, and two first sub-driving regions 211 arranged along a first direction X. A first sub-driving pin group and a second sub-driving pin group are respectively disposed within each first sub-driving region 211. The first sub-driving pin group includes a first boundary pin 313, and the second driving pin group includes a second boundary pin 314. The distance between the bridging portion 202 electrically connected to the second boundary pin 314 and the driving chip 400 is greater than the distance between the bridging portion 202 electrically connected to the first boundary pin 313 and the driving chip 400. The bridging portion 202 electrically connected to the first boundary pin 313 is disposed between the second boundary pin 314 and the first boundary pin 313. The first driving pins 310 in the first sub-driving pin group, excluding the second boundary pin 314, are arranged in two rows along a second direction Y.

[0123] It should be noted that a certain distance needs to be maintained between adjacent first drive pins 310 to avoid short circuits between the first drive pins 310.

[0124] For example, adjacent first drive pins 310 in the first sub-drive pin group, excluding the second boundary pin 314, are staggered in the first direction X. The spacing between two adjacent first drive pins 310 in the same row in the first direction X is smaller than the size of the first drive pin in the first direction X.

[0125] For example, Figure 11 This is a schematic partial structural diagram of a driver circuit board provided in an embodiment of this application. Figure 11 As shown, Figure 11 For driving the circuit board along Figure 1 The cross-sectional view of the AA' connection shown indicates that the driving circuit board includes: a circuit board body 200, which includes two conductive layers 230. Two first driving pins 310 are disposed on the same conductive layer 230. One first driving pin 310 is disposed on the same layer as its electrically connected signal lead 201, and the other first driving pin 310 is disposed on the same layer as its electrically connected partial signal lead 201. The electrically connected partial signal lead 201 is electrically connected to a bridging portion 202, and the bridging portion 202 is electrically connected to a signal lead 201 on the other conductive layer 230. It should be noted that an insulating layer 240 is disposed between the two conductive layers 230, and the two ends of the bridging portion 202 are electrically connected to signal leads 201 located on different conductive layers 230 through bridging vias 203.

[0126] The driving circuit board provided in this application embodiment has two rows of first driving pins 310, excluding the second boundary pin 314, arranged along the second direction Y in the first sub-driving pin group. This can further reduce the size of the driving chip 400 in the first direction X, thereby increasing the number of output channels of the driving chip 400, improving the resolution of the display substrate, and reducing the area of ​​the bonding region of the driving chip 400, so that the high resolution requirement of the display substrate can be adapted to the narrow bezel requirement.

[0127] In some feasible implementations, the first driving region 210 further includes a second sub-driving region, wherein the first driving pins 310 within the second sub-driving region are arranged in a row along the first direction X.

[0128] For example, Figure 12 This is a schematic structural diagram of another driving circuit board provided in an embodiment of this application. Figure 12 As shown, the driving circuit board includes: a circuit board body 200, the circuit board body 200 includes a first driving region 210 and a second driving region 220, the first driving region 210 includes a first sub-driving region 211 and a second sub-driving region 212, and the first driving pins 310 in the second sub-driving region 212 are arranged in a row along the first direction X.

[0129] It should be noted that the number of conductive layers 230 electrically connected to the first driving pin 310 in the second sub-driving area is one, and it can be directly electrically connected to the display substrate 100 through the signal lead 201.

[0130] The driving circuit board provided in this application embodiment has a first driving pin 310 arranged in a row along the first direction X in the second sub-driving area 212, which can facilitate the reduction of the size of the second sub-driving area 212 in the second direction Y, thereby reducing the size of the driving chip 400 in the second direction Y, and can adapt to the narrow bezel requirements of the display substrate.

[0131] When the first driving region 210 includes at least two second sub-driving regions 212 arranged along the second direction Y, the first sub-driving region 211 is disposed between the two second sub-driving regions 212 arranged along the second direction Y.

[0132] For example, in a liquid crystal display, the first driving pin 310 in the first sub-driving region 211 can be a second polarity pin 312, and the first driving pin 310 in the second sub-driving region 212 can be a first polarity pin 311.

[0133] refer to Figure 12 The first driving region 210 includes two second sub-driving regions 212 arranged along the second direction Y and a first sub-driving region 211, wherein the first sub-driving region 211 is disposed between the two second sub-driving regions 212.

[0134] For example, when the first driving region 210 includes two first sub-driving regions 211 arranged along the second direction Y, the first driving pins 310 in the two first sub-driving regions 211 are arranged opposite each other, and all the second boundary pins 314 in the two first sub-driving regions 211 are arranged in a row along the first direction X.

[0135] It should be noted that other electronic components are usually also provided on the circuit board body 200. By placing the first sub-driving area 211 between two second sub-driving areas 212 arranged along the second direction Y, it is convenient to arrange other electronic components between the two second sub-driving areas 212.

[0136] In some feasible implementations, the second drive pin 320 is arranged in the same row as the first drive pin 310 in the second sub-drive region 212.

[0137] refer to Figure 12 The first sub-driving region 211 is located between the two second sub-driving regions 212, and the second driving pin 320 is arranged in the same row as the first driving pin 310 in the second sub-driving region 212.

[0138] The driving circuit board provided in this application embodiment has a first driving pin 310 and a second driving pin 320 arranged in the same row along the edge of the driving chip 400 in the second sub-driving area 212. This can increase the space inside the driving pin 300, making it easier to set up other electronic components and prevent short circuits caused by mutual contact. At the same time, when testing the second driving pin 320 by the test pin, the impedance of the test pin can be reduced.

[0139] A second aspect of this application provides a display module including: a display substrate 100; and a driving circuit board as described in any of the first aspects above, wherein the driving circuit board and the display substrate 100 are electrically connected via a first driving pin 310.

[0140] For example, Figure 13 This is a schematic structural diagram of a display module provided in an embodiment of this application. Figure 13 As shown, the display module includes a display substrate 100 and a driving circuit board 1000, wherein the display substrate 100 and the driving circuit board 1000 are electrically connected.

[0141] The display module provided in this application embodiment is electrically connected to the display substrate 100 via a first driving pin 310, forming an output channel of the driving chip 400 to drive pixels. By arranging at least three rows of first driving pins 310 along both the first direction X and the second direction Y, the number of output channels of the driving chip 400 is increased, thereby increasing the number of pixels on the display substrate 100. By setting the circuit board body 200 to include at least two conductive layers 230, and the number of conductive layers 230 electrically connected to the at least two rows of first driving pins 310 along the second direction Y is different, signal leads electrically connected to multiple rows of first driving pins 310 can be connected to different conductive layers 230 through holes, avoiding short circuits between signal leads. The wiring space of the signal leads 201 can be increased in the thickness direction of the conductive layer 230, thereby further increasing the number of output channels of the driving chip 400, improving the resolution of the display substrate, and improving the display effect of the display substrate.

[0142] A third aspect of the embodiments of this application provides a display device comprising: a driving circuit board 1000 as described in any of the first aspects above.

[0143] For example, Figure 14 This is a schematic structural diagram of a display device provided in an embodiment of this application. Figure 14 As shown, the display device includes a driver circuit board 1000.

[0144] In some feasible implementations, the display module is as described in the second aspect above.

[0145] For example, Figure 15 A schematic structural diagram of another display device provided in an embodiment of this application. For example... Figure 15 As shown, the display device includes a display module 2000.

[0146] The display device provided in this application embodiment is electrically connected to the display substrate 100 via a first driving pin 310 to form an output channel of the driving chip 400, thereby driving pixels. By arranging at least three rows of first driving pins 310 along both the first direction X and the second direction Y, the number of output channels of the driving chip 400 is increased, thereby increasing the number of pixels on the display substrate 100. By setting the circuit board body 200 to include at least two conductive layers 230, and the number of conductive layers 230 electrically connected to the at least two rows of first driving pins 310 arranged along the second direction Y is different, signal leads electrically connected to multiple rows of first driving pins 310 can be connected to different conductive layers 230 through holes, avoiding short circuits between signal leads. The wiring space of the signal leads 201 can be increased in the thickness direction of the conductive layer 230, thereby further increasing the number of output channels of the driving chip 400, improving the resolution of the display module 2000, and improving the display effect of the display module 2000. The 2000 display module can be applied to touch panel displays, LCD displays, and monitor displays, as well as irregularly shaped displays, such as smartwatch displays.

[0147] It should be noted that the display devices provided in the embodiments of this application may include smartphones, tablets, laptops, televisions, and smart wearable display devices, etc. Smart wearable display devices may include smartwatches, etc., and the embodiments of this application do not make specific limitations.

[0148] In the above embodiments, the descriptions of each embodiment have different focuses. For parts that are not described in detail or recorded in a certain embodiment, please refer to the relevant descriptions of other embodiments.

[0149] The above embodiments are only used to illustrate the technical solutions of this application, and are not intended to limit them. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this application.

Claims

1. A driving circuit board, characterized in that, include: Driver chip; The circuit board body includes multiple driving pins and signal circuits. The driving pins include a first driving pin and a second driving pin. The first driving pin is used to electrically connect to the display substrate, and the second driving pin is electrically connected to the signal circuit. The driver chip is electrically connected to the circuit board body via the driver pin; The first driving pin is arranged in at least three rows along a first direction, and the first driving pin is arranged in at least three rows along a second direction, wherein the first direction intersects the second direction; The circuit board body includes at least two conductive layers, and the number of conductive layers electrically connected to the at least two rows of the first drive pins arranged along the second direction is different. The conductive layer includes signal leads, which are electrically connected to the first driving pins. The number of conductive layers corresponding to the signal leads of at least two rows of the first driving pins arranged along the second direction is different. The signal lead belonging to at least two of the conductive layers includes a bridging via located between two adjacent rows of the first drive pins; The bridging via is used to connect the signal leads of different conductive layers; Two adjacent rows of first driving pins arranged along the first direction are located in the same conductive layer. One row of first driving pins is electrically connected to the display substrate through the signal leads in the same layer, and the other row of first driving pins is electrically connected to the signal leads in the same layer through the bridging vias in the same layer to other conductive layers. The conductive layer includes a bridging portion, the first driving region includes a first sub-driving region, the first driving pin in the first sub-driving region is electrically connected to the bridging portion, and the distance between the bridging portion electrically connected to the first driving pin in the first sub-driving region and the driving chip is different. The first sub-driving region includes a plurality of first driving pin groups, and the first driving pin group includes at least two first driving pins; The first driving pin group includes a first sub-driving pin group and a second sub-driving pin group, and the first sub-driving pin group and the second sub-driving pin group are arranged adjacent to each other in the first direction; The first driving pin in the first sub-driving pin group that is closest to the second sub-driving pin group is the first boundary pin, and the first driving pin in the second sub-driving pin group that is closest to the first sub-driving pin group is the second boundary pin; When the distance between the bridging portion electrically connected to the second boundary pin and the driver chip is greater than the distance between the bridging portion electrically connected to the first boundary pin and the driver chip, the bridging portion electrically connected to the first boundary pin is disposed between the second boundary pin and the first boundary pin; The first driving pins, excluding the second boundary pins, are arranged in different rows along the second direction.

2. The driving circuit board according to claim 1, characterized in that, In the case where the display substrate includes data signal lines, The first drive pin includes a first polarity pin and a second polarity pin, and the first polarity pin and the second polarity pin are electrically connected to the data signal lines of different polarities respectively; The first polarity pin and the second polarity pin belong to the first drive pins in different rows in the second direction.

3. The driving circuit board according to claim 2, characterized in that, The first polarity pin and the second polarity pin are alternately arranged along the second direction.

4. The driving circuit board according to claim 1, characterized in that, The circuit board body includes a first driving region and a second driving region, wherein the first driving pin is disposed in the first driving region and the second driving pin is disposed in the second driving region. The first driving region and the second driving region are alternately arranged along the first direction.

5. The driving circuit board according to claim 4, characterized in that, The number of the first drive pins in each row arranged along the second direction is equal; and / or, In the second direction, the two adjacent rows of the first drive pins are aligned.

6. The driving circuit board according to claim 1, characterized in that, The orthogonal projection of the bridging portion on the circuit board body covers the orthogonal projection of the bridging via on the circuit board body; The distance between adjacent bridging portions along the first direction is less than the dimension of the bridging portion in the first direction.

7. The driving circuit board according to claim 6, characterized in that, The distance between the bridging portion electrically connected to the first drive pin in the same first drive pin group and the drive chip increases or decreases along a first direction.

8. The driving circuit board according to claim 7, characterized in that, The distance between the bridging portions electrically connected to at least two adjacent first drive pin groups arranged in the first direction and the drive chip exhibits the same trend; and / or, The distance between the bridging portion electrically connected to at least two adjacent first drive pin groups arranged in the first direction and the drive chip changes in opposite directions.

9. The driving circuit board according to claim 7, characterized in that, The first drive pin group includes at least two rows of the first drive pins arranged along the second direction.

10. The driving circuit board according to claim 7, characterized in that, The number of the first drive pins in the first drive pin group is positively correlated with the size of the bridging portion electrically connected to the first drive pins in the first direction.

11. The driving circuit board according to claim 7, characterized in that, In the first sub-driving pin group, the first driving pins, excluding the second boundary pins, are arranged in at least two rows along the second direction.

12. The driving circuit board according to claim 6, characterized in that, The first driving region further includes a second sub-driving region, in which the first driving pins are arranged in a row along the first direction.

13. The driving circuit board according to claim 12, characterized in that, In the case where the first driving region includes at least two second sub-driving regions arranged along the second direction, the first sub-driving region is disposed between the two second sub-driving regions arranged along the second direction.

14. The driving circuit board according to claim 12, characterized in that, The second driving pin is arranged in the same row as the first driving pin in the second sub-driving area.

15. A display module, characterized in that, include: Display substrate; The driving circuit board as described in any one of claims 1 to 14, wherein the driving circuit board is electrically connected to the display substrate via a first driving pin.

16. A display device, characterized in that, include: The drive circuit board as described in any one of claims 1 to 14; or, The display module as described in claim 15.

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