A wafer deviation correction method and device, electronic equipment and medium

Abstract

The application relates to the technical field of wafer correction, in particular to a wafer deviation correction method and device, electronic equipment and medium, the method comprising the following steps: analyzing wafer correction information to obtain image features and position correction information, arranging the wafer correction information to obtain first correction matrix data, inputting the first correction matrix data into a vector feature model to extract, obtaining a feature dimension number, processing the correction dimension number and the first correction matrix data to generate second correction matrix data, performing data processing on the second correction matrix data to obtain wafer correction data, inputting the wafer correction data into a training algorithm model to generate correction information, performing image feature recognition on current wafer information to obtain current image features and current position information, and matching the current image features and the current position information to obtain current correction information. The wafer cutting efficiency is improved.

Description

Technical Field

[0001] This application relates to the technical field of wafer correction, and in particular to a wafer deviation correction method, apparatus, electronic device, and medium. Background Technology

[0002] A wafer is a silicon wafer used to fabricate silicon semiconductor circuits; its raw material is silicon. High-purity polycrystalline silicon is dissolved, doped with silicon crystal seeds, and then slowly pulled out to form a cylindrical single-crystal silicon wafer. After grinding, polishing, and slicing, the single-crystal silicon forms a silicon wafer, also known as a crystal wafer.

[0003] Currently, in wafer processing, back-grinding is used to achieve the optimal thickness for its packaging characteristics. For single-chip packages, wafers are typically ground to a thickness of approximately 200-250 micrometers (μm). For stacked packages, where multiple chips are stacked within the same package, the chips (wafers) need to be ground to an even thinner thickness. However, the residual stress generated during back-grinding can cause shrinkage on the front side of the wafer, potentially leading to warping. Furthermore, the degree of warping increases with wafer thickness. Therefore, to maintain wafer flatness, a protective film is first applied to the back of the wafer, which is then secured within a ring frame. Finally, the back-grinding protective tape protecting the front-side devices is removed, exposing the semiconductor devices, completing the back-grinding process. The wafer is then polished using a fine polishing pad to achieve a smooth surface. Finally, the wafer is placed on a wafer stage, and the offset angle is determined using a camera recognition algorithm. This offset angle is adjusted by rotating a wafer ring to ensure accuracy during subsequent chip dicing.

[0004] With the development of microelectronics, there is a growing need for increasingly smaller chips, necessitating high-precision micro-dicing and dicing of the corresponding wafers. By adjusting the angle and position of the wafer, accurate dicing is achieved by ensuring its location within the marked coordinate system. Visual inspection technology enables the detection of microstructure dimensions. For micron-level dicing of wafer chips, machine vision-based wafer positioning systems can achieve intelligent, high-precision wafer inspection and positioning. The positioning accuracy of the wafer directly affects the efficiency and yield of the entire IC manufacturing system; effective wafer positioning and dicing methods can achieve automation and high precision in wafer positioning.

[0005] However, although current machine vision wafer positioning systems can achieve intelligent and high-precision detection and positioning of wafers, the precision adjustment is only performed after the wafer is placed on the wafer stage. This means that after the wafer is placed on the wafer stage, the immediate step is not to perform the subsequent dicing and cutting steps, but to spend some time adjusting the offset angle of the wafer to avoid offset errors. Therefore, there is a defect of low wafer cutting efficiency. Summary of the Invention

[0006] To address at least one of the aforementioned technical problems, this application provides a wafer deviation correction method, apparatus, device, and medium.

[0007] In a first aspect, this application provides a wafer deviation correction method, which adopts the following technical solution: Obtain wafer calibration information within a historical time period. The wafer calibration information refers to the calibration information of wafers with different characteristics placed on the wafer worktable after the polishing process. The wafer calibration information is analyzed to obtain image features corresponding to different positions on the bottom of different wafers and position calibration information of different image features placed at different positions on the wafer stage. Based on the position calibration information and the image features, the wafer calibration information is processed without time series to obtain first calibration matrix data. The first calibration matrix data is input into a trained vector feature model for vector feature extraction to obtain the number of feature dimensions. The number of calibration dimensions is then combined with the first calibration matrix data to generate second calibration matrix data. The data contained in the second correction matrix data are processed to obtain wafer correction data, and the wafer correction data is input into the training algorithm model for data deduction to generate correction information for different image features placed at different positions on the wafer stage; Obtain current wafer information, which refers to wafers that have not been placed on the wafer stage after the polishing process; Image feature recognition is performed on the current wafer information to obtain the current image feature corresponding to the current wafer information and the current position information of the current image feature after it is placed on the wafer stage. The current image feature and the current position information of the current image feature after it is placed on the wafer stage are matched with different image features placed at different positions on the wafer stage to obtain the current correction information of the current wafer information. Based on the current calibration information, a wafer calibration command is generated to control the wafer mounting equipment to calibrate and adjust the wafer, and then mount the adjusted wafer in a preset position.

[0008] In one possible implementation, the analysis of the wafer calibration information to obtain image features corresponding to different positions on the bottom of different wafers and position calibration information of different image features placed at different positions on the wafer stage includes: Based on the wafer calibration information, multiple sets of calibration processing data are determined, and labels are obtained for each set of calibration processing data to obtain the wafer number in each set of calibration processing data and the calibration completeness corresponding to the wafer number. The calibration completeness is used to indicate whether the calibration processing data contains complete image features of different positions on the bottom of the wafer, wafer platform position information corresponding to the image features, and position calibration information corresponding to the wafer platform position. Based on the stated correction integrity, it is determined whether the correction processing data corresponding to the wafer number meets the correction integrity standard. If it does not meet the standard, the correction processing data corresponding to the wafer number is disassembled. If it meets the standard, the correction processing data corresponding to the wafer number is extracted to obtain the image features corresponding to different positions on the bottom of different wafers in the wafer correction information, as well as the position correction information of different image features placed at different positions on the wafer stage.

[0009] In one possible implementation, the first correction matrix data is input into a trained vector feature model for vector feature extraction to obtain the number of feature dimensions, including: Based on the first correction matrix data, determine the wafer correction position, platform correction position, and correction image for each wafer correction process in the wafer correction information; The wafer correction position, platform correction position, and correction image features are respectively input into the vector feature model for vector feature extraction to obtain a first position feature vector corresponding to the wafer correction position, a second position feature vector corresponding to the platform correction position, and an image feature vector corresponding to the correction image; The number of feature dimensions is obtained by counting the first position feature vector, the second position feature vector, and the image feature vector.

[0010] In one possible implementation, the number of correction dimensions is combined with the first correction matrix data to generate second correction matrix data, including: The number of feature dimensions is integrated with the first correction matrix data to generate dimension matrix data; By performing basic data distribution exploration on the dimensional matrix data, the positional correspondence between the first position feature vector and the second position feature vector of the wafer in the wafer correction information, as well as the image feature vector associated with the positional correspondence, are obtained. Based on the location correspondence and the image feature vector, the dimensional matrix data is processed into a sequence data to obtain the point matrix data; Based on the point matrix data, the positional correspondence between the missing first position feature vector and the second position feature vector, as well as the image feature vector, are evaluated to generate the second correction matrix data.

[0011] In one possible implementation, the data processing of the data contained in the second correction matrix data to obtain wafer correction data includes: Calculate the normal distribution mean and normal distribution variance of the correction data contained in the second correction matrix data, and determine the 3σ range of the second correction matrix data based on the normal distribution mean and normal distribution variance; Determine whether the correction data is outside the 3σ range. If the correction data is outside the 3σ range, determine the first matrix sequence of the second correction matrix data in which the correction data is located. Calculate the sequence average value based on the first matrix sequence. Replace the correction data with the sequence average value to obtain the replaced second matrix sequence. Then, process the missing values ​​in the second matrix sequence. The second matrix sequence in the second correction matrix data is normalized to obtain wafer correction data.

[0012] In one possible implementation, the method further includes: It is determined whether the current wafer information will undergo secondary correction within a preset time period in the future. If it does, the actual correction data is determined based on the secondary correction data and the correction data in the current wafer information. Based on the actual correction data, the correction data in the current wafer information is inversely normalized to restore the correction data in the current wafer information to the actual correction data.

[0013] In one possible implementation, the step of determining whether a secondary correction will occur in the current wafer information within a preset future time period, and if so, determining the actual correction data based on the secondary correction data and the correction data in the current wafer information, further includes: The root mean square error of the correction data is determined based on the actual correction data and the correction data in the current wafer information; the parameters in the epoch training model in the vector feature model are set according to the root mean square error, and the epoch training model after setting is iterated in reverse to obtain the updated vector feature model and the validation set of each round in the vector feature model; The validation set is evaluated to generate the loss value and evaluation index for the validation set.

[0014] Secondly, this application provides a wafer deviation correction device, which adopts the following technical solution: A wafer misalignment correction device, comprising: The information acquisition module is used to acquire wafer calibration information within a historical time period. The wafer calibration information is the calibration information of wafers with different wafer characteristics placed on the wafer worktable after the polishing process. The information analysis module is used to analyze the wafer calibration information to obtain image features corresponding to different positions on the bottom of different wafers and position calibration information of different image features placed at different positions on the wafer stage. Based on the position calibration information and the image features, the wafer calibration information is processed without time series to obtain the first calibration matrix data. The vector extraction module is used to input the first correction matrix data into the trained vector feature model to extract vector features, obtain the number of feature dimensions, and combine the number of correction dimensions with the first correction matrix data to generate the second correction matrix data. The data processing module is used to process the data contained in the second correction matrix data to obtain wafer correction data, and input the wafer correction data into the training algorithm model for data inference to generate correction information for different image features placed at different positions on the wafer stage. The wafer acquisition module is used to acquire current wafer information, which is the information of wafers that have not been placed on the wafer worktable after the polishing process. The image recognition module is used to perform image feature recognition on the current wafer information to obtain the current image features corresponding to the current wafer information and the current position information of the current image features after being placed on the wafer stage. The current image features and the current position information of the current image features after being placed on the wafer stage are matched with different image features placed at different positions on the wafer stage to obtain the current correction information of the current wafer information. The wafer pre-calibration module is used to generate wafer calibration instructions based on the current calibration information, control the wafer placement equipment to calibrate and adjust the wafer, and place the adjusted wafer in a preset position.

[0015] In one possible implementation, when the information analysis module analyzes the wafer calibration information to obtain image features corresponding to different positions on the bottom of different wafers and position calibration information of different image features placed at different positions on the wafer stage, it is specifically used for: Based on the wafer calibration information, multiple sets of calibration processing data are determined, and labels are obtained for each set of calibration processing data to obtain the wafer number in each set of calibration processing data and the calibration completeness corresponding to the wafer number. The calibration completeness is used to indicate whether the calibration processing data contains complete image features of different positions on the bottom of the wafer, wafer platform position information corresponding to the image features, and position calibration information corresponding to the wafer platform position. Based on the stated correction integrity, it is determined whether the correction processing data corresponding to the wafer number meets the correction integrity standard. If it does not meet the standard, the correction processing data corresponding to the wafer number is disassembled. If it meets the standard, the correction processing data corresponding to the wafer number is extracted to obtain the image features corresponding to different positions on the bottom of different wafers in the wafer correction information, as well as the position correction information of different image features placed at different positions on the wafer stage.

[0016] In another possible implementation, when the vector extraction module inputs the first correction matrix data into the trained vector feature model for vector feature extraction to obtain the feature dimension, it is specifically used for: Based on the first correction matrix data, determine the wafer correction position, platform correction position, and correction image for each wafer correction process in the wafer correction information; The wafer correction position, platform correction position, and correction image features are respectively input into the vector feature model for vector feature extraction to obtain a first position feature vector corresponding to the wafer correction position, a second position feature vector corresponding to the platform correction position, and an image feature vector corresponding to the correction image; The number of feature dimensions is obtained by counting the first position feature vector, the second position feature vector, and the image feature vector.

[0017] In another possible implementation, when the vector extraction module combines the number of correction dimensions with the first correction matrix data to generate the second correction matrix data, it is specifically used for: The number of feature dimensions is integrated with the first correction matrix data to generate dimension matrix data; By performing basic data distribution exploration on the dimensional matrix data, the positional correspondence between the first position feature vector and the second position feature vector of the wafer in the wafer correction information, as well as the image feature vector associated with the positional correspondence, are obtained. Based on the location correspondence and the image feature vector, the dimensional matrix data is processed into a sequence data to obtain the point matrix data; Based on the point matrix data, the positional correspondence between the missing first position feature vector and the second position feature vector, as well as the image feature vector, are evaluated to generate the second correction matrix data.

[0018] In another possible implementation, when the data processing module processes the data contained in the second correction matrix data to obtain wafer correction data, it specifically performs the following: Calculate the normal distribution mean and normal distribution variance of the correction data contained in the second correction matrix data, and determine the 3σ range of the second correction matrix data based on the normal distribution mean and normal distribution variance; Determine whether the correction data is outside the 3σ range. If the correction data is outside the 3σ range, determine the first matrix sequence of the second correction matrix data in which the correction data is located. Calculate the sequence average value based on the first matrix sequence. Replace the correction data with the sequence average value to obtain the replaced second matrix sequence. Then, process the missing values ​​in the second matrix sequence. The second matrix sequence in the second correction matrix data is normalized to obtain wafer correction data.

[0019] In another possible implementation, the device further includes: a data correction module, wherein, The data correction module is used to determine whether the current wafer information will undergo secondary correction within a preset time period in the future. If it does, the module determines the actual correction data based on the secondary correction data and the correction data in the current wafer information, and performs inverse normalization processing on the correction data in the current wafer information based on the actual correction data to restore the correction data in the current wafer information to the actual correction data.

[0020] In another possible implementation, the apparatus further includes: an error determination module, an iterative update module, and a computational evaluation module, wherein, The error determination module is used to determine the root mean square error of the correction data based on the actual correction data and the correction data in the current wafer information. The iterative update module is used to set the parameters in the epoch training model of the vector feature model according to the root mean square error, and to perform reverse iterative update on the set epoch training model to obtain the updated vector feature model and the validation set of each round in the vector feature model. The calculation and evaluation module is used to calculate and evaluate the validation set, and generate the loss value and evaluation index of the validation set.

[0021] Thirdly, this application provides an electronic device that adopts the following technical solution: At least one processor; Memory; At least one application, wherein the at least one application is stored in memory and configured to be executed by at least one processor, the at least one application being configured to: perform a wafer misalignment correction method as described in any of the first aspects.

[0022] Fourthly, this application provides a computer-readable storage medium, which adopts the following technical solution: A computer-readable storage medium having a computer program stored thereon, which, when executed in a computer, causes the computer to perform the wafer deviation correction method as described in any of the first aspects.

[0023] In summary, this application includes at least one of the following beneficial technical effects: Before wafer mounting, wafer calibration information from a historical time period is acquired. This information comprises calibration data for wafers with different characteristics placed on the wafer stage after polishing. Analysis of this information yields image features corresponding to different positions on the bottom of different wafers and positional calibration information for these image features at different positions on the wafer stage. Based on the positional calibration information and image features, the wafer calibration information is processed without a time series to obtain a first calibration matrix. This first calibration matrix is ​​then input into a trained vector feature model for vector feature extraction, determining the feature dimensions. The calibration dimensions are then combined with the first calibration matrix data to generate a second calibration matrix. The data in the second calibration matrix is ​​further processed to obtain wafer calibration data, which is then input into a trained algorithm model for data extrapolation, generating calibration data for different image feature placements. The system obtains calibration information at different positions on the wafer stage, then acquires the current wafer information. This current wafer information is the information of the wafer after polishing but before it is placed on the wafer stage. Image feature recognition is then performed on the current wafer information to obtain the current image features corresponding to the current wafer information and the current position information of these image features after placement on the wafer stage. The current image features and their corresponding current position information are matched with different image features placed at different positions on the wafer stage to obtain the current calibration information for the current wafer information. Based on this current calibration information, a wafer calibration command is generated to control the wafer placement equipment to calibrate and adjust the wafer, and then place the adjusted wafer at a preset position. Before the wafer is placed at the designated position, the wafer angle is adjusted so that after placement, no further angle adjustment via the wafer ring is required, allowing for direct dicing steps, thus improving wafer dicing efficiency. Attached Figure Description

[0024] Figure 1 This is a schematic flowchart of a wafer deviation correction method provided in an embodiment of this application.

[0025] Figure 2 This is a schematic diagram of a wafer deviation correction device provided in an embodiment of this application.

[0026] Figure 3 This is a schematic diagram of the structure of an electronic device provided in an embodiment of this application. Detailed Implementation

[0027] The following is in conjunction with the appendix Figure 1-3 This application will be described in further detail.

[0028] This specific embodiment is merely an explanation of this application and is not intended to limit it. After reading this specification, those skilled in the art can make modifications to this embodiment without contributing any inventive step, but such modifications are protected by patent law as long as they are within the scope of this application.

[0029] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0030] Furthermore, the term "and / or" in this article is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, or B existing alone. Additionally, the character " / " in this article, unless otherwise specified, generally indicates that the preceding and following related objects have an "or" relationship.

[0031] The embodiments of this application will now be described in further detail with reference to the accompanying drawings.

[0032] This application provides a wafer deviation correction method executed by an electronic device, which can be a server or a terminal device. The server can be a standalone physical server, a server cluster or distributed system composed of multiple physical servers, or a cloud server providing cloud computing services. The terminal device can be a smartphone, tablet, laptop, desktop computer, etc., but is not limited to these. The terminal device and the server can be directly or indirectly connected via wired or wireless communication. This application does not impose any limitations on this. Figure 1 As shown, the method includes: Step S10: Obtain wafer calibration information within the historical time period.

[0033] Among them, wafer calibration information refers to the calibration information of wafers with different characteristics placed on the wafer worktable after the polishing process.

[0034] Specifically, the data for each wafer calibration is recorded and stored in advance. The calibration data includes: different features on the wafer surface after polishing, the corresponding positions of the different features on the wafer surface, and the loading position of the feature on the wafer stage after the wafer is loaded. The corresponding position is the corresponding position of the optional mounting chuck and the wafer, that is, the corresponding position of the different features on the wafer surface relative to the central axis of the mounting chuck after the wafer is picked up by the mounting chuck.

[0035] Step S11: Analyze the wafer calibration information to obtain the image features corresponding to different positions on the bottom of different wafers and the position calibration information of different image features placed at different positions on the wafer stage. Based on the position calibration information and image features, perform time-series-free processing on the wafer calibration information to obtain the first calibration matrix data.

[0036] Specifically, the wafer correction information is processed without time series based on the position correction information and image features to obtain the first correction matrix data: Where m represents the coordinates of different positions in the position correction information, and n represents the image feature vector in the image features.

[0037] Step S12: Input the first correction matrix data into the trained vector feature model to extract vector features, obtain the number of feature dimensions, and combine the number of correction dimensions with the first correction matrix data to generate the second correction matrix data.

[0038] Specifically, before inputting the first calibration matrix data into the vector feature model for vector feature extraction, it is necessary to obtain matrix data samples in advance. The matrix data samples include the first calibration matrix data formed by all past wafer calibration information and the vector features in the first calibration matrix data. Then, a vector feature model is created and trained based on the matrix data samples to obtain the trained vector feature model.

[0039] Specifically, the vector feature model is a pre-trained neural network model. A neural network (NN) is a complex network system formed by the extensive interconnection of a large number of simple processing units (called neurons). It reflects many fundamental characteristics of human brain function and is a highly complex nonlinear dynamic learning system. Neural networks possess large-scale parallelism, distributed storage and processing, self-organization, self-adaptation, and self-learning capabilities, making them particularly suitable for handling imprecise and fuzzy information processing problems that require simultaneous consideration of many factors and conditions. The development of neural networks is related to neuroscience, mathematical science, cognitive science, computer science, artificial intelligence, information science, cybernetics, robotics, microelectronics, psychology, optical computing, and molecular biology.

[0040] Specifically, the first correction matrix data is input into the vector feature model for vector feature extraction, and the position vector features and image vector features in the extracted wafer correction information are combined with the number of feature dimensions to obtain the second correction matrix data.

[0041] Step S13: Process the data contained in the second correction matrix data to obtain wafer correction data, and input the wafer correction data into the training algorithm model for data extrapolation to generate correction information for different image features placed at different positions on the wafer stage.

[0042] For the embodiments of this application, a bidirectional LSTM model is used as an example to illustrate the training algorithm model, including but not limited to the bidirectional LSTM model.

[0043] Specifically, the training algorithm model is constructed, and the main body of the model adopts a bidirectional LSTM as the trend inference model. The LSTM mainly consists of a forget gate, an input gate, and an output gate. Forgotten Gate: f t =σ(W f [h t-1 x t ]+b f ; Input Gate: After information filtering through the forget gate and input gate, the historical memories and current stage memories are merged, generating the following value: Output gate: Following the LSTM described above, another LSTM network layer is fed in reverse to obtain the BI-LSTM layer. Since several groups of buildings are trained together, a joint learning layer for building spatial features is added. The size of the association vector matrix is ​​initialized to M*V*K. The output vector of the last layer of the LSTM is taken, transposed, and multiplied by the association vector parameter matrix. Finally, the regression loss function is connected to complete the construction of the training algorithm model.

[0044] In the embodiments of this application, by using a bidirectional LSTM model to deduce wafer calibration data, other wafer calibration data not included in the wafer calibration data can be obtained. For example, the wafer calibration data does not contain wafer feature A, position B corresponding to feature A, and position C of the wafer calibration platform corresponding to position B. However, by using the wafer calibration data of A1 and A2 located on both sides of feature A, position B1 corresponding to A1, position B2 corresponding to A2, position C1 of the wafer calibration platform corresponding to position B1, and position C2 of the wafer calibration platform corresponding to position B2, the wafer calibration data of wafer feature A, position B, and position C can be deduced, thereby obtaining the adjustment data for the wafer.

[0045] Step S14: Obtain the current wafer information.

[0046] The current wafer information refers to the wafers that have not been placed on the wafer worktable after the polishing process.

[0047] Step S15: Perform image feature recognition on the current wafer information to obtain the current image features corresponding to the current wafer information and the current position information of the current image features after being placed on the wafer stage. Match the current image features and the current position information of the current image features after being placed on the wafer stage with different image features placed at different positions on the wafer stage to obtain the current correction information of the current wafer information.

[0048] Step S16: Generate a wafer calibration command based on the current calibration information, control the wafer mounting equipment to calibrate and adjust the wafer, and mount the adjusted wafer at a preset position.

[0049] Specifically, the wafer placement equipment is the placement chuck, which can be adjusted to arbitrarily change the relative position of the wafer to the wafer worktable before placement.

[0050] Based on the above embodiments, before wafer mounting, wafer calibration information within a historical time period is acquired. This wafer calibration information comprises the calibration information of wafers with different characteristics placed on the wafer stage after polishing. The wafer calibration information is analyzed to obtain image features corresponding to different positions on the bottom of different wafers and position calibration information of these image features at different positions on the wafer stage. Based on the position calibration information and image features, the wafer calibration information is processed without a time series to obtain first calibration matrix data. This first calibration matrix data is then input into a trained vector feature model for vector feature extraction to obtain the number of feature dimensions. The number of calibration dimensions is then combined with the first calibration matrix data to generate second calibration matrix data. The data contained in the second calibration matrix data is then processed to obtain wafer calibration data. This wafer calibration data is then input into a trained algorithm model for data extrapolation to generate different images. The system obtains correction information by placing features at different positions on the wafer stage, then acquires the current wafer information (wafer information after polishing but not yet placed on the wafer stage), performs image feature recognition on the current wafer information to obtain the current image features corresponding to the current wafer information and the current position information of the current image features after being placed on the wafer stage, and matches the current image features and their corresponding current position information with different image features placed at different positions on the wafer stage to obtain the current correction information of the current wafer information. Based on the current correction information, a wafer correction command is generated to control the wafer placement equipment to correct and adjust the wafer, and then place the adjusted wafer at a preset position. Before placing the wafer at the designated position, the wafer angle is adjusted so that after the wafer is placed at the designated position, there is no need to adjust the angle through the wafer ring, and the subsequent cutting steps can be performed directly, thereby achieving wafer cutting efficiency.

[0051] One possible implementation of this application involves analyzing wafer calibration information to obtain image features corresponding to different positions on the bottom of different wafers and position calibration information of different image features placed at different positions on the wafer stage, including: Multiple sets of calibration processing data are determined based on wafer calibration information, and labels are obtained for each set of calibration processing data to obtain the wafer number and the calibration integrity corresponding to the wafer number in each set of calibration processing data.

[0052] The calibration integrity is used to indicate whether the calibration processing data contains complete image features of different positions on the bottom of the wafer, wafer platform position information corresponding to the image features, and position calibration information corresponding to the wafer platform position. Based on the calibration integrity, it is determined whether the calibration processing data corresponding to the wafer number meets the calibration integrity standard. If it does not meet the standard, the calibration processing data corresponding to the wafer number is disassembled. If it meets the standard, the calibration processing data corresponding to the wafer number is extracted to obtain the image features corresponding to different positions on the bottom of different wafers and the position calibration information of different image features placed at different positions on the wafer stage.

[0053] One possible implementation of this application embodiment involves inputting the first correction matrix data into a trained vector feature model for vector feature extraction to obtain the number of feature dimensions, including: Based on the first correction matrix data, determine the wafer correction position, platform correction position, and correction image for each wafer correction process in the wafer correction information; The wafer correction position, the platform correction position, and the correction image features are respectively input into the vector feature model for vector feature extraction, resulting in a first position feature vector corresponding to the wafer correction position, a second position feature vector corresponding to the platform correction position, and an image feature vector corresponding to the correction image. The number of feature dimensions is obtained by counting the first position feature vector, the second position feature vector, and the image feature vector.

[0054] Specifically, the total number of eigenvectors of a matrix is ​​calculated as follows: number = n - rank of the eigenmatrix, number = nr(λE-A), where n is the order. Not every matrix can be diagonalized. If a matrix has distinct eigenvalues, it is always diagonalizable. The projections (coordinates) of eigenvectors onto the basis vectors are used; here, we assume the vector space is h-dimensional. Therefore, they can be directly represented as coordinate vectors. Using basis vectors, linear transformations can also be represented by a simple matrix multiplication.

[0055] One possible implementation of this application embodiment involves combining the number of correction dimensions with the first correction matrix data to generate second correction matrix data, including: The feature dimension count is integrated with the first correction matrix data to generate dimension matrix data.

[0056] Specifically, the number of feature dimensions is integrated with the first correction matrix data as a dimension. This application uses PyTorch technology as an example, including but not limited to one possible implementation method using PyTorch technology. The number of feature dimensions is added to the first correction matrix data as a dimension using the PyTorch command "out.unsqueeze(-1)", thus achieving dimension integration.

[0057] Specifically, PyTorch is an open-source Python machine learning library based on Torch, used for applications such as natural language processing. Primarily developed by Facebook's AI group, it not only achieves powerful GPU acceleration but also supports dynamic neural networks, a feature not supported by many mainstream frameworks like TensorFlow. PyTorch provides two advanced features: 1. Powerful GPU-accelerated tensor computation (similar to NumPy); 2. Deep neural networks with automatic differentiation systems. Besides Facebook, organizations such as Twitter, GMU, and Salesforce also use PyTorch.

[0058] The basic data distribution of the dimensional matrix data is explored to obtain the positional correspondence between the first and second positional feature vectors of the wafer in the wafer correction information, as well as the image feature vectors associated with the positional correspondence. Based on the positional correspondence and the image feature vectors, the dimensional matrix data is processed into a sequence data to obtain the point matrix data. Based on the point matrix data, the positional correspondence between the missing first and second positional feature vectors and the image feature vectors are evaluated to generate the second correction matrix data.

[0059] In one possible implementation of this application embodiment, data processing is performed on the data contained in the second correction matrix data to obtain wafer correction data, including: Calculate the normal distribution mean and normal distribution variance of the correction data contained in the second correction matrix data, and determine the 3σ range of the second correction matrix data based on the normal distribution mean and normal distribution variance; Determine whether the correction data is outside the 3σ range. If the correction data is outside the 3σ range, determine the first matrix sequence of the second correction matrix data in which the correction data is located. Calculate the sequence average based on the first matrix sequence. Replace the correction data with the sequence average to obtain the replaced second matrix sequence. Then, handle the missing values ​​in the second matrix sequence. The second matrix sequence in the second correction matrix data is normalized to obtain wafer correction data.

[0060] Specifically, the 3σ range is based on repeated measurements with equal precision following a normal distribution, where interference or noise from singular data makes it difficult to maintain a normal distribution. If the absolute value of the residual error νi of a measurement in a set of data is greater than 3σ, then that measurement is an outdated value and should be discarded. Errors equal to ±3σ are usually considered the limiting error. For normally distributed random errors, the probability of falling outside ±3σ is only 0.27%, which is very small in a finite number of measurements; hence, the 3σ criterion exists. The 3σ criterion is the most commonly used and simplest gross error criterion, generally applied when the number of measurements is sufficiently large (n≥30) or when a rough judgment is made when n>10.

[0061] Specifically, missing values ​​refer to data clustering, grouping, censoring, or truncation caused by missing information in the second matrix sequence. Handling missing values ​​generally involves two methods: deleting cases with missing values ​​and imputation. This application uses the deletion of cases with missing values ​​to process the second matrix sequence. Deletion of cases with missing values ​​mainly employs simple deletion and weighted methods. Simple deletion is the most basic method for handling missing values. It removes cases with missing values. If the data missing problem can be solved by simply deleting a small portion of the samples, this method is the most effective. When the missing values ​​are not completely random, bias can be reduced by weighting the complete data. After labeling incomplete cases, complete data cases are assigned different weights, which can be obtained using logistic or probit regression.

[0062] In one possible implementation of this application, it is determined whether the current wafer information will undergo secondary correction within a preset time period in the future. If it does, the actual correction data is determined based on the secondary correction data and the correction data in the current wafer information. Then, the correction data in the current wafer information is subjected to inverse normalization processing based on the actual correction data to restore the correction data in the current wafer information to the actual correction data.

[0063] Specifically, there are two forms of normalization methods: one is to transform numbers into decimals between (0, 1), and the other is to transform dimensional expressions into dimensionless expressions. These methods are primarily proposed for ease of data processing, mapping data to the range of 0 to 1 for more convenient and faster processing.

[0064] In one possible implementation of this application, it is determined whether secondary correction will occur in the current wafer information within a preset time period in the future. If it does, the actual correction data is determined based on the secondary correction data and the correction data in the current wafer information. The implementation further includes: The root mean square error of the calibration data is determined based on the actual calibration data and the calibration data in the current wafer information. The parameters in the epoch training model of the vector feature model are set according to the root mean square error, and the epoch training model is updated in reverse iteration to obtain the updated vector feature model and the validation set of each round in the vector feature model. The validation set is evaluated to generate the loss value and evaluation metrics for the validation set.

[0065] Specifically, when a complete dataset passes through a neural network once and returns once, this process is called one epoch of model training. An epoch refers to the process of feeding all the data into the network to complete one forward computation and backpropagation. Since an epoch is often too large for a computer to handle, we divide it into several smaller batches. During training, iterating through all the data once is insufficient; multiple iterations are needed to achieve convergence. In actual training, we divide all the data into several batches, feeding in a portion of the data each time. Gradient descent itself is an iterative process. The parameters in the epoch-trained model are set according to the root mean square error to obtain the validation set for each round in the vector feature model, i.e., the validation set.

[0066] Specifically, the computational evaluation of the validation set includes the following steps: The loss value is obtained by calculating the percentage of the validation set and the training set of the vector feature model. The evaluation index is obtained by comparing the loss value with the standard loss value table.

[0067] For example: the current loss value is 50%, and the 50% corresponding to the standard loss value table is a level 2 indicator.

[0068] The following describes a wafer misalignment correction device provided in an embodiment of this application. The wafer misalignment correction device described below can be referred to in conjunction with the wafer misalignment correction method described above. Figure 2 , Figure 2 This is a schematic diagram of the structure of a wafer deviation correction device 20 provided in an embodiment of this application, including: Information acquisition module 21 is used to acquire wafer calibration information within a historical time period. The wafer calibration information is the calibration information of wafers with different characteristics placed on the wafer worktable after the polishing process. The information analysis module 22 is used to analyze the wafer calibration information, obtain the image features corresponding to different positions on the bottom of different wafers and the position calibration information of different image features placed at different positions on the wafer stage, and perform time-series-free processing on the wafer calibration information based on the position calibration information and image features to obtain the first calibration matrix data. The vector extraction module 23 is used to input the first correction matrix data into the trained vector feature model to extract vector features, obtain the number of feature dimensions, and combine the number of correction dimensions with the first correction matrix data to generate the second correction matrix data. Data processing module 24 is used to process the data contained in the second correction matrix data to obtain wafer correction data, and input the wafer correction data into the training algorithm model for data deduction to generate correction information for different image features placed at different positions on the wafer worktable; The wafer acquisition module 25 is used to acquire the current wafer information, which is the information of the wafer that has not been placed on the wafer worktable after the polishing process. Image recognition module 26 is used to perform image feature recognition on the current wafer information, obtain the current image feature corresponding to the current wafer information and the current position information of the current image feature after it is placed on the wafer worktable, and match the current image feature and the current position information of the current image feature after it is placed on the wafer worktable with different image features placed at different positions on the wafer worktable to obtain the current correction information of the current wafer information. The wafer pre-calibration module 27 is used to generate wafer calibration instructions based on the current calibration information, control the wafer placement equipment to calibrate and adjust the wafer, and place the adjusted wafer in the preset position.

[0069] In one possible implementation of this application embodiment, when the information analysis module 22 analyzes the wafer calibration information to obtain image features corresponding to different positions on the bottom of different wafers and position calibration information of different image features placed at different positions on the wafer stage, it is specifically used for: Based on wafer calibration information, multiple sets of calibration processing data are determined, and labels are obtained for each set of calibration processing data to obtain the wafer number and the calibration completeness corresponding to the wafer number in each set of calibration processing data. The calibration completeness is used to indicate whether the calibration processing data contains complete image features of different positions on the bottom of the wafer, wafer platform position information corresponding to the image features, and position calibration information corresponding to the wafer platform position. Based on the calibration integrity, determine whether the calibration processing data corresponding to the wafer number meets the calibration integrity standard. If it does not meet the standard, the calibration processing data corresponding to the wafer number will be disassembled. If it meets the standard, the calibration processing data corresponding to the wafer number will be extracted to obtain the image features corresponding to different positions on the bottom of different wafers in the wafer calibration information, as well as the position calibration information of different image features placed at different positions on the wafer stage.

[0070] In another possible implementation of this application embodiment, when the vector extraction module 23 inputs the first correction matrix data into the trained vector feature model for vector feature extraction to obtain the feature dimension number, it is specifically used for: Based on the first correction matrix data, determine the wafer correction position, platform correction position, and correction image for each wafer correction process in the wafer correction information; The wafer correction position, the platform correction position, and the correction image features are respectively input into the vector feature model for vector feature extraction, resulting in a first position feature vector corresponding to the wafer correction position, a second position feature vector corresponding to the platform correction position, and an image feature vector corresponding to the correction image. The number of feature dimensions is obtained by counting the first position feature vector, the second position feature vector, and the image feature vector.

[0071] In another possible implementation of this application embodiment, when the vector extraction module 23 combines the number of correction dimensions with the first correction matrix data to generate the second correction matrix data, it is specifically used for: The number of feature dimensions is integrated with the first correction matrix data to generate dimension matrix data; By performing basic data distribution exploration on the dimension matrix data, the positional correspondence between the first and second positional feature vectors of the wafer in the wafer correction information, as well as the image feature vectors associated with the positional correspondence, are obtained. Based on the positional correspondence and image feature vectors, the dimensional matrix data is processed into a sequence data to obtain the point matrix data; based on the point matrix data, the positional correspondence between the missing first and second position feature vectors and the image feature vectors are evaluated to generate the second correction matrix data.

[0072] In another possible implementation of this application embodiment, when the data processing module 24 processes the data contained in the second correction matrix data to obtain wafer correction data, it is specifically used for: Calculate the normal distribution mean and normal distribution variance of the correction data contained in the second correction matrix data, and determine the 3σ range of the second correction matrix data based on the normal distribution mean and normal distribution variance; Determine whether the correction data is outside the 3σ range. If the correction data is outside the 3σ range, determine the first matrix sequence of the second correction matrix data in which the correction data is located. Calculate the sequence average based on the first matrix sequence. Replace the correction data with the sequence average to obtain the replaced second matrix sequence. Then, handle the missing values ​​in the second matrix sequence. The second matrix sequence in the second correction matrix data is normalized to obtain wafer correction data.

[0073] In another possible implementation of this application embodiment, the device 20 further includes: a data correction module, wherein the data correction module is used to determine whether the current wafer information will undergo secondary correction within a future preset time period. If it does, the actual correction data is determined based on the secondary correction data and the correction data in the current wafer information, and the correction data in the current wafer information is inversely normalized based on the actual correction data to restore the correction data in the current wafer information to the actual correction data.

[0074] In another possible implementation of this application embodiment, the device 20 further includes: an error determination module, an iterative update module, and a calculation and evaluation module, wherein the error determination module is used to determine the root mean square error of the correction data based on the actual correction data and the correction data in the current wafer information; The iterative update module is used to set the parameters in the epoch training model of the vector feature model according to the root mean square error, and to perform reverse iterative update on the set epoch training model to obtain the updated vector feature model and the validation set of each round in the vector feature model. The evaluation calculation module is used to calculate and evaluate the validation set, generating the loss value and evaluation metrics for the validation set.

[0075] The following describes an electronic device provided by an embodiment of this application. The electronic device described below can be referred to in correspondence with the wafer deviation correction method described above.

[0076] This application provides an electronic device, such as... Figure 3 As shown, Figure 3 This is a schematic diagram of the structure of an electronic device provided in an embodiment of this application. Figure 3 The illustrated electronic device 300 includes a processor 301 and a memory 303. The processor 301 and the memory 303 are connected, for example, via a bus 302. Optionally, the electronic device 300 may also include a transceiver 304. It should be noted that in practical applications, the transceiver 304 is not limited to one type, and the structure of this electronic device 300 does not constitute a limitation on the embodiments of this application.

[0077] Processor 301 may be a CPU (Central Processing Unit), a general-purpose processor, a DSP (Digital Signal Processor), an ASIC (Application Specific Integrated Circuit), a FPGA (Field Programmable Gate Array), or other programmable logic devices, transistor logic devices, hardware components, or any combination thereof. It can implement or execute the various exemplary logic blocks, modules, and circuits described in connection with the embodiments of this application. Processor 301 may also be a combination that implements computing functions, such as including one or more microprocessor combinations, a combination of a DSP and a microprocessor, etc.

[0078] Bus 302 may include a pathway for transmitting information between the aforementioned components. Bus 302 may be a PCI (Peripheral Component Interconnect) bus or an EISA (Extended Industry Standard Architecture) bus, etc. Bus 302 can be divided into address bus, data bus, control bus, etc. For ease of representation, Figure 3 The bus is represented by a single thick line, but this does not mean that there is only one bus or one type of bus.

[0079] The memory 303 may be a ROM (Read-Only Memory) or other type of static storage device capable of storing static information and instructions, RAM (Random Access Memory) or other type of dynamic storage device capable of storing information and instructions, or it may be an EEPROM (Electrically Erasable Programmable Read-Only Memory), a CD-ROM (Compact Disc Read-Only Memory) or other optical disc storage, optical disc storage (including compressed optical discs, laser discs, optical discs, digital universal optical discs, Blu-ray discs, etc.), magnetic disk storage media or other magnetic storage devices, or any other medium capable of carrying or storing desired program code in the form of instructions or data structures and accessible by a computer, but not limited thereto.

[0080] The memory 303 is used to store application code that executes the scheme of the embodiments of this application, and its execution is controlled by the processor 301. The processor 301 is used to execute the application code stored in the memory 303 to implement the content shown in the foregoing method embodiments.

[0081] Among them, electronic devices include, but are not limited to: mobile terminals such as mobile phones, laptops, digital radio receivers, PDAs (personal digital assistants), PADs (tablet computers), PMPs (portable multimedia players), and in-vehicle terminals (such as in-vehicle navigation terminals), as well as fixed terminals such as digital TVs and desktop computers. Figure 3 The electronic device shown is merely an example and should not impose any limitation on the functionality and scope of use of the embodiments of this application.

[0082] The following describes a computer-readable storage medium provided by an embodiment of this application. The computer-readable storage medium described below can be referred to in correspondence with the method described above.

[0083] This application provides a computer-readable storage medium storing a computer program, which, when executed by a processor, implements the steps of the wafer deviation correction method described above.

[0084] Since the embodiments of the computer-readable storage medium portion correspond to the embodiments of the method portion, please refer to the description of the embodiments of the method portion for the embodiments of the computer-readable storage medium portion.

[0085] It should be understood that although the steps in the flowcharts of the accompanying figures are shown sequentially as indicated by the arrows, these steps are not necessarily executed in the order indicated by the arrows. Unless explicitly stated herein, there is no strict order restriction on the execution of these steps, and they can be executed in other orders. Moreover, at least some steps in the flowcharts of the accompanying figures may include multiple sub-steps or multiple stages. These sub-steps or stages are not necessarily completed at the same time, but can be executed at different times, and their execution order is not necessarily sequential, but can be performed alternately or in turn with other steps or at least some of the sub-steps or stages of other steps.

[0086] The above are only some embodiments of this application. It should be noted that for those skilled in the art, several improvements and modifications can be made without departing from the principle of this application, and these improvements and modifications should also be considered within the scope of protection of this application.

Claims

1. A wafer deviation correction method, characterized in that, include: Obtain wafer calibration information within a historical time period. The wafer calibration information is the calibration information of wafers with different characteristics placed on the wafer worktable after the polishing process. The wafer calibration information is analyzed to obtain image features corresponding to different positions on the bottom of different wafers and position calibration information of different image features placed at different positions on the wafer stage. Based on the position calibration information and the image features, the wafer calibration information is processed without time series to obtain the first calibration matrix data. The first correction matrix data is input into the trained vector feature model to extract vector features, thereby obtaining the number of feature dimensions. The number of feature dimensions is then combined with the first correction matrix data to generate the second correction matrix data. The number of feature dimensions is integrated with the first correction matrix data to generate dimension matrix data; Data distribution exploration is performed on the dimensional matrix data to obtain the positional correspondence between the first position feature vector and the second position feature vector of the wafer in the wafer correction information, as well as the image feature vector associated with the positional correspondence. Based on the location correspondence and the image feature vector, the dimensional matrix data is processed into a sequence data to obtain the point matrix data; Based on the point matrix data, the positional correspondence between the missing first position feature vector and the second position feature vector, as well as the image feature vector, are evaluated to generate second correction matrix data; The data contained in the second correction matrix data are processed to obtain wafer correction data, and the wafer correction data is input into the training algorithm model for data deduction to generate correction information for different image features placed at different positions on the wafer stage; Obtain current wafer information, which refers to wafers that have not been placed on the wafer stage after the polishing process; Image feature recognition is performed on the current wafer information to obtain the current image feature corresponding to the current wafer information and the current position information of the current image feature after it is placed on the wafer stage. The current image feature and the current position information of the current image feature after it is placed on the wafer stage are matched with different image features placed at different positions on the wafer stage to obtain the current correction information of the current wafer information. Based on the current calibration information, a wafer calibration command is generated to control the wafer mounting equipment to calibrate and adjust the wafer, and then mount the adjusted wafer in a preset position.

2. The wafer deviation correction method according to claim 1, characterized in that, The analysis of the wafer calibration information yields image features corresponding to different positions on the bottom of different wafers and position calibration information of different image features placed at different positions on the wafer stage, including: Based on the wafer calibration information, multiple sets of calibration processing data are determined, and labels are obtained for each set of calibration processing data to obtain the wafer number in each set of calibration processing data and the calibration completeness corresponding to the wafer number. The calibration completeness is used to indicate whether the calibration processing data contains complete image features of different positions on the bottom of the wafer, wafer platform position information corresponding to the image features, and position calibration information corresponding to the wafer platform position. Based on the stated correction integrity, it is determined whether the correction processing data corresponding to the wafer number meets the correction integrity standard. If it does not meet the standard, the correction processing data corresponding to the wafer number is disassembled. If it meets the standard, the correction processing data corresponding to the wafer number is extracted to obtain the image features corresponding to different positions on the bottom of different wafers in the wafer correction information, as well as the position correction information of different image features placed at different positions on the wafer stage.

3. The wafer deviation correction method according to claim 2, characterized in that, The first correction matrix data is input into the trained vector feature model for vector feature extraction to obtain the number of feature dimensions, including: Based on the first correction matrix data, determine the wafer correction position, platform correction position, and correction image for each wafer correction process in the wafer correction information; The wafer correction position, platform correction position, and correction image features are respectively input into the vector feature model for vector feature extraction to obtain a first position feature vector corresponding to the wafer correction position, a second position feature vector corresponding to the platform correction position, and an image feature vector corresponding to the correction image; The number of feature dimensions is obtained by counting the first position feature vector, the second position feature vector, and the image feature vector.

4. The wafer deviation correction method according to claim 1, characterized in that, The step of processing the data contained in the second correction matrix data to obtain wafer correction data includes: Calculate the normal distribution mean and normal distribution variance of the correction data contained in the second correction matrix data, and determine the 3σ range of the second correction matrix data based on the normal distribution mean and normal distribution variance; Determine whether the correction data is outside the 3σ range. If the correction data is outside the 3σ range, determine the first matrix sequence of the second correction matrix data in which the correction data is located. Calculate the sequence average value based on the first matrix sequence. Replace the correction data with the sequence average value to obtain the replaced second matrix sequence. Then, process the missing values ​​in the second matrix sequence. The second matrix sequence in the second correction matrix data is normalized to obtain wafer correction data.

5. The wafer deviation correction method according to claim 1, characterized in that, The method further includes: It is determined whether the current wafer information will undergo secondary correction within a preset time period in the future. If it does, the actual correction data is determined based on the secondary correction data and the correction data in the current wafer information. Based on the actual correction data, the correction data in the current wafer information is inversely normalized to restore the correction data in the current wafer information to the actual correction data.

6. The wafer deviation correction method according to claim 5, characterized in that, The step of determining whether the current wafer information will undergo secondary correction within a preset time period, and if so, determining the actual correction data based on the secondary correction data and the correction data in the current wafer information, further includes: The root mean square error of the correction data is determined based on the actual correction data and the correction data in the current wafer information. The epoch parameter in the vector feature model is set according to the root mean square error, and the set epoch parameter is updated in reverse iteration to obtain the updated vector feature model and the validation set of each round in the vector feature model. The validation set is evaluated to generate the loss value and evaluation index for the validation set.

7. A wafer deviation correction device, characterized in that, include: The information acquisition module is used to acquire wafer calibration information within a historical time period. The wafer calibration information is the calibration information of wafers with different wafer characteristics placed on the wafer worktable after the polishing process. The information analysis module is used to analyze the wafer calibration information to obtain image features corresponding to different positions on the bottom of different wafers and position calibration information of different image features placed at different positions on the wafer stage. Based on the position calibration information and the image features, the wafer calibration information is processed without time series to obtain the first calibration matrix data. The vector extraction module is used to input the first correction matrix data into the trained vector feature model to extract vector features, obtain the number of feature dimensions, and combine the number of correction dimensions with the first correction matrix data to generate the second correction matrix data. When the vector extraction module combines the number of correction dimensions with the first correction matrix data to generate the second correction matrix data, it is specifically used for: The number of feature dimensions is integrated with the first correction matrix data to generate dimension matrix data; By performing basic data distribution exploration on the dimensional matrix data, the positional correspondence between the first position feature vector and the second position feature vector of the wafer in the wafer correction information, as well as the image feature vector associated with the positional correspondence, are obtained. Based on the location correspondence and the image feature vector, the dimensional matrix data is processed into a sequence data to obtain the point matrix data; Based on the point matrix data, the positional correspondence between the missing first position feature vector and the second position feature vector, as well as the image feature vector, are evaluated to generate second correction matrix data; The data processing module is used to process the data contained in the second correction matrix data to obtain wafer correction data, and input the wafer correction data into the training algorithm model for data inference to generate correction information for different image features placed at different positions on the wafer stage. The wafer acquisition module is used to acquire current wafer information, which is the information of wafers that have not been placed on the wafer worktable after the polishing process. The image recognition module is used to perform image feature recognition on the current wafer information to obtain the current image features corresponding to the current wafer information and the current position information of the current image features after being placed on the wafer stage. The current image features and the current position information of the current image features after being placed on the wafer stage are matched with different image features placed at different positions on the wafer stage to obtain the current correction information of the current wafer information. The wafer pre-calibration module is used to generate a wafer calibration command based on the current calibration information, control the wafer placement equipment to calibrate and adjust the wafer, and place the adjusted wafer in a preset position.

8. An electronic device, characterized in that, include: At least one processor; Memory; At least one application, wherein the at least one application is stored in memory and configured to be executed by at least one processor, said at least one application being configured to: perform a wafer misalignment correction method according to any one of claims 1 to 6.

9. A computer-readable storage medium, characterized in that, The computer program is stored and can be loaded by a processor and executed as described in any one of claims 1 to 6.

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