A small current surge suppressor ceramic packaging method and its packaging structure

Abstract

A small current surge suppressor ceramic packaging method and its packaging structure belong to the technical field of semiconductor device packaging. Different flat bottom pits are designed on the multilayer ceramic base of the packaging shell, the functional area and the heat sink area are integrated in different flat bottom pits, and the metallization layer is made in the chip welding area, the wire bonding area and the bottom pin area; the electrical connection between the multilayer ceramics is realized by using metal through holes; the chip welding area adopts sinking design, the heat sink area penetrates the ceramic base body and is used for installing metal heat sink, the functional area is higher than the top surface of the heat sink, and the height difference is formed with the wire bonding area; according to the circuit design requirements, the chip is assembled in the set area, and the inner wire bonding is carried out; the metal cover plate of the packaging shell and the annular frame of the ceramic base are sealed and welded. The problems of low reliability, large occupied area, complex and complicated circuit, poor heat dissipation design and the like in the prior art are solved. It is widely used in various high reliability aerospace, aviation, automobile electronics and the like.

Description

Technical Field

[0001] This invention belongs to the field of semiconductor component packaging technology, and more specifically to the field of surface mount ceramic packaging technology. In particular, it relates to a ceramic packaging method and packaging structure for a small current surge suppressor. Background Technology

[0002] The ceramic surface mount package of the low current surge suppressor (hereinafter referred to as the device) is a ceramic surface mount package designed for a low current surge suppressor device. A surge suppressor is an electronic device that provides safety protection for various electronic devices, instruments, and communication lines. When a surge current or voltage spike is suddenly generated in an electrical circuit or communication line due to external interference, the surge suppressor can divide the voltage in a very short time, thereby avoiding damage to other devices in the electrical circuit from the external surge.

[0003] The low-current surge suppressor is a product developed for low-current operating applications such as microcontrollers and voltage regulators. For low-current surge suppression circuits, corresponding low-current surge suppressor devices need to be designed to match the functions of the low-current surge suppressor devices and to be able to be used normally in various environments.

[0004] For low-current surge suppressors used to protect downstream circuits by suppressing surges during low-current applications, the ceramic packages commonly found in current surge suppressors are designed for high-current applications. These packages are bulky and unsuitable for low-current applications. Currently, low-current surge suppressors are implemented using discrete components to build their own circuits, without any readily available packaging technologies. This results in problems such as low reliability, large footprint, complex circuitry, and poor heat dissipation design.

[0005] In view of this, the present invention is hereby proposed. Summary of the Invention

[0006] The technical problem to be solved by this invention is to address the requirements of rapid chip heat dissipation, high integration, low leakage current, low input and output impedance, miniaturization, high reliability, and high hermeticity in the packaging technology of small current surge suppressors.

[0007] The inventive concept of this invention is as follows: Utilizing the excellent electrical insulation and high mechanical strength inherent in ceramic materials, different flat-bottomed recesses are designed on the multi-layer ceramic base of the package shell. The signal control area (also known as the functional area) and the power chip working area (also known as the heat sink area) are integrated within different flat-bottomed recesses, ensuring physical isolation between the functional area and the heat sink area. Metallization layers are fabricated in the chip soldering area, wire bonding area, and bottom pin area. Metal vias are used to achieve electrical connection of the ceramic intermediate layer and connection of each pin on the bottom of the ceramic to the corresponding soldering and bonding area metallization layers. The chip soldering area adopts a recessed design, and the heat sink area penetrates through the ceramic base body for mounting the metal heat sink. The functional area is higher than the top surface of the heat sink, creating a height difference with the wire bonding area. This increases the safety distance for electrical insulation in the longitudinal direction, increases the usable area of ​​the lateral solder pads, and prevents the bonding wire arch from being too high and affecting the cap, or too low and affecting the electrical connection. This ensures a safety distance for electrical insulation while reducing the package size of similar power products and shrinking the installation area. The control and power operation lines do not interfere with each other, achieving integrated packaging requirements such as power die heat dissipation, high integration, bottom insulation of the housing, and low input and output impedance.

[0008] Therefore, the present invention provides a ceramic packaging method for a small current surge suppressor, such as... Figure 2-9 As shown. The method is as follows: (1) Alumina and organic binder are mixed and ground into a slurry, which is then cast, sliced, and sintered to form alumina ceramic green ceramic sheets; (2) Multiple through holes are processed on multiple ceramic green ceramic sheets by means of laser drilling or mechanical punching; (3) The tungsten metallization paste is injected into the through hole through a mask to fill the through hole and form an interlayer through hole to achieve conductive interconnection in the vertical direction. Then, the welding area and the electrical connection line of the intermediate layer are printed on the surface of the green ceramic sheet after the through hole is filled by screen printing process. (4) Stack the multiple raw ceramic pieces processed in step (3) together, with all the through holes of the raw ceramic pieces corresponding to each other and compacted to form a raw ceramic composite body with interconnected layers. (5) The internal cavity is processed on the green ceramic sheet by laser cutting or mechanical stamping. The metal heat sink installation position of the heat sink area is cut through the ceramic base body according to the heat sink size. The functional area position is cut into a flat-bottomed recess of a set depth according to the set size. (6) Use a dicing machine to cut the above-stacked green ceramic composite into individual ceramic bodies for high-temperature sintering; (7) Make a metal sealing ring according to the set ceramic package opening size, and make a high-power heat dissipation external electrode and a metal lead electrode according to the set ceramic package bottom electrode size; (8) The metal sealing ring and the ceramic base are airtightly welded together with alloy solder, and the pin electrode sheet and the base are airtightly welded together with alloy solder. (9) Electroplating nickel and gold metal layers sequentially on the chip soldering area, wire bonding area and metal sealing ring; (10) Perform chip assembly and wire bonding according to circuit connection requirements; (11) Perform airtight welding between the cover plate and the ceramic base after chip assembly and wire bonding.

[0009] The packaging structure of the ceramic packaging method for a small current surge suppressor is as follows: Figure 2-9 As shown. Includes: 1. Ceramic base body; 2. Circular frame; 3. Circular frame metallization layer; 4. Sealing ring; 5. Sealing ring metallization layer; 6. Cavity; 7. Power area (heat sink area); 8. Base top surface; 9. Control area (functional area); 10. Heat sink; 11. Metal through hole; 12. Inner cavity metallization layer; 13. Heat dissipation electrode sheet welding metallization layer; 14. Heat dissipation electrode sheet; 15. Pin electrode sheet welding metallization layer; 16. Pin electrode sheet; 17. Cover plate.

[0010] The inner cavity metallization layer 12 includes a chip welding area, a bonding area, and a transmission line (i.e., a conductive strip). The chip welding area, bonding area, and transmission line (i.e., a conductive strip) are fabricated in the areas defined in the power area (heat sink area) 7, the top surface of the base 8, and the control area (functional area) 9.

[0011] The sealing ring 4 is located at the top of the annular frame 2 of the ceramic base body 1 and is connected to the annular frame 2 through the annular frame metallization layer 3.

[0012] The ceramic base body 1 is a multi-layer ceramic co-fired body. Each ceramic layer has metal through holes 11 and interconnecting lines. The layers are electrically connected to each other through the metal through holes 11 and interconnecting lines according to the set lines.

[0013] The ceramic base body 1 has a heat dissipation electrode 14 on its bottom surface and one or more pin electrode pieces with a metallization layer 15. The heat dissipation electrode 14 is connected to the through-type metal heat sink 10 through the heat dissipation electrode piece metallization layer 13. The pin electrode pieces 16 are connected to the corresponding ports in the inner cavity assembly area through the pin electrode piece metallization layer 15 and the metal through hole 11.

[0014] The ceramic base body 1 includes a raised annular frame 2 and an assembly area below the bottom of the annular frame. The assembly area includes a through-type metal heat sink 10, a chip soldering area, a bonding area, and transmission lines.

[0015] The chip soldering area is fabricated in flat-bottomed recessed areas of varying depths.

[0016] A through-type metal heat sink 10 vertically penetrates the ceramic base body 1. The inner surface of the metal heat sink 5 is made with an inner cavity metal layer, which integrates power devices (chips). The outer surface of the metal heat sink 10 is connected to the heat dissipation electrode 14 by welding a metallization layer 13 to the heat dissipation electrode 14.

[0017] The corresponding components within the assembly area are connected to the bonding area via bonding wires.

[0018] The cover plate 17 is located on the sealing ring 4 and is sealed to the sealing ring 4 through the metallized layer 5 of the sealing ring to form an airtight encapsulation cavity 6.

[0019] The inner cavity metallization layer 12 is composed of an inner cavity metallization layer surface metal layer 1201, an inner cavity metallization layer middle metal layer 1202, and an inner cavity metallization layer bottom metal layer 1203.

[0020] The surface metal layer 1201 is pure gold, the intermediate metal layer 1202 is nickel, nickel-cobalt, or nickel-phosphorus, and the bottom metal layer 1203 is tungsten or molybdenum-manganese. The surface gold metal layer and the intermediate nickel, nickel-cobalt, or nickel-phosphorus metal layer are plated using electroplating. For the bottom tungsten or molybdenum-manganese metal layer, a tungsten or molybdenum-manganese paste is first printed onto the ceramic substrate and then cured.

[0021] The outer layers of the heat dissipation electrode 14 and the lead electrode 16 are, in sequence, a buffer metal layer and a surface metal layer.

[0022] Technical effects of the invention: (1) Packaging and heat dissipation design The power die working area in the limiting circuit adopts a ceramic recess design. The heat sink material's external electrode is made of Mo70Cu30 metal electrode sheet, which is welded and sealed to the ceramic bottom. The heat sink material runs through the ceramic shell, achieving internal and external electrical connection. The material of the external electrode sheet ensures both a similar coefficient of thermal expansion to the chip and good thermal conductivity, resulting in higher component reliability. The power die in the limiting working area dissipates heat directly to the outside through the metal electrode sheet, resulting in a short heat dissipation channel and low thermal resistance. This helps dissipate heat from heat-generating components and prevents the chip from overheating during surge operation, which could lead to malfunction of the entire device. This invention integrates the signal control area and the limiting circuit working area into a single ceramic cavity, located in different recesses. This ensures that the signal control terminal and the limiting working terminal traces do not interfere with each other, achieving physical isolation between the control area and the limiting working area.

[0023] (2) High packaging integration The low-current surge suppressor uses a leadless SMD ceramic surface mount package, employing an analog circuit design control unit to integrate multiple chips into a single unit with a form factor of only 5×6mm. 2The SO-8 package offers a significant improvement in power density compared to similar products, meeting the requirements for miniaturization, lightweight design, and high reliability in electronic products. The package features high power density, high reliability, and high conversion efficiency. The components include a ceramic housing and metal assemblies, which are precisely calculated and designed to optimize the entire product.

[0024] (3) High insulation of the packaging structure The ceramic components are made of 95% black alumina ceramic material, which has excellent insulation properties. The spacing between adjacent metallization layers of the ceramic components is designed to ensure no interconnection, and the insulation resistance between leads reaches 1×10⁻⁶. 10 Ω, can withstand DC voltage of 500V between adjacent pads.

[0025] (4) Low input / output path resistance By considering the operating state of the low-current surge suppressor, the impedance between the pads and pins of the ceramic component with electrical connections is controlled within an acceptable range to ensure the optimization of various electrical parameters when the low-current surge suppressor is working and to avoid adverse effects caused by the ceramic package.

[0026] The path resistance is the input / output transmission line resistance. The transmission line includes the ceramic inner surface metal layer, ceramic vias, and intermediate layer connecting lines. The transmission line electrically connects the various metallized solder areas according to the circuit diagram. Based on the operating characteristics of the low-current surge suppressor, the path resistance of the main power output pin is designed to be less than 5mΩ to avoid output voltage loss. The main circuit path resistance of the power chip output is designed to be less than 15mΩ, allowing for an output current of up to 5A. The output path resistance of the signal control area is less than 30mΩ.

[0027] (5) Air tightness The ceramic shell of the component is designed with a fixed sealing ring at the top. The sealing ring and the cover plate are sealed by parallel sealing welding, which provides good airtightness, strong resistance to salt spray and thermal shock, and minimal impact of environmental factors on electrical performance.

[0028] Therefore, the low-current surge suppressor of this invention features an excellent thermal matching design and good sealing performance in its package structure. It can be used with inductive and capacitive loads, suppressing voltage spikes and high-voltage power surges in the circuit, keeping the output voltage within the normal operating voltage range. It also boasts excellent insulation performance, superior electrical performance, rapid heat dissipation, high reliability, high integration, light weight, strong versatility, high mechanical strength, excellent sealing performance, and resistance to salt spray and thermal shock.

[0029] This invention can be widely used in various high-reliability aerospace, aviation, automotive electronics and other fields. It has good mechanical strength, sealing performance, salt spray resistance, thermal shock resistance and other properties, and can be used with inductive and capacitive loads, with broad market prospects. Attached Figure Description

[0030] Figure 1 This is a schematic diagram of the electrical principle of a small current surge suppressor.

[0031] Figure 2 This is a schematic diagram of the longitudinal structure of the internal cavity of the encapsulation structure.

[0032] Figure 3 This is a schematic diagram of the planar structure of the inner cavity of the encapsulation structure.

[0033] Figure 4 This is a schematic diagram of the bottom surface of the outer cavity of the encapsulation structure.

[0034] Figure 5 This is a schematic diagram of the cross-sectional structure of the encapsulation structure AA.

[0035] Figure 6 This is a partially enlarged schematic diagram of the cross-sectional structure of the AA package.

[0036] Figure 7 This is a schematic diagram of the A'-A' cross-sectional structure of the encapsulation structure.

[0037] Figure 8 This is a schematic diagram of the metal layer structure of the chip's soldering area, bonding area, and transmission line.

[0038] Figure 9 This is a schematic diagram of the sealing ring and the outer electrode metal layer structure.

[0039] In the diagram: 1 is the ceramic base body, 2 is the annular frame, 3 is the metallized layer of the annular frame, 4 is the sealing ring, 5 is the metallized layer of the sealing ring, 6 is the cavity, 7 is the power area (heat sink area), 8 is the top surface of the base, 9 is the control area (functional area), 10 is the heat sink, 11 is the metal through hole, 12 is the inner cavity metallized layer, 1201 is the surface metal layer of the inner cavity metallized layer, 1202 is the middle metal layer of the inner cavity metallized layer, 1203 is the bottom metal layer of the inner cavity metallized layer, 13 is the metallized layer for welding the heat dissipation electrode, 14 is the heat dissipation electrode, 15 is the metallized layer for welding the pin electrode, 16 is the pin electrode, and 17 is the cover plate. Implementation

[0040] like Figure 2-9 As shown, the ceramic packaging method and packaging structure for a small current surge suppressor are described. Figure 1 Taking the fabrication method of the small current surge suppressor shown as an example, a 5mm×6mm SO-8 class package is used. The package design must meet the following basic operating conditions: (1) Meets the heat dissipation requirements of the power transistor in the limiting circuit; (2) Highly integrated within a 5mm × 6mm SO-8 package size; (3) Meets the insulation requirements of the encapsulation shell; (4) Meets low impedance input and output requirements; (5) Packaging airtightness requirements.

[0041] The specific implementation method is as follows: The ceramic material is 95% alumina black porcelain. The metal sealing ring and the pin electrode sheet are made of 4J29 Kovar alloy.

[0042] The metal heat sink material is Mo70Cu30.

[0043] Specific implementation methods

[0044] (1) Preparation of alumina ceramic raw ceramic pieces; (2) Through holes and metal heat sink mounting holes are processed on multiple ceramic green ceramic sheets by laser drilling or mechanical punching. The diameter of the through holes is 0.2 mm. (3) The metal paste is injected into the through hole through a mask to fill the through hole and form an interlayer through hole. Then, a screen with a metallized area pattern is used to print a 5μm to 30μm thick metal paste on the surface of the green ceramic sheet after the through hole is filled. (4) Stack together multiple raw ceramic pieces after processing (3). The total thickness of the ceramic body is 1 mm. All the through holes of the raw ceramic pieces correspond to each other and are compacted to form a raw ceramic component with interconnected functional layers. (5) Use a dicing machine to cut the above-mentioned stacked and compacted green ceramic components into individual ceramic green bodies from their upper surface. Use laser cutting or mechanical punching to process the internal cavity on the green ceramic sheet: the cutting depth of the functional area chip welding area is 0.4mm, the cutting depth of the bonding area is 0.2mm, and the welding position of the limiting circuit chip (high power chip) is directly cut to form the mounting hole of the high power electrode sheet (metal heat sink) with a size of 8.2mm*6.7mm. Then, the multiple ceramic green bodies after cutting are sintered at high temperature in a nitrogen-hydrogen mixed atmosphere sintering furnace to form a ceramic base with high mechanical strength, excellent electrical and chemical properties, and a specified shape. (6) Fabricate a metal sealing ring, lead electrode sheet (3.63mm*4.40mm), and metal heat sink according to the dimensions of the ceramic base opening (ceramic annular cavity dimensions); then anneal in a protective atmosphere to eliminate stress and hardening of the metal sealing ring and lead electrode sheet during processing; in order to ensure that the solder used in the welding process between the ceramic base and the metal sealing ring has good wetting and spreading effect on the metallization layer, so as to improve the connection between the metals, deposit a layer of nickel with a thickness of 1.0μm to 3.0μm at the location of the metal sealing ring and the electrode sheet. The deposited nickel improves the surface condition of the tungsten or molybdenum-manganese metal to increase the welding strength; (7) Under specific heating, holding and cooling curves in air or protective atmosphere, use alloy solder to achieve airtight welding of metal sealing ring, high-power heat dissipation external electrode Mo70Cu30, lead electrode 4J29 and ceramic base. (8) A nickel layer with a thickness of 1.3 μm to 8.9 μm is deposited on the metallized soldering area, transmission lines, and metal sealing ring of the ceramic base. A gold layer with a thickness of 0.64 μm to 5.7 μm is plated on the inner cavity of the ceramic, and a gold layer with a thickness of 1.3 μm to 5.7 μm is plated on the remaining metallized areas. The upper surface layer is gold and the bottom layer is nickel, which can meet the needs of subsequent eutectic welding, solder welding, aluminum wire bonding, gold wire bonding, and surface protection. The gold layer improves the conductivity and oxidation resistance of the package shell, prevents corrosion from the natural environment, and also improves the welding strength and bonding strength between the chip or component and the ceramic base.

[0045] II. Specific Packaging Structure The ceramic base is an open inner cavity 6, measuring 5mm × 6mm. Its bottom features a chip bonding area 7 and 9, and five inner wire bonding areas 12. The inner cavity 6 is designed with bonding areas for securing the die and transmission lines that collectively ensure circuit integrity. The bottom surface of the ceramic base includes one heat dissipation electrode 14 and four lead electrode plates 16.

[0046] In the limiting circuit, the power chip's heat dissipation external electrode area adopts a sunken design. The heat dissipation electrode plate 14 and the metal heat sink 10 are made of the same material, Mo70Cu30, forming a boss-shaped structure to increase the chip's heat dissipation area. Functional area 9 is the control circuit chip soldering area, which also adopts a sunken design for chip assembly positioning and short-distance bonding.

[0047] The inner cavity metallization layer is composed of multiple layers of metal materials. The surface material is metallic gold (Au) with a thickness of 1.3μm to 5.7μm, the middle layer is metallic nickel (Ni) with a thickness of 4.0μm to 11.3μm, and the bottom layer is metallic tungsten (W) with a thickness of 5μm to 30μm. Tungsten slurry is poured into the metal via 11 to achieve electrical connection between the surface metal layer of the inner cavity and the bottom pin. The ceramic material is 95% black alumina ceramic. The pin electrode material is 4J29.

[0048] The bonding positions of chip bonding regions 7 and 9 are designed as an independent island for reliable chip bonding.

[0049] Different sized recesses are designed for the bonding positions of chips of different sizes to facilitate die placement, prevent chip misalignment, save vertical bonding space, and improve packaging utilization.

[0050] The insulation resistance between leads with no interconnection between adjacent metallization layers is 1×10⁻⁶. 10It has a strength of Ω or higher and can withstand DC voltages of 500V or higher.

[0051] The sealing ring and cover plate are sealed by parallel sealing welding.

[0052] Finally, it should be noted that the above embodiments are merely examples for clear illustration. This invention includes, but is not limited to, the above embodiments, and it is neither necessary nor possible to exhaustively describe all possible implementations. Those skilled in the art can make other variations or modifications based on the above description. All implementation schemes that meet the requirements of this invention are within the protection scope of this invention.

Claims

1. A ceramic packaging method for a low-current surge suppressor, characterized in that, The encapsulation method is as follows: Different flat-bottomed recesses are designed on the multi-layer ceramic base of the package shell to divide the chip soldering area into functional area and heat sink area. The functional area and heat sink area are integrated in different flat-bottomed recesses. Metallization layers are made in the chip soldering area, wire bonding area and bottom pin area. Metal vias are used to achieve electrical connections in the ceramic intermediate layer and to connect each pin on the ceramic bottom to the metallization layer of the corresponding solder and bonding areas. The chip soldering area adopts a sunken design, the heat sink area runs through the ceramic base body and is used to install the metal heat sink, the functional area is higher than the top surface of the heat sink, forming a height difference with the wire bonding area; According to the circuit design requirements, the chips are assembled in the designated area and internal wire bonding is performed; The metal cover of the enclosure is sealed and welded to the annular frame of the ceramic base; The specific encapsulation method is as follows: (1) Alumina and organic binder are mixed and ground into a slurry, which is then cast, sliced, and sintered to form alumina ceramic green ceramic sheets; (2) Multiple through holes are processed on multiple ceramic green ceramic sheets by means of laser drilling or mechanical punching; (3) The tungsten metallization paste is injected into the through hole through a mask to fill the through hole and form an interlayer through hole to achieve conductive interconnection in the vertical direction. Then, the welding area and the electrical connection line of the intermediate layer are printed on the surface of the green ceramic sheet after the through hole is filled by screen printing process. (4) Stack the multiple raw ceramic pieces processed in step (3) together, with all the through holes of the raw ceramic pieces corresponding to each other and compacted to form a raw ceramic composite body with interconnected layers. (5) The internal cavity is processed on the raw ceramic sheet by laser cutting or mechanical stamping. The metal heat sink installation position of the heat sink area is cut through the ceramic base body according to the heat sink size. The functional area position is cut into a flat-bottomed recess of a set depth according to the set size. (6) Use a dicing machine to cut the green ceramic composite after step (5) into individual ceramic bodies for high-temperature sintering; (7) Make a metal sealing ring according to the set ceramic package opening size, and make a high-power heat dissipation external electrode and a metal lead electrode according to the set ceramic package bottom electrode size; (8) The metal sealing ring and the ceramic base are airtightly welded together with alloy solder, and the pin electrode sheet and the base are airtightly welded together with alloy solder. (9) Electroplating nickel and gold metal layers sequentially on the chip soldering area, wire bonding area and metal sealing ring; (10) Perform chip assembly and wire bonding according to circuit connection requirements; (11) Perform airtight welding between the cover plate and the ceramic base after chip assembly and wire bonding.

2. The ceramic packaging method for a small current surge suppressor as described in claim 1, characterized in that, The specific implementation method is as follows: (1) Preparation of alumina ceramic raw ceramic pieces; (2) Through holes and metal heat sink mounting holes are processed on multiple ceramic green ceramic sheets by laser drilling or mechanical punching. The diameter of the through holes is 0.2 mm. (3) The metal paste is injected into the through hole through a mask to fill the through hole and form an interlayer through hole. Then, a screen with a metallized area pattern is used to print a 5μm to 30μm thick metal paste on the surface of the green ceramic sheet after the through hole is filled. (4) Stack together multiple raw ceramic pieces after processing (3). The total thickness of the ceramic body is 1 mm. All the through holes of the raw ceramic pieces correspond to each other and are compacted to form a raw ceramic component with interconnected functional layers. (5) Use a dicing machine to cut the green ceramic component processed in step (4) into individual ceramic green bodies from its upper surface. Use laser cutting or mechanical punching to process the internal cavity on the green ceramic sheet: the cutting depth of the functional area chip welding area is 0.4mm, the cutting depth of the bonding area is 0.2mm, and the welding position of the high power limiting circuit chip is directly cut to form a metal heat sink mounting hole with a size of 8.2mm*6.7mm. Then, the multiple ceramic green bodies after cutting are sintered at high temperature in a nitrogen-hydrogen mixed atmosphere sintering furnace to form a ceramic base with a specified shape. (6) Fabricate a metal sealing ring, lead electrode sheet, and metal heat sink according to the size of the ceramic annular cavity; then use a protective atmosphere to anneal the metal sealing ring and lead electrode sheet to eliminate the stress and hardening during the processing; deposit a layer of metallic nickel with a thickness of 1.0 μm to 3.0 μm at the location of the metal sealing ring and electrode sheet; (7) Under the conditions of setting the heating, heat preservation and cooling curves, in air or protective atmosphere, use alloy solder to achieve airtight welding of metal sealing ring, high-power heat dissipation external electrode plate, lead electrode plate and ceramic base. (8) A nickel layer with a thickness of 1.3 μm to 8.9 μm is deposited on the metallized welding area, transmission line and metal sealing ring of the ceramic base, a gold layer with a thickness of 0.64 μm to 5.7 μm is plated on the inner cavity of the ceramic, and a gold layer with a thickness of 1.3 μm to 5.7 μm is plated on the remaining metallized areas; The ceramic base is made of 95% alumina black porcelain; The metal sealing ring and the pin electrode sheet are made of 4J29 Kovar alloy; The metal heat sink and high-power heat dissipation external electrode sheet are made of Mo70Cu30.

3. The packaging structure of the ceramic packaging method for a small current surge suppressor as described in claim 1, characterized in that, include: Ceramic base body (1), annular frame (2), annular frame metallization layer (3), sealing ring (4), sealing ring metallization layer (5), cavity (6), heat sink area (7), base top surface (8), functional area (9), heat sink (10), metal through hole (11), inner cavity metallization layer (12), heat dissipation electrode sheet welding metallization layer (13), heat dissipation electrode sheet (14), pin electrode sheet welding metallization layer (15), pin electrode sheet (16), cover plate (17); The inner cavity metallization layer (12) includes a chip welding area, a bonding area, and a transmission line. The chip welding area, bonding area, and transmission line are fabricated in the areas defined in the heat sink area (7), the top surface of the base (8), and the functional area (9). The sealing ring (4) is located at the top of the annular frame (2) of the ceramic base body (1) and is connected to the annular frame (2) through the annular frame metallization layer (3); The ceramic base body (1) is a multi-layer ceramic co-fired body. Each ceramic layer has metal through holes (11) and interconnecting lines. The layers are electrically connected to each other through the metal through holes (11) and interconnecting lines according to the set lines. The ceramic base body (1) has a heat dissipation electrode (14) on its bottom surface and more than one pin electrode welded metallization layer (15). The heat dissipation electrode (14) is connected to the through metal heat sink (10) through the heat dissipation electrode welded metallization layer (13). The pin electrode (16) is connected to the corresponding port in the inner cavity assembly area through the pin electrode welded metallization layer (15) and the metal through hole (11). The ceramic base body (1) includes a raised annular frame (2) and an assembly area below the bottom of the annular frame. The assembly area includes a through-type metal heat sink (10), a chip soldering area, a bonding area and a transmission line. The chip soldering area is fabricated in a flat-bottomed recessed area with varying depths; A through-type metal heat sink (10) vertically penetrates the ceramic base body (1). The inner surface of the metal heat sink (5) is made of an inner cavity metal layer and an integrated power chip. The outer surface of the metal heat sink (10) is connected to the heat dissipation electrode (14) by welding a metallization layer (13). Within the assembly area, corresponding components are connected to the bonding area via bonding wires; The cover plate (17) is located on top of the sealing ring (4) and is sealed to the sealing ring (4) through the metallization layer (5) of the sealing ring to form an airtight encapsulation cavity (6). The inner cavity metallization layer (12) is composed of an inner cavity metallization layer surface metal layer (1201), an inner cavity metallization layer middle metal layer (1202), and an inner cavity metallization layer bottom metal layer (1203).

4. The packaging structure of the ceramic packaging method for a small current surge suppressor as described in claim 3, characterized in that: The surface metal layer (1201) is a gold layer, the middle metal layer (1202) is a nickel layer, a nickel-cobalt layer or a nickel-phosphorus layer, and the bottom metal layer (1203) is a tungsten layer or a molybdenum-manganese layer. The surface metal layer of gold and the intermediate metal layer of nickel, nickel-cobalt or nickel-phosphorus are plated by electroplating. The underlying metal layer, tungsten or molybdenum-manganese, is first printed onto the ceramic using a tungsten or molybdenum-manganese paste, and then cured.

5. The packaging structure of the ceramic packaging method for a small current surge suppressor as described in claim 3, characterized in that: The outer layers of the heat dissipation electrode (14) and the lead electrode (16) are, in sequence, a buffer metal layer and a surface metal layer.

6. The packaging structure of the ceramic packaging method for a small current surge suppressor as described in any one of claims 3-5, characterized in that: The package structure is a 5mm×6mm SO-8 package. The bottom of the package structure is provided with a power chip soldering area (7), a control chip soldering area (9), and 5 inner lead bonding areas (12). The inner cavity (6) is designed with a soldering area for fixing the die and a transmission line for completing the circuit integrity. The bottom surface of the ceramic base includes a heat dissipation electrode (14) and 4 lead electrode (16).

7. The packaging structure of a ceramic packaging method for a small current surge suppressor as described in any one of claims 3-5, characterized in that: Different sized recesses are designed for the bonding positions of chips of different sizes and types.

8. The packaging structure of a ceramic packaging method for a small current surge suppressor as described in any one of claims 3-5, characterized in that: The heat dissipation electrode (14) and the metal heat sink (10) form a boss-shaped structure.

9. The packaging structure of a ceramic packaging method for a small current surge suppressor as described in any one of claims 3-5, characterized in that: The insulation resistance between leads with no interconnection between adjacent metallization layers is 1×10⁻⁶. 10 It has a strength of Ω or higher and can withstand DC voltages of 500V or higher.

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