A hybrid inverter with heterogeneous power devices and its space vector modulation method
By using a hybrid inverter with heterogeneous power devices, combining silicon-based and silicon carbide devices, and controlling the switching action and switching sequence, high frequency and low switching losses are achieved, thereby improving the efficiency and harmonic performance of the power electronic converter.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- 이너 몽골리아 일렉트릭 파워 그룹 컴퍼니 리미티드 이너 몽골리아 일렉트릭 파워 리서치 인스티튜트 브랜치
- Filing Date
- 2023-11-02
- Publication Date
- 2026-06-30
AI Technical Summary
Existing technologies struggle to balance high efficiency and low cost in power electronic converters, especially when using hybrid inverters with heterogeneous power devices, where high-cost wide-bandgap devices are difficult to widely apply.
A hybrid inverter using heterogeneous power devices is employed, combining silicon-based insulated-gate bipolar transistors and silicon carbide-based metal-oxide-semiconductor field-effect transistors. By controlling the switching action and switching sequence, the secondary power inverter module performs high-frequency switching, while the main power inverter module operates at low frequency or even the fundamental frequency, fully utilizing the high switching frequency and low switching loss characteristics of silicon carbide devices.
It achieves high frequency and low switching loss of the inverter, improves the efficiency and output current harmonic performance of the current source multilevel inverter system, and has good prospects for engineering application.
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Figure CN117458904B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of inverter technology, and in particular to a hybrid inverter with heterogeneous power devices and its space vector modulation method. Background Technology
[0002] In high-capacity applications such as new energy power generation and storage, electrified transportation, and high-speed drives, conversion efficiency and power density are key indicators for power electronic conversion equipment. Currently, using wide-bandgap devices with high withstand voltage, high switching frequency, and low switching losses to improve the efficiency and performance of power electronic converters is a clear trend. However, converters based on full-bandgap devices are expensive and difficult to widely apply. To achieve a balance between efficiency and cost, both academia and industry are focusing on hybrid inverters using heterogeneous power devices composed of wide-bandgap devices and silicon-based devices.
[0003] However, most existing patents and literature aim to improve the performance of voltage source inverters through heterogeneous power device hybrid technology.
[0004] Therefore, in order to address the above shortcomings, there is an urgent need for a hybrid current source inverter with heterogeneous power devices and its space vector modulation method. Summary of the Invention
[0005] This invention provides a hybrid inverter with heterogeneous power devices and its space vector modulation method, which can balance high inverter frequency and low switching loss.
[0006] In a first aspect, embodiments of the present invention provide a hybrid inverter with heterogeneous power devices, including a first constant current source, a second constant current source, a main power inverter module, a secondary power inverter module, and a capacitive reactance module;
[0007] The first constant current source is connected to the main power inverter module to provide current to the main power inverter module. The main power inverter module includes a main switch tube made of silicon-based insulated gate bipolar transistors. The main inverter power module is connected to the capacitive reactance module.
[0008] The second constant current source is connected to the secondary power inverter module to provide current to the secondary power inverter module. The secondary power inverter module includes a plurality of secondary switching transistors made of silicon carbide-based metal oxide semiconductor field-effect transistors. The secondary inverter power module is connected to the capacitive reactance module.
[0009] In one possible design, the main switching transistors include a first main switching transistor, a second main switching transistor, a third main switching transistor, a fourth main switching transistor, a fifth main switching transistor, and a sixth main switching transistor. The collectors of the first, third, and fifth main switching transistors are all connected to the positive bus of the first constant current source. The negative terminals of the second, fourth, and sixth main switching transistors are all connected to the negative bus of the first constant current source. The negative terminal of the first main switching transistor is connected to the collector of the fourth main switching transistor via a first main line, the negative terminal of the third main switching transistor is connected to the collector of the sixth main switching transistor via a second main line, and the negative terminal of the fifth main switching transistor is connected to the collector of the second main switching transistor via a third main line.
[0010] The auxiliary switching transistors include a first auxiliary switching transistor, a second auxiliary switching transistor, a third auxiliary switching transistor, a fourth auxiliary switching transistor, a fifth auxiliary switching transistor, and a sixth auxiliary switching transistor. The collectors of the first, third, and fifth auxiliary switching transistors are all connected to the positive bus of the second constant current source, and the negative terminals of the second, fourth, and sixth auxiliary switching transistors are all connected to the negative bus of the second constant current source. The negative terminal of the first auxiliary switching transistor is connected to the collector of the fourth auxiliary switching transistor via a first auxiliary wire, the negative terminal of the third auxiliary switching transistor is connected to the collector of the sixth auxiliary switching transistor via a second auxiliary wire, and the negative terminal of the fifth auxiliary switching transistor is connected to the collector of the second auxiliary switching transistor via a third auxiliary wire.
[0011] The first main conductor and the first secondary conductor are connected in parallel with the capacitive reactance module, the second main conductor and the second secondary conductor are connected in parallel with the capacitive reactance module, and the third main conductor and the third secondary conductor are connected in parallel with the capacitive reactance module.
[0012] In one possible design, the capacitive reactance module includes an AC-side commutation capacitor and a three-phase resistive-inductive load. The AC-side commutation capacitor includes a first capacitor, a second capacitor, and a third capacitor, and the positive terminals of the first capacitor, the second capacitor, and the third capacitor are all connected to the three-phase resistive-inductive load.
[0013] The first main conductor and the first secondary conductor are connected in parallel with the positive terminal of the first capacitor, the second main conductor and the second secondary conductor are connected in parallel with the positive terminal of the second capacitor, the third main conductor and the third secondary conductor are connected in parallel with the third capacitor, and the negative terminals of the first capacitor, the second capacitor and the third capacitor are connected to each other.
[0014] In one possible design, the main switch includes a silicon-based insulated-gate bipolar transistor (SBBT) and a diode, which are connected in forward series to ensure unidirectional current flow.
[0015] In one possible design, the secondary switch includes a silicon carbide-based metal-oxide-semiconductor field-effect transistor (MOSFET) and a diode, with the MOSFET and diode connected in forward series to ensure unidirectional current flow.
[0016] Secondly, embodiments of the present invention also provide a space vector modulation method for a heterogeneous power device hybrid inverter. Based on the above-mentioned heterogeneous power device hybrid inverter, the method includes:
[0017] For each switching state, the static vector under that switching state is calculated based on the three-phase current output by the heterogeneous power device hybrid inverter; wherein, the switching state includes the on / off state of the main switch and the auxiliary switch;
[0018] Based on the position and magnitude of the reference vector, determine the duration of action of the three static vectors closest to the reference vector.
[0019] The switching state and the order of switching the switching state are determined based on the action time and the rotation direction of the reference vector.
[0020] Compared with the prior art, the present invention has at least the following beneficial effects:
[0021] In this embodiment, the main switching transistor of the main power inverter module includes a silicon-based insulated-gate bipolar transistor (SIGBT), and the secondary switching transistor of the secondary power inverter module includes a silicon carbide-based metal-oxide-semiconductor (MOSFET). SIGBTs are low-cost but suffer from significant losses during switching. MOSFETs are more expensive but have lower losses during switching. Therefore, this invention designs two power modules. During operation, by controlling the switching actions and switching sequence, the secondary power inverter module performs high-frequency switching, while the main power inverter module operates at low frequency or even the fundamental frequency. The inverter provided by this invention fully utilizes the high switching frequency and low switching losses of silicon carbide devices. While achieving low switching losses with silicon-based devices, it also enables the entire current source multi-level inverter system to operate at high frequency, thereby improving efficiency and reducing output current harmonics, making it highly promising for engineering applications. Attached Figure Description
[0022] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0023] Figure 1 This is a schematic diagram of the circuit structure of an inverter provided in an embodiment of the present invention;
[0024] Figure 2(a) is a spatial vector diagram provided in an embodiment of the present invention;
[0025] Figure 2(b) is a partial spatial vector diagram provided in an embodiment of the present invention;
[0026] Figure 3 This is a gate signal waveform of each switch transistor in the first phase of an embodiment of the present invention;
[0027] Figure 4(a) shows the output phase current, line voltage waveforms and phase current harmonic spectrum of a three-segment method provided in an embodiment of the present invention;
[0028] Figure 4(b) shows another three-segment method for outputting phase current, line voltage waveforms, and phase current harmonic spectrum provided in an embodiment of the present invention.
[0029] Figure 4(c) shows another three-segment method for outputting phase current, line voltage waveforms, and phase current harmonic spectrum provided in an embodiment of the present invention.
[0030] Figure 5(a) shows a seven-segment output waveform of phase current, line voltage, and phase current harmonic spectrum provided in an embodiment of the present invention.
[0031] Figure 5(b) shows another seven-segment output waveform of phase current, line voltage and phase current harmonic spectrum provided by the embodiment of the present invention;
[0032] Figure 5(c) shows another seven-segment method for outputting phase current, line voltage waveforms, and phase current harmonic spectrum provided in an embodiment of the present invention. Detailed Implementation
[0033] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are some embodiments of the present invention, but not all embodiments. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention without creative effort are within the scope of protection of the present invention.
[0034] In the description of the embodiments of the present invention, unless otherwise expressly specified and limited, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance; unless otherwise specified or stated, the term "multiple" refers to two or more; the terms "connected," "fixed," etc., should be interpreted broadly. For example, "connected" can be a fixed connection, a detachable connection, an integral connection, or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium. Those skilled in the art can understand the specific meaning of the above terms in the present invention according to the specific circumstances.
[0035] In this specification, it should be understood that the directional terms such as "upper" and "lower" used in the description of the embodiments of the present invention are used to describe the angles shown in the accompanying drawings and should not be construed as limiting the embodiments of the present invention. Furthermore, in the context, it should also be understood that when it is mentioned that one element is connected "upper" or "lower" to another element, it can be directly connected to the other element "upper" or "lower," or indirectly connected to the other element "upper" or "lower" through an intermediate element.
[0036] This invention provides a hybrid inverter with heterogeneous power devices, including a first constant current source, a second constant current source, a main power inverter module, a secondary power inverter module, and a capacitive reactance module;
[0037] The first constant current source is connected to the main power inverter module to provide current to the main power inverter module. The main power inverter module includes a main switch tube made of multiple silicon-based insulated gate bipolar transistors. The main inverter power module is connected to the capacitive reactance module.
[0038] The second constant current source is connected to the secondary power inverter module to provide current to the secondary power inverter module. The secondary power inverter module includes multiple secondary switching transistors made of silicon carbide-based metal oxide semiconductor field-effect transistors. The secondary inverter power module is connected to the capacitive reactance module.
[0039] In this embodiment, the main switching transistor of the main power inverter module includes a silicon-based insulated-gate bipolar transistor (SIGBT), and the secondary switching transistor of the secondary power inverter module includes a silicon carbide-based metal-oxide-semiconductor (MOSFET). SIGBTs are low-cost but suffer from significant losses during switching. MOSFETs are more expensive but have lower losses during switching. Therefore, this invention designs two power modules. During operation, by controlling the switching actions and switching sequence, the secondary power inverter module performs high-frequency switching, while the main power inverter module operates at low frequency or even the fundamental frequency. The inverter provided by this invention fully utilizes the high switching frequency and low switching losses of silicon carbide devices. While achieving low switching losses with silicon-based devices, it also enables the entire current source multi-level inverter system to operate at high frequency, thereby improving efficiency and reducing output current harmonics, making it highly promising for engineering applications.
[0040] Please refer to Figure 1In some embodiments of the present invention, the main switching transistor includes a first main switching transistor, a second main switching transistor, a third main switching transistor, a fourth main switching transistor, a fifth main switching transistor, and a sixth main switching transistor. The collectors of the first, third, and fifth main switching transistors are all connected to the positive bus of the first constant current source, and the negative terminals of the second, fourth, and sixth main switching transistors are all connected to the negative bus of the first constant current source. The negative terminal of the first main switching transistor is connected to the collector of the fourth main switching transistor through a first main line, the negative terminal of the third main switching transistor is connected to the collector of the sixth main switching transistor through a second main line, and the negative terminal of the fifth main switching transistor is connected to the collector of the second main switching transistor through a third main line.
[0041] The auxiliary switching transistors include a first auxiliary switching transistor, a second auxiliary switching transistor, a third auxiliary switching transistor, a fourth auxiliary switching transistor, a fifth auxiliary switching transistor, and a sixth auxiliary switching transistor. The collectors of the first, third, and fifth auxiliary switching transistors are all connected to the positive bus of the second constant current source, and the negative terminals of the second, fourth, and sixth auxiliary switching transistors are all connected to the negative bus of the second constant current source. The negative terminal of the first auxiliary switching transistor is connected to the collector of the fourth auxiliary switching transistor through a first auxiliary wire, the negative terminal of the third auxiliary switching transistor is connected to the collector of the sixth auxiliary switching transistor through a second auxiliary wire, and the negative terminal of the fifth auxiliary switching transistor is connected to the collector of the second auxiliary switching transistor through a third auxiliary wire.
[0042] The first main conductor and the first secondary conductor are connected in parallel with the capacitive reactance module; the second main conductor and the second secondary conductor are connected in parallel with the capacitive reactance module; and the third main conductor and the third secondary conductor are connected in parallel with the capacitive reactance module.
[0043] In this embodiment, through the connection of each main switch and each auxiliary switch, the first main switch, the fourth main switch, the first auxiliary switch, and the fourth auxiliary switch form the first phase; the third main switch, the sixth main switch, the third auxiliary switch, and the sixth auxiliary switch form the second phase; and the fifth main switch, the second main switch, the fifth auxiliary switch, and the second auxiliary switch form the third phase. The currents of the first constant current source and the second constant current source are equal, and the total DC current is the sum of the currents of the first constant current source and the second constant current source. The inverter output current provided in this embodiment presents a five-level current. Two main switches and two auxiliary switches are each turned on, and the switches in different on states form multiple switching states. Based on the different switching states, 19 static vectors can be obtained. The 19 static vectors can form a five-level space vector diagram composed of six large triangular sectors, and each large sector can be further divided into six small triangular sectors. Please refer to Figure 2. The main switch will only switch when the reference vector crosses the bisector of a large sector, for example, from sector 1 to sector 2, or from sector 3 to sector 4. The secondary switch is used to achieve high-frequency switching. Except in the above cases, the main switch will not switch if the reference vector is inside any sector. The main switch will not switch when crossing sectors other than from sector 1 to sector 2 and from sector 3 to sector 4.
[0044] In some embodiments of the present invention, the capacitive reactance module includes an AC-side commutation capacitor and a three-phase resistive-inductive load. The AC-side commutation capacitor includes a first capacitor, a second capacitor, and a third capacitor, and the positive terminals of the first capacitor, the second capacitor, and the third capacitor are all connected to the three-phase resistive-inductive load.
[0045] The first main conductor and the first secondary conductor are connected in parallel with the positive terminal of the first capacitor; the second main conductor and the second secondary conductor are connected in parallel with the positive terminal of the second capacitor; the third main conductor and the third secondary conductor are connected in parallel with the third capacitor; and the negative terminals of the first, second, and third capacitors are connected to each other.
[0046] In this embodiment, the three-phase resistive-inductive load functions as a motor. The AC-side commutation capacitor is used for commutation and filtering.
[0047] In a more specific implementation, the main power inverter module CSI-1 includes a first main switch (S) 1-1 ), second main switch (S) 1-2 ), third main switch (S) 1-3 ), fourth main switch (S) 1-4 ), fifth main switch (S) 1-5 ), the sixth main switch (S) 1-6Each main switch is composed of a silicon (Si)-based insulated gate bipolar transistor (IGBT) and a diode connected in forward series to ensure unidirectional current flow; the main switch S 1-1 collector and main switch S 1-3 collector and main switch S 1-5 The collectors are connected, and the first DC-side power terminal is led out from the common terminal. The main switch S 1-1 The cathode of the diode is connected to the main switch S. 1-4 The collectors are connected, and the common terminal is led out to the AC side power terminal a1. The main switch S 1-3 The cathode of the diode is connected to the main switch S. 1-6 The collectors are connected, and the common terminal is led out to the AC side power terminal b1. The main switch S 1-5 The cathode of the diode is connected to the main switch S. 1-2 The collectors of the transistors are connected, and the common terminal is led out to the AC side power terminal C1; the main switch S 1-4 The cathode of the diode, the main switch S 1-6 The cathode of the diode and the main switch S 1-2 The negative terminals of the diodes are connected together, and the common terminal leads to the second DC-side power terminal.
[0048] The secondary power inverter module CSI-2 includes a first secondary switch (S) 2-1 ), second auxiliary switch (S) 2-2 ), third auxiliary switch (S) 2-3 ), fourth auxiliary switch (S) 2-4 ), the fifth switch (S) 2-5 ), the sixth switch (S) 2-6 Each secondary switch includes a silicon carbide (SiC)-based metal-oxide-semiconductor field-effect transistor (MOSFET) and a diode connected in forward series to ensure unidirectional current flow; the secondary switch S 1-1 The drain and secondary switch S 1-3 The drain and secondary switch S 1-5 The drains are connected, and the common terminal leads to the third DC-side power terminal. The secondary switch S 1-1 The cathode of the diode is connected to the secondary switch S. 1-4 The drain of the transistor is connected to the AC side power terminal a2 via the common terminal, and the secondary switch S is connected to the common terminal. 1-3 The cathode of the diode is connected to the secondary switch S. 1-6 The drain of the transistor is connected to the AC side power terminal b2 via the common terminal, and the secondary switch S is connected to the AC side power terminal b2 via the common terminal.1-5 The cathode of the diode is connected to the secondary switch S. 1-2 The drain of the primary transistor is connected to the AC power terminal C2 via its common terminal; the secondary switch S... 1-4 The negative terminal of the diode, and the secondary switching transistor S 1-6 The negative terminal of the diode and the secondary switching transistor S 1-2 The negative terminals of the diodes are connected together, and the common terminal leads to the fourth DC-side power terminal;
[0049] The first DC-side power terminal is connected to the first constant current source I. dc1 The positive busbar, the second DC-side power terminal is connected to the first constant current source I. dc1 The negative bus, the third DC-side power terminal is connected to the second constant current source I. dc2 The positive busbar, the fourth DC-side power terminal is connected to the second constant current source I. dc2 The negative busbar; AC side power terminals a1 and a2 are connected in parallel and then connected to the converter capacitor C. fa The positive terminal, AC side power terminals b1 and b2 are connected in parallel and then connected to the commutation capacitor C. fb The positive terminal of the AC power terminal C1 and C2 are connected in parallel to the commutation capacitor C. fc The positive terminal; capacitor C fa positive electrode, C fb positive electrode, C fc The positive terminal of the capacitor C is simultaneously connected to a three-phase resistive-inductive load. fa negative electrode, C fb negative electrode and C fc The negative terminal is connected.
[0050] In some embodiments of the present invention, the main switch includes a silicon-based insulated-gate bipolar transistor and a diode, wherein the silicon-based insulated-gate bipolar transistor and the diode are connected in forward series to ensure unidirectional current flow.
[0051] In some embodiments of the present invention, the secondary switch includes a silicon carbide-based metal oxide semiconductor field-effect transistor and a diode, with the silicon carbide-based metal oxide semiconductor field-effect transistor and the diode connected in forward series to ensure unidirectional current flow.
[0052] This invention also provides a space vector modulation method for a heterogeneous power device hybrid inverter. Based on the above-mentioned heterogeneous power device hybrid inverter, the method includes:
[0053] Step 100: For each switching state, calculate the static vector of that switching state based on the three-phase current output by the heterogeneous power device hybrid inverter; wherein, the switching state includes the on / off state of the main switch and the auxiliary switch.
[0054] Step 102: Determine the duration of action of the three static vectors closest to the reference vector based on the position and magnitude of the reference vector;
[0055] Step 104: Determine the switching state and the sequence of switching states based on the action time and the rotation direction of the reference vector.
[0056] For step 100:
[0057] In one embodiment of the present invention, the switching state of the space vector is represented by a four-digit number named after the power device number. The first two digits represent the two switching transistors in the main module CSI-1 that are in the on state, and the last two digits represent the two switching transistors in the sub-module CSI-2 that are in the on state. For example, the switching state [12; 56] represents the switching transistor S in module CSI-1. 1-1 S 1-2 Simultaneously conduction, and S in CSI-2 2-5 S 2-6 Simultaneous conduction. Zero state [14; 36] indicates that phase A in CSI-1 and phase B in CSI-2 are short-circuited, at which time the output current i wA =i wB =i wC =0. Table I lists the possible switch states used, totaling 81 (3 n-1 (where n is the number of levels) corresponds to 19 types of current space vectors. These vectors can be divided into four categories based on their amplitude: large vectors Medium vector Small vector and zero vector
[0058] Table 1 Space Vectors and Switching States of Current-Source Five-Level Inverters
[0059]
[0060] Current space vector Three-phase current i can be used wA i wB i wC express
[0061]
[0062] Among them, e jx =cosx + jsinx
[0063] For the switching states [12,56], the inverter output PWM phase current is:
[0064]
[0065] Substituting (1) into equation (2) yields the small vector.
[0066]
[0067] Using the same method, the directions and magnitudes of the other 18 vectors can be derived.
[0068] Regarding step 102:
[0069] In one embodiment of the invention, a five-level space vector diagram consisting of 19 vectors is shown in Figure 2. Non-zero and zero vectors do not move in space and are called static vectors; conversely, the reference vector rotates in space at its fundamental frequency. (Reference vector) The maximum magnitude corresponds to the magnitude of the median vector, i.e., I. d The magnitude of the large current vector is then...
[0070]
[0071] b. To facilitate the calculation of the action time of the current space vector, the space vector diagram can be divided into six large triangular sectors (Ⅰ~Ⅵ), and each large sector is further subdivided into six small triangular sectors (1~6), as shown in Figure 2(b).
[0072] For a reference vector of a given length and phase, the three nearest static vectors corresponding to the vertices of the triangle within its sub-sector are synthesized. The action time calculation follows the "ampere-second balance" principle. For example, when the reference vector falls into sub-sectors 3 or 4 of large sector I, the three nearest static vectors are... and The equation for calculating the duration of action is:
[0073]
[0074] In the formula T a T b and T c Corresponding vectors and The duration of action, the current vector can be expressed as:
[0075] and
[0076] Substituting equation (6) into equation (5), and then decomposing the resulting equation into real and imaginary parts, we can solve for the following:
[0077]
[0078] get The formula for calculating the action time in sector I is shown in Table 2, where m = I ref / Id This is the amplitude modulation factor. The formula in Table 2 can also be used for... For calculating the action time in other sectors (Ⅱ~Ⅵ), simply subtract a multiple of π / 3 from the actual displacement angle θ, so that the corrected angle θ′ is between [-π / 6, π / 6].
[0079] θ′=θ-(k-1)π / 3 (8)
[0080] In the formula, k = 1, 2, ..., 6 corresponds to sectors I, II, ..., VI.
[0081] Table 2 Formulas for Calculating the Action Time of Each Sub-sector in Sector I
[0082]
[0083]
[0084] Regarding step 104:
[0085] In one embodiment of the present invention, the selection of redundant switching states is crucial for the proposed SVM method for a hybrid current source five-level inverter. To reduce switching losses and low-order harmonics, the switching sequence design should minimize the switching frequency of the silicon-based insulated-gate bipolar transistor (IGBT) in module CSI-1, while the silicon carbide-based metal-oxide-semiconductor (SiC) MOSFET in module CSI-2 should handle almost all switching operations.
[0086] The three-segment switching sequences for all sectors are summarized in Table 3, assuming a reference vector. When located in the 3 smaller sectors (m>0.5) of large sector I, by and When combining three adjacent vectors, the middle vector is chosen. (16; 12) is the first segment (a) of the switch sequence, and the second segment (b) is a small vector. The corresponding switch states [16,32], the last segment is a vector. The corresponding switching states are [16, 52]. As can be seen from Table 3, within the same small sector, the transition from one switching state to the next only involves two power devices in the same horizontal row; additional switching only occurs... When crossing the center line of a large sector, i.e., moving from sector 3 to sector 4 (or from sector 1 to sector 2) in Figure 2, this additional switching involves two switches in module CSI-1, and two different zero-switching states in module CSI-2
[52] and
[36] ; when There is no additional switching action when crossing the boundaries between different large sectors; the silicon-based module CSI-1 involves only two power device switching in each large sector, so each silicon-based insulated gate bipolar transistor (IGBT) operates once in one fundamental frequency cycle.
[0087] Table 3. Three-segment switching sequence of SVM modulation for current source five-level inverter.
[0088]
[0089]
[0090] Preferably, to further improve the harmonic performance of the output current and voltage, a symmetrical seven-segment switching sequence is configured. The switching sequence and time allocation of each sub-sector in the large sector (Ⅰ~Ⅵ) are shown in Table 4.
[0091] Table 4 Seven-Segment Switch Sequence
[0092] Small sector Switch sequence 1 b / 4-a / 2-c / 2-b / 2-c / 2-a / 2-b / 4 2 c / 4-a / 2-b / 2-c / 2-b / 2-a / 2-c / 4 3 b / 4-a / 2-c / 2-b / 2-c / 2-a / 2-b / 4 4 c / 4-a / 2-b / 2-c / 2-b / 2-a / 2-c / 4 5 b / 4-c / 2-a / 2-b / 2-a / 2-c / 2-b / 4 6 c / 4-a / 2-b / 2-c / 2-b / 2-a / 2-c / 4
[0093] The parameters given in a specific embodiment are shown in Table 5. Figure 3 For the three-segment switching sequence, the gate signals of phase A of the two modules within one base frequency cycle are shown. It is clear that the switching action is mainly concentrated on the SiC MOSFET, while the Si IGBT only operates at the base frequency, thus minimizing switching losses.
[0094] Table 5 Simulation Parameters
[0095] parameter Values Rated power 1MW Rated voltage / current 4160V / 138.8A Sampling frequency (fs) 3.6kHz Fundamental frequency 50Hz Filter capacitor 66μF Load Inductance 5mH (0.9pu) load resistor 17.3Ω (1p.u.)
[0096] Meanwhile, the output phase current and line voltage waveforms of the system under different modulation indices are shown in Figure 4. When the modulation index is less than 0.5, the phase current degenerates into a three-level waveform. The output pulse current i wA The harmonic components only include odd-order harmonics other than the third harmonic, and the output voltage is a sine wave with the fundamental frequency.
[0097] Figure 5 shows the output phase current and line voltage waveforms of the system under different modulation indices when a seven-segment switching sequence is used for modulation. Under the same sampling period, the switching frequency of the seven-segment switching sequence is higher than that of the three-segment method, and the content of low-order harmonics is also lower.
[0098] Based on the above discussion, by utilizing heterogeneous power device hybrid conversion technology, the high frequency of the current source five-level inverter system was realized under the condition of silicon-based device power frequency operation, reducing switching losses and thus improving the efficiency and harmonic performance of the current source converter.
[0099] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.
Claims
1. A space vector modulation method for a hybrid inverter with heterogeneous power devices, characterized in that, The heterogeneous power device hybrid inverter includes a first constant current source, a second constant current source, a main power inverter module, a secondary power inverter module, and a capacitive reactance module; The first constant current source is connected to the main power inverter module to provide current to the main power inverter module. The main power inverter module includes multiple main switching transistors made of silicon-based insulated gate bipolar transistors. The main power inverter module is connected to the capacitive reactance module. The main switching transistors include a first main switching transistor, a second main switching transistor, a third main switching transistor, a fourth main switching transistor, a fifth main switching transistor, and a sixth main switching transistor. The collectors of the first, third, and fifth main switching transistors are all connected to the positive bus of the first constant current source. The negative terminals of the second, fourth, and sixth main switching transistors are all connected to the negative bus of the first constant current source. The negative terminal of the first main switching transistor is connected to the collector of the fourth main switching transistor through a first main line. The negative terminal of the third main switching transistor is connected to the collector of the sixth main switching transistor through a second main line. The negative terminal of the fifth main switching transistor is connected to the collector of the second main switching transistor through a third main line. The second constant current source is connected to the secondary power inverter module to provide current to the secondary power inverter module. The secondary power inverter module includes multiple secondary switching transistors made of silicon carbide-based metal oxide semiconductor field-effect transistors. The secondary power inverter module is connected to the capacitive reactance module. The secondary switching transistors include a first secondary switching transistor, a second secondary switching transistor, a third secondary switching transistor, a fourth secondary switching transistor, a fifth secondary switching transistor, and a sixth secondary switching transistor. The collectors of the first, third, and fifth secondary switching transistors are all connected to the positive bus of the second constant current source. The negative terminals of the second, fourth, and sixth secondary switching transistors are all connected to the negative bus of the second constant current source. The negative terminal of the first secondary switching transistor is connected to the collector of the fourth secondary switching transistor through a first secondary wire. The negative terminal of the third secondary switching transistor is connected to the collector of the sixth secondary switching transistor through a second secondary wire. The negative terminal of the fifth secondary switching transistor is connected to the collector of the second secondary switching transistor through a third secondary wire. The first main conductor and the first secondary conductor are connected in parallel with the capacitive reactance module; the second main conductor and the second secondary conductor are connected in parallel with the capacitive reactance module; and the third main conductor and the third secondary conductor are connected in parallel with the capacitive reactance module. The space vector modulation method includes: For each switching state, the static vector under that switching state is calculated based on the three-phase current output by the heterogeneous power device hybrid inverter; wherein, the switching state includes the on / off state of the main switch and the auxiliary switch; Based on the position and magnitude of the reference vector, determine the duration of action of the three static vectors closest to the reference vector. The switching state and the order of switching the switching state are determined based on the action time and the rotation direction of the reference vector.
2. The method according to claim 1, characterized in that, The capacitive reactance module includes an AC-side commutation capacitor and a three-phase resistive-inductive load. The AC-side commutation capacitor includes a first capacitor, a second capacitor, and a third capacitor. The positive terminals of the first capacitor, the second capacitor, and the third capacitor are all connected to the three-phase resistive-inductive load. The first main conductor and the first secondary conductor are connected in parallel with the positive terminal of the first capacitor, the second main conductor and the second secondary conductor are connected in parallel with the positive terminal of the second capacitor, the third main conductor and the third secondary conductor are connected in parallel with the third capacitor, and the negative terminals of the first capacitor, the second capacitor and the third capacitor are connected to each other.
3. The method according to claim 1, characterized in that, The main switch includes a silicon-based insulated-gate bipolar transistor (SBBT) and a diode, which are connected in forward series to ensure unidirectional current flow.
4. The method according to claim 1, characterized in that, The secondary switch includes a silicon carbide-based metal oxide semiconductor field-effect transistor and a diode, which are connected in forward series to ensure unidirectional current flow.