Electronic device for estimating temperature value of thermistor and method thereof

Abstract

An electronic device and method thereof for estimating a temperature value of a thermistor are disclosed. The electronic device includes a first signal port coupled to a first end of the thermistor, an analog-to-digital converter, and a processing circuit disposed between the first signal port and the analog-to-digital converter. When the thermistor is coupled to the first signal port of the electronic device, the processing circuit is arranged to operate in a first switching state to detect and generate a first voltage difference to the analog-to-digital converter, and arranged to operate in a second switching state to detect and generate a second voltage difference to the analog-to-digital converter. The analog-to-digital converter is arranged to determine a resistance value of the thermistor based on the first voltage difference compared to the second voltage difference, and generate the estimated temperature value according to the determined resistance value. The present invention can accurately estimate the impedance of a thermistor or cell to estimate the corresponding temperature value.

Description

Technical Field

[0001] This invention relates to a thermistor readout mechanism, and more particularly to an electronic device and a corresponding method. Background Technology

[0002] Generally, the resistance value of a thermistor unit / circuit is configured to change or vary with temperature or variable operating temperature. The temperature range supported by the thermistor can be a wide range, such as -55℃ to +150℃ (but not limited to). Traditional reading circuits can only be used to read the resistance value of the thermistor to obtain the corresponding temperature value.

[0003] However, if traditional readout circuits are implemented using integrated circuit chips and used over a wide temperature range, their performance can be easily affected by variations in the internal circuit components. Furthermore, variations in the manufacturing process of internal circuit components can also degrade the performance of traditional readout circuits. Consequently, traditional readout circuits cannot accurately estimate the temperature of the thermistor. Summary of the Invention

[0004] Therefore, one of the objectives of this invention is to disclose one or more readout circuits and corresponding methods to solve the above-mentioned problems.

[0005] According to an embodiment of the present invention, an electronic device for estimating the temperature value of a thermistor is disclosed. The electronic device includes a first signal port coupled to a first end of the thermistor, an analog-to-digital converter (ADC), and a processing circuit disposed and coupled between the first signal port and the ADC. When the thermistor is coupled to the first signal port of the electronic device, the processing circuit is configured to operate in a first switching state to detect and generate a first voltage difference to the ADC. When operating in a second switching state, the processing circuit detects and generates a second voltage difference to the ADC. The ADC is configured to determine the resistance value of the thermistor based on the first voltage difference compared to the second voltage difference, and to generate the estimated temperature value based on the determined resistance value.

[0006] According to an embodiment, a method for estimating the temperature value of an electronic device for a thermistor is disclosed. The method includes: providing a first signal port for coupling to a first terminal of the thermistor; providing an analog-to-digital converter (ADC); providing processing circuitry configured to be coupled between the first signal port and the ADC; when the thermistor is coupled to the first signal port of the electronic device, controlling the processing circuitry to operate in a first switching state to detect and generate a first voltage difference to the ADC, and operating in a second switching state to detect and generate a second voltage difference to the ADC; and using the ADC to determine a resistance value of the thermistor based on the first voltage difference compared to the second voltage difference, and generating the estimated temperature value based on the determined resistance value. Attached Figure Description

[0007] Figure 1 This is a circuit diagram of the readout circuit according to an embodiment of the present invention.

[0008] Figure 2 This is a circuit diagram of a readout circuit according to another embodiment of the present invention.

[0009] Figure 3 This is a circuit diagram of a readout circuit according to another embodiment of the present invention.

[0010] Figure 4 This is a circuit diagram of a readout circuit according to another embodiment of the present invention.

[0011] The reference numerals in the attached figures are explained as follows:

[0012] 100, 200, 300, 400 electronic devices

[0013] 101 External Circuit Components

[0014] Processing circuits for 105, 205, 305, and 405 chips

[0015] 110 Analog-to-Digital Converter

[0016] 1051, 1052, 1053, 2051i, 2051t, Resistor Units

[0017] 2052i, 2052t, 2053, 3051, 3052, 3053i,

[0018] 3053t, 4052

[0019] 3054, 4054 reference current sources

[0020] 4055 Voltage Buffer Circuit Detailed Implementation

[0021] The present invention aims to disclose a technical solution and electronic device (e.g., a readout circuit) that can accurately estimate or determine the impedance (or resistance value) of a thermistor or cell to estimate a corresponding temperature value even when variations such as voltage variations caused by process variations and / or temperature variations (but not limited to) occur in the readout circuit. A thermistor has a variable resistance value that strongly depends on temperature changes. More specifically, the disclosed readout circuit can operate in a voltage mode or a current mode and can accurately estimate the variable resistance value of the thermistor by reading its resistance value twice, thereby reducing the impact of voltage variations caused by temperature variations on the thermistor. Furthermore, the disclosed readout circuit can estimate one or more variations of one or more internal circuit elements included in the readout circuit by reading the resistance value of an external reference impedance twice, to obtain one or more actual impedances (or resistance values) of one or more internal circuit elements. For example, the readout circuit can estimate process variations. Different embodiments are disclosed in the following paragraphs. It should be noted that electronic devices, such as readout circuits, are implemented using a single integrated circuit chip, while individual resistor units or switching units can be implemented using transistor circuit elements. This is not a limitation of this application.

[0022] Figure 1 This is a circuit diagram of an electronic device, such as a readout circuit 100, according to an embodiment of the present invention. The readout circuit 100 is used to operate in voltage mode and includes two signal ports, for example... Figure 1 The two pins or pads P1 and P2 contain an analog-to-digital converter (ADC) 110, such as a high dynamic range analog-to-digital converter (HRADC), and a processing circuit 105 disposed between the pads P1 and P2 and the ADC 110. The readout circuit 100 is coupled to an external circuit element 101 via the pads P1 and P2, wherein, for example... Figure 1As shown, external circuit element 101 is, for example, a reference / external resistor unit with a referenceable and precise resistance value Rext, or it may be a thermistor with a variable resistance value Rth that changes with a variable operating temperature. Processing circuit 105 includes switching units SW1, SW2, SW3, resistor units 1051, 1052, 1053 with resistance values ​​R1, R2, R3 respectively, and two switching units SW_i and SW_t. Intermediate nodes N1 and N2 of processing circuit 105 are selectively coupled to the first differential input node ND1 and the second differential input node ND2 of analog-to-digital converter 110 via switching units SW2 and SW3 respectively. Processing circuit 105 is powered by a reference voltage VREF via switching unit SW1 and is configured to operate in voltage mode, while analog-to-digital converter 110 is powered by a reference voltage VREF_adc that may be the same as or different from the reference voltage VREF.

[0023] In this embodiment, to obtain the actual resistance or impedance of one or more internal circuit elements of the readout circuit 100 in the event of process deviation, the readout circuit 100 can be connected to a reference resistor unit with a referable and accurate resistance value Rext before leaving the factory. That is, the external circuit element 101 serves as the reference resistor unit, and the two pads P1 and P2 of the readout circuit 100 are coupled to the two ends of the reference resistor unit with the reference resistance value Rext. When the readout circuit 100 is coupled to the reference resistor unit 101 with the resistance value Rext, the switching units SW1, SW2, and SW3 are closed, allowing the processing circuit 105 to operate in voltage mode as an intermediate readout circuit. When the pads P1 and P2 are disconnected from the external circuit element, the switching units SW1, SW2, and SW3 are disconnected. Resistor unit 1051 is coupled between the first intermediate node N1 and the supply voltage VREF. Resistor unit 1052 is coupled between the first intermediate node N1 and the second intermediate node N2. Resistor unit 1053 is coupled between the second intermediate node N2 and switch unit SW_i. Switch unit SW_i is controlled by analog-to-digital converter 110 and selectively coupled between resistor unit 1053 and ground level GND. Switch unit SW_t is controlled by analog-to-digital converter 110 and selectively coupled between pad P2 (i.e., the second signal port) and ground level GND.

[0024] To obtain the actual resistance or impedance of one or more internal circuit elements to reduce the impact of process variations, the processing circuit 105 operates in a first switching state, wherein in this first off-off state, the switching unit SW_i is closed and the switching unit SW_t is open, so the resistor units 1051, 1052 and 1053, each with resistance values ​​R1, R2, and R3, are connected in series between the power supply voltage VREF and the ground level GND. Based on their respective resistance values ​​R1, R2, and R3 and the voltage divider operation / principle, the analog-to-digital converter 110 can detect and obtain a first voltage difference between its differential input nodes ND1 and ND2 (i.e., the voltage drop V1 across resistor unit 1052 in resistor units 1051, 1052 and 1053); Figure 1 (not shown in the image) The analog-to-digital converter 110 can correspondingly convert the first voltage difference into a first digital signal, such as digital code D1.

[0025] Then, after generating the first digital signal D1, the analog-to-digital converter 110 can control the switching units SW_i and SW_t to operate the processing circuit 105 in a second switching state. In this second switching state, the switching unit SW_i is open and the switching unit SW_t is closed. Therefore, the resistor units 1051, 1052, and 101 are connected in series between the power supply voltage VREF and the ground level GND. Based on the resistance values ​​of the resistor units R1, R2, and Rext and the voltage divider operation / principle, the analog-to-digital converter 110 can detect and obtain a second voltage difference between its differential input nodes ND1 and ND2 (i.e., the voltage drop V2 on resistor unit 1052 in resistor units 1051, 1052, and 101). Figure 1 (not shown in the diagram), and the analog-to-digital converter 110 can correspondingly convert the second voltage difference into a second digital signal, such as digital code D2. That is, the analog-to-digital converter 110 of the readout circuit 100 is arranged to read and obtain two digital signals, i.e., read the signal twice.

[0026] After generating the second digital signal D2, the analog-to-digital converter 110 can accurately estimate one or more variations of the resistor units 1051, 1052, and 1053 based on the first and second digital signals D1 and D2, thereby obtaining the actual resistance values ​​of the resistor units 1051, 1052, and 1053. For example (but not limited to), the accurate reference resistance value Rext can be configured to be the same as the target resistance value of the resistor unit 1053. Ideally, the first voltage difference (or the first digital signal D1) should be the same as the aforementioned second voltage difference (or the second digital signal D2). Therefore, when a variation between the first and second voltage differences (or between the first and second digital signals D1 and D2) is detected, the analog-to-digital converter 110 can obtain the resistance change of the resistor unit 1053 based on the detected variation between the first and second voltage differences (or digital signals D1 and D2) to obtain and determine / estimate the actual resistance value R3. It should be noted that in other embodiments, the resistance value Rext of the reference resistor unit can be designed and configured to be different from the target resistance value of the resistor unit 1053; however, this is not a limitation of this application. Furthermore, it should be noted that the analog-to-digital converter 110 is used to obtain the actual resistance value R3 of the resistor unit 1053, and the analog-to-digital converter 110 does not need to calibrate the actual resistance value R3 of the resistor unit 1053 to the target resistance value.

[0027] Furthermore, after the readout circuit 100 leaves the factory, it will be coupled to the two terminals of a thermistor circuit / unit that can operate over a wider temperature range, within which the power supply voltage VREF and / or VREF_adc may vary. To mitigate this effect, the readout circuit 100 is configured to read and obtain two digital signals, i.e., read the signal twice. For example, in this case, the external circuit element 101 is a thermistor with an actual resistance value Rth corresponding to a temperature value such as the variable operating temperature. Similarly, the processing circuit 105 operates in a first switching state, where the switching unit SW_i is closed and the switching unit SW_t is open, so the resistor units 1051, 1052, and 1053 are connected in series between the power supply voltage VREF and the ground level GND. Based on their respective resistance values ​​R1, R2, R3 and voltage divider operation / principle, the analog-to-digital converter 110 can also detect and obtain another first voltage difference between its differential input nodes ND1 and ND2 (i.e., the voltage drop V3 across resistor unit 1052 in resistor units 1051, 1052 and 1053). Figure 1 (not shown in the image), and the analog-to-digital converter 110 can correspondingly convert the other first voltage difference into a first digital signal, such as digital code D3.

[0028] Then, after generating the first digital signal D3, the analog-to-digital converter 110 can control the switching units SW_i and SW_t to operate the processing circuit 105 in a second switching state. In this second switching state, the switching unit SW_i is open and the switching unit SW_t is closed. Therefore, the resistor units 1051, 1052 and the thermistor 101 are connected in series between the power supply voltage VREF and the ground level GND. Based on the resistance values ​​and voltage divider operation / principle of the resistor units R1, R2 and Rth, the analog-to-digital converter 110 can detect and obtain another second voltage difference between its differential input nodes ND1 and ND2 (i.e., the voltage drop V4 across the resistor unit 1052 in the resistor unit 1051, 1052 and the thermistor 101). Figure 1 (not shown in the image), while the analog-to-digital converter 110 can correspondingly convert the second voltage difference into another second digital signal, such as digital code D4.

[0029] After generating another second digital signal D4, even if a voltage change occurs in the power supply voltage VREF or VREF_adc due to a significant temperature change, the analog-to-digital converter 110 can accurately estimate the resistance value Rth of the thermistor based on the proportional change between the first digital signal D3 and the second digital signal D4, which correspond to voltage differences V3 and V4, respectively. After obtaining the resistance value Rth, the analog-to-digital converter 110 is configured to obtain a variable operating temperature associated with the estimated resistance value Rth based on a mapping table (e.g., a lookup table) that records the relationship between different variable operating temperatures and different resistance values ​​of the thermistors.

[0030] In other embodiments, a processing circuit coupled between the analog-to-digital converter 110 and the thermistor may be coupled to only one signal port instead of two signal ports. Figure 2 This is a circuit diagram of an electronic device, such as a readout circuit 200, according to another embodiment of the present invention. The readout circuit 200 includes a single signal port (e.g., a first signal port, such as a single pin or pad P1), an analog-to-digital converter 110 such as an HRADC, and processing circuitry 205. The readout circuit 200 is coupled to an external circuit element 101 via a single pad P1, wherein the external circuit element 101 is, for example, a reference / external resistor unit with a reference and accurate resistance value Rext, or a thermistor with a variable resistance value Rth corresponding to a variable operating temperature, such as... Figure 2 As shown. The processing circuit 205 includes switching units SW1, SW2A, SW2B, SW3A, SW3B, resistor units 2051i, 2051t, 2052i, 2052t, 2053 with resistance values ​​R1i, R1t, R2i, R2t, R3 respectively, and two switching units SW_i and SW_t.

[0031] Switching unit SW1 is controlled by analog-to-digital converter 110 and selectively coupled between the supply voltage VREF and one end (e.g., the top) of switching unit SW_i or SW_t. Switching unit SW1 is closed when the thermistor or external reference resistor is coupled to pad P1 of readout circuit 200, and is open when this connection is broken. Switching unit SW2A is also controlled by analog-to-digital converter 110 and selectively coupled between differential input node ND1 and an intermediate node N1t of processing circuit 205, while switching unit SW2B is controlled by analog-to-digital converter 110 and selectively coupled between differential input node ND1 and intermediate node N1i of processing circuit 205. Switching unit SW3A is also controlled by analog-to-digital converter 110 and selectively coupled between differential input node ND2 and an intermediate node N2t of processing circuit 205, and switching unit SW3B is controlled by analog-to-digital converter 110 and selectively coupled between differential input node ND2 and an intermediate node N2i of processing circuit 205. That is, differential input node ND1 can be coupled to one of intermediate nodes N1i and N1t, and differential input node ND2 can be coupled to one of intermediate nodes N2i and N2t.

[0032] In addition, the processing circuit 105 is also powered by the reference voltage VREF through the switching unit SW1 to operate in voltage mode, while the analog-to-digital converter 110 is powered by the reference voltage VREF_adc, which may be the same as or different from the reference voltage VREF.

[0033] In this embodiment, similarly, to obtain the actual resistance or impedance of one or more internal circuit elements of the readout circuit 200 in the event of process changes, the readout circuit 200 can be coupled to a reference resistor unit with a reference and accurate resistance value Rext before leaving the factory. In this case, a single pad P1 of the readout circuit 200 is coupled to one end or one terminal of an external resistor unit 101 with a reference resistance value Rext. The other end or terminal of the external resistor unit 101 is coupled to ground level GND. When the readout circuit 200 is coupled to the external resistor unit 101, the switching unit SW1 is closed, allowing the processing circuit 205 to operate in voltage mode as an intermediate readout circuit. Figure 2As shown, resistor unit 2051i with resistance value R1i is coupled between the intermediate node N1i and one bottom end of the switching unit SW_i, while resistor unit 2051t with resistance value R1t is coupled between the intermediate node N1t and one bottom end of the switching unit SW_t. Resistor unit 2052i with resistance value R2i is coupled between the intermediate node N1i and the intermediate node N2i (i.e., one end of resistor unit 2053 with resistance value R3), while resistor unit 2052t with resistance value R2t is coupled between the intermediate node N1t and the intermediate node N2t (i.e., the pad P1). Resistor unit 2053 is coupled between the intermediate node N2i and the ground level GND. Switching unit SW_i is selectively coupled between the supply voltage VREF and the top of resistor unit 2051i under the control of analog-to-digital converter 110, while switching unit SW_t is selectively coupled between the supply voltage VREF and the top of resistor unit 2051t under the control of analog-to-digital converter 110.

[0034] To obtain the actual resistance or impedance of one or more internal circuit elements to reduce the impact of process variations, the processing circuit 205 operates in a first switching state, wherein in the first switching state, switch unit SW_i is closed, switch unit SW_t is open, switch unit SW2A is open, switch unit SW2B is closed, switch unit SW3A is open, and switch unit SW3B is closed. Therefore, resistor units 2051i, 2052i, and 2053 are connected in series between the power supply voltage VREF and the ground level GND. Based on their respective resistance values ​​R1i, R2i, and R3 and the voltage divider operation / principle, the analog-to-digital converter 110 can detect and obtain the first voltage difference between its differential input nodes ND1 and ND2 (e.g., the voltage drop V5 across resistor unit 2052i in resistor units 2051i, 2052i, and 2053). Figure 2 (not shown in the image), and the analog-to-digital converter 110 can correspondingly convert the first voltage difference into a first digital signal, such as digital code D5.

[0035] Then, after generating the first digital signal D5, the analog-to-digital converter 110 can control the switching units SW_i, SW_t, SW2A, SW2B, SW3A, and SW3B, causing the processing circuit 205 to operate in a second switching state. In this state, switching unit SW_i is open, switching unit SW_t is closed, switching unit SW2A is closed, switching unit SW2B is open, switching unit SW3A is closed, and switching unit SW3B is open. Therefore, resistor units 2051t, 2052t, and 101 are connected in series between the power supply voltage VREF and the ground level GND. Based on the respective resistance values ​​R1t, R2t, and Rext of the resistor units and the voltage divider operation / principle, the analog-to-digital converter 110 can detect and obtain the second voltage difference between its differential input nodes ND1 and ND2 (e.g., the voltage drop V6 across resistor unit 2052t in resistor units 2051t, 2052t, and 101). Figure 2 (not shown in the image), and the analog-to-digital converter 110 can correspondingly convert the second voltage difference into a second digital signal, such as digital code D6.

[0036] After generating the second digital signal D6, the analog-to-digital converter 110 can accurately estimate one or more variations in the resistance unit included in the processing circuit 205 based on the first and second digital signals D5 and D6. For example (but not limited to), the accurate reference resistance value Rext can be configured to be the same as the target resistance value of the resistance unit 2053. Ideally, the first voltage difference (or the first digital signal D5) should be the same as the aforementioned second voltage difference (or the second digital signal D6). Therefore, when a change between the first and second voltage differences (or between the first and second digital signals D5 and D6) is detected, the analog-to-digital converter 110 can obtain the resistance change of the resistance unit 2053 based on the detected change between the first and second digital signals D5 and D6 to obtain and determine / estimate the actual resistance value R3.

[0037] It should be noted that in other embodiments, the resistance value Rext of the reference resistor unit can be designed and configured to be different from the target resistance value of resistor unit 2053; this is not a limitation of this case. Furthermore, it should be noted that the analog-to-digital converter 110 is used to obtain the actual resistance value R3 of resistor unit 2053, and the analog-to-digital converter 110 does not need to calibrate the actual resistance value R3 of resistor unit 2053 to the target resistance value. In addition, in this embodiment, resistor unit 2051t with resistance value R1t is, for example, a duplicate of resistor unit 2051i with resistance value R1i, and resistor unit 2052t with resistance value R2t is, for example, a duplicate of resistor unit 2052i with resistance value R2i. That is, ideally, regardless of process variations, the values ​​of resistance values ​​R1i and R1t are the same, and the values ​​of resistance values ​​R2i and R2t are the same. Resistor unit 2051t is matched with resistor unit 2051i, and resistor unit 2052t is matched with resistor unit 2052i.

[0038] Furthermore, after the readout circuit 200 leaves the factory, it is coupled to the two terminals of a thermistor circuit / unit that can operate over a wider temperature range where the power supply voltage VREF and / or VREF_adc may vary. Similarly, to mitigate this effect, the readout circuit 200 is configured to read and acquire two digital signals, i.e., read the signal twice. For example, in this case, the external circuit element 101 is a thermistor with an actual resistance value Rth corresponding to the variable operating temperature. Similarly, the processing circuit 205 operates in a first switching state, where switch unit SW_i is closed, switch unit SW_t is open, switch unit SW2A is open, switch unit SW2B is closed, switch unit SW3A is open, and switch unit SW3B is closed, thus resistor units 2051i, 2052i, and 2053 are connected in series between the power supply voltage VREF and the ground level GND. Based on their respective resistance values ​​R1i, R2i, R3 and voltage divider operation / principle, the analog-to-digital converter 110 can detect and obtain the first voltage difference between its differential input nodes ND1 and ND2 (e.g., the voltage drop V7 across resistor unit 2052i in resistor units 2051i, 2052i and 2053). Figure 2 (Not shown in the image), and the analog-to-digital converter 110 can correspondingly convert the first voltage difference into a first digital signal, such as digital code D7. Since the power supply voltage VREF will vary in this case, the voltage drop V7 may be different from the voltage drop V5 mentioned above.

[0039] Then, after generating the first digital signal D7, the analog-to-digital converter 110 can control the switching units SW_i, SW_t, SW2A, SW2B, SW3A, and SW3B to operate the processing circuit 205 in a second switching state, wherein the switching unit SW_i is open, the switching unit SW_t is closed, the switching unit SW2A is closed, the switching unit SW2B is open, the switching unit SW3A is closed, and the switching unit SW3B is open. Therefore, the resistor units 2051t, 2052t and the thermistor 101 are connected in series between the power supply voltage VREF and the ground level GND. Based on the resistance values ​​R1t, R2t, and Rth of the resistor units and the voltage divider operation / principle, the analog-to-digital converter 110 can detect and obtain the second voltage difference between its differential input nodes ND1 and ND2 (e.g., the voltage drop V8 of resistor unit 2052t in resistor units 2051t, 2052t and the thermistor 101). Figure 2 (not shown in the image), and the analog-to-digital converter 110 can correspondingly convert the second voltage difference into a second digital signal, such as digital code D8.

[0040] After generating the second digital signal D8, even if a voltage change caused by a significant temperature variation may occur in the power supply voltage VREF or VREF_adc, the analog-to-digital converter 110 can accurately estimate the variable resistance value Rth of the thermistor based on the proportional change between the first digital signal D7 and the second digital signal D8, which correspond to voltage differences V7 and V8, respectively. For example (but not limited to), when the power supply voltage VREF varies, this causes the voltage drop V7 corresponding to the first digital signal D7 and the voltage drop V8 corresponding to the second digital signal D8 to change by the same proportion (or ratio). That is, the same proportion of data change will also occur in the first digital signal D7 and the second digital signal D8. Therefore, in this embodiment, regardless of the different voltage changes caused by different operating temperature values, the difference or ratio between the first and second digital signals D7 and D8 is not affected by the voltage change, but is related to the proportional change between the resistance values ​​Rth and R3, thus accurately reflecting the actual resistance value Rth of the thermistor. Therefore, according to the circuit design of the processing circuit 205, the analog-to-digital converter 110 can accurately determine the resistance value Rth based on the ratio of the first and second digital signals D7 and D8 to the actual resistance value R3 of the resistor unit 2053. Similarly, after obtaining the actual resistance value Rth, the analog-to-digital converter 110 can obtain a variable operating temperature associated with the estimated resistance value Rth based on a mapping table that records the relationship between different variable operating temperatures of the thermistor and different resistance values.

[0041] In other embodiments, a readout circuit may operate in current mode, unlike the voltage mode described above. One advantage of using current mode is that the analog-to-digital converter 110 can be easily implemented using a simpler circuit design. For example, it may not be necessary to implement a wider dynamic input range for the analog-to-digital converter 110. However, this is not a limitation of this invention. Figure 3 This is a circuit diagram of an electronic device, for example, a readout circuit 300, according to another embodiment of the present invention. The readout circuit 300 is arranged to operate in current mode and includes two signal ports, for example... Figure 3 The two pins / pads P1 and P2 are used in the readout circuit. Additionally, the readout circuit 300 includes an analog-to-digital converter 110, such as an HRADC, and a processing circuit 305 disposed between the pads P1 and P2 and the analog-to-digital converter 110. The readout circuit 300 is coupled to an external circuit element 101 via the two pads P1 and P2, wherein the external circuit element 101 is, for example, a reference resistor unit with a reference and accurate resistance value Rext, or a thermistor with a variable resistance value Rth corresponding to a variable operating temperature, such as... Figure 3 As shown. The processing circuit 305 includes a reference current source 3054, which generates and provides a reference current signal IREF and provides the reference current signal IREF from the power supply voltage VREF to a resistor unit 3051. In addition, the processing circuit 305 also includes switching units SW1, SW2, SW3, resistor units 3051, 3052, 3053i, 3053t with resistance values ​​R1, R2, R3i, R3t respectively, and two switching units SW_i and SW_t.

[0042] The intermediate node N1 of the processing circuit 305 is coupled to the first differential input node ND1 of the analog-to-digital converter 110, and the intermediate nodes N2i and N2t of the processing circuit 305 are selectively coupled to the second differential input node ND2 of the analog-to-digital converter 110 through switching units SW2 and SW3. The processing circuit 305 is powered by a reference voltage VREF, while the analog-to-digital converter 110 is powered by a reference voltage VREF_adc, which may be the same as or different from the reference voltage VREF.

[0043] In this embodiment, similarly, to obtain the actual resistance or impedance of one or more internal circuit elements of the readout circuit 300 in the event of process deviations, the readout circuit 300 can be coupled to a reference resistor unit with a reference and accurate resistance value Rext before leaving the factory. In this case, the two pads P1 and P2 of the readout circuit 300 are connected to the two ends of the external resistor unit 101 with the reference resistance value Rext. When the readout circuit 300 is coupled to the external resistor unit 101, the switching unit SW1 is closed under the control of the analog-to-digital converter 100, allowing the processing circuit 305 to function as an intermediate readout circuit. When the pads P1 and P2 are disconnected from the external circuit element 101, the switching unit SW1 is disconnected. The reference current source 3054 is disposed and coupled between the power supply voltage VREF and one end (i.e., the top) of the resistor unit 3051 with the resistance value R1. The resistor unit 3051 with the resistance value R1 is disposed and coupled between the output terminal of the reference current source 3054 and the intermediate node N1. A resistor unit 3052 with resistance value R2 is configured and coupled between intermediate nodes N1 and N2i. A resistor unit 3053i with resistance value R3i is configured and coupled between intermediate node N2i and one end (i.e., the top) of switch unit SW_i. A resistor unit 3053t with resistance value R3t is configured and coupled between intermediate node N2t (coupled to pad P2) and one end (i.e., the top) of switch unit SW_t. Switch unit SW_i is selectively coupled between resistor unit 3053i and ground level GND. Switch unit SW_t is selectively coupled between resistor unit 3053t and ground level GND.

[0044] To obtain the actual resistance or impedance of one or more internal circuit elements to reduce or eliminate process variation effects, the processing circuit 105 operates a first switching state, wherein switch unit SW_i is closed, switch unit SW_t is open, switch unit SW1 is closed, switch unit SW2 is open, and switch unit SW3 is closed. Therefore, resistor units 3051, 3052, and 3053i, with resistance values ​​R1, R2, and R3i respectively, are connected in series between the power supply voltage VREF and the ground level GND, and the reference current signal IREF passes through the series-connected resistor units 3051, 3052, and 3053i. Thus, the analog-to-digital converter 110 can detect and obtain a first voltage difference (e.g., the voltage drop V9 across resistor unit 3052 with resistance value R2) between its differential input nodes ND1 and ND2. Figure 3 (not shown in the image), and the analog-to-digital converter 110 can correspondingly convert the first voltage difference into a first digital signal, such as digital code D9.

[0045] Then, after generating the first digital signal D9, the analog-to-digital converter 110 can control the switching units SW2, SW3, SW_i, and SW_t to operate the processing circuit 105 in a second switching state, wherein switching unit SW_i is open, switching unit SW_t is closed, switching unit SW1 remains closed, switching unit SW2 is closed, and switching unit SW3 is open. Therefore, the resistor unit 3051, external resistor unit 101, and resistor unit 3053t, each with resistance values ​​R1, Rext, and R3t respectively, become connected in series between the power supply voltage VREF and the ground level GND, and the reference current signal IREF flows through the series-connected resistor units 3051, 101, and 3053t. Resistor unit 3053t is, for example, a replica of resistor unit 3053i, matched with resistor unit 3053i; the resistance values ​​R3i and R3t can be the same or different. Then, the analog-to-digital converter 110 can detect and obtain a second voltage difference between its differential input nodes ND1 and ND2 (e.g., the voltage drop V10 across the external resistor unit 101 with a resistance value Rext in resistor units 3051, 101 and 3053t). Figure 3 (not shown in the image), and the analog-to-digital converter 110 can correspondingly convert the second voltage difference into a second digital signal, such as digital code D10.

[0046] After generating the second digital signal D10, the analog-to-digital converter 110 can accurately estimate one or more variations of resistor units 3051, 3052, 3053i, and 3053t based on the first and second digital signals D9 and D10. For example (but not limited to), the accurate reference resistance value Rext can be configured to be the same as the target resistance value of resistor unit 3052. Ideally, the first voltage difference (or the first digital signal D9) should be the same as the aforementioned second voltage difference (or the second digital signal D10). Therefore, when a change is detected between the first and second voltage differences (or between the first and second digital signals D9 and D10), the analog-to-digital converter 110 can obtain the resistance change of resistor unit 3052 based on the detected change between the first and second digital signals D9 and D10 to obtain and determine / estimate the actual resistance value R2. It should be noted that in other embodiments, the resistance value Rext of the reference resistor unit can be designed and configured to be different from the target resistance value of resistor unit 3052; this is not a limitation of this application. Furthermore, it should be noted that the analog-to-digital converter 110 is configured to acquire the actual resistance value R2 of the resistor unit 3052, and the analog-to-digital converter 110 does not need to calibrate the actual resistance value R2 of the resistor unit 3052 to the target resistance value. Resistor units 3053t and 3053i are matched, and ideally they have the same process variation. The operation of performing two detections on the signal to obtain the ratio or difference between the two digital signals can accordingly eliminate the process variation effects of resistor units 3053i and 3053t.

[0047] After the readout circuit 300 leaves the factory, it is coupled to the two terminals of a thermistor circuit / unit that can operate over a wide temperature range, within which voltage variations may occur in the power supply voltage VREF and / or VREF_adc. Similarly, to mitigate this effect, the readout circuit 300 is configured to read and obtain two digital signals, i.e., read the signal twice. For example, in this case, the external circuit element 101 is a thermistor with an actual resistance value Rth corresponding to the variable operating temperature. Similarly, the processing circuit 305 operates in a first switching state, where switch unit SW_i is closed, switch unit SW1 remains closed, switch unit SW2 is open, switch unit SW3 is closed, and switch unit SW_t is open. In this case, resistor units 3051, 3052, and 3053i are connected in series between the power supply voltage VREF and the ground level GND, while the reference current signal IREF passes through the series-connected resistor units 3051, 3052, and 3053i. Therefore, the analog-to-digital converter 110 can also detect and obtain the first voltage difference between its differential input nodes ND1 and ND2 (e.g., the voltage drop V11 across resistor 3052 with resistance value R2 in resistor units 3051, 3052 and 3053i). Figure 3 (not shown in the image), and the analog-to-digital converter 110 can correspondingly convert the first voltage difference into a first digital signal, such as digital code D11.

[0048] Then, after generating the first digital signal D11, the analog-to-digital converter 110 can control the switching units SW_i, SW_t, SW2, and SW3 to operate the processing circuit 305 in a second switching state, wherein switching unit SW_i is open, switching unit SW1 remains closed, switching unit SW2 is closed, switching unit SW3 is open, and switching unit SW_t is closed. In this case, resistor unit 3051, thermistor 101, and resistor unit 3053t, with resistance values ​​R1, Rth, and R3t respectively, are connected in series between the power supply voltage VREF and the ground level GND, while the reference current signal IREF passes through the series-connected resistor unit 3051, thermistor 101, and resistor unit 3053t. The analog-to-digital converter 110 can detect and obtain the second voltage difference between its differential input nodes ND1 and ND2 (e.g., the voltage drop V12 across the thermistor 101 with resistance value Rth). Figure 3(Not shown in the image), and the analog-to-digital converter 110 can correspondingly convert the second voltage difference into a second digital signal, such as digital code D12. Similarly, after generating the second digital signal D12, the analog-to-digital converter 110 can accurately estimate the resistance value Rth of the thermistor based on the proportional change between the first digital signal D11 and the second digital signal D12. After obtaining the resistance value Rth, the analog-to-digital converter 110 estimates and obtains a variable operating temperature associated with the estimated resistance value Rth based on a mapping table (e.g., a lookup table) that records the relationship between different variable operating temperatures and different resistance values ​​of the thermistors.

[0049] In other embodiments, a portion of the resistor unit can be replaced by a voltage buffer that provides a common-mode voltage level. Figure 4 This is a circuit diagram of an electronic device, such as a readout circuit 400, according to another embodiment of the present invention. The readout circuit 400 is arranged to operate in current mode and includes two signal ports, for example... Figure 4 The two pins / pads P1 and P2 are located in the readout circuit. Additionally, the readout circuit 400 also includes an analog-to-digital converter 110, such as an HRADC, and a processing circuit 405 disposed between the pads P1 and P2 and the analog-to-digital converter 110. The readout circuit 400 is coupled to an external circuit element 101 via the two pads P1 and P2, wherein the external circuit element 101 is, for example, a reference resistor cell with a reference (or fixed) and precise resistance value Rext, or a thermistor with a variable resistance value Rth corresponding to a variable operating temperature, such as... Figure 4 As shown. The processing circuit 405 includes a reference current source 4054 for generating and providing a reference current signal IREF, switching units SW_i and SW_t, a resistor unit 4052 with a resistance value R4, switching units SW1, SW2, SW3, SW4, and a voltage buffer circuit 4055.

[0050] The intermediate node N2 of the processing circuit 405 is selectively coupled to the differential input node ND2 of the analog-to-digital converter 110 via the switching unit SW3. The intermediate nodes N1i and N1t of the processing circuit 405 are connected via... Figure 4 The switching units SW1 and SW2 shown are selectively coupled to the differential input node ND1 of the analog-to-digital converter 110. The processing circuit 405 is powered by a reference voltage VREF, and the analog-to-digital converter 110 is powered by a reference voltage VREF_adc, which may be the same as or different from the reference voltage VREF.

[0051] In this embodiment, to obtain the actual resistance or impedance of one or more internal circuit elements of the readout circuit 400 in the event of process deviation, the readout circuit 400 can be coupled to a reference resistor unit with a reference and accurate resistance value Rext before leaving the factory. In this case, the two pads P1 and P2 of the readout circuit 400 are connected to the two ends of an external resistor unit 101 with a reference (or fixed) resistance value Rext. When the readout circuit 400 is coupled to the external resistor unit 101, the switching units SW3 and / or SW4 are closed, allowing the processing circuit 405 to function as an intermediate readout circuit. When the pads P1 and P2 are disconnected from the external resistor unit 101, the switching units SW3 and / or SW4 are disconnected. A reference current source 4054 is provided and coupled between the power supply voltage VREF and one end (i.e., the top) of the switching unit SW_i or SW_t. Switching unit SW_i is controlled by analog-to-digital converter 110 and selectively coupled between the bottom of reference current source 4054 and intermediate node N1i of processing circuit 405, while switching unit SW_t is controlled by analog-to-digital converter 110 and selectively coupled between the bottom of reference current source 4054 and intermediate node N1t of processing circuit 405, i.e., coupled to pad P1. Resistor unit 4052 with resistance value R4 is provided and coupled between intermediate node N1i and intermediate node N2 (i.e., coupled to pad P2). Switching unit SW1 is controlled by analog-to-digital converter 110 and selectively coupled between differential input node ND1 and intermediate node N1t, while switching unit SW2 is controlled by analog-to-digital converter 110 and selectively coupled between differential input node ND1 and intermediate node N1i. Switching unit SW3 is controlled by analog-to-digital converter 110 and selectively coupled between differential input node ND2 and intermediate node N2. The voltage buffer circuit 4055 is used to provide and generate a common-mode voltage level to the intermediate node N2 through the switching unit SW4.

[0052] To obtain the actual resistance or impedance of one or more internal circuit elements to reduce or eliminate process variation effects, the external circuit element 101 in this case is a reference resistor with a reference resistance value Rext. The processing circuit 405 operates in a first switching state, wherein the switching unit SW_i is closed, the switching unit SW_t is open, the switching unit SW1 is open, the switching unit SW2 is closed, and the switching units SW3 and SW4 are closed. The reference current signal IREF passes through the resistor unit 4052 with a resistance value R4, so the analog-to-digital converter 110 can detect and obtain the first voltage difference between its differential input nodes ND1 and ND2 (e.g., the voltage drop V13 across the resistor unit 4052 with a resistance value R4). Figure 4 (Not shown), and the analog-to-digital converter 110 can correspondingly convert the first voltage difference into a first digital signal, such as digital code D13.

[0053] Then, after generating the first digital signal D13, the analog-to-digital converter 110 can control the switching units SW1, SW2, SW_i, and SW_t to cause the processing circuit 105 to operate in a second switching state, wherein switching unit SW_i is open, switching unit SW_t is closed, switching unit SW1 is closed, switching unit SW2 is open, and switching units SW3 and SW4 remain closed. The reference current signal IREF passes through the external reference resistor 101 with a reference resistance value Rext, so the analog-to-digital converter 110 can detect and obtain the second voltage difference between its differential input nodes ND1 and ND2 (e.g., the voltage drop V14 across the resistor unit 101 with the reference resistance value Rext). Figure 4 (not shown in the image), and the analog-to-digital converter 110 can correspondingly convert the second voltage difference into a second digital signal, such as digital code D14.

[0054] After generating the second digital signal D14, the analog-to-digital converter 110 can accurately estimate the variation in the resistor unit 4052 based on the first and second digital signals. For example (but not limited to), the accurate reference resistance value Rext can be configured to be the same as the target resistance value of the resistor unit 4052. Ideally, the first voltage difference (or the first digital signal D13) should be the same as the aforementioned second voltage difference (or the second digital signal D14). Therefore, when a change is detected between the first and second voltage differences (or between the first and second digital signals D13 and D14), the analog-to-digital converter 110 can obtain the resistance change of the resistor unit 4052 based on the detected change between the first and second digital signals D13 and D14 to obtain and determine / estimate the actual resistance value R4.

[0055] After the readout circuit 400 leaves the factory, it is coupled to the two terminals of a thermistor circuit / unit that can operate over a wider temperature range where voltage variations may occur in the power supply voltage VREF and / or VREF_adc. Similarly, to mitigate this effect, the readout circuit 400 is configured to read and acquire two digital signals, i.e., read the signal twice. For example, in this case, the external circuit element 101 is a thermistor with a practical resistance value Rth corresponding to the variable operating temperature. Similarly, the processing circuit 405 operates in a first switching state, where switch unit SW_i is closed, switch unit SW_t is open, switch unit SW1 is open, switch unit SW2 is closed, and switches SW3 and SW4 are respectively closed. In this case, the reference current signal IREF passes through resistor unit 4052 with a resistance value R4. Similarly, the analog-to-digital converter 110 can also detect and obtain the first voltage difference between its differential input nodes ND1 and ND2 (e.g., the voltage drop V15 across the resistor unit 4052 with resistance value R4). Figure 4 (Not shown in the diagram), and the analog-to-digital converter 110 can correspondingly convert the first voltage difference into a first digital signal, such as digital code D15. It should be noted that in other embodiments, since the reference current signal IREF can also be fixed at different operating temperatures, the voltage drops V15 and V13 can be unaffected by voltage changes occurring in the power supply voltage VREF. Figure 4 The analog-to-digital converter 110 in the middle can convert the voltage drop V13 into a digital signal D13 before leaving the factory to store the digital signal D13, and then use the stored digital signal D13 as the digital signal D15 of the voltage drop V15, without actually converting the voltage drop V15 into another digital signal after leaving the factory.

[0056] Then, after generating or obtaining the first digital signal D15, the analog-to-digital converter 110 can control the switching units SW_i, SW_t, and SW1-SW4 to operate the processing circuit 405 in a second switching state, wherein switching unit SW_i is open, switching unit SW_t is closed, switching unit SW1 is closed, switching unit SW2 is open, and switching units SW3 and SW4 remain closed. In this case, the reference current signal IREF passes through the thermistor 101, which has a variable resistance value Rth corresponding to a variable operating temperature. Therefore, the analog-to-digital converter 110 can also detect and obtain the second voltage difference (e.g., the voltage drop V16 across the thermistor 101) between its differential input nodes ND1 and ND2. Figure 4 (Not shown in the image), and the analog-to-digital converter 110 can correspondingly convert the second voltage difference into a second digital signal, such as digital code D16. Similarly, after generating the second digital signal D16, the analog-to-digital converter 110 can accurately estimate the variable resistance value Rth of the thermistor based on the proportional change between the first digital signal D15 and the second digital signal D16, which correspond to voltage drops V15 and V16, respectively. After obtaining the resistance value Rth, the analog-to-digital converter 110 can be used to estimate and obtain a variable operating temperature associated with the estimated resistance value Rth based on a mapping table that records the relationship between different variable operating temperatures of the thermistor and different resistance values.

[0057] The above description is merely a preferred embodiment of the present invention and is not intended to limit the invention. Various modifications and variations can be made to the present invention by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the scope of protection of the present invention.

Claims

1. An electronic device for estimating the temperature value of a thermistor, comprising: A first signal port is coupled to the first end of the thermistor; An analog-to-digital converter; as well as A processing circuit is configured and coupled between the first signal port and the analog-to-digital converter; Wherein, when the thermistor is coupled to the first signal port of the electronic device, the processing circuit is arranged to operate in a first switching state to detect and generate a first voltage difference to the analog-to-digital converter, and is arranged to operate in a second switching state to detect and generate a second voltage difference to the analog-to-digital converter; and the analog-to-digital converter is arranged to determine the resistance value of the thermistor based on the first voltage difference compared with the second voltage difference, and to generate the estimated temperature value according to the determined resistance value; Also includes: A second signal port is coupled to the second terminal of the thermistor; The processing circuit includes: A first resistor unit is coupled between the first intermediate node and the power supply voltage provided for the processing circuit; A second resistor unit is coupled between the first intermediate node and the second intermediate node, and the second intermediate node is coupled to the first signal port; A third resistor unit is coupled between the second intermediate node and the first switch unit; The first switching unit is coupled between the third resistor unit and the ground level; A second switching unit is coupled between the second signal port and the ground level; The first voltage difference is generated by the processing circuit in the first switching state where the first switching unit is closed and the second switching unit is open; and the second voltage difference is generated by the processing circuit in the second switching state where the first switching unit is open and the second switching unit is closed. Before being coupled to the thermistor, the first signal port and the second signal port are selectively coupled to the two ends of a reference resistor cell having a reference resistance value to estimate process variation. The processing circuit is arranged to detect and generate another first voltage difference to the analog-to-digital converter when the processing circuit is operating in the first switching state, and to detect and generate another second voltage difference to the analog-to-digital converter when the processing circuit is operating in the second switching state. The analog-to-digital converter is arranged to determine the variation of the resistor cell included in the processing circuit based on the other first voltage difference and the other second voltage difference.

2. The electronic device as claimed in claim 1, characterized in that, The processing circuit acts as an intermediate readout circuit in two different switching states to generate the first voltage difference and the second voltage difference to the analog-to-digital converter, and the analog-to-digital converter is arranged to convert the first voltage difference and the second voltage difference into a first digital signal and a second digital signal, and to determine the resistance value of the thermistor based on the ratio between the first digital signal and the second digital signal.

3. The electronic device as claimed in claim 1, characterized in that, The processing circuit includes: A first switching unit is coupled between a first resistor unit and the power supply voltage provided to the processing circuit; The first resistor unit is coupled between the first switch unit and the first intermediate node, and the first intermediate node is selectively coupled to the first differential input node of the analog-to-digital converter; A second resistor unit is coupled between the first intermediate node and the second intermediate node, and the second intermediate node is coupled to the second differential input node of the analog-to-digital converter. A third resistor unit is coupled between the second resistor unit and the ground level; A second switching unit is coupled between the power supply voltage and the fourth resistor unit; The fourth resistor unit is coupled between the second switching unit and the third intermediate node, the third intermediate node being selectively connected to the first differential input node of the analog-to-digital converter; and A fifth resistor unit is coupled between the third intermediate node and the fourth intermediate node, the fourth intermediate node being coupled to the first signal port and selectively coupled to the second differential input node of the analog-to-digital converter; The first voltage difference is generated by the processing circuit in the first switching state where the first switching unit is closed and the second switching unit is open; and the second voltage difference is generated by the processing circuit in the second switching state where the first switching unit is open and the second switching unit is closed.

4. The electronic device as claimed in claim 3, characterized in that, Prior to coupling to the thermistor, only the first signal port is selectively coupled to one end of a reference resistor cell with a reference resistance value to estimate process variation. The processing circuit is configured to detect and generate another first voltage difference to the analog-to-digital converter when the processing circuit is operating in the first switching state, and to detect and generate another second voltage difference to the analog-to-digital converter when the processing circuit is operating in the second switching state. The analog-to-digital converter is arranged to determine the variation of the resistor cell included in the processing circuit based on the other first voltage difference and the other second voltage difference.

5. The electronic device as claimed in claim 3, characterized in that, The fourth resistor unit is a copy of the first resistor unit, and the fifth resistor unit is a copy of the second resistor unit.

6. The electronic device of claim 1, further comprising: A second signal port is coupled to the second terminal of the thermistor; The processing circuit operates in current mode and includes: A current source is coupled between the first resistor unit and the power supply voltage provided to the processing circuit; The first resistor unit is coupled between the current source and the first intermediate node, and the first intermediate node is coupled to the first signal port and selectively coupled to the first differential input node of the analog-to-digital converter. A second resistor unit is coupled between the first intermediate node and the second intermediate node, and the second intermediate node is coupled to the third resistor unit and selectively coupled to the second differential input node of the analog-to-digital converter. The third resistor unit is coupled between the third intermediate node and the first switch unit; The first switching unit is selectively coupled between the third resistor unit and the ground level; A fourth resistor unit is coupled between the second switch unit and the third intermediate node, wherein the third intermediate node is coupled to the second signal port; The second switching unit is selectively coupled between the fourth resistor unit and the ground level; The first voltage difference is detected by the processing circuit when the first switching unit is closed, the second switching unit is open, and the current source provides current flowing through the second resistor unit in the first switching state; and the processing circuit detects the second voltage difference when the first switching unit is open, the second switching unit is closed, and the reference current signal flows through the thermistor in the second switching state.

7. The electronic device as claimed in claim 6, characterized in that, Before being coupled to the thermistor, the first signal port and the second signal port are selectively coupled to both ends of a reference resistor cell having a reference resistance value to estimate process variation, and the processing circuit is used to detect and generate another first voltage difference to the analog-to-digital converter when the processing circuit is operating in the first switching state, and to detect and generate another second voltage difference to the analog-to-digital converter when the processing circuit is operating in the second switching state; and the analog-to-digital converter is arranged to determine the variation of the resistor cell included in the processing circuit based on the other first voltage difference and the other second voltage difference.

8. The electronic device as claimed in claim 6, characterized in that, The fourth resistor unit is a copy of the third resistor unit.

9. The electronic device of claim 1, further comprising: A second signal port is coupled to the second terminal of the thermistor; The processing circuit operates in current mode and includes: A current source is coupled to the power supply voltage provided for the processing circuit and selectively coupled to the first switching unit and the second switching unit. The first switching unit is selectively coupled between the current source and the first intermediate node, and the first intermediate node is selectively coupled to the first differential input node of the analog-to-digital converter. The second switching unit is selectively coupled between the current source and the second intermediate node, the second intermediate node being coupled to the first signal port and selectively coupled to the first differential input node of the analog-to-digital converter; A first resistor unit is coupled between the first switching unit and a third intermediate node, the third intermediate node being coupled to the second signal port and selectively coupled to the second differential input node of the analog-to-digital converter; and A voltage buffer circuit, coupled to the third intermediate node, is used to provide a common-mode voltage level to the third intermediate node; Specifically, the processing circuit detects the first voltage difference when operating in the first switching state where the first switching unit is closed, the second switching unit is open, and the reference current signal provided by the current source flows through the first resistor unit; and the processing circuit detects the second voltage difference when operating in the second switching state where the first switching unit is open, the second switching unit is closed, and the reference current signal flows through the thermistor.

10. The electronic device as claimed in claim 9, characterized in that, One end of the thermistor and one end of the first resistor unit are both coupled to the common-mode voltage level.

11. The electronic device as claimed in claim 9, characterized in that, Before being coupled to the thermistor, the first signal port and the second signal port are selectively coupled to both ends of a reference resistor cell having a reference resistance value to estimate process variation, and the processing circuit is arranged to detect and generate another first voltage difference to the analog-to-digital converter when the processing circuit is operating in the first switching state, and to detect and generate another second voltage difference to the analog-to-digital converter when the processing circuit is operating in the second switching state; and the analog-to-digital converter is arranged to determine the variation of the resistor cell included in the processing circuit based on the other first voltage difference and the other second voltage difference.

12. A method for an electronic device to estimate the temperature value of a thermistor, comprising: Provide a first signal port to couple to a first terminal of the thermistor; Provide analog-to-digital converters; A processing circuit is provided, configured to be coupled between the first signal port and the analog-to-digital converter; When the thermistor is coupled to the first signal port of the electronic device, the processing circuit is controlled to operate in a first switching state to detect and generate a first voltage difference to the analog-to-digital converter, and to operate in a second switching state to detect and generate a second voltage difference to the analog-to-digital converter. as well as The analog-to-digital converter is used to determine the resistance value of the thermistor based on the first voltage difference compared with the second voltage difference, and the estimated temperature value is generated based on the determined resistance value. Also includes: Before the electronic device is coupled to the thermistor, the first signal port and the second signal port of the electronic device are selectively coupled to the two ends of a reference resistor unit with a reference resistance value to estimate process variation. When the processing circuit operates in the first switching state, it detects and generates another first voltage difference to the analog-to-digital converter; when the processing circuit operates in the second switching state, it detects and generates another second voltage difference to the analog-to-digital converter. The analog-to-digital converter is used to determine the variation of the resistor units included in the processing circuit based on the other first voltage difference and the other second voltage difference.

13. The method as described in claim 12, characterized in that, The steps of using the analog-to-digital converter also include: Convert the first voltage difference and the second voltage difference into a first digital signal and a second digital signal; and The resistance value of the thermistor is determined based on the ratio of the first digital signal to the second digital signal.

14. The method of claim 12, further comprising: Before the electronic device is coupled to the thermistor, the first signal port of the electronic device is selectively coupled to one end of a reference resistor unit with a reference resistance value only to estimate process variation; When the processing circuit operates in the first switching state, it detects and generates another first voltage difference to the analog-to-digital converter. When the processing circuit operates in the second switching state, it detects and generates another second voltage difference to the analog-to-digital converter. as well as The analog-to-digital converter is used to determine the variation of the resistor units included in the processing circuit based on the other first voltage difference and the other second voltage difference.

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