Low power event-driven pixel with active differential detection circuitry and reset control circuit for the same

Abstract

Disclosed herein are low-power event-driven pixels with active differential detection circuitry and reset control circuitry for the same. In one embodiment, an event-driven pixel includes a photosensor; a photo-current / voltage converter coupled to the photosensor; and a differential circuit coupled to the photo-current / voltage converter. The differential circuit includes a source follower transistor and is configured to generate a signal at a gate of the source follower transistor based on a voltage output from the photo-current / voltage converter. The differential circuit is further configured to output a differential signal in response to an assertion of a row select signal. The event-driven pixel can further include a reset control circuit coupled to the differential circuit and configured to initialize the differential circuit and reset the differential circuit when the differential signal output from the event-driven pixel indicates a change in the voltage greater than a threshold amount.

Description

Technical Field

[0001] This disclosure generally relates to image sensors. For example, several embodiments of the present technology relate to event-driven pixels, including low-power event-driven pixels with an active differential detection circuitry system and reset control circuitry for said pixel. Background Technology

[0002] Image sensors have become ubiquitous and are now widely used in digital cameras, cellular phones, surveillance cameras, and medical, automotive, and other applications. As image sensors are integrated into a wider range of electronic devices, there is a desire to enhance their functionality, performance metrics, and the like in as many ways as possible, through device architecture design and image acquisition and processing, such as resolution, power consumption, dynamic range, etc.

[0003] A typical image sensor operates in response to incident image light from an external scene. The image sensor includes a pixel array with photosensitive elements (e.g., photodiodes) that absorb a portion of the incident image light and generate image charge in the process. The image charge generated by the pixel light can be measured as an analog output image signal on a bit line that varies according to the incident image light. In other words, the amount of image charge generated is proportional to the intensity of the image light, and this image charge is read out as an analog image signal from the bit line and converted into a digital value to provide information representing the external scene. Summary of the Invention

[0004] In one aspect, this disclosure provides an event-driven pixel comprising: a photosensitive sensor configured to generate a photocurrent in response to incident light received from an external scene; a photocurrent / voltage converter coupled to the photosensitive sensor to convert the photocurrent into a voltage; and a differential circuit coupled to the photocurrent / voltage converter, wherein the differential circuit includes a source follower transistor, and wherein the differential circuit is configured to (a) generate a reference signal at the gate of the source follower transistor based at least in part on the voltage, and (b) in response to an assertion of a row selection signal applied to a row selection transistor of the differential circuit, from The event-driven pixel outputs a differential signal, wherein the differential signal is the result of a comparison between (i) the reference signal and (ii) the voltage at the assertion time of the row selection signal; and a reset control circuit coupled to the differential circuit and configured to: initialize the differential circuit in response to an assertion of a global reset signal applied to the reset control circuit, and reset the differential circuit in response to a combination of (a) an assertion of the row selection signal applied to the reset control circuit and (b) an assertion of a confirmation signal applied to the reset control circuit when the differential signal indicates that the voltage change is greater than a threshold amount.

[0005] In another aspect, this disclosure further provides a method of operating an event-driven pixel, comprising: initializing a differential circuit of the event-driven pixel, wherein initializing the differential circuit includes asserting a global reset signal applied to a reset control circuit of the event-driven pixel coupled to the differential circuit; generating a photocurrent using a photoelectric sensor in response to receiving incident light from an external scene; converting the photocurrent into a voltage; generating a differential signal based at least in part on the voltage using a source follower transistor of the differential circuit, wherein the differential signal is the result of a comparison between (i) a reference signal at the gate of the source follower transistor and (ii) the voltage at the assertion time of a row selection signal; outputting the differential signal from the event-driven pixel in response to the assertion of the row selection signal; and resetting the differential circuit in response to a combination of (a) the assertion of the row selection signal and (b) an assertion of a confirmation signal applied to the reset control circuit when the differential signal indicates that the change in the voltage is greater than a threshold amount.

[0006] In another aspect, this disclosure further provides an event-driven pixel comprising: a photodetector configured to generate a photocurrent in response to incident light received from an external scene; a photocurrent / voltage converter coupled to the photodetector and configured to convert the photocurrent into a voltage; and a differential circuit coupled to the photocurrent / voltage converter and comprising: an amplifier configured to generate an amplified analog signal level based at least in part on the voltage; and a row selection transistor configured to output the amplified analog signal level during readout of the event-driven pixel, wherein the amplifier is configured to receive an enable signal to selectively disable the amplifier (a) after the event-driven pixel is initialized or reset and (b) before the amplified analog signal level is read out from the event-driven pixel.

[0007] In another aspect, this disclosure further provides an event-driven pixel comprising: a photodetector configured to generate a photocurrent in response to incident light received from an external scene; a photocurrent / voltage converter coupled to the photodetector to convert the photocurrent into a voltage; and a differential circuit coupled to the photocurrent / voltage converter and including (a) a source follower buffer and (b) an amplifier having an input coupled to the photocurrent / voltage converter and an output coupled to the gate of the source follower buffer, wherein the amplifier is configured to receive an enable signal to selectively enable the amplifier, wherein at least when the amplifier is enabled via the enable signal, the differential circuit is configured to generate a differential signal, at least in part, based on the voltage, indicating whether an event has occurred in the external scene. Attached Figure Description

[0008] The following description, with reference to the accompanying drawings, outlines non-limiting and non-exhaustive embodiments of the present technology, wherein similar or analogous reference numerals are used throughout to refer to similar or analogous components unless otherwise specified.

[0009] Figure 1 It is a partial schematic block diagram of an imaging system including event-driven pixels, each configured according to various embodiments of the present technology.

[0010] Figure 2 This is a partial schematic diagram of an event-driven pixel configured according to various embodiments of the present technology.

[0011] Figures 3 to 5 This is a partial schematic diagram of an amplifier configured according to various embodiments of the present technology.

[0012] Figure 6 and 7 This is a partial schematic diagram of a reset control circuit configured according to various embodiments of the present technology.

[0013] Figure 8 This is a timing diagram illustrating a method for operating event-driven pixels according to various embodiments of the present technology.

[0014] Figures 9 to 11 This is a partial schematic diagram of a photocurrent / voltage converter coupled to a photoelectric sensor, each configured according to various embodiments of the present technology.

[0015] Those skilled in the art will understand that the elements in the figures are for illustrative purposes and are not necessarily drawn to scale. For example, the dimensions of some elements in the figures may be exaggerated relative to other elements to aid in understanding various aspects of the art. Furthermore, common but well-known elements or methods that are useful or necessary in commercially viable embodiments are generally not depicted in the figures or described in detail below to avoid unnecessarily obscuring the description of various aspects of the art. Detailed Implementation

[0016] This disclosure relates to event-driven sensors. For example, several embodiments of the present technology relate to event-driven pixels, including low-power event-driven pixels with an active differential detection circuitry system and / or event-driven pixels with reset control circuitry. Specific details are set forth in the following description to provide a thorough understanding of aspects of the present technology. However, those skilled in the art will recognize that the systems, apparatuses, and techniques described herein can be practiced without one or more of the specific details set forth herein, or can be practiced using other methods, components, materials, etc.

[0017] Throughout this specification, references to "example" or "implementation" mean that a particular feature, structure, or characteristic described in connection with an example or embodiment is included in at least one example or embodiment of the present technology. Therefore, the use of the phrases "for example," "as an example," or "implementation" herein does not necessarily refer to all of the same example or embodiment, and is not necessarily limited to the specific example or embodiment discussed. Furthermore, the features, structures, or characteristics of the present technology described herein can be combined in any suitable manner to provide further examples or embodiments of the present technology.

[0018] For ease of description, spatial relative terms (e.g., "below," "below," "above," "under," "above," "top," "bottom," "left," "right," "center," "middle," etc.) may be used herein to describe the relationship of an element or feature illustrated in the figures relative to one or more other elements or features. It will be understood that spatial relative terms are intended to cover different orientations of the device or system in use or operation other than those depicted in the figures. For example, if the device or system illustrated in the figures is rotated, turned, or flipped about a horizontal axis, then an element or feature described as "below," "below," or "under" one or more other elements or features may be oriented "above" one or more other elements or features. Therefore, the exemplary terms "below" and "under" are non-limiting and may cover orientations above and below. Furthermore or alternatively, the device or system may be oriented in other ways as illustrated in the figures (e.g., rotated 90 degrees about a vertical axis, or in other orientations), and the spatial relative descriptive terms used herein will be interpreted accordingly. Additionally, it will be understood that when an element is referred to as being “between” two other elements, it may be the only element between the two other elements, or there may be one or more intervening elements.

[0019] Several technical terms are used throughout this specification. These terms take on their ordinary meaning in the technology from which they are derived, unless explicitly defined herein or the context in which they are used will clearly suggest otherwise. It should be noted that component names and symbols may be used interchangeably throughout this document (e.g., Si for silicon); however, they have the same meaning.

[0020] A. Overview

[0021] Active pixel sensors typically employ pixel arrays with globally defined integration times. Therefore, pixels in the array of an active pixel sensor typically have the same integration time, and each pixel in the array is typically converted into a digital signal regardless of its content (e.g., regardless of whether the external scene captured by the pixel has changed since the last readout).

[0022] In contrast, an event-driven sensor (e.g., an event vision sensor or a motion vision sensor) only reads out a pixel and / or converts the corresponding pixel signal into a digital signal when the pixel detects a change in the external scene (e.g., an event). In other words, pixels of an event-driven sensor that do not detect a change in the external scene are not read out, and / or the pixel signals corresponding to such pixels are not converted into digital signals. Therefore, each pixel of an event-driven sensor can operate independently of the other pixels of the event-driven sensor, and only pixels that detect a change in the external scene need to be read out, and / or have their corresponding pixel signals converted into digital signals and / or recorded (thus saving power).

[0023] Many event-driven pixels include partial amplification and comparator circuitry for event threshold detection. The amplification and comparator circuitry for each event-driven pixel typically requires nanoampere-level DC bias current, resulting in milliwatt-level power consumption for a megapixel event-driven sensor regardless of whether any event occurs in the external scene. In other words, the current power consumption of many event-driven pixels makes them unsuitable for use with battery-operated, always-on event-driven sensors where sub-milliwatt power consumption is desired (e.g., for extended battery life).

[0024] Some event-driven pixels (a) measure voltages based on the photocurrent output from the photosensor without amplification in the output stage, and (b) include a common-source gm stage to compensate for the lack of signal amplification in the output stage. Using a common-source gm stage is expected to result in excessive inhomogeneity, increased nonlinearity, challenges in correctly setting the operating points for all event-driven pixels in the event-driven sensor, and / or challenges in calibrating the event-driven pixels. Furthermore, since signal amplification only occurs after the output stage, the noise performance of event-driven pixels using a common-source gm stage is expected to be inferior to that of the event-driven sensor described above.

[0025] To address these issues, each of the event-driven pixels of this technology includes (a) a photosensor configured to generate a photocurrent in response to incident light received from an external scene, (b) a photocurrent / voltage converter coupled to the photosensor to convert the photocurrent into a voltage, and (c) a differential circuit coupled to the photocurrent / voltage converter and configured to generate a differential signal or analog signal level (e.g., a logarithmic differential voltage relative to a reset time) at least partially based on the voltage. In some embodiments, the differential circuit may include a source follower buffer or a transistor. Including a source follower buffer in the differential circuit is intended to (a) produce improved uniformity and / or linearity, and / or (b) improve the dynamic response of the event-driven pixel, especially compared to event-driven pixels employing a common-source amplifier to reintroduce gain. In these and other embodiments, the event-driven pixel of this technology may include event threshold detection at the column level (a) to reduce the static power consumption of the event-driven pixel and / or (b) to implement frame-based readout of the event-driven pixel. Additionally, the differential circuit may include an amplifier configured to provide signal amplification at the output stage. The amplifier may be configured to receive an enable signal to selectively enable (or disable) the amplifier to save power. For example, when the event-driven pixel is not at the output analog signal level (e.g., when a frame is not read out), the amplifier can be powered down, thereby reducing the power consumption of the event-driven pixel.

[0026] The event-driven pixel, which includes signal amplification at the output stage (compared to event-driven pixels that do not include signal amplification at the output stage or only include signal amplification at a stage that occurs later than the output stage), is expected to (a) reduce non-uniformity, nonlinearity, and / or other challenges when correctly setting the operating point of the event-driven pixel or calibrating the event-driven pixel, and / or (b) improve noise performance. Subsequently, the event-driven pixel (compared to event-driven pixels that do not include signal amplification at the output stage or only include signal amplification at a stage that occurs later than the output stage) is expected to reduce false positive and / or false negative event detection, and thus reduce unnecessary wake-ups or image / video transmissions of the image sensor containing the event-driven pixel. Additionally, since the amplifier in the differential circuit can be powered off when the amplifier is not in use, the power consumption of the event-driven pixel is reduced. Therefore, the event-driven pixel of this technology is expected to provide reduced power consumption while achieving high gain and low noise performance.

[0027] In these and other embodiments, the photocurrent / voltage converter of this technology may include an amplifier. The amplifier of the photocurrent / voltage converter may be employed to increase the response speed to changes in the voltage output from the photocurrent / voltage converter. In other words, the amplifier may be employed in low-latency applications to increase the speed at which the differential circuitry of the event-driven pixel generates an analog signal level based on the voltage output from the photocurrent / voltage converter. Similar to the amplifier of the differential circuitry described above, the amplifier of the photocurrent / voltage converter may be configured to receive an enable signal to selectively enable (or disable) the amplifier to save power. For example, when the event-driven pixel is not outputting an analog signal level (e.g., when a frame is not read out), the amplifier of the photocurrent / voltage converter may be powered down, thereby reducing the power consumption of the event-driven pixel.

[0028] In these and other embodiments, the event-driven pixel of this technology includes a reset control circuit. The reset control circuit can be configured to (a) initialize the event-driven pixel in response to an assertion of a global reset signal and / or (b) reset the event-driven pixel when an analog signal level is read from the event-driven pixel (e.g., in response to an assertion of a row select signal) and the analog signal level indicates that an event has occurred in an external scene (e.g., an assertion leading to an acknowledgment signal). In some embodiments, when the event-driven pixel is initialized or reset by the reset control circuit, the inputs and outputs of the amplifier in the differential circuit can be shorted together to automatically zero the amplifier. Thus, in the event-driven pixel of this technology, offset variations can be largely or completely eliminated. Furthermore or alternatively, the event-driven pixel of this technology can utilize capacitor matching between several capacitors in the differential circuit to reduce, minimize, or eliminate gain errors in the differential circuit. Therefore, the event-driven pixel of this technology is intended to be suitable for use with battery-operated, always-on event-driven sensors while avoiding several challenges discussed above and observed in many event-driven pixels.

[0029] B. The selection of low-power event-driven pixels, reset control circuitry, and associated systems, devices, and methods. Example

[0030] Figure 1 This is a partial schematic block diagram of an imaging system 100 configured according to various embodiments of the present technology. As shown, the imaging system 100 includes an event-driven pixel 120 and a threshold comparison circuit 108. In other embodiments of the present technology, the threshold comparison circuit 108 may be incorporated into the event-driven pixel 120.

[0031] Figure 1 The event-driven pixel 120 includes a photoelectric sensor 102, a photocurrent / voltage converter 104, a differential circuit 106, and a reset control circuit 110. The photoelectric sensor 102... Figure 1The diode is described as a photodiode, having an anode coupled to ground (e.g., a negative power rail or another reference voltage) and a cathode coupled to a photocurrent / voltage converter 104. In operation, Figure 1 The photoelectric sensor 102 is configured to generate photocharge or photocurrent in response to incident light 114 received from an external scene. In other embodiments of the present technology, the photoelectric sensor 102 may be another suitable type of photoelectric sensor or photodetector (e.g., metal-semiconductor-metal (MSM) photodetector, phototransistor, photoconductive detector, or phototube).

[0032] Figure 1 A photocurrent / voltage converter 104 is coupled to a photosensitive sensor 102 and configured to convert the photocurrent generated by the photosensitive sensor 102 into a voltage. A differential circuit 106 is coupled to the photocurrent / voltage converter 104. Based on the voltage received from the photocurrent / voltage converter 104, the differential circuit 106 is configured to (a) sample a reference signal or voltage when the event-driven pixel 120 is reset, and (b) generate a differential signal or voltage (e.g., an analog signal level) relative to the reference signal (e.g., relative to the last time the event-driven pixel 120 was reset). When the row selection signal rsel is asserted, the differential circuit 106 can output the differential signal onto bit or column line 107. More specifically, the differential circuit 106 can output the differential signal to a threshold comparison circuit 108 via column line 107.

[0033] In some embodiments, differential circuitry 106 may be configured to receive an enable signal EN. Additionally or alternatively, photocurrent / voltage converter 104 may be configured to receive an enable signal EN2. As discussed in more detail below, enable signals EN and / or EN2 may be used to selectively enable (e.g., power on, such as turn on, enable current flow, or force into a higher power mode or state) or disable (e.g., power off, such as turn off, disable current flow, or force into a lower power mode or state) one or more amplifiers 104 of differential circuitry 106 and / or photocurrent / voltage converter. Disabling the amplifiers is intended to reduce the power consumption of event-driven pixel 120, thereby reducing the power consumption of imaging system 100 and / or the image sensor (not shown) incorporated into imaging system 100.

[0034] Reset control circuit 110 controls the reset of event-driven pixel 120. More specifically, reset control circuit 110 receives a global reset signal GRST, a row selection signal rsel, and an acknowledgment signal ack. As discussed in more detail below, the reset control circuit is configured to, based on the assertions of the global reset signal GRST, the row selection signal rsel, and / or the acknowledgment signal ack, (a) generate a reset signal RST and (b) initiate sampling of a new reference signal generated by differential circuit 106 in response to the assertion of the reset signal RST.

[0035] Threshold comparison circuit 108 is coupled to the output of differential circuit 106. In the illustrated embodiment, threshold comparison circuit 108 is circuitry peripheral to event-driven pixel 120 and coupled to event-driven pixel 120 via column line 107. Placing threshold comparison circuit 108 on column line 107 allows it to share the desired reduction in static power consumption between event-driven pixel 120 and other event-driven pixels (not shown) coupled to column line 107, compared to event-driven pixels with dedicated threshold comparison circuitry.

[0036] In operation, the threshold comparison circuit 108 is configured to detect events occurring within the external scene. More specifically, when an event occurs within the external scene, the event is indicated by a rapid or sudden change in intensity or brightness in the incident light 114 received by the photodetector 102. In other words, if the external scene is static, such that no event occurs, the brightness of the incident light 114 remains substantially constant. Consequently, the photocurrent generated by the photodetector 102 remains substantially constant. However, if an event occurs within the external scene (e.g., movement), the event is indicated by an asynchronous rapid or sudden change in the brightness of the incident light 114 received by the photodetector 102. The change in brightness can be from darker to brighter, or from brighter to darker. Therefore, the photocurrent generated by the photodetector 102 may exhibit asynchronous changes, which in turn may lead to changes in the differential signal generated by the differential circuit 106. Therefore, the threshold comparison circuit 108 can be configured to receive a differential signal from the differential circuit 106, compare the differential signal with a threshold or quantity, and detect an event occurring in the external scene based on the comparison. For example, when the quantity of the differential signal output by the differential circuit 106 exceeds the quantity of the threshold, the threshold comparison circuit 108 can detect that an event has occurred in the external scene.

[0037] When the threshold comparison circuit 108 detects an event, the acknowledgment signal ack can be asserted to prompt the reset control circuit 110 to (a) assert the reset signal RST to reset the event-driven pixel 120, and (b) initiate sampling of a new reference voltage. Alternatively, the threshold comparison circuit 108 may output event information (e.g., the location where the event was detected, such as the xy coordinates of the photosensitive sensor 102 in the pixel array used to detect the event; the polarity of the photocurrent change of the event (e.g., brighter or darker); and / or the time of the event) for recording. On the other hand, when the threshold comparison circuit 108 does not detect an event, the acknowledgment signal ack may not be asserted, such that (without the assertion of the global reset signal GRST) the event-driven pixel 120 is not reset by the reset control circuit 110, and the differential circuit 106 continues to generate a differential signal based on the previously sampled reference voltage.

[0038] It should be noted that merging Figure 1 The image sensor of the imaging system 100 does not need to record the entire normal image, and therefore does not need to capture all the highly redundant information of the normal image frame by frame. Instead, the image sensor can record only event information. In other words, apart from the threshold comparison performed by the threshold comparison circuit 108, the image sensor can ignore the portions of the image or video frame where no event was detected, thereby achieving ultra-high frame rate and / or ultra-high speed capabilities with low data rates. In some embodiments, events can be read out synchronously or asynchronously. In these and other embodiments, event data from the event-driven pixel 120 can be combined with normal image or video capture to reconstruct high frame rate, high-quality images or videos using event detection via software, artificial intelligence (AI) networks, or other suitable technologies.

[0039] Figure 2 This is a partial schematic diagram of an event-driven pixel 220 configured according to various embodiments of the present technology. As shown, the event-driven pixel 220 includes a photoelectric sensor 202, a photocurrent / voltage converter 204, a differential circuit 206, and a reset control circuit 210. The event-driven pixel 220 can be... Figure 1 Event-driven pixel 120 (e.g., making Figure 2 The photoelectric sensor 202, photocurrent / voltage converter 204, differential circuit 206, and / or reset control circuit 210 are respectively Figure 1 The photoelectric sensor 102, photocurrent / voltage converter 104, differential circuit 106 and / or reset control circuit 110), or event-driven pixel 220 may be another event-driven pixel of this technology.

[0040] The photodetector 202 includes an anode and a cathode coupled to ground (e.g., a negative power rail or another reference voltage). A photocurrent / voltage converter 204 of the event-driven pixel 220 is coupled to the cathode of the photodetector 202 to convert the photocurrent generated by the photodetector 202 into a voltage. More specifically, the photocurrent / voltage converter 204 is configured to generate an output at node A that has a logarithmic relationship with the intensity of incident light received by the photodetector 202 from an external scene. In the illustrated embodiment, the photocurrent / voltage converter 204 includes a transistor 221 having (a) a source coupled to the cathode of the photodetector 202 and (b) a drain coupled to a power supply voltage (e.g., a positive power rail or another reference voltage). The gate of the transistor 221 is coupled to a bias voltage. It should be understood that in other embodiments of this technology, the photocurrent / voltage converter 204 may have, in addition to... Figure 2 In addition to the illustrative configuration shown, another illustrative configuration is provided, which can provide an output voltage in response to the intensity of incident light received by the photoelectric sensor 202 from the external scene. See below for further details. Figures 9 to 11 This paper discusses in detail examples of alternative illustrative configurations of this technology, which can serve as... Figure 2 It can be used as a supplement or alternative to the photocurrent / voltage converter 204.

[0041] Continue to refer to Figure 2 The differential circuit 206 of the event-driven pixel 220 is coupled to the output of the photocurrent / voltage converter 204. In the illustrated embodiment, the differential circuit 206 includes a first capacitor C1 222, a second capacitor C2 223, an amplifier 224, a reset transistor 225, a source follower buffer or transistor 226, and a row select transistor 227. The amplifier 224 of the differential circuit 206 includes an input (e.g., an inverting input) and an output. In some embodiments, the amplifier 224 may be an operational amplifier and / or may further include another input (not shown) coupled to ground (e.g., a negative power rail or another reference voltage), such as a non-inverting input. The first capacitor C1 222 is coupled between the output of the photocurrent / voltage converter 204 (e.g., node A) and the input of the amplifier 224 (e.g., node B), and the second capacitor C2 223 is coupled between the input of the amplifier 224 (e.g., node B) and the output of the amplifier 224 (e.g., node C). Reset transistor 225 is arranged as a reset switch and is also coupled between the input of amplifier 224 (e.g., node B) and the output of amplifier 224 (e.g., node C). Therefore, the second capacitor C2223, amplifier 224, and reset transistor 225 are... Figure 2The transistors are connected in parallel between nodes B and C. As discussed in more detail below, the gate of the reset transistor 225 is configured to receive the reset signal RST output from the reset control circuit 210.

[0042] The first capacitor C1 222, the second capacitor C2 223, the amplifier 224, and / or the reset transistor 225 form a filter amplifier configured to generate a filtered and amplified signal in response to the voltage output by the photocurrent / voltage converter 204 at node A. More specifically, the filter amplifier of the differential circuit 206 includes a high-pass filter configured to filter out lower frequency components from the voltage received from the photocurrent / voltage converter 204. Therefore, the event-driven pixel 220 can ignore slow or gradual changes in the photocurrent generated by the photosensitive sensor 202 in response to incident light from an external scene, and instead detect rapid or sudden changes in the photocurrent generated by the photosensitive sensor 202 in response to incident light. As discussed in more detail below, Figure 2 The filter amplifier can generate a reference signal or voltage at node C that is applied to the gate of the source follower transistor 226.

[0043] The drain of source follower transistor 226 is coupled to a supply voltage (e.g., a positive supply rail or another reference voltage), and the source of source follower transistor 226 is coupled to the drain of row select transistor 227. In some embodiments, source follower transistor 226 is a linear source follower buffer. The source of row select transistor 227 is coupled to column line col. <j>The gate of the row selection transistor is configured to receive the row selection signal rsel. Therefore, based on the signal applied to node C of the gate of the source follower transistor 226, when the row selection signal rsel is applied to the gate of the row selection transistor 227... When asserted, the source follower transistor 226 and the row select transistor 226 can be on the column line col <j>The output is a differential signal. As discussed in more detail below, the differential signal can be (a) the reference signal at the gate of the source follower transistor 226 and (b) the row selection signal rsel. The result of the comparison between the voltages at node A at the assertion time.

[0044] like Figure 2 As shown, the amplifier 224 of the differential circuit 206 is configured to receive the enable signal EN. Enable signal EN Amplifier 224 can be selectively enabled or disabled. For example, as discussed above and in more detail below, event-driven pixel 220 is configured to respond to the row selection signal rsel. The assertion in column line col <j>The output is an analog signal level. In other words, Figure 2 The event-driven pixel 220 can implement frame-based readout (e.g., as a supplement to or alternative to asynchronous readout). Therefore, the enable signal EN... This can be used when event-driven pixel 220 does not output differential signals to column line col. <j>Amplifier 224 can be selectively disabled or placed in a power-down mode (thus reducing the power consumption of the event-driven pixel), and differential signals can be output to column line col at the expected event-driven pixel 220. <j>When (for example, when the row selection signal rsel) When asserted, amplifier 224 may be selectively enabled or placed in power-on mode.

[0045] Figures 3 to 5 These are partial schematic diagrams of amplifiers 324, 424, and 524, which can be implemented in various embodiments of this technology. Figure 2 Amplifier 224. First refer to... Figure 3 Amplifier 324 includes (a) a first transistor 331, (b) a second transistor 332, (c) a power switch assembly 333, (d) a third transistor 334, and (e) a current source 335. In some embodiments, each of these components forms Figure 2 A portion of the event-driven pixel 220. In other embodiments, a subset of these components forms a portion of the event-driven pixel 220, while the remaining components may be located outside the event-driven pixel (e.g., on the periphery). As a specific example, Figure 3 The first transistor 331, the second transistor 332, and the power switch assembly 333, as illustrated within the dashed box, can form part of the event-driven pixel 220, and the third transistor 334 and the current source 335 can be peripheral circuitry systems located outside the event-driven pixel 220.

[0046] As shown, the first transistor 331 is an NMOS transistor, the second transistor 332 is a PMOS transistor, and the third transistor 334 is a PMOS transistor. The first transistor 331 has coupling to... Figure 2 The gate of node B is coupled to the grounded source, and to the drain of the second transistor 332. Figure 2 The drain of node C. The gate of the second transistor 332 is coupled to the gate of the third transistor 334, and the source of the second transistor 322 is coupled to the output of the power switch assembly 333. The drain of the second transistor 332 is also coupled to... Figure 2 Node C.

[0047] The second transistor 332 is driven by a bias potential generated at the gate of the second transistor 322 by the third transistor 334 and the current source 335. More specifically, the third transistor 334 has a source coupled to a supply voltage (e.g., a positive supply rail or another reference voltage) and a drain coupled to the current source 335 and to the gates of the second and third transistors 332 and 334. Therefore, the third transistor 334 operates as a PMOS transistor connected as a matching diode forming a current mirror with the second transistor 332 and the current source 335. The second transistor 332, the third transistor 334, and the current source 335 operate as an active load and limit the maximum cross current in the amplifier 324. Therefore, the first transistor 331 and the second transistor 332 of the amplifier 324 form a current-deficient inverter, wherein (a) the first transistor 331 connects the input of the current-deficient inverter at the gate of the first transistor 331 to the output of the current-deficient inverter at the drain of the first transistor 331, and (b) the second transistor 332 forms an active load based on a current source.

[0048] Power switch assembly 333 includes a first input coupled to a power supply voltage (e.g., a positive power rail or another reference voltage) and a second input coupled to ground. In other embodiments of this technology, power switch assembly 333 includes a first input coupled to a power supply voltage but does not include a second input coupled to ground, and / or power switch assembly 333 includes an unused second or third input (e.g., not coupled to anything). Power switch assembly 333 is configured to receive an enable signal EN (e.g., ...). Figure 2 Enable signal EN The power switch assembly 333 may selectively couple the second transistor 332 to the power supply voltage and / or ground based on the enable signal EN. For example, the power switch assembly 333 may include a multiplexer configured to receive the enable signal EN as a selection signal (e.g., a 2-to-1 multiplexer, or a 3-to-1 multiplexer with a third input described above that is not connected to anything). Continuing this example, the power switch assembly 333 may couple the second transistor 332 to the power supply voltage when the enable signal EN is asserted, and may couple the second transistor 332 to ground or not to anything when the enable signal EN is not asserted. Therefore, when the enable signal EN is not asserted, the amplifier 324 may be placed in a low-power or power-off state (e.g., to save power, extend parallel access). Figure 2 (e.g., the battery life of the imager for event-driven pixel 220). In other embodiments of this technology, amplifier 324 may otherwise switch the power supply voltage to equal ground voltage based on the state of enable signal EN, and / or as in Figure 3 The location shown in the diagram includes a supplement or alternative to the power switch assembly 333, which may be included at other locations (e.g., between ground and the source of the first transistor 331, between the drain of the second transistor 332 and node C, and / or between the drain of the first transistor 331 and node C). In other embodiments, the amplifier 324 may omit the power switch assembly 333, and Figure 2 The differential circuit 206 of the event-driven pixel 220 can simply ignore the output of the amplifier 324 at node C until the row selection signal rsel. It was asserted.

[0049] Now for reference Figure 4 Amplifier 424 includes (a) a first transistor 431, (b) a second transistor 432, (c) a third transistor 434, (d) a current source 435, and (e) a fourth transistor 433. In some embodiments, Figure 4 Each of the components described herein forms Figure 2 The portion of event-driven pixel 220. In other embodiments, Figure 4 A subset of the components described herein forms part of the event-driven pixel 220, while the remaining components may be located outside the event-driven pixel 220 (e.g., on the periphery). As a specific example, Figure 4 The first transistor 431, the second transistor 432, and the fourth transistor 433, as illustrated within the dashed box, can form part of the event-driven pixel 220, while the third transistor 434 and the current source 435 can be peripheral circuitry located outside the event-driven pixel 220. As shown, amplifier 424 is similar to... Figure 3 The amplifier 324, except that it includes a fourth transistor 433 instead of the power switch assembly 333 of the amplifier 324. Therefore, for the sake of brevity, a detailed discussion of the first transistor 431, the second transistor 432, the third transistor 434 and the current source 435 is omitted.

[0050] The fourth transistor 433 has a source coupled to a power supply voltage (e.g., a positive power rail or another reference voltage) and a drain coupled to the source of the second transistor 432. The gate of the fourth transistor 433 is configured to receive an enable signal EN (e.g., ...). Figure 2 Enable signal EN The fourth transistor 433 is the logical opposite of the second transistor 432 and selectively couples the second transistor 432 to the power supply voltage. For example, the fourth transistor 433 can be used as a switch. Therefore, the fourth transistor 433 can couple the source of the second transistor 432 to the power supply voltage when the enable signal EN is asserted, and can decouple the source of the second transistor 430 from the power supply voltage when the enable signal EN is not asserted. Therefore, when the enable signal EN is not asserted, the amplifier 324 can be placed in a low-power or power-off state (e.g., to save power, extend parallel access). Figure 2 (e.g., the battery life of the event-driven pixel 220 imager).

[0051] Now for reference Figure 5 Amplifier 524 includes (a) a first transistor 531, (b) a second transistor 532, (c) a third transistor 534, (d) a current source 535, (e) a fourth transistor 533, and (f) a switch 536 (or a fifth transistor). In some embodiments, Figure 5 Each of the components described herein forms Figure 2 The portion of event-driven pixel 220. In other embodiments, Figure 5 A subset of the components described herein forms part of the event-driven pixel 220, while the remaining components may be located outside the event-driven pixel 220 (e.g., on the periphery). As a specific example, Figure 5 The first transistor 531 and the second transistor 532, as illustrated within the dashed box, can form part of the event-driven pixel 220, and the third transistor 534, the fourth transistor 533, the current source 535, and the switch 536 can be peripheral circuitry systems located outside the event-driven pixel 220.

[0052] As shown, the amplifier 524 is largely similar to Figure 3 Amplifier 324 and Figure 4 Amplifier 424. For example, the first transistor 531 and the second transistor 532 of amplifier 524 form a current-deficient inverter, wherein (a) the first transistor 531 connects the input of the current-deficient inverter at the gate of the first transistor 531 to the output of the current-deficient inverter at the drain of the first transistor 531, and (b) the second transistor 532 forms an active load based on a current source. More specifically, the second transistor 532 is driven by a bias potential generated by a third transistor 534 and a current source 535 at the gate of the second transistor 534. Similar to... Figure 3 and 4 The third transistors 334 and 434, Figure 5 The third transistor 534 operates as a PMOS transistor connected to a matching diode forming a current mirror with the second transistor 532 and the current source 535. Therefore, the second transistor 532, the third transistor 534, and the current source 535 operate as an active load and limit the maximum cross current in the amplifier 524.

[0053] Compared to amplifiers 324 and 424, based on the enable signal EN (e.g., Figure 2 Enable signal EN A bias potential is selectively generated at the gate of the second transistor 532. Specifically, the fourth transistor 533 is a PMOS transistor, comprising a source coupled to a power supply voltage (e.g., a positive power rail or another reference voltage) and a drain coupled to the gate of the second transistor 532 and the gate of the third transistor 534. Additionally, a switch 536 is electrically positioned between (a) the drain and gate of the third transistor 534 and (b) the current source 535. Therefore, when the enable signal EN is asserted, the switch 536 couples the current source 535 to the drain and gate of the third transistor 534, and the fourth transistor 533 is turned off. Thus, when the enable signal EN is asserted, a bias potential is generated at the gate of the second transistor 532. On the other hand, when the enable signal EN is not asserted, the switch 536 decouples the current source 535 from the drain and gate of the third transistor 534 and activates the fourth transistor 533. Thus, the gate of the second transistor 532 is coupled to the power supply voltage, and the second transistor 534 is turned off. Therefore, when the enable signal EN is not asserted, amplifier 324 can be placed in a low-power or power-off state (e.g., to save power, extend parallel input). Figure 2 (e.g., the battery life of the event-driven pixel 220 imager).

[0054] Refer again Figure 2 The differential circuit 206 can therefore be an active differential detector circuit, which includes signal amplification at the output stage of the event-driven pixel 220. As discussed above, the signal amplification at the output stage is expected to (compared to event-driven pixels that do not include signal amplification at the output stage or only include signal amplification at a stage later than the output stage) reduce (a) non-uniformity, nonlinearity, and / or other challenges when correctly setting the operating point of the event-driven pixel 220 or calibrating the event-driven pixel 220, and / or (b) improve noise performance. Consequently, the event-driven pixel 220 is expected to (compared to event-driven pixels that do not include signal amplification at the output stage or only include signal amplification at a stage later than the output stage) reduce false positive and / or false negative event detection, and thus reduce unnecessary wake-ups or image / video transmissions of the image sensor including the event-driven pixel 220. Additionally, as discussed above, when the event-driven pixel 220 does not output the differential signal to the column line col... <j>When powered on, the amplifier 224 of the differential circuit 206 of the event-driven pixel can be de-energized or placed in a low-power state, thereby reducing the power consumption of the event-driven pixel 220. Therefore, the event-driven pixel 220 is expected to provide reduced power consumption while achieving high gain and low noise performance.

[0055] Furthermore, as discussed in more detail below, upon assertion of the reset signal RST, the input and output of amplifier 224 can be shorted together via reset transistor 225. This allows amplifier 224 to automatically return to zero, thereby setting the voltage at node B to be equal to the voltage at node C, which is at an intermediate potential depending on the characteristics of amplifier 224. Therefore, in event-driven pixel 220, offset variations can be largely or completely eliminated. Additionally, by using capacitor matching between the first capacitor C1 222 and the second capacitor C2 223 of the differential circuit 206 of event-driven pixel 220, the gain error of the differential circuit can be kept small.

[0056] It should be understood that in other embodiments of this technology, Figure 2 The amplifier 224 may have the following features: Figure 2 , 3 Another illustrative configuration besides the one shown in Figures 4 and 5. For example, amplifier 224 may include an NMOS / PMOS complementary inverter (not shown) having a current source (not shown) between (a) the drain node of the NMOS transistor and ground voltage or (b) the drain node of the PMOS transistor and supply voltage, similar to the current depletion in a ring oscillator. Furthermore, it should be understood that in other embodiments of this technology, Figure 2 The differential circuit 206 may have the following characteristics: Figure 2 Another illustrative configuration besides the one shown in the diagram.

[0057] Now for reference Figure 2 The event-driven pixel 220 has a reset control circuit 210, which includes a line selection signal rsel configured to receive the line selection signal. The first input (input a) is configured to receive an acknowledgment signal ack. <j>The second input (input b) and the third input (input c) configured to receive the global reset signal GRST. As discussed above, the row selection signal rsel Used to read the differential signal from the differential circuit 206. When column line col <j>The peripheral threshold comparison circuit (e.g., Figure 1 The threshold comparison circuit 108) responds to the row selection signal rsel When an event is detected in the external scene based on the differential signal output from the differential circuit 206, an acknowledgment signal (ack) can be asserted. <j>The global reset signal GRST can be asserted to reset event-driven pixel 220 at any time. For example... Figure 2 As shown, the reset control circuit 210 is configured to apply a reset signal RST to the gate of the reset transistor 225 of the differential circuit 206 via the output (output y) of the reset control circuit 210.

[0058] Figure 6 and 7 These are partial schematic diagrams of reset control circuits 610 and 710, which can be implemented in various embodiments of this technology as follows: Figure 2 The reset control circuit 210. First refer to... Figure 6 The reset control circuit 610 includes an AND logic gate 641, an OR logic gate 642, and a delay element 643. The AND logic gate 641 includes a row selection signal rsel configured to receive the row selection signal via a first input (input a) of the reset control circuit 610. The first input and the second input (input b) configured to receive the acknowledgment signal ack via the reset control circuit 610. <j>The second input of the OR logic gate 642 includes a first input coupled to the output of the AND logic gate 641, a second input configured to receive the global reset signal GRST via the third input (input c) of the reset control circuit 610, and an output (output x) coupled to the input of the delay element 643. The delay element 643 includes an output coupled to the output (output y) of the reset control circuit 610.

[0059] In operation, the reset control circuit 610 is configured to respond to (a) the global reset signal GRST being asserted or (b) the row selection signal rsel. and acknowledgment signal ack <j>When asserted together, the reset signal RST is asserted. In other words, the reset control circuit 610 is configured to assert whenever (a) the global reset signal GRST is asserted or (b) from... Figure 2 The differential circuit 206 of the event-driven pixel 220 reads the differential signal and asserts RST when the differential signal indicates that an event has occurred in the external scene. Otherwise, the reset control circuit 610 outputs the reset signal RST in its unasserted state. As discussed in more detail below, on the falling edge of the output (output x) of the OR logic gate 642, the delay element 643 is configured to hold the reset signal RST in the asserted state for the refractory period.

[0060] Now for reference Figure 7 The reset control circuit 710 contains multiple transistors (in Figure 7 Individually identified as transistors 751 to 758 (the first to eighth transistors) and capacitor 759. Transistors 751 to 754 are arranged as NAND logic gates. More specifically, the source of transistor 751 is coupled to ground (e.g., a negative power rail or another reference voltage), the drain of transistor 751 is coupled to the source of transistor 752, and the gate of transistor 751 is configured to receive an acknowledgment signal ack via the second input (input b) of reset control circuit 710. <j>The drain of the second transistor 752 is coupled to the drain of the third transistor 753 and the drain of the fourth transistor 754, and the gate of the second transistor 752 is configured to receive the row selection signal rsel via the first input (input a) of the reset control circuit 710. The source of the third transistor 753 is coupled to a power supply voltage (e.g., a positive power rail or another reference voltage), the drain of the third transistor 753 is coupled to the drain of the fourth transistor 754, and the gate of the third transistor 753 is configured to receive a row selection signal rsel via a first input (input a) of the reset control circuit 710. The source of the fourth transistor 754 is coupled to the power supply voltage, and the gate of the fourth transistor 752 is configured to receive an acknowledgment signal ack via the second input (input b) of the reset control circuit 710. <j>.

[0061] The seventh transistor 757 of the reset control circuit 710 is arranged as a low-active switch to charge the capacitor 759. Specifically, the source of the seventh transistor 757 is coupled to the power supply voltage, the gate of the seventh transistor 757 is coupled to the output of a NAND logic gate (e.g., to the drain of the second transistor 752, the drain of the third transistor 753, and the drain of the fourth transistor 754), and the drain of the seventh transistor 757 is coupled to the capacitor 759 and to the output (output y) of the reset control circuit 710. The capacitor 759 is coupled between (a) ground and (b) the drain of the seventh transistor 757 and the output (output y) of the reset control circuit 710.

[0062] The fifth transistor 755 and the sixth transistor 756 of the reset control circuit 710 are arranged as transmission transistors. More specifically, (a) the source of the fifth transistor 755 is coupled to the drain of the third transistor 753 and to the drain of the fourth transistor 754; (b) the drain of the fifth transistor 755 is coupled to the drain of the second transistor 752 and to the gate of the seventh transistor 757; (c) the source of the sixth transistor 756 is coupled to ground; and (d) the drain of the sixth transistor 756 is coupled to the drain of the second transistor 752, to the drain of the fifth transistor 755, and to the gate of the seventh transistor 757. The gate of the fifth transistor 755 and the gate of the sixth transistor 756 are each configured to receive a global reset signal via the third input (input c) of the reset control circuit 710.

[0063] The eighth transistor 758 is arranged as a resistive element and is configured to discharge capacitor 759 when a low active switch is released (e.g., when the seventh transistor 757 is turned off). More specifically, the source of the eighth transistor 758 is coupled to ground; the drain of the eighth transistor 758 is coupled to the drain of the seventh transistor 757, to capacitor 759, and to the output (output y) of the reset control circuit 710; and the gate of the eighth transistor 758 is configured to receive a programmable or adjustable bias voltage. As discussed in more detail below, the eighth transistor 758 is configured to hold the reset signal RST in an assertion state for a non-responsive period when the seventh transistor 757 transitions from on to off.

[0064] In operation, the reset control circuit 710 functions similarly to the reset control circuit 610. Specifically, when the row selection signal rsel... and acknowledgment signal ack <j>When both are asserted, the seventh transistor 757 is turned on via the output of the NAND logic gates (formed by the first to fourth transistors 751 to 754), the capacitor 759 is charged, and the reset signal RST output from the reset control circuit 710 is asserted. Alternatively, when the global reset signal GRST is asserted, the seventh transistor 757 is turned on via the sixth transistor 756, which acts as a transfer transistor, the capacitor 759 is charged, and the reset signal RST output from the reset control circuit 710 is asserted. At all other times, the seventh transistor 757 is turned off, the capacitor 759 is discharged or remains uncharged, and the reset signal RST output from the reset control circuit 710 is not asserted.

[0065] When (a) the global reset signal is deasserted after being asserted, or (b) the row selection signal rsel is asserted... Or confirmation signal ack <j>After the two are asserted together, the signal rsel is selected. Or confirmation signal ack <j>When the assertion is cancelled, capacitor 759 of reset control circuit 710 is discharged via eighth transistor 758. The rate at which capacitor 759 is discharged via eighth transistor 758 (a) depends on the programmable bias voltage applied to the gate of eighth transistor 758, and (b) is negatively correlated with the length of the non-responsive period during which the reset signal RST is held after eighth transistor 758 begins discharging capacitor 759. For example, a higher bias voltage can be used for faster discharge of capacitor 759 via eighth transistor 758, and thus for a shorter non-responsive period. Continuing this example, a lower bias voltage can be used for slower discharge of capacitor 759 via eighth transistor 758, and thus for a longer non-responsive period.

[0066] It should be understood that in other embodiments of this technology, Figure 2 The reset control circuit 210 may have the following functions: Figure 2 , 6 And another illustrative configuration besides the one shown in 7, and another schematic diagram may be based on the row selection signal rsel. ACK signal <j>And / or the global reset signal GRST selectively resets the event-driven pixel 220. For example, Figure 6 The reset control circuit 610 may omit or eliminate delay elements (e.g., making the output (output x) of the OR logic gate 642 directly connected to the output (output y) of the reset control circuit 61, and / or making the reset signal RST cancel assertion on the falling edge of the output (output x) of the OR logic gate 642 without a non-response period). As another example, Figure 7 The reset control circuit 710 may lack the global reset signal GRST and the acknowledgment signal ack. <j>and / or row selection signal rsel The non-responsive period following the cancellation of the assertion. As a specific example, the capacitor 759 and / or the eighth transistor 758 of the reset control circuit 710 may be omitted, and / or a bias voltage applied to the gate of the eighth transistor 758 may be set so that the capacitor 759 discharges quickly (e.g., immediately).

[0067] Figure 8 This describes the operation of various embodiments according to the present technology. Figure 2 Timing diagram 860 for the event-driven method of pixel 220. See also: Figure 2 and 8 For clarity and understanding, it is assumed that the photocurrent generated by the photoelectric sensor 202 is linear (e.g., ...). Figure 8 (As shown in the top graph). In response, the photocurrent / voltage converter 204 converts the photocurrent generated by the photosensor 202 into a logarithmically increasing voltage (as shown in the top graph). Figure 8 (As shown in the second curve at the top), the voltage is output at node A of the event-driven pixel 220. In other embodiments, the voltage generated by the photocurrent / voltage converter 204 may be another function of the photocurrent generated by the photoelectric sensor 202 (e.g., linear, square root, etc.). Figure 8 The second enable signal EN2 described herein Not included in the following Figure 2 and 8 In the discussion, but see below for reference. Figure 10 and 11 We will have a detailed discussion.

[0068] exist Figure 8 At time t0, as shown, the amplifier 224 of the differential circuit 206 is activated via the enable signal EN. The event-driven pixel 220 is enabled, and the global reset signal GRST is asserted to initialize the event-driven pixel 220. When the global reset signal GRST is asserted, the reset control circuit 210 of the event-driven pixel 220 asserts the reset signal RST applied to the gate of the reset transistor 225. Subsequently, the reset transistor 225 is turned on, and the output of the amplifier 224 at node C of the event-driven pixel 220 is shorted to the input of the amplifier 224 at node B, so that the amplifier 224 is automatically zeroed. The automatic zeroing of the amplifier 224 (a) makes the voltage at node B equal to the voltage at node C, and (b) sets the voltages at nodes B and C to an intermediate potential value that depends on the characteristics of the amplifier 224 used in the event-driven pixel 220.

[0069] exist Figure 8 At time t1 shown, the global reset signal GRST is released, and the reset control circuit 210 maintains the reset signal RST in its asserted state (e.g., using...). Figure 6 Delay element 643 or Figure 7 The eighth transistor 758) reaches the non-reactive period (e.g. Figure 8 (As shown in the time period between t1 and t2). At time t2, the reset signal RST is not asserted, while amplifier 224 remains enabled (using the enable signal EN). Until time t3, the logarithmic input voltage at node A is properly sampled as a reference signal or voltage by differential circuit 206 at time t2, the end of the non-response period. During the time interval between time t2 (e.g., the end of the non-response period) and time t3 (e.g., the time when amplifier 224 is disabled), feedback between node C and node B of event-driven pixel 220 across second capacitor C2 223 hinders the main voltage swing at node B. Even so, a significant voltage shift may occur at node B due to charge injection during the reset phase. Furthermore, during the time interval between time t2 and time t3, the potential at node C tracks the logarithmic input voltage at node A in an amplified manner.

[0070] At time t3, use the enable signal EN Disable amplifier 224 (e.g., when the enable signal EN is activated) (at the falling edge). When amplifier 224 is disabled, the first capacitor C1 222, the second capacitor C2 223, and the parasitic capacitance Cp at node C can be used as a passive AC-coupled voltage divider, such that (a) the potential observed at node B is more sensitive to voltage changes at node A, and (b) the potential observed at node C is less sensitive to voltage changes at node A.

[0071] At time t5, the circuitry surrounding event-driven pixel 220 asserts the enable signal EN. and row selection signal rsel To enable amplifier 224, and initiate differential signal to column line col via row selection transistor 227. <j>The readout. More specifically, the readout from the enable signal EN. After the assertion, amplifier 224 stabilizes, and the source follower transistor 226 outputs a differential signal dependent on the voltage at node C. The differential signal is an amplified logarithmically differential voltage relative to the initial reset time t2 (e.g., relative to a reference voltage sampled at time t2). In other words, the differential signal is (a) the reference signal at the gate (node ​​C) of source follower transistor 226 and (b) the line selection signal rsel. The result of the comparison between the voltages at node A at the assertion time. In response to the row selection signal rsel The assertion is that the differential signal is output to the column line col via the row selection transistor 227. <j>superior.

[0072] If the event-driven pixel 220's peripheral circuitry (e.g., Figure 1 The threshold comparison circuit 108) is based on the output to the column line col. <j>If the differential signal on the signal detects an event (e.g., if the magnitude of the differential signal exceeds a threshold), then the event is triggered and an acknowledgment signal ack is asserted at time t6. <j>In response, reset control circuit 210 asserts a reset signal applied to the gate of reset transistor 225 to cause amplifier 224 to automatically return to zero and reset event-driven pixel 220. The reset signal RST is then deasserted after a non-responsive period at time t7 on the row selection signal rsel. Or confirmation signal ack <j>The release begins at the time of [unspecified event]. It ends at the end of the non-reactive period (e.g., at [unspecified time]). Figure 8 At time t8, the event-driven pixel 220 uses the differential circuit 206 to sample the logarithmic input voltage at node A again, to use as a new reference voltage in the next readout of the event-driven pixel 220. Figure 8 As shown, amplifier 224 can remain enabled when event-driven pixel 220 samples the logarithmic input voltage at node A at time t8 to ensure that the logarithmic input voltage is properly sampled by differential circuit 206. Amplifier 224 can then be enabled at some time after time t8 via enable signal EN. Disabled. On the other hand, if the circuitry surrounding event-driven pixel 220 does not output to column line col between time t5 and time t6... <j>If the differential signal on the signal detects an event, then no event is triggered (meaning an acknowledgment signal ack is sent). <j>(Not asserted), and event-driven pixel 220 is not reset (there is no assertion of the global reset signal GRST), at least until the next readout of event-driven pixel 220. In other words, when not based on the output to column line col <j>When the differential signal on the device detects an event, the event-driven pixel 220 is not reset, and the differential circuit 206 continues to generate a differential voltage relative to the reference voltage sampled at time t2. In this way, the event-driven pixel 220 provides low-power detection of events occurring in the external scene.

[0073] Figures 9 to 11 These are partial schematic diagrams of photocurrent / voltage converters 904, 1004, and 1104 configured according to various embodiments of the present technology. Each of the photocurrent / voltage converters 904, 1004, and 1104 is shown as coupled to the photoelectric sensor 202, and each of them can serve as... Figure 2 The photocurrent / voltage converter 204 described herein is a supplement or alternative to the one in the present invention. Figure 2 It is used in the event-driven pixel 220 to convert the photocurrent generated by the photoelectric sensor 202 into voltage.

[0074] First refer to Figure 9 The photocurrent / voltage converter 904 includes a transistor 921 having (a) a drain coupled to a supply voltage (e.g., a positive supply rail or another reference voltage) and (b) a gate coupled to a bias voltage. The photocurrent / voltage converter 904 further includes a plurality of transistors 971 stacked in series with each other. Figure 9 Individually identified as first to nth transistors 971a to 971n. The first transistor 971a of the plurality of transistors includes a source coupled to the cathode of the photodetector 202, and the nth transistor 971n of the plurality of transistors includes a source coupled to transistor 921 and a drain of the output (node ​​A) of the photocurrent / voltage converter 904.

[0075] As shown, each of the first to nth transistors 971a to 971n includes a gate configured to receive a corresponding bias voltage. The bias voltages applied to the gates of the first to nth transistors 971a to 971n may be the same, or at least some of the bias voltages may be different from each other. The bias voltages applied to the gates of the first to nth transistors 971a to 971n can weakly invert the first to nth transistors 971a to 971n, such that the first to nth transistors 971a to 971n provide signal amplification. In other words, the first to nth transistors 971a to 971n can be used to amplify the voltage signal generated at the output (node ​​A) of the photocurrent / voltage converter 904.

[0076] Now for reference Figure 10 The photocurrent / voltage converter 1004 includes a transistor 1021 having (a) a source coupled to the cathode of the photosensor 202 and (b) a drain coupled to a power supply voltage (e.g., a positive power rail or another reference voltage). The photocurrent / voltage converter 1004 further includes an amplifier 1081 having (a) an input (e.g., an inverting input) coupled to the cathode of the photosensor 202 and to the source of the transistor 1021, and (b) an output coupled to the output of the photocurrent / voltage converter 1004 (node ​​A) and to the gate of the transistor 1022. In some embodiments, the amplifier 1081 may be an operational amplifier and / or may include another input (not shown) coupled to ground (e.g., a negative power rail or another reference voltage), such as a non-inverting input.

[0077] Amplifier 1081 can be used to increase the response speed to changes in voltage generated at node A between the source and gate of transistor 1021. In other words, amplifier 1081 can be used in low-latency applications to increase the speed at which the differential circuit 206 of event-driven pixel 220 generates a differential voltage based on the voltage at node C. Figure 2 ).

[0078] like Figure 10 As shown, amplifier 1081 is configured to receive enable signal EN2. Enable signal EN2 This can be used to selectively enable or disable amplifier 1081. For example, the enable signal EN2. This can be used to selectively disable amplifier 1081 or put it into a power-off mode when event-driven pixel 220 is not sampling a reference signal or outputting a differential signal (thereby reducing the power consumption of event-driven pixel 220), and can also be used when event-driven pixel 220 is sampling a reference signal or is expected to output a differential signal to column line col. <j>When (for example, when the row selection signal rsel) When asserted, amplifier 1081 is selectively enabled or placed in power-on mode. In some embodiments, the enable signal EN2 Can be Figure 2 Enable signal EN In other embodiments, with differential circuit 206 ( Figure 2 Compared to amplifier 224, amplifier 1081 may require more time to stabilize. In these embodiments, the enable signal EN2 It can be used with the enable signal EN The separated signals enable signal EN2 Enable signal EN1 Asserted (e.g., in) Figure 8 Before time t5 (e.g., at time t5) Figure 8 The time t4) is asserted to enable amplifier 1081, and the differential signal is read from event-driven pixel 220 to column line col. <j>Before proceeding, provide the amplifier 1081 with additional time to stabilize.

[0079] Now for reference Figure 11 The photocurrent / voltage converter 1104 indicates Figure 9 904 photocurrent / voltage converter with Figure 10 The combination of photocurrent / voltage converter 1004. More specifically, photocurrent / voltage converter 1104 includes transistor 1121 and multiple transistors 1171 (in Figure 11 Individually identified as first to nth transistors 1171a to 1171n and amplifier 1181. The plurality of transistors 1171 are stacked in series with each other. The first transistor 1171a of the plurality of transistors includes a cathode coupled to the photosensor 202 and a source coupled to the input (e.g., an inverting input) of amplifier 1181. The nth transistor 1171n of the plurality of transistors includes a drain coupled to the source of transistor 1121. Amplifier 1181 includes an output coupled to the output (node ​​A) of photocurrent / voltage converter 1104 and an output coupled to the gate of transistor 1121. In some embodiments, amplifier 1181 may be an operational amplifier and / or may include another input (not shown) coupled to ground (e.g., a negative power rail or another reference voltage), such as a non-inverting input. Transistor 1121 includes a drain coupled to a power supply voltage (e.g., a positive power rail or another reference voltage).

[0080] Similar to Figure 9 The first to nth transistors 971a to 971n of the photocurrent / voltage converter 904 Figure 11 Each of the first to nth transistors 1171a to 1171n includes a gate configured to receive a corresponding bias voltage. The bias voltages applied to the gates of the first to nth transistors 1171a to 1171n may be the same, or at least some of the bias voltages may be different from each other. The bias voltages applied to the gates of the first to nth transistors 1171a to 1171n may weakly invert the first to nth transistors 1171a to 1171n, such that the first to nth transistors 1171a to 1171n provide signal amplification, as discussed above.

[0081] Similar to Figure 10 The amplifier 1081 of the photocurrent / voltage converter 1004, and amplifier 1181, can be used to increase the response speed to changes in voltage generated at node A between the source and gate of transistor 1021. In other words, amplifier 1181 can be used in low-latency applications to increase the speed at which the differential circuit 206 of event-driven pixel 220 generates a differential voltage based on the voltage at node C. Figure 2 Alternatively, amplifier 1181 may be configured to receive signals from the above-mentioned sources. Figure 10 The discussion of the amplifier 1081 of the photocurrent / voltage converter 1004 and the consistent enable signal EN2 This allows for the selective enabling or disabling of amplifier 1181 (e.g., to reduce the power consumption of photocurrent / voltage converter 1104, and thus reduce the power consumption of event-driven pixel 220).

[0082] C. in conclusion

[0083] The above detailed description of embodiments of this technology is not intended to be exhaustive or to limit the technology to the precise forms disclosed above. Although specific embodiments and examples of this technology have been described above for illustrative purposes, various equivalent modifications are possible within the scope of this technology, as will be recognized by those skilled in the art. For example, although the steps are presented in the order given above, alternative embodiments may perform the steps in a different order. Furthermore, the various embodiments described herein may also be combined to provide other embodiments.

[0084] As will be understood from the foregoing, for illustrative purposes, specific embodiments of the present technology have been described herein, but well-known structures and functions have not been shown or described in detail to avoid unnecessarily obscuring the description of embodiments of the present technology. Where the context permits, singular or plural terms may also include plural or singular terms respectively. Furthermore, unless the word "or" is explicitly limited to referring only to a single item in a list of two or more items, its use in such a list should be interpreted as including (a) any single item in the list, (b) all items in the list, or (c) any combination of items in the list. Additionally, as used herein, the phrase "and / or" in "A and / or B" refers to only A, only B, and both A and B. Furthermore, the terms "comprising," "including," "having," and "with" throughout the text are used to mean at least including the stated features, such that no further number of the same features and / or other features of additional types are excluded. Furthermore, as used herein, the phrases "based on," "depending on," "as a result," and "in response to" should not be interpreted as references to a closed set of conditions. For example, without departing from the scope of this disclosure, an exemplary step described as "based on condition A" may be based on both condition A and condition B. In other words, as used herein, the phrase "based on" should be interpreted in the same manner as the phrase "at least partially based on" or the phrase "at least partially based on". Furthermore, the terms "connected" and "coupled" are used interchangeably herein and refer to both direct and indirect connection or coupling. For example, where the context permits, element A being "connected" or "coupled" to element B may mean (i) A being directly "connected" or directly "coupled" to B and / or (ii) A being indirectly "connected" or indirectly "coupled" to B.

[0085] From the foregoing, it will also be understood that various modifications can be made without departing from this disclosure or the present technology. For example, those skilled in the art will understand that the various components of the present technology can be further divided into sub-components, or the various components and functions of the present technology can be combined and integrated. Furthermore, certain aspects of the present technology described in the context of specific embodiments may be combined or omitted in other embodiments. Moreover, although advantages associated with certain embodiments of the present technology have been described in the context of these embodiments, other embodiments may also exhibit such advantages, and not all embodiments must exhibit such advantages to fall within the scope of the present technology. Therefore, this disclosure and related technologies can cover other embodiments not explicitly shown or described herein. < / j> < / j> < / j> < / j> < / j> < / j> < / j> < / j> < / j> < / j> < / j> < / j> < / j> < / j> < / j> < / j> < / j> < / j> < / j> < / j> < / j> < / j> < / j> < / j> < / j> < / j> < / j> < / j>

Claims

1. An event-driven pixel, comprising: a photosensor configured to generate a photo-current in response to incident light received from an external scene; a photo-current / voltage converter coupled to the photosensor to convert the photo-current to a voltage; a differential circuit coupled to the photo-current / voltage converter, wherein the differential circuit includes a source follower transistor, and wherein the differential circuit is configured to (a) generate a reference signal at a gate of the source follower transistor based at least in part on the voltage, and (b) output a differential signal from the event-driven pixel in response to an assertion of a row select signal applied to a row select transistor of the differential circuit, wherein the differential signal is a result of a comparison between (i) the reference signal and (ii) the voltage at an instant of the assertion of the row select signal; and a reset control circuit coupled to the differential circuit and configured to: initialize the differential circuit in response to an assertion of a global reset signal applied to the reset control circuit, and reset the differential circuit in response to a combination of (a) an assertion of the row select signal applied to the reset control circuit and (b) an assertion of a confirmation signal applied to the reset control circuit when the differential signal indicates a change in the voltage that is greater than a threshold amount.

2. The event-driven pixel of claim 1, wherein the differential circuit further includes a filter amplifier having: a first capacitor coupled to the photo-current / voltage converter, and a second capacitor, an amplifier, and a reset transistor arranged in parallel with each other between the first capacitor and the gate of the source follower transistor.

3. The event-driven pixel of claim 2, wherein the amplifier is configured to receive an enable signal to selectively enable the amplifier.

4. The event-driven pixel of claim 3, wherein the amplifier includes: a current-starved inverter having (a) a first transistor coupling an input of the amplifier to an output of the amplifier and (b) a second transistor; the second transistor is driven by a bias potential generated by a third transistor connected by a matching diode forming a current mirror; and the third transistor includes a drain coupled to a current source.

5. The event-driven pixel of claim 4, wherein the amplifier includes: a power switch component coupled to the current-starved inverter and configured to selectively couple the second transistor of the current-starved inverter to a first power supply voltage and / or a ground voltage based at least in part on the enable signal; or a switch configured to selectively couple the second transistor of the current-starved inverter to a second power supply voltage based at least in part on the enable signal.

6. The event-driven pixel of claim 4, wherein: a first switch selectively couples a gate of the second transistor and a gate of the third transistor to a power supply voltage based at least in part on the enable signal; and a second switch selectively couples the gate of the second transistor and the gate of the third transistor to a ground voltage based at least in part on the enable signal. a second switch to selectively couple the drain of the third transistor to the current source based at least in part on the enable signal.

7. The event-driven pixel of claim 2, wherein a gate of the reset transistor is coupled to the reset control circuit to receive a reset signal output from the reset control circuit.

8. The event-driven pixel of claim 7, wherein the reset control circuit is configured to assert the reset signal in response to (a) the assertion of the global reset signal or (b) the combination of the assertion of the row select signal and the assertion of the confirmation signal, and wherein the reset transistor is configured such that assertion of the reset signal shorts the input and output of the amplifier to each other via the reset transistor.

9. The event-driven pixel of claim 1, wherein the reset control circuit includes: an AND logic gate having a first input configured to receive the row select signal and a second input configured to receive the confirmation signal; an OR logic gate having a first input coupled to an output of the AND logic gate and a second input configured to receive the global reset signal; and a delay element having an input coupled to an output of the OR logic gate and an output coupled to a gate of a reset transistor of the differential circuit.

10. The event-driven pixel of claim 1, wherein the reset control circuit includes: a NAND logic gate having a first input configured to receive the row select signal and a second input configured to receive the confirmation signal; at least one pass transistor coupled to an output of the NAND logic gate and configured to receive the global reset signal; a capacitor coupled between ground and an output of the reset control circuit; a low active switch configured to couple the capacitor to a supply voltage based at least in part on the output of the NAND logic gate, an output of the at least one pass transistor, or a combination thereof; and a resistive element coupled to the capacitor and configured to (a) receive a bias voltage and (b) discharge the capacitor at a rate based at least in part on the bias voltage.

11. The event-driven pixel of claim 1, wherein the photo-current / voltage converter includes: a first transistor having a drain coupled to a supply voltage and a gate coupled to a first bias potential, and a plurality of second transistors arranged in series between the photosensor and a source of the first transistor, wherein each of the second transistors has a gate coupled to a corresponding bias potential, wherein the photo-current / voltage converter generates the voltage between the source of the first transistor and one end of the series of the plurality of second transistors relative to the photosensor.

12. The event-driven pixel of claim 1, wherein the photo-current / voltage converter includes: a transistor having a source coupled to the photosensor and a drain coupled to a supply voltage, and a plurality of transistors arranged in series between the photosensor and a source of the transistor, wherein each of the plurality of transistors has a gate coupled to a corresponding bias potential, wherein the photo-current / voltage converter generates the voltage between the source of the transistor and one end of the series of the plurality of transistors relative to the photosensor. an amplifier having an input coupled to the photodetector and the source of the transistor and an output coupled to a gate of the transistor, wherein the photocurrent / voltage converter generates the voltage at the output of the amplifier.

13. The event-driven pixel of claim 12, wherein the amplifier is configured to receive an enable signal to selectively enable the amplifier.

14. The event-driven pixel of claim 12, wherein the transistor is a first transistor, wherein the photocurrent / voltage converter further includes a plurality of second transistors arranged in series between (a) the photodetector and the input of the amplifier and (b) the source of the first transistor, and wherein each of the second transistors has a gate coupled to a corresponding bias potential.

15. A method of operating an event-driven pixel, comprising: initializing a differential circuit of the event-driven pixel, wherein initializing the differential circuit includes asserting a global reset signal applied to a reset control circuit of the event-driven pixel coupled to the differential circuit; in response to receiving incident light from an external scene, optically generating a photocurrent with a photodetector; converting the photocurrent to a voltage; generating, using a source follower transistor of the differential circuit, a differential signal based at least in part on the voltage, wherein the differential signal is a result of a comparison between (i) a reference signal at a gate of the source follower transistor and (ii) the voltage at an instant of assertion of a row select signal; outputting the differential signal from the event-driven pixel in response to assertion of the row select signal; and resetting the differential circuit in response to a combination of (a) the assertion of the row select signal and (b) assertion of a confirmation signal applied to the reset control circuit when the differential signal indicates a change in the voltage greater than a threshold amount.

16. The method of claim 15, wherein initializing the differential circuit further includes shorting an input and an output of an amplifier of the differential circuit to each other.

17. The method of claim 15, wherein initializing the differential circuit further includes, in response to assertion of the global reset signal, asserting a reset signal applied to a gate of a reset transistor of the differential circuit.

18. The method of claim 17, further comprising: deasserting the global reset signal; and deasserting the reset signal once a non-reactive period has elapsed after deasserting the global reset signal.

19. The method of claim 18, further comprising generating the non-reactive period using a delay element of the reset control circuit.

20. The method of claim 18, further comprising generating the non-reactive period, wherein generating the non-reactive period includes discharging a capacitor of the reset control circuit using a resistive element of the reset control circuit.

21. The method of claim 15, wherein initializing the differential circuit further includes sampling a reference voltage based at least in part on the voltage.

22. The method of claim 21, wherein the reference voltage is a first reference voltage, the photocurrent is a first photocurrent, and the voltage is a first voltage, wherein the method further comprises photo generating a second photocurrent and converting the second photocurrent to a second voltage, and wherein resetting the differential circuit includes sampling a second reference voltage based at least in part on the second voltage.

23. The method of claim 15, further comprising selectively disabling an amplifier of the differential circuit while the photocurrent is being photo generated.

24. The method of claim 15, further comprising selectively enabling an amplifier of the differential circuit while the differential signal is being output.

25. The method of claim 15, wherein converting the photocurrent to the voltage includes converting the photocurrent to the voltage using a photocurrent / voltage converter coupled to the event-driven pixel of the photosensor, and wherein the method further comprises selectively disabling an amplifier of the photocurrent / voltage converter while the photocurrent is being photo generated.

26. The method of claim 15, wherein converting the photocurrent to the voltage includes converting the photocurrent to the voltage using a photocurrent / voltage converter coupled to the event-driven pixel of the photosensor, and wherein the method further comprises selectively enabling an amplifier of the photocurrent / voltage converter after the differential circuit is initialized and before the differential signal is output.

27. The method of claim 15, further comprising preventing a reset of the differential circuit when (a) the row select signal is asserted and (b) neither the global reset signal nor the confirmation signal is asserted.

28. An event-driven pixel, comprising: a photodetector configured to generate a photocurrent in response to incident light received from an external scene; a photocurrent / voltage converter coupled to the photodetector and configured to convert the photocurrent to a voltage; and a differential circuit coupled to the photocurrent / voltage converter and including: an amplifier configured to generate an amplified analog signal level based at least in part on the voltage, and a row select transistor configured to output the amplified analog signal level during a readout of the event-driven pixel, wherein the amplifier is configured to receive an enable signal to selectively disable the amplifier (a) after the event-driven pixel is initialized or reset and (b) before the amplified analog signal level is read out from the event-driven pixel.

29. The event-driven pixel of claim 28, wherein the enable signal is a first enable signal and the amplifier is a first amplifier, wherein the photocurrent / voltage converter includes a second amplifier having an input coupled to the photodetector and an output coupled to the differential circuit, wherein the second amplifier is configured to receive a second enable signal to selectively disable the second amplifier (a) after the event-driven pixel is initialized or reset and (b) before the amplified analog signal level is read out from the event-driven pixel.

30. The event-driven pixel of claim 28, further comprising a reset control circuit coupled to the differential circuit and configured to: initialize the differential circuit in response to an assertion of a global reset signal applied to the reset control circuit; and reset the differential circuit in response to a combination of (a) reading out the amplified analog signal level from the event-driven pixel and (b) an event signal triggered based at least in part on the amplified analog signal level.

31. An event-driven pixel, comprising: a photosensor configured to generate a photo-current in response to incident light received from an external scene; a photo-current / voltage converter coupled to the photosensor to convert the photo-current to a voltage; and a differential circuit coupled to the photo-current / voltage converter and including (a) a source follower buffer and (b) an amplifier having an input coupled to the photo- current / voltage converter and an output coupled to a gate of the source follower buffer, wherein the amplifier is configured to receive an enable signal to selectively enable the amplifier, wherein at least when the amplifier is enabled via the enable signal, the differential circuit is configured to generate a differential signal indicative of whether an event has occurred in the external scene based at least in part on the voltage.

32. The event-driven pixel of claim 31, further comprising a reset control circuit coupled to the differential circuit and configured to reset the differential circuit in response to a combination of (a) reading out the differential signal from the event-driven pixel and (b) an event signal triggered based at least in part on the differential signal.

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