A wide bandgap semiconductor terminal structure and manufacturing method thereof

Abstract

The present invention relates to the field of semiconductor technology, and in particular to a wide bandgap semiconductor terminal structure and a manufacturing method thereof. The terminal structure comprises an epitaxial layer 1, a buried layer and an epitaxial layer 2 which are stacked in sequence, the periphery of the terminal structure is etched downward from the epitaxial layer 2 to form a terminal groove, the epitaxial layer 2 has a main junction region, a plurality of field limiting rings surround the periphery of the main junction region in sequence, and at least the orthographic projection of the field limiting ring along a first direction parallel to the terminal groove is located in the terminal groove, and the field limiting ring extends in the first direction along the bottom of the groove to the buried layer or the epitaxial layer 1. Based on the design of sandwich epitaxy, the present invention manufactures a terminal groove and ensures that at least the orthographic projection of the field limiting ring along a first direction parallel to the terminal groove is located in the terminal groove, so that under the same injection conditions, at least the field limiting ring region is injected deeper, and at the same time, the buried layer can be used as a JTE structure auxiliary field limiting ring terminal structure, which can better modulate the electric field in the terminal region and improve the breakdown characteristics of the device.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and in particular to a wide bandgap semiconductor terminal structure and a manufacturing method thereof. Background Art

[0002] In actual process manufacturing and application, wide bandgap semiconductor terminal structures, especially high-voltage power devices, have problems such as sensitivity to the concentration and interface charge of field limiting rings and / or JTEs, low breakdown voltage, and poor withstand voltage, which affect the reliability and stability of power devices. Therefore, designing a more reliable and efficient power device terminal structure has become one of the problems that technicians in this field need to solve urgently. Summary of the invention

[0003] Based on the above description, the present invention provides a wide bandgap semiconductor terminal structure, which can make terminal grooves while etching gate grooves in a cellular structure, so that under the same injection conditions, at least the injection of the field limiting ring area is deeper, thereby achieving a better effect of modulating the electric field in the terminal area and improving the breakdown characteristics of the device.

[0004] The technical solution of the present invention to solve the above technical problems is as follows: a wide bandgap semiconductor terminal structure, comprising an epitaxial layer 1, a buried layer and an epitaxial layer 2 stacked in sequence, the periphery of the terminal structure is etched downward from the epitaxial layer 2 to form a terminal groove, the epitaxial layer 2 has a main junction region, a plurality of field limiting rings surround the periphery of the main junction region in sequence and at least the orthographic projection of the field limiting rings along a first direction parallel to the first direction is located in the terminal groove, the field limiting rings extend in the first direction along the bottom of the groove to the buried layer or the epitaxial layer 1; the main junction region is any one of the structures shown in (1) to (2) below:

[0005] (1) The main junction region extends along the first direction into the second epitaxial layer or the buried layer or the first epitaxial layer;

[0006] (2) the main junction region includes a first portion located in the epitaxial layer 2 and a second portion located in the buried layer and / or the epitaxial layer 1, and the first portion and the second portion are not connected;

[0007] The first direction is the direction from the second epitaxial layer to the first epitaxial layer.

[0008] The present invention is based on the design of sandwich epitaxy. By etching the terminal groove, under the same injection conditions, at least the field limiting ring area is injected deeper. At the same time, the buried layer can be used as a JTE structure to assist the field limiting ring terminal structure. This structure can better modulate the electric field in the terminal area and improve the breakdown characteristics of the device.

[0009] As a preferred implementation manner, a dielectric layer is formed in the terminal groove.

[0010] As a preferred embodiment, the terminal structure also includes a substrate, the epitaxial layer 1 is made on the substrate, a drain electrode is made on the side of the substrate away from the epitaxial layer 1, and an active electrode is made on the side of the main junction region away from the buried layer.

[0011] As a preferred embodiment, when the periphery of the terminal structure is etched downward from the epitaxial layer 2 to the buried layer to form a terminal groove, the terminal structure also includes a current termination channel made on the periphery of the field limiting ring, and the current termination channel is set through the buried layer.

[0012] As a preferred embodiment, when the periphery of the terminal structure is etched downward from epitaxial layer 2 to form a terminal groove in epitaxial layer 2, the terminal structure also includes a current termination channel and a masking layer arranged on the periphery of the field limiting ring, and the current termination channel is arranged through the buried layer, and the masking layer is made in epitaxial layer 2, and the projections of the masking layer and the current termination channel in the first direction partially or completely overlap to form a masking structure.

[0013] As a preferred implementation, the terminal groove has a single-level or multi-level step structure.

[0014] The present invention also provides a method for manufacturing the above wide bandgap semiconductor terminal structure, comprising the following steps:

[0015] Producing an epitaxial layer 1, a buried layer, and an epitaxial layer 2 stacked in sequence, and etching downwards at one end of the epitaxial layer 2 away from the cellular structure to form a terminal groove;

[0016] The main junction region and the field limiting ring are formed by ion implantation, and then a dielectric layer is deposited in the terminal trench, and source and drain electrodes are made.

[0017] As a preferred embodiment, when the terminal trench is etched to the buried layer, it also includes a step of making a current termination channel in the buried layer by ion implantation.

[0018] As a preferred embodiment, when the terminal trench is etched to terminate in the second epitaxial layer, it also includes the steps of making a current termination channel in the buried layer by ion implantation and making a masking layer in the second epitaxial layer to form a deep masking structure. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Figure 1 A schematic diagram of a longitudinal cross-sectional structure of a wide bandgap semiconductor terminal structure provided by an embodiment of the present invention;

[0020] Figure 2 A schematic diagram of a longitudinal cross-section structure of another wide bandgap semiconductor terminal structure provided by an embodiment of the present invention;

[0021] Figure 3A schematic diagram of a longitudinal cross-section structure of another wide bandgap semiconductor terminal structure provided by an embodiment of the present invention;

[0022] Figure 4 A schematic diagram of a longitudinal cross-section structure of another wide bandgap semiconductor terminal structure provided by an embodiment of the present invention;

[0023] Figure 5 A schematic diagram of a longitudinal cross-section structure of another wide bandgap semiconductor terminal structure provided by an embodiment of the present invention;

[0024] Figure 6 A schematic diagram of a longitudinal cross-section structure of another wide bandgap semiconductor terminal structure provided by an embodiment of the present invention;

[0025] Figure 7 A schematic diagram of a longitudinal cross-section structure of another wide bandgap semiconductor terminal structure provided by an embodiment of the present invention;

[0026] Figure 8 A flow chart of another process for preparing a wide bandgap semiconductor terminal structure provided by an embodiment of the present invention;

[0027] Fig. 9 The breakdown characteristic result of a wide bandgap semiconductor terminal structure provided in Example 1 of the present invention;

[0028] Fig.10 The electric field distribution of a wide bandgap semiconductor terminal structure provided in Example 1 of the present invention when it breaks down, wherein the left side is a distribution diagram and the right side is a distribution curve.

[0029] In the accompanying drawings, the components represented by the reference numerals are listed as follows:

[0030] 1 substrate, 2 epitaxial layer 1, 3 buried layer, 4 epitaxial layer 2, 5 main junction region, 6 field limiting ring, 7 dielectric layer, 8 source electrode, 9 current termination channel, 10 shielding layer. DETAILED DESCRIPTION

[0031] In order to facilitate understanding of the present application, the present application will be described more fully below with reference to the relevant drawings. Embodiments of the present application are provided in the drawings. However, the present application can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, the purpose of providing these embodiments is to make the disclosure of the present application more thorough and comprehensive.

[0032] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art to which this application belongs. The terms used herein in the specification of this application are only for the purpose of describing specific embodiments and are not intended to limit this application.

[0033] It will be appreciated that spatial relationship terms such as "under," "beneath," "below," "under," "above," "above," etc., may be used herein to describe the relationship of an element or feature shown in the figures to other elements or features. It will be appreciated that, in addition to the orientations shown in the figures, spatial relationship terms also include different orientations of the device in use and operation. For example, if the device in the accompanying drawings is flipped, an element or feature described as "under other elements" or "under it" or "under it" will be oriented as being "above" the other elements or features. Thus, the exemplary terms "under" and "under" may include both upper and lower orientations. In addition, the device may also include additional orientations (e.g., rotated 90 degrees or other orientations), and the spatial descriptors used herein are interpreted accordingly.

[0034] It should be noted that in the description of the present application, the drawings and the description of the embodiments are illustrative rather than restrictive, and the same drawings throughout the embodiments of the specification mark the same structure. In addition, for the sake of understanding and ease of description, the drawings may exaggerate the thickness of some layers, films, panels, regions, etc.

[0035] Figures 1 to 7 It is a schematic longitudinal cross-sectional view of a portion of the wide bandgap semiconductor terminal structure described in the present invention.

[0036] like Figures 1 to 7 As shown, a wide bandgap semiconductor terminal structure comprises an epitaxial layer 2, a buried layer 3 and an epitaxial layer 4 which are stacked in sequence, wherein the periphery of the terminal structure is etched downward from the epitaxial layer 4 to form a terminal groove, wherein the epitaxial layer 4 has a main junction region 5, and a plurality of field limiting rings 6 are sequentially arranged around the periphery of the main junction region 5 and at least the orthographic projection of the field limiting rings 6 along a first direction parallel to the first direction is located in the terminal groove, and the field limiting rings 6 extend in the first direction along the lower edge of the groove to the buried layer or the epitaxial layer 1.

[0037] The improvement of the present invention lies in that a terminal groove is formed on the side of the epitaxial layer 2 away from the device cell structure by etching and ensuring that at least the positive projection of the field limiting ring 6 along the first direction parallel to the terminal groove is located in the terminal groove, and then ion implantation is performed under the same conditions to form the main junction region and the field limiting ring. It can be ensured that under the same implantation conditions, at least the field limiting ring 6 is implanted deeper and penetrates into the buried layer 3 or the epitaxial layer 1 4.

[0038] Specifically, the main junction region 5 may adopt any of the structures shown in (1) to (2) below:

[0039] (1) The main junction region 5 extends along the first direction into the epitaxial layer 2 4 or the buried layer 3 or the epitaxial layer 1 2;

[0040] (2) The main junction region includes a first portion located in the epitaxial layer 4 and a second portion located in the buried layer and / or the epitaxial layer 2, and the first portion and the second portion are not connected.

[0041] In the present invention, the first direction is defined as a direction from the epitaxial layer 2 4 to the epitaxial layer 1 2 .

[0042] Based on the design of sandwich epitaxy, the present invention forms a terminal groove by etching. Under the same injection conditions, at least the field limiting ring 6 is injected deeper. The deeper masking structure modulates the electric field in the terminal area. At the same time, the buried layer 3 can serve as a JTE structure auxiliary field limiting ring terminal structure to further modulate the electric field in the terminal area and improve the breakdown characteristics of the device.

[0043] It is understandable that the orthographic projection of the main junction region 5 along the parallel first direction may or may not fall within the terminal trench. When its partial projection falls within the terminal trench, the implantation of part of the main junction region may also be deepened under the same implantation conditions.

[0044] Furthermore, a dielectric layer 7 is formed in the terminal trench, and an active electrode 8 is formed on a side of the main junction region 5 away from the buried layer 3 .

[0045] Furthermore, the epitaxial layer 1 2 is fabricated on the substrate 1 , and a drain electrode is fabricated on a side of the substrate 1 facing away from the epitaxial layer 1 2 .

[0046] Furthermore, the present invention also includes manufacturing a current termination channel 9 on the periphery of the field limiting ring, and the current termination channel 9 is arranged through the buried layer 3.

[0047] In the present invention, the terminal trench can be etched and terminated in the buried layer 3 (including the buried layer and the interface between the buried layer and the second epitaxial layer), the second epitaxial layer, or the first epitaxial layer.

[0048] When the periphery of the terminal structure is etched downward from the epitaxial layer 4 to the buried layer to form a terminal groove, the terminal structure also includes a current termination channel 9 formed on the periphery of the field limiting ring, and the current termination channel 9 is set through the buried layer 3.

[0049] When the periphery of the terminal structure is etched downward from the epitaxial layer 4 to the epitaxial layer 4 to terminate and form a terminal groove, the terminal structure also includes a current termination channel 9 and a shielding layer 10 arranged on the periphery of the field limiting ring 6, the current termination channel 9 is arranged through the buried layer 3, the shielding layer 10 is made in the epitaxial layer 4, and the projections of the shielding layer 10 and the current termination channel 9 in the first direction partially or completely overlap to form a shielding structure.

[0050] When the periphery of the terminal structure is etched downward from the epitaxial layer 2 4 to the epitaxial layer 1 2 to terminate and form a terminal trench, the terminal structure includes neither the current termination channel 9 nor the masking layer 10 .

[0051] It can be understood that the current termination channel 9 is formed by ion implantation, and its implantation type is opposite to that of the buried layer 3. The shielding layer 10 can also be formed by ion implantation, and its implantation type is opposite to that of the current termination channel 9. The doping type of the buried layer 3 is opposite to that of the epitaxial layer 1 2 and the epitaxial layer 2 4, that is, when the epitaxial layer 1 2 and the epitaxial layer 2 4 are N-type epitaxial layers, the buried layer is a P-type buried layer, the current termination channel 9 is an N-type current termination channel, and the shielding layer is a P-type shielding layer.

[0052] Furthermore, the terminal groove can be a single-step structure or a multi-step structure. For details, see Figure 5 , 6 、7.

[0053] The present invention also provides a method for manufacturing the above wide bandgap semiconductor terminal structure, comprising the following steps:

[0054] An epitaxial layer 1 2, a buried layer 3 and an epitaxial layer 2 4 are sequentially stacked, and a terminal groove is formed by etching downward at one end of the epitaxial layer 2 4 away from the cellular structure;

[0055] The main junction region 5 and the field limiting ring 6 are formed by ion implantation, and then a dielectric layer 7 is deposited in the terminal trench, and source and drain electrodes are made.

[0056] Furthermore, when the terminal trench is etched to the buried layer 3, a step of making a current termination channel 9 in the buried layer 3 by ion implantation is also included.

[0057] Furthermore, when the gate trench is etched to the second epitaxial layer 4 and terminated, it also includes the steps of making a current termination channel 9 in the buried layer 3 by ion implantation and making a masking layer 10 in the second epitaxial layer 4 to form a deep masking structure.

[0058] The present invention is described in detail with several specific embodiments below:

[0059] Example 1

[0060] like Figure 1As shown, a wide bandgap semiconductor terminal structure includes a substrate, an N-epitaxial layer 1, a P+ buried layer and an N-epitaxial layer 2 which are stacked in sequence. The periphery of the terminal structure is etched downward from the epitaxial layer 2 to the epitaxial layer 2 to form a terminal groove. The N-epitaxial layer 2 has a main junction region. A plurality of field limiting rings surround the periphery of the main junction region in sequence, and a part of the main junction close to the field limiting ring and the orthographic projection of all the field limiting rings along a first direction are located in the terminal groove. The field limiting ring extends along the lower edge of the groove in the first direction to the epitaxial layer 1, and a drain electrode is made on the side of the substrate away from the N-epitaxial layer 1.

[0061] A dielectric layer is formed in the terminal trench, and an active electrode is formed on the side of the main junction region away from the P+ buried layer.

[0062] It also includes an N+ current termination channel and a P+ shielding layer formed on the periphery of the field limiting ring, wherein the N+ current termination channel runs through the P+ buried layer, the P+ shielding layer is formed in the N-epitaxial layer 2, and the projections of the P+ shielding layer and the N+ current termination channel in the first direction all overlap to form a shielding structure.

[0063] The preparation method of the wide bandgap semiconductor terminal structure is as follows Figure 8 As shown, specifically:

[0064] (1) In wide bandgap semiconductor materials (SiC / GaN / Ga 2 O 3 / C / AlN etc.) substrate to grow an N-epitaxial layer;

[0065] (2) growing a P+ buried layer on the N-epitaxial layer;

[0066] (3) growing an N-epitaxial layer 2 on the P+ buried layer;

[0067] (4) dry etching to form a terminal groove;

[0068] (5) forming a main junction region and a field limiting ring region by ion implantation;

[0069] (6) forming an N+ current termination channel and a P+ shielding layer by P-type ion implantation;

[0070] (7) Interlayer dielectric deposition and etching, source electrode and drain electrode deposition.

[0071] Based on the design of sandwich epitaxy, this embodiment can form a terminal trench by etching the gate trench simultaneously with the cell, and form an N+ current termination channel and a P+ shielding layer by ion implantation. The current termination channel can prevent the P+ buried layer from connecting to the scribe line to generate leakage, and the P+ shielding layer and the P+ buried layers on both sides together modulate the nearby electric field.

[0072] This technical solution allows the main junction area and the field limiting ring area to be injected deeper under the same injection conditions. The deeper shielding structure modulates the electric field in the terminal area, reducing the sensitivity of the breakdown voltage to the concentration and / or width of the N+ current termination channel and the P+ shielding layer. At the same time, the P+ buried layer can serve as a JTE structure auxiliary field limiting ring terminal structure to further modulate the electric field in the middle terminal area and improve the breakdown characteristics of the device. The breakdown characteristics of this structure and the electric field distribution during breakdown are shown in Figure 1. Fig. 9 and Fig.10 shown.

[0073] Example 2

[0074] like Figure 2 As shown, a wide bandgap semiconductor terminal structure includes a substrate, an N-epitaxial layer 1, a P+ buried layer and an N-epitaxial layer 2 which are stacked in sequence. The periphery of the terminal structure is etched downward from the epitaxial layer 2 to the epitaxial layer 2 to form a terminal groove. The N-epitaxial layer 2 has a main junction region. A plurality of field limiting rings surround the periphery of the main junction region in sequence, and a part of the main junction close to the field limiting ring and the orthographic projection of all the field limiting rings along a first direction are located in the terminal groove. The field limiting rings extend along the bottom of the groove in the first direction to the buried layer, and a drain electrode is made on the side of the substrate away from the N-epitaxial layer 1.

[0075] A dielectric layer is formed in the terminal trench, and an active electrode is formed on the side of the main junction region away from the P+ buried layer.

[0076] It also includes an N+ current termination channel and a P+ shielding layer formed on the periphery of the field limiting ring, wherein the N+ current termination channel runs through the P+ buried layer, the P+ shielding layer is formed in the N-epitaxial layer 2, and the projections of the P+ shielding layer and the N+ current termination channel in the first direction all overlap to form a shielding structure.

[0077] Example 3

[0078] like Figure 3 As shown, a wide bandgap semiconductor terminal structure includes a substrate, an N-epitaxial layer 1, a P+ buried layer and an N-epitaxial layer 2 which are stacked in sequence. The periphery of the terminal structure is etched from the epitaxial layer 2 downward to the buried layer to form a terminal groove. The N-epitaxial layer 2 has a main junction region. Several field limiting rings surround the periphery of the main junction region in sequence, and a part of the main junction close to the field limiting ring and the orthographic projection of all the field limiting rings along a parallel first direction are located in the terminal groove. The field limiting ring extends along the lower side of the groove to the epitaxial layer 1 in the first direction. A drain electrode is made on the side of the substrate away from the N-epitaxial layer 1. The structure also includes an N+ current termination channel made on the periphery of the field limiting ring, and the N+ current termination channel runs through the P+ buried layer.

[0079] In the structure, the main junction region includes a first portion located in the N-epitaxial layer 2 and a second portion located in the buried layer and the N-epitaxial layer 1, and the two are not connected, and the field limiting ring extends from the bottom of the terminal groove along the first direction to the N-epitaxial layer 1. A dielectric layer is made in the terminal groove, and an active electrode is made on the side of the main junction region away from the P+ buried layer.

[0080] Example 4

[0081] like Figure 4 As shown, a wide bandgap semiconductor terminal structure includes a substrate, an N-epitaxial layer 1, a P+ buried layer and an N-epitaxial layer 2 which are stacked in sequence. The periphery of the terminal structure is etched downward from the epitaxial layer 2 to the upper edge of the epitaxial layer 1 to form a terminal groove. The N-epitaxial layer 2 has a main junction region. A plurality of field limiting rings surround the periphery of the main junction region in sequence, and a part of the main junction close to the field limiting ring and the orthographic projection of all the field limiting rings along a first direction are located in the terminal groove. The field limiting ring extends along the lower edge of the groove in the first direction to the epitaxial layer 1, and a drain electrode is made on the side of the substrate away from the N-epitaxial layer 1.

[0082] In the structure, the main junction region includes a first part located in the N-epitaxial layer 2 and a second part located in the N-epitaxial layer 1, and the two are not connected, and the field limiting ring extends from the bottom of the terminal groove along the first direction into the N-epitaxial layer 1. A dielectric layer is made in the terminal groove, and an active electrode is made on the side of the main junction region away from the P+ buried layer.

[0083] Example 5

[0084] like Figure 5 As shown, a wide bandgap semiconductor terminal structure includes a substrate, an N-epitaxial layer 1, a P+ buried layer and an N-epitaxial layer 2 which are stacked in sequence. The periphery of the terminal structure is etched downward from the epitaxial layer 2 to the upper edge of the epitaxial layer 1 to form a terminal groove. The N-epitaxial layer 2 has a main junction region. A plurality of field limiting rings surround the periphery of the main junction region in sequence, and a part of the main junction close to the field limiting ring and the orthographic projection of all the field limiting rings along a first direction are located in the terminal groove. The field limiting ring extends along the lower edge of the groove in the first direction to the epitaxial layer 1, and a drain electrode is made on the side of the substrate away from the N-epitaxial layer 1.

[0085] In this structure, the side of the terminal groove close to the main junction region presents a two-step structure (the step is located in the buried layer). When the main junction region is made by ion implantation, the main junction region also presents a step structure, which specifically includes a first part located in the N-epitaxial layer 2 and a second part located in the buried layer and the N-epitaxial layer 1, and the second part is close to the field limiting ring region, wherein the step structure of the second part is formed by etching a two-step terminal groove, and the field limiting ring is made in the N-epitaxial layer 1. A dielectric layer is made in the terminal groove, and an active electrode is made on the side of the main junction region away from the P+ buried layer.

[0086] Example 6

[0087] like Figure 6 As shown, a wide bandgap semiconductor terminal structure includes a substrate, an N-epitaxial layer 1, a P+ buried layer and an N-epitaxial layer 2 which are stacked in sequence. The periphery of the terminal structure is etched downward from the epitaxial layer 2 to the upper edge of the epitaxial layer 1 to form a terminal groove. The N-epitaxial layer 2 has a main junction region. A plurality of field limiting rings surround the periphery of the main junction region in sequence, and a part of the main junction close to the field limiting ring and the orthographic projection of all the field limiting rings along a first direction are located in the terminal groove. The field limiting ring extends along the lower edge of the groove in the first direction to the epitaxial layer 1, and a drain electrode is made on the side of the substrate away from the N-epitaxial layer 1.

[0088] In this structure, the side of the terminal groove close to the main junction region is a two-step structure. When the main junction region is made by ion implantation, the main junction region extends along the first direction to the N-epitaxial layer 1 and has a step structure. The difference from Example 5 is that the steps are located in different positions. In this embodiment, the steps are located in the epitaxial layer 2. The field limiting ring is made in the N-epitaxial layer 1, a dielectric layer is made in the terminal groove, and an active electrode is made on the side of the main junction region away from the P+ buried layer.

[0089] Example 7

[0090] like Figure 7 As shown, a wide bandgap semiconductor terminal structure includes a substrate, an N-epitaxial layer 1, a P+ buried layer and an N-epitaxial layer 2 which are stacked in sequence. The periphery of the terminal structure is etched downward from the epitaxial layer 2 to the upper edge of the epitaxial layer 1 to form a terminal groove. The N-epitaxial layer 2 has a main junction region. A plurality of field limiting rings surround the periphery of the main junction region in sequence, and a part of the main junction close to the field limiting ring and the orthographic projection of all the field limiting rings along a first direction are located in the terminal groove. The field limiting ring extends along the lower edge of the groove in the first direction to the epitaxial layer 1, and a drain electrode is made on the side of the substrate away from the N-epitaxial layer 1.

[0091] In this structure, the side of the terminal trench close to the main junction region is a three-step structure. When the main junction region is made by ion implantation, the main junction region extends along the first direction to the middle of the N-epitaxial layer 1 and is a three-step structure. The field limiting ring is made in the N-epitaxial layer 1. A dielectric layer is made in the terminal trench, and an active electrode is made on the side of the main junction region away from the P+ buried layer.

[0092] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims

1. A wide bandgap semiconductor terminal structure, characterized in that: The present invention comprises an epitaxial layer 1, a buried layer and an epitaxial layer 2 which are stacked in sequence, wherein the epitaxial layer 1 and the epitaxial layer 2 have the same doping type, and the buried layer has a doping type opposite to that of the epitaxial layer 1; the periphery of the terminal structure is etched downward from the epitaxial layer 2 to form a terminal groove, the epitaxial layer 2 has a main junction region, a plurality of field limiting rings surround the periphery of the main junction region in sequence, and at least the orthographic projection of the field limiting rings along a first direction parallel to the field limiting rings is located in the terminal groove, and the field limiting rings extend along the bottom of the groove in the first direction to the buried layer or the epitaxial layer 1; the main junction region is any one of the structures shown in (1) to (2) below: (1) The main junction region extends along the first direction into the epitaxial layer 2 or the buried layer or the epitaxial layer 1; (2) the main junction region includes a first portion located in the epitaxial layer 2 and a second portion located in the buried layer and / or the epitaxial layer 1, and the first portion and the second portion are not connected; The first direction is the direction from the second epitaxial layer to the first epitaxial layer.

2. The wide bandgap semiconductor terminal structure according to claim 1, characterized in that: A dielectric layer is formed in the terminal groove.

3. The wide bandgap semiconductor terminal structure according to claim 2, characterized in that: It also includes a substrate, the epitaxial layer 1 is made on the substrate, a drain electrode is made on the side of the substrate away from the epitaxial layer 1, and an active electrode is made on the side of the main junction region away from the buried layer.

4. The wide bandgap semiconductor terminal structure according to any one of claims 1 to 3, characterized in that: When the periphery of the terminal structure is etched downward from the epitaxial layer 2 to the buried layer to form a terminal groove, the terminal structure also includes a current termination channel made on the periphery of the field limiting ring, and the current termination channel is set through the buried layer.

5. The wide bandgap semiconductor terminal structure according to any one of claims 1 to 3, characterized in that: When the periphery of the terminal structure is etched downward from the epitaxial layer 2 to form a terminal groove in the epitaxial layer 2, the terminal structure also includes a current termination channel and a shielding layer arranged on the periphery of the field limiting ring, the current termination channel is arranged through the buried layer, the shielding layer is made in the epitaxial layer 2, and the projections of the shielding layer and the current termination channel in the first direction partially or completely overlap to form a shielding structure.

6. The wide bandgap semiconductor terminal structure according to claim 1, characterized in that: The terminal groove has a single-stage or multi-stage step structure.

7. The method for manufacturing a wide bandgap semiconductor terminal structure according to any one of claims 1 to 6, characterized in that: The following steps are involved: Producing an epitaxial layer 1, a buried layer, and an epitaxial layer 2 stacked in sequence, and etching downwards at one end of the epitaxial layer 2 away from the cellular structure to form a terminal groove; The main junction region and the field limiting ring are formed by ion implantation, and then a dielectric layer is deposited in the terminal trench, and source and drain electrodes are made.

8. The method for manufacturing a wide bandgap semiconductor terminal structure according to claim 7, characterized in that: When the terminal trench is etched to the buried layer, the method further includes a step of making a current termination channel in the buried layer by ion implantation.

9. The method for manufacturing a wide bandgap semiconductor terminal structure according to claim 7, characterized in that: When the terminal trench is etched to terminate in the second epitaxial layer, the method also includes the steps of making a current termination channel in the buried layer by ion implantation and making a masking layer in the second epitaxial layer to form a deep masking structure.

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