LDO constant overcurrent protection circuit

Abstract

The application belongs to the technical field of integrated circuits, and particularly relates to an overcurrent protection circuit for an LDO. The application provides an LDO constant overcurrent protection circuit, which is composed of a sampling tube, a current comparator and a protection switch. The input of the overcurrent protection circuit, namely the input of the sampling tube, is connected to the gate and source of a power tube POWER MOS, and the output of the overcurrent protection circuit, namely the output of the protection switch, is connected to the input of a buffer stage. The sampling tube samples the current of the power tube, the current comparator compares the processed sampling current with a reference current, and the output of the current comparator controls the turn-off of the protection switch. When no overcurrent occurs, the protection switch does not open the overcurrent protection circuit, so as not to affect the operation of the LDO loop; when overcurrent occurs, the protection switch is opened, the current of the LDO power tube is limited to a constant value, and the LDO is protected from being damaged. The overcurrent protection circuit has the characteristics of miniaturization and low power consumption, and the LDO circuit provided by the application has the ability of fast recovery when overcurrent occurs, and does not have the problem of latch-up.

Description

TECHNICAL FIELD

[0001] The present application belongs to the technical field of integrated circuits, and particularly relates to an over-current protection circuit of LDO. BACKGROUND

[0002] Low Dropout Regulator (LDO) has been widely used because of its low working voltage, low output noise, small output ripple, small size and simple application circuit. Especially in some low-power, low-noise, high-precision and low-cost applications, LDO has a very broad prospect. The over-current protection circuit is an important auxiliary circuit in the LDO circuit, which can quickly adjust the working state of the circuit when the LDO circuit has a large load current or a short circuit phenomenon, and protect the circuit from being damaged.

[0003] The common over-current protection circuits are divided into three categories. One is to turn off the power tube when over-current occurs, and the circuit cannot output current, which has the disadvantage that the circuit needs a certain time to recover to the normal state. Another is a constant current limiting circuit, which limits the current at the over-current point, and has a faster recovery time. The third is a foldback current limiting circuit, which limits the current to a small fixed value when over-current occurs, but there is a risk of LDO latch-up and unable to start the load. Although the constant current limiting has the risk of damaging the power tube for a long time, it is widely used due to its faster recovery time, simpler structure and smaller area compared with the foldback current limiting circuit. SUMMARY

[0004] The purpose of the present application is to provide a constant over-current protection circuit for LDO, which has a more stable and fast recovery capability compared with the traditional over-current protection circuit of turning off the adjusting tube and the foldback current limiting circuit, and does not have the problem of latch-up. On the other hand, the designed over-current protection circuit has a simple structure, small static power consumption and small area.

[0005] To achieve the above purpose, the technical scheme of the present application is as follows:

[0006] An LDO constant over-current protection circuit is composed of a sampling tube, a current comparator and a protection switch tube. The input of the over-current protection circuit, i.e. the input of the sampling tube, is connected to the gate and source of the power tube POWER MOS, and the output of the over-current protection circuit, i.e. the output of the protection switch, is connected to the input of the buffer stage. The sampling tube samples the current of the power tube POWER MOS, the current comparator compares the processed sampling current with the reference current, and the output of the current comparator controls the turn-off of the protection switch. When there is no over-current, the protection switch does not open the over-current protection circuit, thereby not affecting the working of the LDO loop. When there is over-current, the protection switch opens to limit the current of the LDO power tube to a constant value, thereby protecting the LDO from being damaged.

[0007] The current comparator includes a first PMOS transistor MP1, a second PMOS transistor MP2, a third PMOS transistor MP3, a current mirror, a current source I, and a first resistor R1; wherein the gate and drain of the first PMOS transistor MP1 are connected and connected to the gate of the second PMOS transistor MP2, the source of the first PMOS transistor MP1 is connected to the power supply, the drain of the first PMOS transistor MP1 is connected to one end of the current source I, and the other end of the current source I is grounded V SS The gate of the second PMOS transistor MP2 is connected to the gate of the third PMOS transistor MP3, the source of the second PMOS transistor MP2 is connected to one end of the first resistor R1, the drain of the second PMOS transistor MP2 is connected to the input end of the current mirror, and the other end of the first resistor R1 is connected to the power supply; the source of the third PMOS transistor MP3 is connected to the power supply, and the drain of the third PMOS transistor MP3 is connected to the output end of the current mirror;

[0008] The gate of the protection switch is connected to the drain of the third PMOS tube, and the source of the protection switch is grounded V SS , the drain of the protection switch is connected to the output of EA in LDO;

[0009] The gate of the sampling tube is connected to the gate of the power tube in the LDO, the source of the sampling tube is connected to the drain of the power tube in the LDO, and the drain of the sampling tube is connected to the source of the second PMOS tube MP2.

[0010] The beneficial effects of the present invention are:

[0011] (1) The LDO using the present invention has a fast overcurrent recovery capability.

[0012] (2) The LDO using the present invention has a stable overcurrent limit.

[0013] (3) The present invention has low static power consumption.

[0014] (4) The overcurrent protection circuit of the present invention has a simple structure and can save chip area. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] Figure 1 This is a diagram of the constant overcurrent protection circuit architecture proposed by the present invention;

[0016] Figure 2 This is a circuit diagram of a constant overcurrent protection circuit and a feedback loop proposed by the present invention;

[0017] Figure 3 This is the simulation waveform for functional verification of the constant overcurrent protection circuit proposed in the present invention;

[0018] Figure 4 This is a simulation waveform of the static power consumption of the constant overcurrent protection circuit of the present invention. DETAILED DESCRIPTION

[0019] A LDO constant overcurrent protection circuit is composed of a sampling tube, a current comparator and a protection switch tube. Other LDO components include EA, buffer stage and POWER MOS. Figure 1 The sampling tube's input is connected to the gate and source of the POWER MOS power transistor, sampling the POWER MOS current. Its output is connected to the input of a current comparator. The current comparator compares the processed sampled current with a reference current to generate an output. The output of the current comparator controls the shutdown of a protection switch, whose output is connected to the input of a buffer stage. When there is no overcurrent, the switch remains closed, and the overcurrent protection circuit does not affect the operation of the LDO loop. When there is overcurrent, the protection switch opens, and the overcurrent protection structure forms negative feedback with the LDO buffer stage and POWER MOS, clamping the LDO power transistor gate voltage and thus limiting the LDO power transistor current to a constant value. This stabilizes the power transistor gate voltage and produces a constant current limit.

[0020] The gate of the sampling tube MS is connected to the gate of the power tube POWER MOS, the source of the sampling tube MS is connected to the drain of the power tube POWER MOS, and the drain of the sampling tube MS is connected to the source of the second PMOS tube MP2.

[0021] The gate of the first PMOS transistor MP1 of the current comparator is connected to its own drain and the gate of the second PMOS transistor MP2, the source of the first PMOS transistor MP1 is connected to the power supply, the drain of the first PMOS transistor MP1 is connected to the current source I, and the other end of the current source I is grounded V SS The gate of the second PMOS transistor MP2 is connected to the gate of the third PMOS transistor MP3. The source of the second PMOS transistor MP2 is connected to one end of the first resistor R1. The other end of the first resistor R1 is connected to a power supply. The drain of the second PMOS transistor MP2 is connected to the IN terminal of the current mirror. The source of the third PMOS transistor MP3 is connected to the power supply. The drain of the third PMOS transistor MP3 is connected to the OUT terminal of the current mirror and the gate of the switch transistor MN1.

[0022] The gate of the switch tube MN1 is connected to the OUT terminal of the current mirror and the drain of the third PMOS tube MP3, and the source of the switch tube MN1 is grounded V SS The drain of the switch tube MN1 is connected to the buffer stage input and the EA output V EO .

[0023] like Figure 2 In the overcurrent protection circuit and the feedback loop circuit, a small resistance first resistor R1 is selected to make the drain voltage of the sampling tube MS less than and close to the power supply value, and the source of the sampling tube MS is connected to the output V OUT The source voltage of the sampling tube MS is less than its own drain voltage V S, the sampling tube MS source drain interchanges work, the sampling tube MS extracts current from the first resistance R1, and the current flows from the drain to the source of the sampling tube MS.

[0024] As Figure 2 The first PMOS tube MP1, the second PMOS tube MP2 and the third PMOS tube MP3 of the current comparator are proportional in size, 1: m: k, and m > k.

[0025] When there is no overcurrent, the current I2 of the second PMOS tube MP2 is greater than the current I3 of the third PMOS tube MP3, and the current of the second PMOS tube MP2 is copied to the current mirror OUT end through the current mirror structure. At the same time, the current of the current mirror OUT end in the same branch is greater than the current I3 of the third PMOS tube MP3, causing the tube of the current mirror OUT end to enter the linear region. At this time, the gate voltage of the switch tube MN1 is low, the switch tube MN1 is not opened, and the output voltage of the error amplifier in the LDO loop is not affected, and the LDO works normally.

[0026] When there is overcurrent, the gate of the sampling tube MS is connected to the gate of the power tube POWER MOS, the gate voltage is reduced, the current of the sampling tube MS is increased, the current extracted from the first resistance R1 by the sampling tube MS is increased, causing the current I2 of the second PMOS tube MP2 to be smaller than the current I3 of the third PMOS tube MP3, and the current I2 of the second PMOS tube MP2 is copied to the OUT end of the current mirror through the current mirror structure. At this time, the current of the current mirror OUT end in the same branch is smaller than the current I3 of the third PMOS tube MP3, causing the third PMOS tube MP3 to have a tendency to enter the linear region. At this time, the gate voltage of the switch tube MN1 is high, the switch tube MN1 is opened, and the drain of the switch tube MN1 is low, that is, the EA output of the LDO and the input of the buffer stage are low, thereby pulling up the output drain of the buffer stage and the gate of the power tube POWER MOS, forming a negative feedback and V OUT The structure of the negative feedback causes the gate of the switch tube MN1 to be stable at a certain value when there is overcurrent, and no tube enters the linear region.

[0027] The overcurrent limit size of the overcurrent protection circuit is related to m, k, the sampling ratio of the sampling tube MS, and the size of the first resistance R1. The specific current limit size is

[0028] In the formula, K1 is the ratio of the power tube POWER MOS to the sampling tube MS, K p

[0029] The Figure 3 ​The simulation waveform of the constant over-current protection circuit in a proportional setting is verified. The load current source of the LDO is gradually increased from 0 to 1A, and the output voltage starts to decrease rapidly at about 800mA, until it reaches zero at 840mA. The transient simulation results show that the current limit has good constant current limiting function. The current limit of the constant over-current protection circuit can be adjusted by changing the size of the first resistor R1, the size of the sampling tube or the size of the PMOS tube m, k.

[0030] Figure 4 The simulation waveform of the constant over-current protection circuit in a proportional setting is verified. The load current source of the LDO is gradually increased from 0 to 1A, and the output voltage starts to decrease rapidly at about 800mA, until it reaches zero at 840mA. The transient simulation results show that the current limit has good constant current limiting function. The current limit of the constant over-current protection circuit can be adjusted by changing the size of the first resistor R1, the size of the sampling tube or the size of the PMOS tube m, k.

[0031] The LDO circuit of the application provides a constant current limit, so that the power tube current of the LDO circuit can be kept at a constant current limit when the load is too large. The LDO circuit of the application has the characteristics of fast recovery when over-current, no latch problem and small size and low power consumption over-current protection, which can meet the requirements of some LDOs for small size and low power consumption.

Claims

1. An LDO constant overcurrent protection circuit, characterized in that, The sampling tube, the current comparator and the protection switch are connected in series. The current comparator comprises a first PMOS tube MP1, a second PMOS tube MP2, a third PMOS tube MP3, a current mirror, a current source I and a first resistor R1; wherein the gate and the drain of the first PMOS tube MP1 are connected, the gate of the first PMOS tube MP1 is connected with the gate of the second PMOS tube MP2, the source of the first PMOS tube MP1 is connected with a power supply, the drain of the first PMOS tube MP1 is connected with one end of the current source I, the other end of the current source I is connected with a ground V SS ; the gate of the second PMOS tube MP2 is connected with the gate of the third PMOS tube MP3, the source of the second PMOS tube MP2 is connected with one end of the first resistor R1, the drain of the second PMOS tube MP2 is connected with the input end of the current mirror, the other end of the first resistor R1 is connected with a power supply; the source of the third PMOS tube MP3 is connected with a power supply, and the drain of the third PMOS tube MP3 is connected with the output end of the current mirror. The gate of the protection switch is connected to the drain of the third PMOS tube MP3, the source of the protection switch is connected to the ground V SS , and the drain of the protection switch is connected to the output of EA in the LDO. The gate of the sampling tube is connected to the gate of the power tube in the LDO, the source of the sampling tube is connected to the drain of the power tube in the LDO, and the drain of the sampling tube is connected to the source of the second PMOS tube MP2.

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