Leakage current processing circuit, pixel circuit, display panel, and display device

Abstract

The application discloses a leakage current processing circuit, a pixel circuit, a display panel and a display device. The leakage current processing circuit comprises: a resistance unit, an input end of the resistance unit being coupled to a first source-drain electrode of a thin film transistor, and an output end of the resistance unit being coupled to a pixel electrode; and an operational amplifier unit, an input end of the operational amplifier unit being coupled to the resistance unit, and an output end of the operational amplifier unit being coupled to the output end of the resistance unit through a target capacitor. The operational amplifier unit converts a sampling voltage of a sampling resistor in the resistance unit into a first leakage voltage in response to the leakage current of the resistance unit, inverses the first leakage voltage to obtain a second leakage voltage, and outputs the second leakage voltage to the target capacitor, so that the target capacitor offsets part of a pixel electrode voltage output from the output end of the resistance unit to the pixel electrode. In this way, the pixel voltage input to the pixel electrode is reduced, and the effect of improving the leakage of the thin film transistor is achieved.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of display panel, in particular to a leakage current processing circuit, a pixel circuit, a display panel and a display device. BACKGROUND

[0002] In the technical field of display panel, a thin film transistor (TFT) is used as a switch in the display panel to form a conductive channel between the source / drain and the gate after receiving a high level on the gate line, so that the first source / drain and the second source / drain, which are originally not conductive, are turned on under the action of the conductive channel. After charging is completed, the high level of the gate line is converted to a low level, so that the TFT channel disappears, the first source / drain and the second source / drain are mutually cut off, and the pixel electrode voltage is maintained.

[0003] However, the TFT used in the current display panel industry still has a leakage current between the first source / drain and the second source / drain even when the gate line is at a low level, which causes the pixel electrode voltage to continue to be charged by the data line under the action of the leakage current after charging is completed, resulting in a change in liquid crystal penetration. SUMMARY

[0004] The present application provides a leakage current processing circuit, a pixel circuit, a display panel and a display device, which can reduce the pixel voltage input to the pixel electrode to improve the leakage of the thin film transistor.

[0005] In a first aspect, the present application provides a leakage current processing circuit, comprising: a resistance unit, an input end of the resistance unit being coupled to a first source / drain of a thin film transistor, and an output end of the resistance unit being coupled to a pixel electrode; an operational amplifier unit, an input end of the operational amplifier unit being coupled to the resistance unit, and an output end of the operational amplifier unit being coupled to the output end of the resistance unit through a target capacitor; the operational amplifier unit converts a sampling voltage of a sampling resistor in the resistance unit into a first leakage voltage in response to the leakage current of the resistance unit, and inversely phases the first leakage voltage to obtain a second leakage voltage and outputs the second leakage voltage to the target capacitor, so as to use the target capacitor to offset part of the pixel voltage output from the output end of the resistance unit to the pixel electrode.

[0006] The resistance unit comprises: a first resistor, a first end of the first resistor being coupled to the first source / drain of the thin film transistor, and a second end of the first resistor being coupled to the pixel electrode; a sampling resistor, a first end of the sampling resistor being coupled to the first source / drain of the thin film transistor; and a voltage dividing resistor, a first end of the voltage dividing resistor being coupled to a second end of the sampling resistor, and a second end of the voltage dividing resistor being coupled to the second end of the first resistor.

[0007] The operation amplification unit comprises: an operation amplifier, a first end of a sampling resistor is coupled to a non-inverting input terminal of the operation amplifier, and a second end of the sampling resistor is coupled to an inverting input terminal of the operation amplifier; wherein the first end of the sampling resistor is coupled to a first source-drain electrode of a thin film transistor; an inverting amplifier, an inverting input terminal of the inverting amplifier is coupled to an output terminal of the operation amplifier, a non-inverting input terminal of the inverting amplifier is grounded, and an output terminal of the inverting amplifier is coupled to a target capacitor; the operation amplifier converts a sampling voltage of the sampling resistor into a first leakage voltage output in response to a leakage current of the resistor unit, and the inverting amplifier inverts the first leakage voltage to obtain a second leakage voltage and outputs the second leakage voltage to the target capacitor.

[0008] The operation amplification unit further comprises: a second resistor, coupled between the non-inverting input terminal of the operation amplifier and the first end of the sampling resistor; a third resistor, a first end of the third resistor is coupled to a coupling point of the second resistor and the non-inverting input terminal of the operation amplifier, and a second end of the third resistor is grounded; a fourth resistor, coupled between the inverting input terminal of the operation amplifier and the second end of the sampling resistor; and a fifth resistor, coupled between the inverting input terminal of the operation amplifier and the output terminal of the operation amplifier.

[0009] The second resistor, the third resistor, the fourth resistor and the fifth resistor have the same resistance value.

[0010] The operation amplification unit further comprises: a sixth resistor, coupled between the output terminal of the operation amplifier and the inverting input terminal of the inverting amplifier; and a seventh resistor, coupled between the output terminal of the inverting amplifier and the inverting input terminal of the inverting amplifier.

[0011] The first leakage voltage is equal to the sampling voltage.

[0012] In a second aspect, the present application provides a pixel circuit, comprising: a thin film transistor; a pixel capacitor; a storage capacitor; a pixel electrode; a leakage current processing circuit, the leakage current processing circuit being coupled between a first source-drain electrode of the thin film transistor and the pixel electrode, one end of the storage capacitor and the pixel capacitor being coupled between the leakage current processing circuit and the pixel electrode; the leakage current processing circuit being the leakage current processing circuit provided in the first aspect.

[0013] In a third aspect, the present application provides a display panel, comprising the leakage current processing circuit provided in the first aspect or the pixel circuit provided in the second aspect.

[0014] In a fourth aspect, the present application provides a display device, comprising the display panel provided in the third aspect.

[0015] The beneficial effects of the present application are: different from the prior art, the leakage current processing circuit, the pixel circuit, the display panel and the display device provided by the present application, the operational amplifier unit in the leakage current processing circuit converts the sampling voltage of the sampling resistor in the resistance unit into the first leakage voltage in response to the resistance unit through the leakage current, and the second leakage voltage is obtained by inverting the first leakage voltage and output to the target capacitor, the target capacitor is used to offset part of the pixel voltage output to the pixel electrode from the output end of the resistance unit, the pixel voltage input to the pixel electrode is reduced, and the effect of improving the leakage of the thin film transistor is achieved. BRIEF DESCRIPTION OF DRAWINGS

[0016] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed in the embodiment description will be briefly introduced. Obviously, the drawings in the following description are only some embodiments of the present application, and other drawings can be obtained by those skilled in the art without creative labor. Among them:

[0017] Figure 1 is a liquid crystal penetration schematic diagram provided by the present application;

[0018] Figure 2 is a pixel voltage waveform comparison schematic diagram of TFT without leakage current and with leakage current provided by the present application;

[0019] Figure 3 is a structure schematic diagram of an embodiment of the pixel circuit in the related art;

[0020] Figure 4 is a structure schematic diagram of an embodiment of the leakage current processing circuit provided by the present application;

[0021] Figure 5 is a structure schematic diagram of an embodiment of the resistance unit provided by the present application;

[0022] Figure 6 is a structure schematic diagram of another embodiment of the leakage current processing circuit provided by the present application;

[0023] Figure 7 is a structure schematic diagram of another embodiment of the pixel circuit provided by the present application;

[0024] Figure 8 is a structure schematic diagram of an embodiment of the display panel provided by the present application;

[0025] Figure 9 is a structure schematic diagram of another embodiment of the display panel provided by the present application;

[0026] Figure 10 is a structure schematic diagram of an embodiment of the display device provided by the present application. DETAILED DESCRIPTION

[0027] The technical solutions in the embodiments of the present application will be described clearly and completely below with reference to the drawings in the embodiments of the present application. It can be understood that the specific embodiments described herein are only used to explain the present application, but not to limit the present application. In addition, it should be noted that, for the convenience of description, only parts related to the present application are shown in the drawings, but not all structures. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative work are within the scope of the present application.

[0028] Reference to“an embodiment” herein means that a particular feature, structure, or characteristic described in connection with the embodiment can be included in at least one embodiment of the application. The appearances of the phrase that the phrase in various places in the specification are not necessarily all referring to the same embodiment, or are necessarily mutually exclusive or alternative embodiments. It is explicitly and implicitly understood that the embodiments described herein are combinable.

[0029] In the field of display panel technology, a thin film transistor (TFT) is used as a switch in a display panel to form a conductive channel between a-si (amorphous silicon) between a source / drain and a gate after receiving a high level on a scanning (gate) line, to turn on the first source / drain and the second source / drain which are originally not turned on under the action of the conductive channel, and to keep the pixel electrode voltage after the scanning line high level is converted to low level, so that the TFT channel disappears, the first source / drain and the second source / drain are mutually cut off, and the pixel electrode voltage is kept. In some embodiments, the first source / drain described above can be a drain or a source, and the second source / drain can be a drain or a source. That is, when the first source / drain is a source, the second source / drain is a drain. When the first source / drain is a drain, the second source / drain is a source.

[0030] However, the TFT used in the current display panel industry still has a leakage current between the first source / drain and the second source / drain even when the scanning line is at a low level, which causes the pixel electrode to continue to be charged by the data (source) line under the action of the leakage current after the charging is completed, resulting in changes in liquid crystal penetration, as shown in Figure 1 .

[0031] Further, the pixel voltage waveform of the pixel electrode when the TFT has no leakage current and when the TFT has a leakage current is as shown in Figure 2 . The circuit in the related art is as shown in Figure 3 , in which the first source / drain of the thin film transistor TFT is coupled with a pixel capacitor Cls, a storage capacitor Cs, and a pixel electrode, wherein the leakage current is represented by I leak .

[0032] In view of this, the present application proposes any of the following technical solutions to solve the at least one technical problem.

[0033] Referring to Figure 4 , Figure 4 is a structural schematic diagram of an embodiment of the leakage current processing circuit provided by the present application. The leakage current processing circuit 100 comprises a resistance unit 10 and an operational amplification unit 20.

[0034] The input end of the resistance unit 10 is coupled to the first source-drain electrode of a thin film transistor TFT, and the output end of the resistance unit 10 is coupled to a pixel electrode. The resistance unit 10 can be composed of a plurality of resistances, and the total resistance value of the resistance unit 10 is small, so as not to occupy too much voltage and affect the charging of the pixel electrode.

[0035] The input end of the operational amplification unit 20 is coupled to the resistance unit 10, and the output end of the operational amplification unit 20 is coupled to the output end of the resistance unit 10 through a target capacitor C1.

[0036] The operational amplification unit 20 converts the sampling voltage of the sampling resistance in the resistance unit 10 into a first leakage voltage in response to the leakage current of the resistance unit 10, and inversely phases the first leakage voltage to obtain a second leakage voltage and outputs the second leakage voltage to the target capacitor C1, so as to offset part of the pixel voltage output from the output end of the resistance unit 10 to the pixel electrode by the target capacitor C1.

[0037] Since one end of the target capacitor C1 is coupled to the output end of the operational amplification unit, the other end of the target capacitor C1 is coupled to the output end of the resistance unit 10. And the voltage at one end of the target capacitor C1 is the inversely-phased second leakage voltage, so that the pixel voltage output from the output end of the resistance unit 10 to the pixel electrode will be offset. For example, the second leakage voltage is V leak , the voltage output from the output end of the resistance unit 10 is V pixel , and the actual pixel voltage V pixel’ input to the pixel electrode is V pixel -V leak .

[0038] In this embodiment, the operational amplification unit 20 in the leakage current processing circuit 100 converts the sampling voltage of the sampling resistance in the resistance unit 10 into a first leakage voltage in response to the leakage current of the resistance unit 10, inversely phases the first leakage voltage to obtain a second leakage voltage and outputs the second leakage voltage to the target capacitor C1, so as to offset part of the pixel voltage output from the output end of the resistance unit 10 to the pixel electrode by the target capacitor C1, reduce the pixel voltage input to the pixel electrode, and achieve the effect of improving the leakage of the thin film transistor.

[0039] Referring to Figure 5 , Figure 5is a structural schematic diagram of an embodiment of a resistance unit 10 provided by the present application. The resistance unit 10 includes a first resistance R1, a sampling resistance R2, and a voltage dividing resistance R3.

[0040] A first end of the first resistance R1 is coupled to a first source-drain of a thin film transistor TFT, and a second end of the first resistance R1 is coupled to a pixel electrode.

[0041] A first end of the sampling resistance R2 is coupled to a first source-drain of a thin film transistor.

[0042] A first end of the voltage dividing resistance R3 is coupled to a second end of the sampling resistance R2, and a second end of the voltage dividing resistance R3 is coupled to the second end of the first resistance R1. In some embodiments, the number of voltage dividing resistances R3 can be multiple.

[0043] The resistance value of the first resistance R1 is less than the resistance values of the sampling resistance R2 and the voltage dividing resistance R3. It can be understood that the overall resistance value of the parallel resistances is less than the resistance value of any one of the resistances, and thus the total resistance value of the resistance unit 10 is small through the above connection mode, which does not affect the subsequent charging of the pixel electrode.

[0044] Referring to Figure 6 , Figure 6 is a structural schematic diagram of another embodiment of a leakage current processing circuit provided by the present application. The above-mentioned resistance unit 10 includes a first resistance R1, a sampling resistance R2, and a voltage dividing resistance R3.

[0045] The above-mentioned operational amplification unit 20 includes an operational amplifier AMP1 and an inverting amplifier AMP2.

[0046] A non-inverting input end of the operational amplifier AMP1 is coupled to a first end of the sampling resistance R2, and an inverting input end of the operational amplifier is coupled to a second end of the sampling resistance R2; wherein the first end of the sampling resistance R2 is coupled to a first source-drain of a thin film transistor TFT.

[0047] An inverting input end of the inverting amplifier AMP2 is coupled to an output end of the operational amplifier AMP1, a non-inverting input end of the inverting amplifier AMP2 is grounded, and an output end of the inverting amplifier AMP2 is coupled to a target capacitor C1.

[0048] The operational amplifier AMP1 converts the sampling voltage of the sampling resistance R2 into a first leakage voltage output in response to the leakage current of the resistance unit 10, and the inverting amplifier AMP2 inverts the first leakage voltage to obtain a second leakage voltage and outputs the second leakage voltage to the target capacitor C1.

[0049] Further, the operational amplification unit further includes a second resistance R6, a third resistance R7, a fourth resistance R4, a fifth resistance R5, a sixth resistance R8, and a seventh resistance R9.

[0050] The second resistor R6 is coupled between the non-inverting input of the operational amplifier AMP1 and the first end of the sampling resistor R2.

[0051] The first end of the third resistor R7 is coupled to the coupling point of the second resistor R6 and the non-inverting input of the operational amplifier AMP1, and the second end of the third resistor R7 is grounded.

[0052] The fourth resistor R4 is coupled between the inverting input of the operational amplifier AMP1 and the second end of the sampling resistor R2.

[0053] The fifth resistor R5 is coupled between the inverting input of the operational amplifier AMP1 and the output of the operational amplifier AMP1.

[0054] The sixth resistor R8 is coupled between the output of the operational amplifier AMP1 and the inverting input of the inverting amplifier AMP2.

[0055] The seventh resistor R9 is coupled between the output of the inverting amplifier AMP2 and the inverting input of the inverting amplifier AMP2.

[0056] In some embodiments, the second resistor R6, the third resistor R7, the fourth resistor R4 and the fifth resistor R5 described above have the same resistance.

[0057] The first leakage voltage is equal to the sampling voltage, i.e. the voltage difference across the sampling resistor R2.

[0058] In combination Figure 6 The following is described:

[0059] A section of the wire connecting the first source-drain of the TFT and the pixel electrode is cut off, and a parallel resistor unit 10 (the first resistor R1, the sampling resistor R2 and the voltage dividing resistor R3) is used to replace it, wherein the first resistor R1 needs to be selected to have a small resistance value (the overall resistance value of the parallel resistor is smaller than the resistance value of any one of the resistors). The influence of the parallel resistor between the first source-drain of the TFT and the pixel electrode on charging can be reduced, so that the charging of the pixel electrode will not be affected. An operational amplifier unit is added at the sampling resistor R2. When the TFT device is monitored to have a leakage current passing through the sampling resistor R2 (the leakage current passing through the sampling resistor R2 is denoted as I leak ), the operational amplifier unit is converted into a voltage output (denoted as △V). A target capacitor C1 is added beside the storage capacitor. One end of the target capacitor C1 is connected to the pixel capacitor Clc and the storage capacitor Cs, and the other end is connected to the output of the operational amplifier unit.

[0060] The relationship between the TFT leakage current and the pixel electrode voltage is: △V = I leak *t hold / C. Wherein I leak represents the TFT device leakage current. thold represents the pixel electrode voltage holding time, that is, the time interval between the completion of charging and the next charging.

[0061] When the leakage current I leak flows through the sampling resistor R2, the current is converted into a feedback voltage by the operational amplifier AMP1. The operational amplifier AMP1 works as follows: the voltage on the sampling resistor R2 is I leak *R2, the high voltage between the sampling resistor R2 (the voltage at point B) is V1, and the low voltage between the sampling resistor R2 (the voltage at point D) is V2. Herein, V1-V2=I leak *R2.

[0062] Herein, by the virtual short and virtual open of the operational amplifier AMP1, it can be obtained that (V2-(V-)) / R4=(V--Vout) / R5, and (V1-(V+)) / R6=V+ / R7. V-=V+.

[0063] In some embodiments, for the convenience of operation, the resistance values of R4, R5, R6 and R7 are set to be consistent, and the input-output relationship of the operational amplifier can be obtained as follows: Vout=I leak *R2. Then, the Vout (the first leakage voltage) is converted into -Vout (the second leakage voltage) by the reverse amplification circuit, and is fed back to the target capacitor C1. Due to the principle that the voltage difference between the target capacitor C1 cannot jump, the lower end of the target capacitor C1 is affected by the -Vout (the second leakage voltage), and the voltage at the upper end of the target capacitor C1 is reduced by Vout. Due to the principle of capacitor coupling, the effect on the pixel voltage acting on the pixel electrode is to offset the influence of the leakage current.

[0064] By the above-mentioned manner, the pixel voltage change of the pixel electrode caused by the TFT leakage can be reduced, thereby improving the liquid crystal penetration problem. The technical solution of the present application only optimizes and modifies the design inside the display panel, and does not make any modification to any signal input into the display panel. The product quality (reduction of penetration, contrast, color coordinates, etc.) is not reduced, and when the TFT leakage occurs, the pixel voltage actually input to the pixel electrode is actively changed by the circuit design inside the display panel to improve the TFT leakage effect.

[0065] Referring to Figure 7 , Figure 7 is a structural schematic diagram of another embodiment of the pixel circuit provided by the present application. The pixel circuit 200 comprises a thin film transistor TFT, a pixel capacitor Clc, a storage capacitor Cs, a pixel electrode and a leakage current processing circuit 100. The leakage current processing circuit 100 is coupled between the first source-drain electrode of the thin film transistor TFT and the pixel electrode, and one end of the storage capacitor Cs and the pixel capacitor Clc is coupled between the leakage current processing circuit 100 and the pixel electrode.

[0066] The leakage current processing circuit 100 is provided as the first aspect.

[0067] Referring to Figure 8 , Figure 8 is a structural schematic diagram of an embodiment of the display panel provided in the present application. The display panel 300 comprises the leakage current processing circuit 100. The leakage current processing circuit 100 is as the leakage current processing circuit 100 in any of the above embodiments.

[0068] Referring to Figure 9 , Figure 9 is a structural schematic diagram of another embodiment of the display panel provided in the present application. The display panel 300 comprises the pixel circuit 200. The pixel circuit 200 is as the pixel circuit 200 in any of the above embodiments.

[0069] Referring to Figure 10 , Figure 10 is a structural schematic diagram of an embodiment of the display device provided in the present application. The display device 400 comprises the display panel 300. The display panel 300 is as the display panel 300 in any of the above embodiments.

[0070] In summary, the leakage current processing circuit, the pixel circuit, the display panel and the display device provided in the present application, the operational amplifier unit 20 in the leakage current processing circuit 100 converts the sampling voltage of the sampling resistor R2 in the resistor unit 10 into the first leakage voltage in response to the leakage current, and obtains the second leakage voltage by inverting the first leakage voltage and outputting to the target capacitor C1, and uses the target capacitor C1 to offset part of the pixel voltage output from the output end of the resistor unit 10 to the pixel electrode, reduces the pixel voltage input to the pixel electrode, to achieve the effect of improving the thin film transistor leakage, and further improve the problem of liquid crystal penetration.

[0071] In several embodiments provided in the present application, it should be understood that the disclosed methods and devices can be implemented in other ways. For example, the above-described device embodiments are only schematic, for example, the division of the modules or units is only a logical function division, and actual implementation can have another division manner, for example, a plurality of units or components can be combined or integrated into another system, or some features can be ignored or not executed.

[0072] The integrated units in the above other embodiments, if implemented in the form of software function units and sold or used as independent products, can be stored in a computer readable storage medium. Based on such understanding, the technical solutions of the present application, essentially or in other words, the part that contributes to the prior art or the whole or part of the technical solutions can be embodied in the form of a software product. The computer software product is stored in a storage medium, and includes several instructions to make a computer device (which can be a personal computer, a server, or a network device, etc.) or a processor execute all or part of the steps of the methods described in the various embodiments of the present application. The aforementioned storage medium includes: a U disk, a mobile hard disk, a read-only memory (ROM, Read-Only Memory), a random access memory (RAM, Random Access Memory), a magnetic disk or an optical disk, and various media that can store program codes.

[0073] The above is only the embodiment of the present application, and does not limit the patent scope of the present application. Any equivalent structure or equivalent flow transformation made by using the content of the specification and drawings, or directly or indirectly applied to other related technical fields, is also included in the patent protection scope of the present application.

Claims

1. A leakage current handling circuit, characterized by, The leakage current processing circuit comprises: a resistance unit, an input end of the resistance unit being coupled to a first source-drain electrode of a thin film transistor, and an output end of the resistance unit being coupled to a pixel electrode; an operational amplification unit, an input end of the operational amplification unit being coupled to the resistance unit, and an output end of the operational amplification unit being coupled to the output end of the resistance unit through a target capacitor; the operational amplification unit converts a sampling voltage of a sampling resistance in the resistance unit into a first leakage voltage in response to a leakage current of the resistance unit, and inversely converts the first leakage voltage into a second leakage voltage and outputs the second leakage voltage to the target capacitor, so that the target capacitor offsets part of a pixel voltage output from the output end of the resistance unit to the pixel electrode; the resistance unit comprises: a first resistance, a first end of the first resistance being coupled to the first source-drain electrode of the thin film transistor, and a second end of the first resistance being coupled to the pixel electrode; a sampling resistance, a first end of the sampling resistance being coupled to the first source-drain electrode of the thin film transistor; a voltage division resistance, a first end of the voltage division resistance being coupled to a second end of the sampling resistance, and a second end of the voltage division resistance being coupled to the second end of the first resistance.

2. The leakage current handling circuit of claim 1, wherein, the operational amplification unit comprises: an operational amplifier, a non-inverting input end of the operational amplifier being coupled to the first end of the sampling resistance, and an inverting input end of the operational amplifier being coupled to a second end of the sampling resistance; wherein the first end of the sampling resistance is coupled to the first source-drain electrode of the thin film transistor; an inverting amplifier, an inverting input end of the inverting amplifier being coupled to an output end of the operational amplifier, a non-inverting input end of the inverting amplifier being grounded, and an output end of the inverting amplifier being coupled to the target capacitor; the operational amplifier converts the sampling voltage of the sampling resistance into the first leakage voltage in response to the leakage current of the resistance unit, and the inverting amplifier inversely converts the first leakage voltage into the second leakage voltage and outputs the second leakage voltage to the target capacitor.

3. The leakage current handling circuit of claim 2, wherein, the operational amplification unit further comprises: a second resistance, coupled between the non-inverting input end of the operational amplifier and the first end of the sampling resistance; a third resistance, a first end of the third resistance being coupled to a coupling point of the second resistance and the non-inverting input end of the operational amplifier, and a second end of the third resistance being grounded; a fourth resistance, coupled between the inverting input end of the operational amplifier and the second end of the sampling resistance; a fifth resistance, coupled between the inverting input end of the operational amplifier and the output end of the operational amplifier.

4. The leakage current handling circuit of claim 3, wherein, The second resistance, the third resistance, the fourth resistance and the fifth resistance have the same resistance value.

5. The leakage current handling circuit of claim 2, wherein, the operational amplification unit further comprises: a sixth resistance, coupled between the output end of the operational amplifier and the inverting input end of the inverting amplifier; a seventh resistance, coupled between the output end of the inverting amplifier and the inverting input end of the inverting amplifier.

6. The leakage current handling circuit of claim 2, wherein, The first leakage voltage is equal to the sampling voltage.

7. A pixel circuit, characterized by comprising: the pixel circuit comprises: a thin film transistor; a pixel capacitor; a storage capacitor; a pixel electrode; A leakage current processing circuit coupled between the first source-drain of the thin film transistor and the pixel electrode, one end of the storage capacitor and the pixel capacitor being coupled between the leakage current processing circuit and the pixel electrode; the leakage current processing circuit being as claimed in any one of claims 1 to 6.

8. A display panel, characterized by, A pixel circuit comprising a leakage current processing circuit as claimed in any one of claims 1 to 6 or a pixel circuit as claimed in claim 7.

9. A display device, characterized by comprising: A display panel comprising a display panel as claimed in claim 8.

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