Non-isolated series capacitor quadratic voltage reduction converter
By inserting a three-terminal network into a series capacitor Buck converter, a non-isolated series capacitor quadratic buck converter is formed, which solves the problem of low efficiency of traditional Buck converters at high buck ratios, achieves a higher buck ratio and lower switching voltage stress, and improves the overall efficiency.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- DALIAN UNIV OF TECH
- Filing Date
- 2023-11-22
- Publication Date
- 2026-07-03
AI Technical Summary
Traditional Buck converters suffer from high voltage stress on the switches and a near-zero duty cycle when achieving high buck ratios, resulting in low efficiency. Furthermore, the bus losses from the 48V to 1V step-down converter are significant, leading to overall low efficiency.
Based on the series capacitor Buck converter, a three-terminal network containing four components is inserted to form a non-isolated series capacitor secondary buck converter. It uses four inductors, three capacitors and eight switches. The eight switches are divided into four groups of interleaved conduction and complementary operation to improve the buck ratio and reduce the voltage stress on the switching transistors.
It achieves a higher buck ratio and less voltage stress on the switching transistor, resulting in higher converter efficiency at high buck ratios, and the switching current stress does not exceed half of the output current.
Smart Images
Figure CN117595660B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to a non-isolated series capacitor quadratic buck converter, belonging to the field of DC / DC converter technology. Background Technology
[0002] In recent years, with the rapid development of emerging information technologies such as 5G communication and cloud computing, centralized computing and storage in data centers are booming. To meet these growing demands, a large number of large-scale data centers have been built for data computing, processing, and storage. The power supply voltage of the memory in data center equipment is 1V, and the bus voltage is mostly 12V or 48V. The 12V-to-1V architecture has a higher bus loss and an overall efficiency of about 89.3%, while the 48V-to-1V architecture has lower bus loss and higher overall efficiency. Therefore, the 48V-to-1V architecture is now the mainstream choice for voltage reduction.
[0003] The voltage gain of a traditional Buck buck converter is The voltage stress of its switch is A relatively high step-down ratio can only be obtained when the duty cycle is very close to 0. Summary of the Invention
[0004] This invention provides a non-isolated series capacitor quadratic buck converter, in continuous conduction mode (CCM), assuming a duty cycle of... D Its voltage conversion ratio is Compared to traditional series capacitor Buck converters, the voltage stress on some switches is nearly half that of the original.
[0005] The technical solution adopted in this invention is:
[0006] A non-isolated series capacitor secondary buck converter, based on a series capacitor Buck converter, inserts a three-terminal network containing four components in each phase circuit. The four components are one inductor, one capacitor, and two switches. The two switches operate complementaryly and form a loop with the capacitor. The common terminal of the two switches is grounded. The non-common terminal of one switch is connected to one end of the capacitor and then to one switch of the series capacitor Buck converter. The non-common terminal of the other switch is connected to the other end of the capacitor and then to one end of the inductor. The other end of the inductor is connected to the capacitor at the converter's output terminal. This non-isolated series capacitor secondary buck converter contains a total of four inductors, three capacitors, and eight switches. The eight switches include four active switches and four passive switches, which are arranged in four groups with alternating conduction. The active and passive switches in each group conduct complementaryly.
[0007] The non-isolated series capacitor secondary buck converter of the present invention has a higher buck ratio and less voltage stress on the switching transistor, and the converter has higher operating efficiency at a high buck ratio. Attached Figure Description
[0008] Figure 1 This invention relates to a non-isolated series capacitor secondary buck converter circuit topology.
[0009] Figure 2 This is the switching operation mode of the non-isolated series capacitor secondary buck converter of the present invention.
[0010] Figure 3(a) is one of the circuit state diagrams of the non-isolated series capacitor secondary buck converter of the present invention in CCM mode.
[0011] Figure 3(b) is the second circuit state diagram of the non-isolated series capacitor secondary buck converter of the present invention in CCM mode.
[0012] Figure 3(c) is the third circuit state diagram of the non-isolated series capacitor secondary buck converter of the present invention in CCM mode.
[0013] Figure 3(d) is the fourth circuit state diagram of the non-isolated series capacitor secondary buck converter of the present invention in CCM mode.
[0014] Figure 3(e) is the fifth circuit state diagram of the non-isolated series capacitor secondary buck converter of the present invention in CCM mode.
[0015] Figure 4 The voltage gain curve of the non-isolated series capacitor secondary buck converter of the present invention is compared with the gain curve of other buck converters.
[0016] Figure 5 This is the normalized voltage stress curve of the switching transistor in the non-isolated series capacitor secondary buck converter of the present invention.
[0017] Figure 6 This is the normalized current stress curve of the switching transistor in the non-isolated series capacitor secondary buck converter of the present invention.
[0018] Figure 7 This is the normalized inductance current curve of the non-isolated series capacitor secondary buck converter of the present invention. Detailed Implementation
[0019] The specific embodiments of the present invention will be described in detail below with reference to the accompanying drawings and technical solutions.
[0020] like Figure 1As shown, based on a series-capacitor Buck converter, a three-terminal network containing four components is inserted into each phase circuit. The three-terminal network includes one inductor, one capacitor, and two switches. Switch SA i / SB i ( i =1,2) and DA i / DB i ( i =1,2) Complementary actions: switches SA2 and DA2 and capacitor C3 form a circuit; switches SB2 and DB2 and capacitor C1 form a circuit as shown in the attached diagram. Figure 1 As shown. The common terminal of switches SA2 and DA2 is grounded, and the common terminal of switches SB2 and DB2 is grounded. The common terminal of switch SA2 and capacitor C3 is connected to DA1 of the original series capacitor Buck converter, and the common terminal of switch SB2 and capacitor C1 is connected to DB1 of the original series capacitor Buck converter; the common terminal of switch DA2 and capacitor C3 is connected to the inductor. L 4. Connection: The common terminal of switch DB2 and capacitor C1 is connected to the inductor. L 2. Connection; Inductor L 4 and L The other terminal of 2 is connected to capacitor C at the output of the converter. o superior.
[0021] like Figure 2 As shown, the active switch includes SA i and SB i ( i =1,2), the slave switch includes DA i and DB i ( i =1,2); 4 active switches SA i and SB i ( i =1,2) Interleaved conduction, active switch SA i / SB i ( i =1,2) and their respective slave switches DA i / DB i ( i =1,2))Complementary conduction.
[0022] As shown in Figures 3(a)-(e), in CCM mode, based on the conduction and turn-off status of each switch in each cycle, there are 8 working intervals, corresponding to 5 different circuit states.
[0023] Example: Steady-state analysis of a series capacitor-type quadratic buck converter
[0024] Assuming the input voltage is The output voltage is Duty cycle is In CCM mode, the circuit state of the series capacitor-type quadratic buck converter is shown in Figures 3(a)-(e). Based on the volt-second balance,
[0025]
[0026] in, , and These are the terminal voltages of capacitors C1, C2, and C3, respectively.
[0027] The output voltage gain of the converter is:
[0028] (1)
[0029] Figure 4 The voltage gain curve of the non-isolated series capacitor quadratic buck converter of the present invention is given, and compared with the gain curve of other buck converters. Figure 4 This indicates that, at the same duty cycle, the voltage gain of the non-isolated series capacitor quadratic buck converter of the present invention is lower. When a larger buck ratio is required, such as conversion from 48V to 1V, the duty cycle of a Buck converter is 0.0208, that of a series capacitor buck converter is 0.0416, that of a quadratic converter is 0.1443, and that of the non-isolated series capacitor quadratic buck converter of the present invention is approximately 0.19, which is larger than the duty cycle of other converters.
[0030] The voltage stress of switch SA1 is shown in equation (2).
[0031] (2)
[0032] The voltage stresses of switches DA1, SA1, and DB1 are shown in equation (3).
[0033] (3)
[0034] The voltage stresses of switches SA2, DA2, SB2, and DB2 are shown in equation (4).
[0035] (4)
[0036] The normalized voltage stress curve of the non-isolated series capacitor quadratic buck converter of the present invention is as follows: Figure 5 As shown. When the input voltage is 48V and the output voltage varies from 0.5V to 1.5V, the normalized voltage stress of each switch is... V s / V inThe curve indicates that the voltage stress of SA1 is approximately 1.1. V in Slightly higher than the input voltage, the voltage stress on DA1, DB1, and SB1 is approximately 0.55. V in The voltage stress is approximately half that of the input voltage, while the voltage stress of SA2, DA2, DB2, and SB2 is approximately 0.1. V in .
[0037] The current stress of switch SA1 is shown in equation (5). (5)
[0038] The current stress of switch SA2 is shown in equation (6).
[0039] (6)
[0040] The current stress of switch SB1 is shown in equation (7).
[0041] (7)
[0042] The current stress of switch SB2 is shown in equation (8).
[0043] (8)
[0044] The current stress of switch DB1 is shown in equation (9).
[0045] (9)
[0046] The current stress of switch DB2 is shown in equation (10).
[0047] (10)
[0048] The current stress of switch DA1 is shown in equation (11).
[0049] (11)
[0050] The current stress of switch DA1 is shown in equation (12).
[0051] (12)
[0052] inductance L 1. Inductor L 2. Inductance L 3 and inductance L The average current of 4 is shown in equation (13).
[0053] (13)
[0054] When the output voltage is 1V and the input voltage varies from 35V to 60V, the normalized current stress curves of each switch are as follows: Figure 6 As shown, the current stress of each switch does not exceed half of the output current. Figure 7 The normalized currents across each inductor at this point are given, and the inductances are... L 1 and L The current of 3 does not exceed 0.15. I o ,inductance L The current of 4 is less than 0.35. I o ,inductance L The current of 2 is less than 0.45. I o The current stress on each switch and inductor is greatly reduced.
Claims
1. A non-isolated series capacitor quadratic buck converter, based on a series capacitor Buck converter, characterized in that, Insert a three-terminal network containing four components into each phase circuit; The four components are one inductor, one capacitor, and two switches. The two switches operate complementaryly and form a circuit with the capacitor. The common terminal of the two switches is grounded. The non-common terminal of one switch is connected to one end of the capacitor and then to one of the slave switches of the series capacitor Buck converter. The non-common terminal of the other switch is connected to the other end of the capacitor and then to one end of the inductor. The other end of the inductor is connected to the output capacitor of the series capacitor Buck converter. This non-isolated series capacitor secondary buck converter contains a total of 4 inductors, 3 capacitors and 8 switches; the 8 switches include 4 active switches and 4 passive switches, and the 8 switches are divided into 4 groups of interleaved conduction, with the active switches and passive switches in each group conducting in a complementary manner.