A testing method of a memory chip and related device

Abstract

The embodiment of the present application discloses a kind of test method and related device of storage chip, it is related to integrated circuit technical field, can test multiple types of storage chip, effectively expand the applicable scope of test object, to greatly reduce test cost.The method comprises: according to the pin type of the preset chip pin in the storage chip to be measured, the data transmission pin of test machine is configured, so that the data transmission pin is adapted to signal transmission with the preset chip pin;Wherein, the pin type includes control class, and the preset chip pin of the control class is used to transmit control class signal;The test machine is used to test the storage chip to be measured.The present application is applicable to the test of storage chip.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of integrated circuits, and in particular to a test method for a storage chip and related apparatus. BACKGROUND

[0002] With the development of computer and semiconductor technologies, various different types of storage chips are emerging, such as SSD (solid-state drive), eMMC (embedded MultiMediaCard), UFS (Universal Flash Storage), etc. Since different types of storage chips have different structures and interfaces, most of the various data storage chips need to be tested by their own dedicated test equipment, and thus the testing cost is high. SUMMARY

[0003] Therefore, the embodiments of the present application provide a test method for a storage chip and related apparatus, which can test various types of storage chips, effectively expand the application range of the test objects, and thus greatly reduce the testing cost.

[0004] In a first aspect, the embodiments of the present application provide a test method for a storage chip, which comprises: configuring data transmission pins of a test machine according to a pin type to which a preset chip pin in a to-be-tested storage chip belongs, so as to make the data transmission pins suitable for signal transmission with the preset chip pin; wherein the pin type comprises a control type, and the preset chip pin of the control type is used for transmitting a control type signal; and testing the to-be-tested storage chip by using the test machine.

[0005] In an implementation, the pin type further comprises a data type, and the preset chip pin of the data type is used for transmitting a data type signal.

[0006] In one embodiment, the method of configuring data transmission pins of a test machine according to pin types to which preset chip pins of a storage chip under test belong comprises: determining a total number of the preset chip pins according to the pin types to which the preset chip pins of the storage chip under test belong and a number of pins included in each of the pin types; wherein the preset chip pins are pins actually used by the storage chip under test in a preset operation mode; configuring operation modes of the test machine according to the total number of the preset chip pins, the operation modes being used to indicate available pins provided by the test machine and working pins actually used in the available pins, wherein the available pins are at least a part of the data transmission pins; and configuring each of the working pins to correspond to a preset bit of a preset storage unit in the test machine in each of the operation modes, wherein each of the preset storage units is used to store one byte of information and each of the preset storage units corresponds to a storage address; and matching each of the preset chip pins with one of the working pins to obtain a matching relationship between the preset chip pins and the working pins.

[0007] In one embodiment, the correspondence between the working pins and the preset bits of the preset storage units is determined by: determining a correspondence between each of the available pins and the preset bits of the preset storage units in communication between the test machine and the storage chip under test according to a number of the available pins provided by the test machine; and determining a correspondence between each of the working pins and the preset bits of the preset storage units according to the correspondence between the working pins and the available pins and the correspondence between each of the available pins and the preset bits of the preset storage units.

[0008] In one embodiment, after the configuring of the operation modes of the test machine according to the total number of the preset chip pins, the method further comprises: determining a number of the preset bits of the preset storage units to which each of the working pins corresponds in each of the preset storage units according to the correspondence between each of the working pins and the preset bits of the preset storage units; and determining a number of the preset storage units required to complete transmission of each byte in the signal transmission according to the number of the preset bits of the preset storage units to which each of the working pins corresponds in each of the preset storage units and a number of the working pins used for signal transmission in the test machine.

[0009] In one embodiment, the testing of the storage chip under test by the tester comprises: determining a signal type to which a target signal to be transmitted between the tester and the storage chip under test belongs, the signal type comprising a control type or a data type; determining a working pin of the tester for transmitting the target signal according to the signal type to which the target signal belongs, to obtain a target pin; communicating between the tester and the storage chip under test through the target pin according to the working mode of the tester; and determining whether the storage chip under test passes the test according to the communication result.

[0010] In one embodiment, the communicating between the tester and the storage chip under test through the target pin according to the working mode of the tester comprises: writing a value of each bit of a byte in a to-be-sent signal into a preset bit of a preset storage unit corresponding to each target pin of the tester respectively, to obtain a transmission bit value, according to the working mode of the tester; and reading and sending values in the preset bits of the preset storage units by each target pin simultaneously according to a clock cycle, until the transmission bit value is sent completely.

[0011] In one embodiment, the communicating between the tester and the storage chip under test through the target pin according to the working mode of the tester comprises: receiving transmission bit values from the storage chip under test through each target pin of the tester according to the working mode of the tester, and storing each transmission bit value in the preset bit of the preset storage unit corresponding to the target pin; and splicing each transmission bit value in a byte unit to obtain each byte of a received signal.

[0012] In one embodiment, the target signal comprises a control type signal; and the determining whether the storage chip under test passes the test according to the communication result comprises: determining whether a control function of the storage chip under test passes the test according to whether a sent control signal matches a received feedback signal; or the target signal comprises a data type signal; and the determining whether the storage chip under test passes the test according to the communication result comprises: determining whether a data storage function of the storage chip under test passes the test according to whether a sent data type signal is same as a received data type signal.

[0013] In one embodiment, the storage chip under test is an embedded multimedia card, and the preset chip pin comprises one control type pin and any one of the following numbers of data type pins: one, four or eight.

[0014] In a second aspect, the embodiments of the present application further provide a testing device for a storage chip, comprising: a configuration unit, configured to configure data transmission pins of a testing machine according to pin types to which preset chip pins in a storage chip under test belong, so that the data transmission pins are adapted to transmit signals with the preset chip pins; wherein the pin types comprise a control type, and preset chip pins of the control type are used to transmit control type signals; and a testing unit, configured to test the storage chip under test by using the testing machine.

[0015] In an embodiment, the pin types further comprise a data type, and preset chip pins of the data type are used to transmit data type signals.

[0016] In an embodiment, the configuration unit comprises: a first determination module, configured to determine a total number of the preset chip pins according to the pin types to which the preset chip pins in the storage chip under test belong and a number of pins included in each of the pin types; wherein the preset chip pins are pins actually used by the storage chip under test in a preset operation mode; a configuration module, configured to configure operation modes of the testing machine according to the total number of the preset chip pins, the operation modes being used to indicate available pins provided by the testing machine and working pins actually used in the available pins; wherein the available pins are at least part of the data transmission pins; and a matching module, configured to match each of the preset chip pins with a working pin, so as to obtain a matching relationship between the preset chip pins and the working pins.

[0017] In an embodiment, the configuration module is specifically configured to: determine a correspondence between each available pin and the preset bit of the preset storage unit in communication between the testing machine and the storage chip under test according to a number of the available pins provided by the testing machine; and determine the correspondence between each working pin and the preset bit of the preset storage unit according to the correspondence between the working pin and the available pin and the correspondence between each available pin and the preset bit of the preset storage unit.

[0018] In one embodiment, the configuration unit further comprises: a second determination module, configured to determine the number of preset bit positions corresponding to each working pin in each preset storage unit according to the correspondence between each working pin and the preset bit positions of the preset storage unit after configuring the working mode of the test machine according to the total number of preset chip pins; and a third determination module, configured to determine the number of preset storage units required for completing the transmission of each byte in the signal transmission according to the number of preset bit positions corresponding to each working pin in each preset storage unit and the number of working pins for signal transmission in the test machine.

[0019] In one embodiment, the test unit comprises: a fourth determination module, configured to determine the signal type to which the target signal to be transmitted between the test machine and the storage chip under test belongs, the signal type including a control type or a data type; a fifth determination module, configured to determine a working pin for transmitting the target signal from the working pins of the test machine according to the signal type to which the target signal belongs, to obtain a target pin; a communication module, configured to perform communication between the test machine and the storage chip under test through the target pin according to the working mode of the test machine; and a sixth determination module, configured to determine whether the storage chip under test passes the test according to the communication result.

[0020] In one embodiment, the communication module is specifically configured to: according to the working mode of the test machine, write the bit values of each byte in the to-be-sent signal into the preset bit positions of the preset storage unit corresponding to each target pin respectively to obtain transmission bit values; and each target pin reads and transmits the values in the preset bit positions of each preset storage unit simultaneously according to a clock cycle until the transmission bit values are completely transmitted.

[0021] In one embodiment, the communication module is specifically configured to: according to the working mode of the test machine, receive transmission bit values from the storage chip under test through each target pin of the test machine, and store each transmission bit value in the preset bit positions of the preset storage unit corresponding to each target pin; and splice each transmission bit value in units of bytes to obtain each byte of the received signal.

[0022] In an implementation, the target signal comprises a control signal; the sixth determining module is specifically configured to determine whether the control function of the tested storage chip passes the test according to whether the transmitted control signal matches the received feedback signal; or, the target signal comprises a data signal; the sixth determining module is specifically configured to determine whether the data storage function of the tested storage chip passes the test according to whether the transmitted data signal is the same as the received data signal.

[0023] In an implementation, the tested storage chip is an embedded multimedia card, and the preset chip pin comprises one control pin and any one of the following numbers of data pins: one, four or eight.

[0024] In a third aspect, an embodiment of the present application further provides a test machine, wherein any one of the storage chip test devices provided by the embodiments of the present application is arranged in the test machine.

[0025] In a fourth aspect, an embodiment of the present application further provides an electronic device, which comprises a housing, a processor, a memory, a circuit board and a power supply circuit, wherein the circuit board is arranged inside a space enclosed by the housing, the processor and the memory are arranged on the circuit board; the power supply circuit is used to supply power to each circuit or device of the electronic device; the memory is used to store executable program codes; the processor runs programs corresponding to the executable program codes by reading the executable program codes stored in the memory, and is used to execute the test method provided by any one of the embodiments of the present application.

[0026] In a fifth aspect, an embodiment of the present application further provides a computer readable storage medium, which stores one or more programs, and the one or more programs can be executed by one or more processors to implement the test method provided by any one of the embodiments of the present application.

[0027] The test method for a storage chip and the related device provided by the embodiments of the present application can configure the data transmission pin of a test machine according to the pin type to which the preset chip pin in a tested storage chip belongs, so that the data transmission pin is suitable for signal transmission with the preset chip pin, and then the test machine is used to test the tested storage chip. Since the pin type to which the preset chip pin in the tested storage chip belongs comprises a control type, the data transmission pin originally used to transmit a data signal in the test machine can be used to communicate with the control type preset chip pin used to transmit a control signal in the tested storage chip, so that the test machine can test and control various tested storage chips, thereby the various storage chips with a control function and needing test control can be tested even if there is no pin used for test control in the test machine, so that the application range of test objects is effectively expanded, and the test cost is greatly reduced. BRIEF DESCRIPTION OF DRAWINGS

[0028] In order to more clearly illustrate the technical solutions of the embodiments of the present application or the prior art, the drawings needed to be used in the embodiments or the prior art description will be briefly introduced. Obviously, the drawings in the following description are only some embodiments of the present application, and other drawings can be obtained by those skilled in the art without any creative effort on the basis of these drawings.

[0029] Figure 1 A flow chart of the test method of the storage chip provided by the embodiment of the present application;

[0030] Figure 2 A structural schematic diagram of the correspondence between each available pin of the test machine and each preset storage unit of the memory of the test machine itself in the embodiment of the present application;

[0031] Figure 3 A schematic diagram of the correspondence between the control type signal and the preset storage bit of the preset storage unit in the embodiment of the present application;

[0032] Figure 4 A schematic diagram of the correspondence between the data type signal and the preset storage bit of the preset storage unit in the embodiment of the present application;

[0033] Figure 5 Another schematic diagram of the correspondence between the control type signal and the preset storage bit of the preset storage unit in the embodiment of the present application;

[0034] Figure 6 Another schematic diagram of the correspondence between the data type signal and the preset storage bit of the preset storage unit in the embodiment of the present application;

[0035] Figure 7 Still another schematic diagram of the correspondence between the control type signal and the preset storage bit of the preset storage unit in the embodiment of the present application;

[0036] Figure 8 Still another schematic diagram of the correspondence between the data type signal and the preset storage bit of the preset storage unit in the embodiment of the present application;

[0037] Figure 9 A structural schematic diagram of the test device of the storage chip provided by the embodiment of the present application;

[0038] Figure 10 A structural schematic diagram of the electronic device provided by the embodiment of the present application. DETAILED DESCRIPTION

[0039] The embodiments of the present invention will now be described in detail with reference to the accompanying drawings.

[0040] It should be understood that the described embodiments are merely some, not all, of the embodiments of the present invention. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention without inventive effort are within the scope of protection of the present invention.

[0041] In a first aspect, embodiments of the present invention provide a testing method for memory chips, which can test various types of memory chips, effectively expanding the scope of application of the test objects, thereby greatly reducing testing costs.

[0042] like Figure 1 As shown, an embodiment of the present invention provides a testing method for a memory chip, comprising:

[0043] S11, Configure the data transmission pins of the test machine according to the pin type of the preset chip pins in the memory chip under test, so that the data transmission pins are suitable for signal transmission with the preset chip pins; wherein, the pin type includes control type, and the preset chip pins of the control type are used to transmit control type signals;

[0044] The memory chip under test (DUT) can be any chip with storage functionality, such as various flash memory modules. The DUT can have multiple pins, such as clock pins, reset pins, data pins, and control pins. Among these, the pins related to the test and requiring communication with the test machine are preset chip pins. These preset chip pins can belong to the same pin type or to multiple different pin types. These pin types may include, for example, control pins. Control pins can be used to transmit control signals, which can include control signals input from the outside to the DUT, or feedback signals generated by the DUT in response to the input control signals. Optionally, the DUT can also have multiple operating modes, each corresponding to a different pin type, and the number of pins included in each pin type can also vary.

[0045] In the embodiment of the present application, the test machine can be a test machine for testing general memory, for example, a test machine for testing ROM memory, which can perform data read and write operation on the memory such as ROM through its data transmission pins. In the embodiment of the present application, there is no control type pin in the test machine that can be directly used for testing, that is, the test machine is not designed to send control signals or receive feedback signals, and thus cannot be directly used for testing the memory chip with control type pin. Therefore, in this step, the data transmission pins of the test machine can be configured according to the pin type of the preset chip pin in the tested memory chip, so that the data transmission pins of the test machine can communicate with the control type pin of the tested memory chip, thereby providing a structural basis for testing various memory chips with control type pin.

[0046] S12, testing the tested memory chip by using the test machine.

[0047] After the data transmission pins of the test machine are configured as described above, the data transmission pins of the test machine can communicate with the control type pin of the tested memory chip, and thus the tested memory chip can be tested by using the test machine.

[0048] The embodiment of the present application provides a test method for memory chip, which can configure the data transmission pins of the test machine according to the pin type of the preset chip pin in the tested memory chip, so that the data transmission pins are suitable for signal transmission with the preset chip pin, and then the tested memory chip is tested by using the test machine. Since the pin type of the preset chip pin in the tested memory chip includes control type, the data transmission pin originally used for transmitting data type signal in the test machine can communicate with the control type preset chip pin used for transmitting control type signal in the tested memory chip, so that the test machine can test and control various tested memory chips, thereby the memory chips with control function and requiring test control can be tested in the case that there is no pin for test control in the test machine, thereby effectively expanding the application range of the test object and greatly reducing the test cost.

[0049] In the embodiment of the present application, the tested memory chip can be used for storing data, and thus in one embodiment of the present application, the pin type of the preset chip pin can further include data type in addition to control type, and the preset chip pin of the data type can be used for transmitting data type signal, so as to store data or read out the stored data. Alternatively, the control function of the tested memory chip can be tested alone or in combination with the data storage function when the tested memory chip is tested. The embodiment of the present application does not limit this.

[0050] Specifically, in order to be able to test the storage chip with control type pins, the data transmission pins of the testing machine can be configured first. In an embodiment of the present application, the configuration of the data transmission pins of the testing machine according to the pin type to which the preset chip pins in the tested storage chip belong in step S11 can specifically include:

[0051] According to the pin type to which the preset chip pins in the tested storage chip belong and the number of pins contained in each of the pin types, the total number of the preset chip pins is determined; wherein the preset chip pins are the pins actually used by the tested storage chip in a preset operation mode;

[0052] According to the total number of the preset chip pins, the working mode of the testing machine is configured, the working mode is used to indicate the available pins provided by the testing machine and the working pins actually used in the available pins, wherein the available pins are at least a part of the data transmission pins; in each of the working modes, each of the working pins is configured to correspond to a preset bit of a preset storage unit of the testing machine; wherein each of the preset storage units is used to store one byte of information, and each of the preset storage units corresponds to a storage address;

[0053] Each of the preset chip pins is matched with one of the working pins, and the matching relationship between the preset chip pins and the working pins is obtained.

[0054] Specifically, in the embodiment of the present application, the preset chip pins are the pins actually used by the tested storage chip in a preset operation mode, for example, the tested storage chip has 9 pins, but when the tested storage chip is in an operation mode, only 5 pins are actually used, and in this operation mode, the preset chip pins are the 5 pins actually used.

[0055] Optionally, the preset chip pins specifically include which pins can be related to an operation mode in which the storage chip under test is located. The operation mode can be used to describe a data bit width of the storage chip under test when data is inputted or outputted, for example, in an example, the data bit width of the storage chip under test in different operation modes can be 0 bit, 1 bit, 4 bits, 8 bits, etc. Each bit under a certain data bit width corresponds to a data class pin. In addition to the data class signal, the storage chip under test also needs a control class signal to control it, and the control class signal can be transmitted through the control class pin of the storage chip under test. In the storage chip under test, the data class pin corresponding to each bit of data and the control class pin of the storage chip form the pins actually used in the operation mode. For example, in an example, the data bit width of the storage chip under test is 1 bit, and the 1 bit data bit width corresponds to 1 data class pin, plus 1 control class pin of the storage chip under test, to form 2 pins actually used in the operation mode.

[0056] It should be noted that in some embodiments of the present application, the storage chip under test can have one control class pin, but the embodiments of the present application are not limited thereto, and in another or some embodiments of the present application, it can also have multiple control class pins.

[0057] After learning the total number of preset chip pins in the storage chip under test, the working mode of the test machine can be configured according to the total number of the preset chip pins. In the embodiments of the present application, the working mode of the test machine can be used to indicate the available pins provided by the test machine and the working pins actually used in the available pins, wherein the available pins are part or all of the data transmission pins of the test machine.

[0058] In one embodiment of the present application, the tester can have different working modes, and the available pins provided by the different working modes are different. For example, in one example, the tester can provide 1, 2, 4, etc. integer power of 2 available pins. Although these available pins can all be used to communicate with the storage chip under test, it can be understood that the number of preset chip pins in the storage chip under test is not necessarily designed as an integer power of 2, and thus the number of available pins can not match the number of preset chip pins. Therefore, on the basis of the available pins of the tester, the working pins are defined. The working pins are the pins actually used from the available pins, and the number of working pins corresponds to the number of preset chip pins of the storage chip under test. For example, in one example, if the number of preset chip pins of the storage chip under test is 5, then for the tester in the working mode of 4 available pins, the tester will not be able to complete the test of the chip under test. Therefore, the tester can select the working mode corresponding to 2 to the power of 3, i.e. 8 available pins, and from the 8 available pins, 5 can be used to communicate with the storage chip under test, and the 5 pins are the working pins actually used, and the remaining 3 pins can be ignored. Alternatively, which 5 of the 8 available pins are used can be defined and adjusted as needed, and embodiments of the present application do not limit this.

[0059] Since the working mode indicates the working pins of the tester, after learning the working pins of the tester, a working pin can be matched for each preset chip pin of the storage chip under test, and a matching relationship between the preset chip pin and the working pin is obtained, so that the test of the storage chip under test can be realized through the docking of each preset chip pin and the corresponding working pin.

[0060] For example, in one embodiment of the present application, the storage chip under test can be an eMMC chip, and the operating modes can include a pure command mode, a 1-pin data transmission mode, a 4-pin data transmission mode, and an 8-pin data transmission mode, which are described below respectively.

[0061] In the pure command mode, the preset chip pins can include 1 control type pin and 0 data type pins, and thus the total number of preset chip pins is 1. Corresponding to the total number of preset chip pins, the tester can indicate that the tester has 1 working pin through the setting of the working mode.

[0062] In the 1-pin data transmission mode, the preset chip pins can include 1 control type pin and 1 data type pin, and thus the total number of preset chip pins is 2. Corresponding to the total number of preset chip pins, the tester can indicate that the tester has 2 working pins through the setting of the working mode.

[0063] In the 4-pin data transmission mode, the preset chip pins can include 1 control pin and 4 data pins, and thus the total number of the preset chip pins is 5. Corresponding to the total number of the preset chip pins, the tester can be instructed to have 5 working pins through the setting of the working mode.

[0064] In the 8-pin data transmission mode, the preset chip pins can include 1 control pin and 8 data pins, and thus the total number of the preset chip pins is 9. Corresponding to the total number of the preset chip pins, the tester can be instructed to have 9 working pins through the setting of the working mode.

[0065] Further, in the embodiment of the present application, each working pin of the tester is not only related to the preset chip pin of the tested storage chip, but also related to the storage unit of the tester itself. This is because, when testing the tested storage chip, each working pin needs to read information from the storage unit of the tester itself and send the information to the tested storage chip, or write the information read from the tested storage chip into the corresponding storage unit of the tester. Each storage unit of the tester can be used to store one byte of information, and each storage unit corresponds to one storage address.

[0066] For the tester, the number of working pins is different in different working modes, and the access mode of the storage unit of the tester is also different accordingly. Understanding the relationship between each working pin and the storage unit of the tester is conducive to knowing the information structure in the storage unit, so as to further process the information in the storage unit.

[0067] Specifically, in one embodiment of the present application, in each working mode of the tester, each working pin can be configured to correspond to a preset bit of a preset storage unit in the tester. Each preset storage unit is used to store one byte of information, and each preset storage unit corresponds to one storage address. In different working modes of the tester, each working pin can be different, and the preset storage address of the preset storage unit corresponding to each working pin is also different accordingly.

[0068] The correspondence between the working pin of the tester and the preset bit of the preset storage unit of the tester can mean that the working pin can perform read or write operation on the preset bit in the preset storage unit. Optionally, the number of preset storage units can be one or more, and the number of preset bits in each preset storage unit can also be one or more. Each preset bit can be consecutive bits or bits spaced from each other, and the embodiment of the present application does not limit this. In one example, each preset storage unit has the same preset bit. For example, if the preset bit is bit3, the preset bit of each preset storage unit is bit3.

[0069] Based on the above features of the preset storage unit and the preset bit, each working pin of the test machine can correspond to one bit in one preset storage unit, can correspond to multiple bits in one preset storage unit, or can correspond to one or more bits in multiple preset storage units, and embodiments of the present application do not limit this. For example, in one embodiment of the present application, working pin 01 can correspond to bit0-bit7 in each preset storage unit, in another embodiment of the present application, working pin 02 can correspond to bit0, bit2, bit4, bit6 in each preset storage unit, and in yet another embodiment of the present application, working pin 03 can only correspond to bit0 in each preset storage unit.

[0070] Optionally, in one embodiment of the present application, if one working pin corresponds to multiple bits in one preset storage unit, the working pin can access the multiple bits respectively through multiple clock cycles, wherein one corresponding bit is accessed in each clock cycle. The corresponding bits in each clock cycle can correspond in turn in the order from high bit to low bit, can correspond in turn in the order from low bit to high bit, or can correspond in turn in other specified order, and embodiments of the present application do not limit this. For example, in one example, working pin work0 corresponds to four bits bit0, bit2, bit4, bit6 of one preset storage unit, and if the corresponding order is from low bit to high bit, the first clock cycle work0 can correspond to bit0, the second clock cycle work0 can correspond to bit2, the third clock cycle work0 can correspond to bit4, and the fourth clock cycle work0 can correspond to bit6.

[0071] In specific implementation, the correspondence between the working pin and the preset bit of the preset storage unit can be determined by the following way:

[0072] According to the number of available pins provided by the test machine, the correspondence between each available pin and the preset bit of each preset storage unit in the communication between the test machine and the measured storage chip is determined;

[0073] According to the correspondence between the working pin and the available pin, and the correspondence between each available pin and the preset bit of each preset storage unit, the correspondence between each working pin and the preset bit of each preset storage unit is determined.

[0074] Specifically, the number of available pins provided by the tester is determined by the working mode of the tester itself, and is irrelevant to the storage chip under test. In an embodiment of the present application, after the number of available pins provided by the tester is determined, the correspondence between each available pin and each bit of each preset storage unit in the memory of the tester itself is also determined. For example, in one example, the number of available pins of the tester is 1 (which can be used to communicate with the storage chip eMMC under test in pure command mode), and since all bits in the preset storage unit need to be read or written or transmitted through the available pin, the available pin corresponds to all bits (bit7-bit0) in each preset storage unit, i.e. 8 bits; in another example, the number of available pins of the tester is 2, and since all bits in the preset storage unit can be read or written through the 2 available pins, each of the 2 available pins can be used to read or write 4 bits in each preset storage unit, for example, the IO0 pin in the 2 available pins can read or write even bits (e.g. bit6, bit4, bit2, bit0) in each preset storage unit, and the IO1 pin in the 2 available pins can read or write odd bits (e.g. bit7, bit5, bit3, bit1) in each preset storage unit. In yet another example, the number of available pins of the tester is 8, and since all bits in the preset storage unit can be read or written through the 8 available pins, each of the 8 available pins can be used to read or write 1 bit in each preset storage unit, for example, the IO0 pin in the 8 available pins can read or write bit0 in each preset storage unit, the IO1 pin can correspond to bit1 in each preset storage unit, and so on. For example, the correspondence between each available pin and each bit of each preset storage unit in the memory of the tester itself can be as shown in Table 1. Figure 2 Table 1: Correspondence between each available pin and each bit of each preset storage unit in the memory of the tester itself

[0075] After the correspondence between the available pins and the preset bits of the preset storage units is obtained, since the working pins are part or all of the available pins, the correspondence between each working pin and the preset bits of the preset storage units can be further determined according to the correspondence between the working pins and the available pins and the correspondence between the available pins and the preset bits of the preset storage units. For example, in one example, the number of available pins is 8, the number of working pins is 5, and if the working pins are the lower 5 bits (i.e., bit0-bit4) of the available pins, then the working pin work0 corresponds to bit0 of the preset storage units, the working pin work1 corresponds to bit1 of the preset storage units, and so on, and the working pin work4 corresponds to bit4 of the preset storage units. In this way, it is equivalent to that only five bits bit0-bit4 are used for information storage in each preset storage unit, and bits 5-bit7 are ignored. Knowing these characteristics of information storage can facilitate further processing of the information stored in the storage units.

[0076] Since information is generally stored and transmitted in the form of bytes, the transmission and storage rules of various information in the test can be determined by the transmission of each byte in the tester and the storage chip under test and the storage in the tester, so that the transmitted and stored information can be processed to complete the test requirements.

[0077] Therefore, further, after the working mode of the tester is configured according to the total number of preset chip pins, the test method for the storage chip provided by the embodiments of the present application can further include:

[0078] According to the correspondence between each working pin and the preset bits of the preset storage units, the number of the preset bits corresponding to each working pin in each preset storage unit is determined.

[0079] According to the number of the preset bits corresponding to each working pin in each preset storage unit and the number of working pins used for signal transmission in the tester, the number of preset storage units required to complete the transmission of each byte in the signal transmission is determined.

[0080] Specifically, in one embodiment of the present application, the preset number of storage units required for transmitting 8 bit positions of one byte can be expressed as:

[0081] N = 8 ÷ (i * j) Formula (1)

[0082] wherein N is the preset number of storage units required for transmitting 8 bit positions of one byte, 8 is the number of bit positions contained in one byte, i is the number of preset bit positions corresponding to each of the working pins in each of the preset storage units, and j is the number of working pins in the tester used for signal transmission. N, i and j are all positive integers.

[0083] Still taking the case where the number of available pins is 8 and the number of working pins is 5 as an example, it is determined that the working pin workO corresponds to bitO in each of the preset storage units, the working pin workl corresponds to bitl in each of the preset storage units, and so on, and the working pin work4 corresponds to bit4 in each of the preset storage units, that is, it is determined that the number of preset bit positions corresponding to each of the working pins in each of the preset storage units is 1. Optionally, if the working pin workO is used for transmitting a control type signal, since the working pin workO used for transmitting a control type signal can only access 1 bit (i.e., bitO) in the preset storage unit, and the number of pins used for transmitting a control type signal is only one (i.e., workO), therefore, according to the calculation of Formula (1), the number of preset storage units Nl required for transmitting one byte of control type signal crt is Nl = 8 bits ÷ (1 bit / working pin * 1 working pin) = 8 preset storage units, wherein bitO in each of the preset storage units is used for storing one bit position value of the control type signal sig, which can be specifically as shown in the following table: Figure 3add0, add1,... are the storage addresses of the preset storage units, and crt0, crt1,... are the bits of the control signal crt. In addition, it can be determined that since there is only one pin (i.e., work0) for transmitting the control signal, 1 bit of the control signal can be transmitted per clock cycle, and thus 8 clock cycles are required to transmit one byte of the control signal. Similarly, if the working pins work1-work4 are used to transmit the data signal, since each pin of the working pins work1-work4 can only access 1 bit of the preset storage unit, and the number of pins for transmitting the data signal is 4, according to formula (1), it can be calculated that the number of preset storage units N2 required to transmit one byte of the data signal is 2, wherein bits 1-4 of each preset storage unit are used to store 4 bits of the data signal, for example, bits 1-4 of the preset storage unit corresponding to the storage address add0 are used to store dat7-dat4 of the data signal dat, and bits 1-4 of the preset storage unit corresponding to the storage address add1 are used to store dat3-dat0 of the data signal dat, and the specific storage can be as shown in FIG. 4. Figure 4 In addition, it can be determined that since there are 4 pins (i.e., work1-work4) for transmitting the data signal, 4 bits of the data signal can be transmitted per clock cycle, and thus 2 clock cycles are required to transmit one byte of the data signal. Alternatively, when the number of pins provided by the tester for transmitting the data signal is greater than the length of one byte, only one clock cycle is required to transmit one byte of the data signal. When the number of pins provided by the tester for transmitting the control signal is greater than the length of one byte, only one clock cycle is required to transmit one byte of the control signal.

[0084] In another embodiment of the present application, for the case that the tester has two working pins, since each working pin is used to transmit four bits in a byte, in order to facilitate the transmission and reception of the byte, each working pin also has a similar corresponding relationship with the preset bit in the preset storage unit. Specifically, since each working pin is used to transmit four bits, i.e. each working pin can access four bits of a preset storage unit, and when the control type signal is transmitted, the tester provides one working pin, therefore, according to formula (1), the number of preset storage units N3 required for transmitting one byte of control type signal ctr = 8bit ÷ (4bit / working pin * 1 working pin) = 2 preset storage units. Similarly, when the data type signal dat is transmitted, the tester also provides one working pin, therefore, according to formula (1), the number of preset storage units N4 required for transmitting one byte of data type signal = 8bit ÷ (4bit / working pin * 1 working pin) = 2 preset storage units. The corresponding relationship between the byte of control type signal crt and the storage unit can be as shown in Figure 5 The corresponding relationship between the byte of data type signal dat and the storage unit can be as shown in Figure 6 Meanwhile, it can also be determined that since the number of pins used to transmit the control type signal is one, i.e. one bit of control type signal can be transmitted per clock cycle, therefore, eight clock cycles are required for transmitting one byte of control type signal. Similarly, since the number of pins used to transmit the data type signal is one, i.e. one bit of data type signal can be transmitted per clock cycle, therefore, eight clock cycles are also required for transmitting one byte of data type signal.

[0085] After the configuration of the data transmission pin of the tester is completed in step S11, the tester can be used to test the storage chip in step S12. Specifically, in one embodiment of the present application, the use of the tester to test the storage chip can include:

[0086] determining the signal type to which the target signal to be transmitted between the tester and the storage chip belongs, the signal type including a control type signal or a data type signal;

[0087] determining the working pin for transmitting the target signal from the working pins of the tester according to the signal type to which the target signal belongs, to obtain a target pin;

[0088] communicating between the tester and the storage chip through the target pin according to the working mode of the tester;

[0089] determining whether the storage chip passes the test according to the communication result.

[0090] Specifically, when testing the storage chip, the control function of the storage chip can be tested alone, or the control function of the storage chip can be tested in combination with the data storage function. When the control function of the storage chip is tested alone, a control signal can be input to the control-type pin of the storage chip under test, and a feedback signal of the control signal can be received. When the control function of the storage chip and the data storage function are tested in combination, a control signal can be first input to the control-type pin of the storage chip under test so as to configure subsequent data transmission and storage operations through the control signal, and then a data-type signal can be input to the data-type pin of the storage chip under test so as to store the data-type signal by the storage chip under test. Then, the data-type signal written before is read through the data-type pin of the storage chip under test, and whether the read data-type signal is equal to the written data-type signal is compared. In this way, whether the control function of the storage chip under test is qualified can be indirectly tested through whether the data writing and data reading operations can be successfully performed. Whether the data storage function of the storage chip under test is qualified can be tested through whether the read data is equal to the written data.

[0091] In a specific implementation, the test mode of the storage chip under test can be different according to different signal types of the target signal to be transmitted. For example, in an embodiment of the present application, the target signal includes a control-type signal; and a working pin for transmitting the control-type signal in each working pin of the test machine can be determined as a target pin. Therefore, communication can be performed between the test machine and the storage chip under test through the target pin according to the working mode of the test machine. Based on this, whether the storage chip under test passes the test according to the communication result can specifically include: determining whether the control function of the storage chip under test passes the test according to whether the sent control signal matches the received feedback signal, for example, if the sent control signal is to read the identification of the storage chip under test, whether the received feedback signal is the identification can be detected so as to determine whether the control function of the storage chip under test passes the test.

[0092] In another embodiment of the present application, the target signal includes a data-type signal; and a working pin for transmitting the target signal in the test machine can be determined as a target pin. Therefore, communication can be performed between the test machine and the storage chip under test through the target pin according to the working mode of the test machine. Based on this, whether the storage chip under test passes the test according to the communication result can include: determining whether the data storage function of the storage chip under test passes the test according to whether the sent data-type signal is the same as the received data-type signal.

[0093] In some embodiments of the present application, the control type signal and the test type signal are not transmitted at the same time, so that when one type of signal is transmitted, the signal in the preset bit of the preset storage unit for transmitting the other type of signal and the working pin for transmitting the other type of signal can be ignored.

[0094] Further, whether the target signal is a control type signal or a data type signal, similar communication principles can be adopted between the tester and the tested storage chip, which can specifically include the process of transmitting the signal from the tester to the tested storage chip and the process of transmitting the signal from the tested storage chip to the tester. A brief introduction is made respectively as follows.

[0095] In an embodiment of the present application, the communication between the tester and the tested storage chip through the target pin according to the working mode of the tester can specifically include:

[0096] According to the working mode of the tester, for each byte in the to-be-sent signal, the value of each bit of the byte is written into the preset bit of the preset storage unit corresponding to each target pin, to obtain a transmission bit value;

[0097] Each target pin reads and transmits the value in each preset bit of each preset storage unit according to the clock cycle, until the transmission bit value is transmitted completely.

[0098] For example, referring to the foregoing, if the tester has 8 available pins, of which 5 are working pins, as shown in Figure 7 one byte 11110000 (for example, in the order from high bit to low bit) in the to-be-sent control type signal can be written into bit0 of the storage unit at address A0, bit0 of the storage unit at address A1, bit0 of the storage unit at address A2, bit0 of the storage unit at address A3, bit0 of the storage unit at address A4, bit0 of the storage unit at address A5, bit0 of the storage unit at address A6, and bit0 of the storage unit at address A7, respectively. Then, the target pin work0 corresponding to the control type signal reads and transmits the value of bit0 in one storage unit every clock cycle, so that the value in bit0 in each storage unit corresponding to addresses A0-A7 needs to be read and transmitted for 8 clock cycles.

[0099] As shown in Figure 8As shown, one byte 10010110 in the data class signal to be sent (for example, in the order from high bit to low bit) can be written into the bit1-bit4 of the storage unit at address B0 and the bit1-bit4 of the storage unit at address B1, respectively. Then, the data class signal corresponding to the target pins work1-work4, the value in bit1-bit4 of each storage unit is read and sent in 1 clock cycle, and the value in bit1-bit4 of each storage unit corresponding to the addresses B0-B1 needs to be read and sent in 2 clock cycles.

[0100] In another embodiment of the present application, the communication between the tester and the tested memory chip through the target pins can specifically include:

[0101] According to the working mode of the tester, the transmission bit values are received through the target pins of the tester, and each transmission bit value is stored in the preset bit position of the preset storage unit corresponding to the target pin.

[0102] Each transmission bit value is spliced in byte units to obtain each byte of the received signal.

[0103] The embodiment is the receiving process of the signal sent by the tested memory chip. The processing mode of the signal receiving process is the inverse process of the processing mode of the above-mentioned sending process, and the principle is similar, which will not be described here.

[0104] Further, in addition to the configuration of the data transmission pins of the tester, in some embodiments of the present application, the read-write mode of the tester can also be flexibly configured according to the clock trigger mode of the tested memory chip, so that the tester can test the tested memory chip under single clock edge trigger and double clock edge trigger. In the embodiments of the present application, the test method of the memory chip is described by taking single clock edge trigger as an example. The working principle of double clock edge trigger is similar to that of single clock edge trigger, except that 2 times of information can be transmitted in each clock cycle.

[0105] It should be noted that the test method of the memory chip provided by the embodiments of the present application can be realized by various subjects, which can be integrated in the tester or set on another electronic device different from the tester, such as a general-purpose computer.

[0106] Correspondingly, in a second aspect, the embodiments of the present application also provide a test device for a memory chip, which can test various types of memory chips, effectively expand the application range of test objects, and thus greatly reduce the test cost.

[0107] AsFigure 9 The test device for the storage chip provided by the embodiment of the present application can include:

[0108] The configuration unit 31 is configured to configure the data transmission pin of the test machine according to the pin type to which the preset chip pin in the tested storage chip belongs, so that the data transmission pin is adapted to transmit signals with the preset chip pin; wherein the pin type includes a control type, and the preset chip pin of the control type is used to transmit control type signals.

[0109] The test unit 32 is configured to test the tested storage chip by using the test machine.

[0110] The test device for the storage chip provided by the embodiment of the present application can configure the data transmission pin of the test machine according to the pin type to which the preset chip pin in the tested storage chip belongs, so that the data transmission pin is adapted to transmit signals with the preset chip pin, and then test the tested storage chip by using the test machine. Since the pin type to which the preset chip pin in the tested storage chip belongs includes a control type, the data transmission pin originally used to transmit data type signals in the test machine can be used to communicate with the control type preset chip pin in the tested storage chip used to transmit control type signals, so that the test machine can test and control various tested storage chips, thereby effectively expanding the application range of the test object and greatly reducing the test cost.

[0111] In an embodiment, the pin type further includes a data type, and the preset chip pin of the data type is used to transmit data type signals.

[0112] In an embodiment, the configuration unit 31 can include:

[0113] The first determination module is configured to determine the total number of the preset chip pins according to the pin type to which the preset chip pin in the tested storage chip belongs and the number of pins included in each pin type; wherein the preset chip pin is a pin actually used by the tested storage chip in a preset operation mode.

[0114] The configuration module is configured to configure a working mode of the test machine according to the total number of the preset chip pins, the working mode being used to indicate available pins provided by the test machine and working pins actually used in the available pins, wherein the available pins are at least part of the data transmission pins; in each working mode, each working pin is configured to correspond to a preset bit of a preset storage unit in the test machine; wherein each preset storage unit is used to store one byte of information, and each preset storage unit corresponds to one storage address.

[0115] The matching module is configured to match each preset chip pin with one working pin to obtain a matching relationship between the preset chip pin and the working pin.

[0116] In an embodiment, the configuration module can be specifically configured to:

[0117] determine, according to the number of the available pins provided by the test machine, a correspondence relationship between each available pin and the preset bit of the preset storage unit in communication between the test machine and the storage chip under test;

[0118] determine, according to the correspondence relationship between the working pin and the available pin and the correspondence relationship between each available pin and the preset bit of the preset storage unit, a correspondence relationship between each working pin and the preset bit of the preset storage unit.

[0119] In an embodiment, the configuration unit 31 can further include:

[0120] The second determination module is configured to determine, according to the correspondence relationship between each working pin and the preset bit of the preset storage unit, a number of the preset bits corresponding to each working pin in each preset storage unit after the working mode of the test machine is configured according to the total number of the preset chip pins.

[0121] The third determination module is configured to determine, according to the number of the preset bits corresponding to each working pin in each preset storage unit and the number of the working pins used for signal transmission in the test machine, a number of the preset storage units required to complete transmission of each byte in the signal transmission.

[0122] In an embodiment, the test unit 32 can include:

[0123] The fourth determination module is configured to determine a signal type to which a target signal to be transmitted between the test machine and the storage chip under test belongs, the signal type including a control type or a data type.

[0124] a fifth determining module, configured to determine, according to a signal type to which the target signal belongs, a working pin for transmitting the target signal from each working pin of the test machine, to obtain a target pin;

[0125] a communication module, configured to communicate between the test machine and the tested storage chip through the target pin according to the working mode of the test machine;

[0126] a sixth determining module, configured to determine whether the tested storage chip passes the test according to a communication result.

[0127] In an embodiment, the communication module can be specifically configured to:

[0128] according to the working mode of the test machine, write a value of each bit of each byte in the to-be-sent signal into the preset bit of the preset storage unit corresponding to each target pin, to obtain a transmission bit value;

[0129] each target pin reads and sends the value in each preset bit of each preset storage unit simultaneously according to a clock cycle, until the transmission bit value is sent completely.

[0130] In an embodiment, the communication module can be specifically configured to:

[0131] according to the working mode of the test machine, receive a transmission bit value from the tested storage chip through each target pin of the test machine, and store each transmission bit value in the preset bit of the preset storage unit corresponding to each target pin;

[0132] splicing each transmission bit value in a byte unit to obtain each byte of a received signal.

[0133] In an embodiment, the target signal includes a control signal; and the sixth determining module can be specifically configured to determine whether a control function of the tested storage chip passes the test according to whether the sent control signal matches a received feedback signal.

[0134] In an embodiment, the target signal includes a data signal; and the sixth determining module can be specifically configured to determine whether a data storage function of the tested storage chip passes the test according to whether the sent data signal is the same as the received data signal.

[0135] In one embodiment, the memory chip under test is an embedded multimedia card, and the preset chip pins include one control pin and any number of data pins: 1, 4, or 8.

[0136] Accordingly, in a third aspect, embodiments of the present invention also provide a testing machine, wherein the testing machine is provided with a testing device for any of the memory chips provided in the foregoing embodiments, and thus can also achieve the corresponding beneficial technical effects, which have been described in detail above and will not be repeated here.

[0137] Fourthly, embodiments of the present invention also provide an electronic device capable of testing various types of memory chips, effectively expanding the scope of application of the test objects, thereby greatly reducing testing costs.

[0138] like Figure 10 As shown, the electronic device provided in the embodiments of the present invention may include: a housing 51, a processor 52, a memory 53, a circuit board 54, and a power supply circuit 55, wherein the circuit board 54 is disposed inside the space enclosed by the housing 51, and the processor 52 and the memory 53 are disposed on the circuit board 54; the power supply circuit 55 is used to supply power to various circuits or devices of the above-mentioned electronic device; the memory 53 is used to store executable program code; the processor 52 runs a program corresponding to the executable program code by reading the executable program code stored in the memory 53, for executing the testing method of the memory chip provided in any of the foregoing embodiments.

[0139] For details on the specific execution process of the above steps by the processor 52 and the steps further executed by the processor 52 by running executable program code, please refer to the description of the foregoing embodiments, which will not be repeated here.

[0140] Fifthly, embodiments of the present invention also provide a computer-readable storage medium storing one or more programs, which can be executed by one or more processors to implement any of the testing methods for memory chips provided in the foregoing embodiments, thus achieving the corresponding technical effects. This has been described in detail above and will not be repeated here.

[0141] It is to be noted that the terms such as first and second, etc., are used herein merely to differentiate one entity or action from another, and do not necessarily require or imply any such actual relationship or order between such entities or actions. Also, the terms "comprises", "comprising", or any other variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but can include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by an indefinite article "a" or "an" does not exclude the existence of, and a process, method, article, or apparatus including a similar element does not exclude the existence of additional identical elements.

[0142] Each of the embodiments in the present specification is described in a related manner, and the same or similar parts between the embodiments can be referred to each other. Each of the embodiments focuses on the difference from other embodiments.

[0143] Especially, for the device embodiments, since they are basically similar to the method embodiments, the description is relatively simple, and the relevant parts can be referred to the part of the description of the method embodiments.

[0144] For the convenience of description, the above device is described in various units / modules respectively according to functions. Of course, the functions of each unit / module can be implemented in the same or multiple software and / or hardware when implementing the present application.

[0145] Those skilled in the art can understand that all or part of the processes in the above-mentioned embodiments can be completed by a computer program instructing related hardware. The program can be stored in a computer readable storage medium, and when the program is executed, the processes of the above-mentioned embodiments can be included. The storage medium can be a magnetic disc, an optical disc, a read-only memory (ROM) or a random access memory (RAM), etc.

[0146] The above description is merely a specific implementation of the present application, but the protection scope of the present application is not limited thereto. Any changes or replacements within the technical scope disclosed by the present application can be easily thought by those skilled in the art, and should be covered within the protection scope of the present application. Therefore, the protection scope of the present application should be subject to the protection scope of the claims.

Claims

1. A test method of a memory chip, characterized by, The method comprises: configuring data transmission pins of a test machine according to pin types to which preset chip pins in a measured storage chip belong, so that the data transmission pins originally used for transmitting data signals are adapted to transmit signals with the preset chip pins; wherein the pin types include a control type and a data type, preset chip pins of the control type are used for transmitting control signals, and preset chip pins of the data type are used for transmitting data signals; testing the measured storage chip by using the test machine; wherein the configuring the data transmission pins of the test machine according to the pin types to which the preset chip pins in the measured storage chip belong comprises: determining a total number of the preset chip pins according to the pin types to which the preset chip pins in the measured storage chip belong and a number of pins included in each of the pin types; wherein the preset chip pins are pins actually used by the measured storage chip in a preset operation mode; configuring an operation mode of the test machine according to the total number of the preset chip pins, the operation mode being used for indicating available pins provided by the test machine and working pins actually used in the available pins, wherein the available pins are at least a part of the data transmission pins.

2. The method of claim 1, wherein, in each of the operation modes, each of the working pins is configured to correspond to a preset bit of a preset storage unit in the test machine; wherein each of the preset storage units is used for storing one byte of information, and each of the preset storage units corresponds to a storage address; after the configuring the operation mode of the test machine according to the total number of the preset chip pins, the method further comprises: matching each of the preset chip pins with one of the working pins to obtain a matching relationship between the preset chip pins and the working pins.

3. The method of claim 2, wherein, the correspondence between the working pins and the preset bits of the preset storage units is determined by: determining, according to a number of the available pins provided by the test machine, a correspondence between each of the available pins and the preset bits of the preset storage units in communication between the test machine and the measured storage chip; determining, according to the correspondence between the working pins and the available pins and the correspondence between each of the available pins and the preset bits of the preset storage units, the correspondence between each of the working pins and the preset bits of the preset storage units.

4. The method of claim 3, wherein, after the configuring the operation mode of the test machine according to the total number of the preset chip pins, the method further comprises: determining, according to the correspondence between each of the working pins and the preset bits of the preset storage units, a number of the preset bits of the preset storage units corresponding to each of the working pins in each of the preset storage units; determining, according to the number of the preset bits of the preset storage units corresponding to each of the working pins in each of the preset storage units and a number of the working pins used for signal transmission in the test machine, a number of the preset storage units required for completing transmission of each byte in the signal transmission.

5. The method of claim 4, wherein, The testing of the storage chip under test by the tester comprises: determining a signal type to which a target signal to be transmitted between the tester and the storage chip under test belongs, the signal type comprising a control type or a data type; determining a working pin for transmitting the target signal among working pins of the tester according to the signal type to which the target signal belongs, to obtain a target pin; communicating between the tester and the storage chip under test through the target pin according to the working mode of the tester; determining whether the storage chip under test passes the test according to a communication result.

6. The method of claim 5, wherein, The communicating between the tester and the storage chip under test through the target pin according to the working mode of the tester comprises: writing a bit value of each byte in a to-be-sent signal into a preset bit of a preset storage unit corresponding to each target pin according to the working mode of the tester, to obtain a transmission bit value; reading and sending the values in the preset bits of the preset storage units simultaneously according to a clock cycle until the transmission bit value is sent completely.

7. The method of claim 5, wherein, The communicating between the tester and the storage chip under test through the target pin according to the working mode of the tester comprises: receiving a transmission bit value from the storage chip under test through each target pin of the tester according to the working mode of the tester, and storing each transmission bit value in the preset bit of the preset storage unit corresponding to the target pin; splicing each transmission bit value to obtain each byte of a received signal.

8. The method of claim 5, wherein: the target signal comprises a control type signal; the determining whether the storage chip under test passes the test according to a communication result comprises: determining whether a control function of the storage chip under test passes the test according to whether a sent control signal matches a received feedback signal; or the target signal comprises a data type signal; the determining whether the storage chip under test passes the test according to a communication result comprises: determining whether a data storage function of the storage chip under test passes the test according to whether a sent data type signal is the same as a received data type signal. The storage chip under test is an embedded multimedia card, and the preset chip pins comprise one control type pin and any one of the following numbers of data type pins: one, four, or eight.

9. The method of claim 1, wherein, The method comprises:

10. A testing apparatus for a memory chip, characterized by comprising: a configuration unit configured to configure data transmission pins of a tester according to a pin type of preset chip pins in a storage chip under test, so that the data transmission pins originally used for transmitting data type signals are adapted to perform signal transmission with the preset chip pins; wherein the pin type comprises a control type and a data type, the control type preset chip pin is used for transmitting a control type signal, and the data type preset chip pin is used for transmitting a data type signal. ​ A testing unit is configured to test the storage chip under test by using the testing machine; The configuration unit comprises: A first determining module is configured to determine a total number of preset chip pins according to a pin type to which the preset chip pins belong and a number of pins included in each pin type, wherein the preset chip pins are pins actually used by the storage chip under test in a preset operation mode; A configuration module is configured to configure a working mode of the testing machine according to the total number of the preset chip pins, wherein the working mode is used to indicate available pins provided by the testing machine and working pins actually used in the available pins, and wherein the available pins are at least a part of the data transmission pins.

11. The apparatus of claim 10, wherein, In each working mode, each working pin is configured to correspond to a preset bit of a preset storage unit in the testing machine, wherein each preset storage unit is used to store one byte of information, and each preset storage unit corresponds to a storage address. The configuration unit further comprises: A matching module is configured to match each preset chip pin with a working pin to obtain a matching relationship between the preset chip pin and the working pin.

12. The apparatus of claim 11, wherein, The configuration module is specifically configured to: determine a correspondence between each available pin and the preset bit of the preset storage unit in communication between the testing machine and the storage chip under test according to a number of the available pins provided by the testing machine; determine a correspondence between each working pin and the preset bit of the preset storage unit according to the correspondence between the working pin and the available pin and the correspondence between each available pin and the preset bit of the preset storage unit.

13. The apparatus of claim 12, wherein, The configuration unit further comprises: A second determining module is configured to determine a number of the preset bit of the preset storage unit corresponding to each working pin in each preset storage unit according to the correspondence between each working pin and the preset bit of the preset storage unit after the working mode of the testing machine is configured according to the total number of the preset chip pins; A third determining module is configured to determine a number of the preset storage units required to complete transmission of each byte in the signal transmission according to the number of the preset bit of the preset storage unit corresponding to each working pin in each preset storage unit and a number of the working pins used for signal transmission in the testing machine.

14. The apparatus of claim 13, wherein, The testing unit comprises: A fourth determining module is configured to determine a signal type to which a target signal to be transmitted between the testing machine and the storage chip under test belongs, wherein the signal type includes a control type or a data type; A fifth determining module is configured to determine a working pin used to transmit the target signal from the working pins of the testing machine according to the signal type to which the target signal belongs to obtain a target pin; A communication module is configured to perform communication between the testing machine and the storage chip under test through the target pin according to the working mode in which the testing machine is located. A sixth determining module is configured to determine whether the tested storage chip passes the test according to the communication result.

15. The apparatus of claim 14, wherein, The communication module is specifically configured to: According to the working mode of the test machine, the values of each bit of each byte in the to-be-sent signal are written into the preset bit positions of the preset storage unit corresponding to each target pin, to obtain transmission bit values; Each target pin reads and sends the values in the preset bit positions of each preset storage unit simultaneously according to a clock cycle, until the transmission bit values are sent completely.

16. The apparatus of claim 14, wherein, The communication module is specifically configured to: According to the working mode of the test machine, the test machine receives transmission bit values from the tested storage chip through each target pin, and stores each transmission bit value in the preset bit position of the preset storage unit corresponding to each target pin. The transmission bit values are spliced in byte units to obtain each byte of the received signal.

17. The apparatus of claim 14, wherein The target signal includes a control signal; The sixth determining module is specifically configured to determine whether the control function of the tested storage chip passes the test according to whether the sent control signal matches the received feedback signal; Alternatively, The target signal includes a data signal; The sixth determining module is specifically configured to determine whether the data storage function of the tested storage chip passes the test according to whether the sent data signal is the same as the received data signal.

18. The apparatus of claim 10, wherein, The tested storage chip is an embedded multimedia card, and the preset chip pin includes one control pin and any one of the following numbers of data pins: one, four, or eight.

19. A testing machine characterized by, The test machine is provided with the storage chip testing apparatus of any one of claims 10-18.

20. An electronic device, comprising: The electronic device includes a housing, a processor, a memory, a circuit board, and a power supply circuit, wherein the circuit board is arranged inside a space enclosed by the housing, the processor and the memory are arranged on the circuit board; the power supply circuit is used to supply power to each circuit or device of the electronic device; the memory is used to store executable program codes; the processor runs programs corresponding to the executable program codes by reading the executable program codes stored in the memory, and is used to execute the test method of any one of the preceding claims 1-9.

21. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores one or more programs that can be executed by one or more processors to implement the test method of any one of the preceding claims 1-9. The computer-readable storage medium stores one or more programs that can be executed by one or more processors to implement the test method of any one of the preceding claims 1-9.

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