A grafting chip, a grafting chip assembly and an imaging cartridge

CN117632837BActive Publication Date: 2026-08-07APEX MICROELECTRONICS CO LTD
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
APEX MICROELECTRONICS CO LTD
Filing Date
2023-10-18
Publication Date
2026-08-07

AI Technical Summary

Technical Problem

[0004]有鉴于此,本申请提供一种嫁接芯片、嫁接芯片组件及成像盒,以利于解决在现有技术中,加入嫁接芯片后的成像耗材盒中的原装芯片与成像设备之间通过嫁接芯片通信,通信数据的协议转换会带来额外功耗,无法满足一些成像设备对成像耗材盒的芯片的功耗要求的问题

Benefits of technology

[0025]采用本申请实施例所提供的方案,所述嫁接芯片包括第一端、第二端及第三端。嫁接芯片的第一端用于与成像设备的第一端电连接,嫁接芯片的第一端用于接收成像设备的第一端发送的任务指令,任务指令包括第一指令和第二指令;嫁接芯片的第二端用于与成像设备的第二端电连接且接收成像设备的第二端输出的第一电压;嫁接芯片的第三端用于与原装芯片的第一端电连接;嫁接芯片的第一端接收到第一指令时,嫁接芯片的第三端用于向原装芯片的第一端发送第一控制信号以使原装芯片对第一指令做出响应;嫁接芯片的第一端接收到第二指令时,嫁接芯片对第二指令做出响应,且嫁接芯片的第三端停止向原装芯片的第一端发送第一控制信号以使原装芯片无法对第二指令做出响应;其中,嫁接芯片的第一端用于与原装芯片的第二端电连接;或,嫁接芯片的第二端用于与原装芯片的第二端电连接。在本申请实施例中,在嫁接芯片及原装芯片接收到成像设备发送的第一指令时,嫁接芯片可以控制原装芯片执行第一指令对应的第一任务对第一指令做出响应。在嫁接芯片及原装芯片接收到成像设备发送的第二指令时,嫁接芯片可以执行第二指令对应的第二任务对第二指令做出响应,并控制原装芯片无法完成第二指令对应的第二任务对第二指令做出响应,即原装芯片不参与第二任务的完成,进而避免原装芯片与嫁接芯片的冲突。也就是说,用于完成第一任务对第一指令做出响应的原装芯片可以直接接收对应的第一指令且用于完成第二任务对第二指令做出响应的嫁接芯片可以直接接收对应的第二指令。这样一来,嫁接芯片可以正常执行第二指令对应的第二任务对第二指令做出响应,并且可以控制原装芯片执行成像设备发送的第一指令对应的第一任务对第一指令做出响应。原装芯片在执行第一任务对第一指令做出响应时可以与成像设备直接通信,以避免嫁接芯片在转发信息时需要进行协议转换造成功耗较大的问题,因此执行第一任务对第一指令做出响应的功耗与单独一个原装芯片或单独一个嫁接芯片执行该些任务对第一指令做出响应时的功耗差别不大。该嫁接芯片应用于成像设备时,可以满足成像设备对原装芯片及嫁接芯片构成的嫁接芯片组件的功耗要求。

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Abstract

Embodiments of the present application provide a grafted chip, a grafted chip assembly and an imaging cartridge. The grafted chip comprises a first end, a second end and a third end. The first end of the grafted chip is configured to be electrically connected with a first end of an imaging device, and the first end of the grafted chip is configured to receive a task instruction sent by the first end of the imaging device, the task instruction comprising a first instruction and a second instruction. The third end of the grafted chip is configured to be electrically connected with a first end of an original chip. When the first end of the grafted chip receives the first instruction, the third end of the grafted chip is configured to send a first control signal to the first end of the original chip to make the original chip respond to the first instruction. When the first end of the grafted chip receives the second instruction, the grafted chip responds to the second instruction, and the third end of the grafted chip stops sending the first control signal to the first end of the original chip so that the original chip cannot respond to the second instruction. The grafted chip can meet the power consumption requirement of the imaging device for the grafted chip assembly.
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Description

Technical Field

[0001] This application relates to the field of communication technology, specifically to a grafting chip, a grafting chip assembly, and an imaging box. Background Technology

[0002] To improve resource utilization and reduce environmental pollution, imaging devices can reuse discarded imaging consumable cartridges, that is, reuse the original chips on the cartridges. When reused, the original chips typically have the capability to execute tasks corresponding to different task instructions sent by the imaging device; however, the original chips may produce incorrect results when performing some tasks. In some technologies, grafted chips can perform these tasks. However, there are also situations where some task instructions in an imaging device require the original chip to execute; that is, some tasks are performed by grafted chips, and some by the original chip.

[0003] In some technologies, a grafted chip communicates with the imaging device, while the original chip communicates indirectly with the imaging device through the grafted chip. When the imaging device initiates a command that does not require the original chip's involvement, the grafted chip processes the command and directly replies to the imaging device without the original chip's participation. When the imaging device initiates a command that requires the original chip's involvement, the grafted chip receives the command, forwards it to the original chip, processes and responds to the command, and sends the response data to the grafted chip, which then sends the response data to the imaging device. The grafted chip, acting as the master of the original chip, needs to perform protocol conversion on the response data received from the original chip before acting as a slave of the imaging device and sending the processed response data to the imaging device. This protocol conversion process incurs additional power consumption. Therefore, compared to the power consumption of an imaging consumable cartridge with only the original chip, the power consumption of an imaging consumable cartridge with a grafted chip is higher, which may not meet the power consumption requirements of some imaging devices for the chip in the imaging consumable cartridge. Summary of the Invention

[0004] In view of this, this application provides a grafting chip, a grafting chip assembly, and an imaging box to solve the problem that in the prior art, when the original chip in the imaging consumable box with the grafting chip is connected to the imaging device, the communication data protocol conversion brings additional power consumption, which cannot meet the power consumption requirements of some imaging devices for the chip in the imaging consumable box.

[0005] In a first aspect, embodiments of this application provide a grafting chip, including:

[0006] First end, the first end of the grafting chip is used to be electrically connected to the first end of the imaging device, and the first end of the grafting chip is used to receive task instructions sent by the first end of the imaging device, the task instructions including a first instruction and a second instruction;

[0007] The second end of the grafting chip is used to be electrically connected to the second end of the imaging device, and the second end of the grafting chip is used to receive the first voltage output by the second end of the imaging device.

[0008] The third end of the grafting chip is used to electrically connect with the first end of the original chip; when the first end of the grafting chip receives the first instruction, the third end of the grafting chip is used to send a first control signal to the first end of the original chip so that the original chip responds to the first instruction; when the first end of the grafting chip receives the second instruction, the grafting chip responds to the second instruction, and the third end of the grafting chip stops sending the first control signal to the first end of the original chip so that the original chip cannot respond to the second instruction;

[0009] Wherein, the first end of the grafting chip is used to be electrically connected to the second end of the original chip; or, the second end of the grafting chip is used to be electrically connected to the second end of the original chip.

[0010] In one possible implementation of the first aspect, the grafting chip includes a processing module and a voltage divider module. The processing module includes a first output terminal and a second output terminal. The first output terminal is electrically connected to a third terminal of the grafting chip, and the voltage divider module is electrically connected between the second output terminal and the third terminal of the grafting chip.

[0011] When the first end of the grafting chip receives the first instruction, the first output end is used to output the first control signal to the third end of the grafting chip; when the first end of the grafting chip receives the second instruction, the first output end stops outputting the first control signal to the third end of the grafting chip and the second output end outputs the second control signal.

[0012] In one possible implementation of the first aspect, the voltage divider module includes resistive elements and / or diodes.

[0013] In one possible implementation of the first aspect, the grafting chip further includes an adapter terminal for connecting to a first end or a second end of the grafting chip and for connecting to a second end of the original chip.

[0014] In one possible implementation of the first aspect, the first end of the grafting chip or the second end of the grafting chip is used to be electrically connected to the second end of the original chip via a connecting wire.

[0015] In one possible implementation of the first aspect, a first end of the grafted chip is used for electrical connection with a first end of the imaging device, and the first end of the imaging device is used for electrical connection with a second end of the original chip via a connecting wire; or...

[0016] The second end of the grafted chip is used to be electrically connected to the second end of the imaging device, and the second end of the imaging device is used to be electrically connected to the second end of the original chip via a connecting wire.

[0017] In one possible implementation of the first aspect, a first end of the grafting chip is used for electrical connection with a second end of the original chip, and the connection relationship between the third end of the grafting chip and the second end of the grafting chip switches between electrical connection and electrical insulation; or,

[0018] The second end of the grafting chip is used to electrically connect with the second end of the original chip, and the connection relationship between the third end of the grafting chip and the first end of the grafting chip switches between electrical connection and electrical insulation.

[0019] In one possible implementation of the first aspect, the first end of the grafting chip is further configured to receive a second voltage sent by the first end of the imaging device; wherein the second voltage is a power supply voltage and the first voltage is a ground voltage; or, the second voltage is a ground voltage and the first voltage is a power supply voltage.

[0020] In one possible implementation of the first aspect, the grafting chip switches to a target operating state upon receiving the first instruction, wherein the power consumption of the grafting chip in the target operating state is less than a preset power consumption value.

[0021] Secondly, embodiments of this application provide a grafting chip assembly, including the grafting chip described in any of the first aspects above, and also including an original chip.

[0022] In one possible implementation of the second aspect, when the grafting chip assembly receives the first instruction, the grafting chip assembly switches to a first working state, wherein the original chip responds to the first instruction, and the power consumption of the grafting chip in the first working state is less than a preset power consumption value.

[0023] When the grafting chip assembly receives the second instruction, the grafting chip assembly switches to a second working state, wherein the original chip cannot respond to the second instruction, and the grafting chip responds to the second instruction.

[0024] Thirdly, embodiments of this application provide an imaging box including the grafting chip assembly described in any of the second aspects above.

[0025] The grafting chip, using the solution provided in this application embodiment, includes a first end, a second end, and a third end. The first end of the grafting chip is electrically connected to the first end of the imaging device and receives task instructions sent by the first end of the imaging device, including a first instruction and a second instruction. The second end of the grafting chip is electrically connected to the second end of the imaging device and receives a first voltage output by the second end of the imaging device. The third end of the grafting chip is electrically connected to the first end of the original chip. When the first end of the grafting chip receives the first instruction, the third end of the grafting chip sends a first control signal to the first end of the original chip to cause the original chip to respond to the first instruction. When the first end of the grafting chip receives the second instruction, the grafting chip responds to the second instruction, and the third end of the grafting chip stops sending the first control signal to the first end of the original chip so that the original chip cannot respond to the second instruction. Alternatively, the first end of the grafting chip is electrically connected to the second end of the original chip; or, the second end of the grafting chip is electrically connected to the second end of the original chip. In this embodiment, when the grafting chip and the original chip receive a first instruction from the imaging device, the grafting chip can control the original chip to execute the first task corresponding to the first instruction in response to the first instruction. When the grafting chip and the original chip receive a second instruction from the imaging device, the grafting chip can execute the second task corresponding to the second instruction in response to the second instruction, and control the original chip to prevent it from completing the second task corresponding to the second instruction in response to the second instruction. That is, the original chip does not participate in the completion of the second task, thereby avoiding conflict between the original chip and the grafting chip. In other words, the original chip used to complete the first task and respond to the first instruction can directly receive the corresponding first instruction, and the grafting chip used to complete the second task and respond to the second instruction can directly receive the corresponding second instruction. In this way, the grafting chip can normally execute the second task corresponding to the second instruction in response to the second instruction, and can control the original chip to execute the first task corresponding to the first instruction sent by the imaging device in response to the first instruction. When the original chip performs the first task and responds to the first instruction, it can communicate directly with the imaging device. This avoids the high power consumption issue caused by protocol conversion when the grafted chip forwards information. Therefore, the power consumption for performing the first task and responding to the first instruction is not significantly different from the power consumption of either the original chip or the grafted chip performing the same tasks. When this grafted chip is used in an imaging device, it can meet the power consumption requirements of the imaging device for the grafted chip assembly consisting of the original chip and the grafted chip. Attached Figure Description

[0026] To more clearly illustrate the technical solutions of the embodiments of this application, the drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0027] Figure 1 This is a schematic diagram of the structure of a grafting chip provided in an embodiment of this application;

[0028] Figure 2 This is a schematic diagram of another grafting chip provided in an embodiment of this application;

[0029] Figure 3 This is a schematic diagram of another grafting chip provided in an embodiment of this application;

[0030] Figure 4 This is a schematic diagram of another grafting chip provided in an embodiment of this application;

[0031] Figure 5 This is a schematic diagram of another grafting chip provided in an embodiment of this application;

[0032] Figure 6 This is a schematic diagram of another grafting chip provided in an embodiment of this application;

[0033] Figure 7 This is a schematic diagram of another grafting chip provided in an embodiment of this application;

[0034] Figure 8 This is a schematic diagram of another grafting chip provided in an embodiment of this application;

[0035] Figure 9 This is a schematic diagram of another grafting chip provided in an embodiment of this application;

[0036] Figure 10 This is a schematic diagram of another grafting chip provided in an embodiment of this application;

[0037] Figure 11 This is a schematic diagram of another grafting chip provided in an embodiment of this application;

[0038] Figure 12 This is a schematic diagram of another grafting chip provided in an embodiment of this application;

[0039] Figure 13 This is a schematic diagram of another grafting chip provided in an embodiment of this application;

[0040] Figure 14 This is a schematic diagram of another grafting chip provided in an embodiment of this application. Detailed Implementation

[0041] To better understand the technical solution of this application, the embodiments of this application will be described in detail below with reference to the accompanying drawings.

[0042] It should be understood that the described embodiments are merely some, not all, of the embodiments in this application. All other embodiments obtained by those skilled in the art based on the embodiments in this application without inventive effort are within the scope of protection of this application.

[0043] The terminology used in the embodiments of this application is for the purpose of describing particular embodiments only and is not intended to be limiting of this application. The singular forms “a,” “the,” and “the” used in the embodiments of this application and the appended claims are also intended to include the plural forms unless the context clearly indicates otherwise.

[0044] It should be understood that the term "and / or" used in this article is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, or B existing alone. Additionally, the character " / " in this article generally indicates that the preceding and following related objects have an "or" relationship.

[0045] To improve resource utilization and reduce environmental pollution, imaging devices can reuse discarded imaging consumable cartridges, such as ink cartridges and toner cartridges, essentially reusing the original chips on these cartridges. When reused, these original chips typically possess the ability to execute different task commands sent by the imaging device, but they may produce incorrect results when performing some tasks. For example, because users cannot modify the information such as the remaining toner level recorded on the original chip on the imaging consumable cartridge, when the cartridge is directly recycled after its normal lifespan, the original chip cannot provide accurate information about the remaining toner level. For instance, even when paired with a fully loaded toner cartridge, the imaging device will still indicate low toner levels because the original chip's record of remaining toner has not been updated, leaving the user unable to know the toner cartridge's status and resulting in a poor user experience. In some technologies, grafted chips can perform these tasks. However, some tasks in imaging devices require the original chip to execute certain commands. In other words, some tasks are performed by the grafted chip, while others are performed by the original chip. For example, during communication between the imaging consumable cartridge and the imaging device, the original chip provides identity or encrypted information to authenticate with the imaging device; the grafted chip provides information such as the remaining amount of imaging consumables.

[0046] In some technologies, a grafted chip communicates with the imaging device, while the original chip communicates indirectly with the imaging device through the grafted chip. When the imaging device initiates a command that does not require the original chip's involvement, such as a command to read or write the remaining amount of imaging consumables, the grafted chip processes the command and directly replies to the imaging device without the original chip's involvement. When the imaging device initiates a command that requires the original chip's involvement, such as an authentication command, the grafted chip receives the command and forwards it to the original chip. The original chip processes the command, responds, and sends the response data to the grafted chip, which then sends the response data to the imaging device. The grafted chip, acting as the master of the original chip, needs to perform protocol conversion on the response data received from the original chip before acting as a slave of the imaging device and sending the processed response data to the imaging device. This protocol conversion process incurs additional power consumption. Therefore, compared to the power consumption of an imaging consumable cartridge with only the original chip, the imaging consumable cartridge with the grafted chip consumes significantly more power, which may not meet the power consumption requirements of some imaging devices.

[0047] To address the aforementioned issues, this application provides a grafting chip, a grafting chip assembly, and an imaging cartridge. The grafting chip includes a first end, a second end, and a third end. The first end of the grafting chip is electrically connected to a first end of an imaging device and is used to receive task instructions sent by the first end of the imaging device. The task instructions include a first instruction and a second instruction. The second end of the grafting chip is electrically connected to the second end of the imaging device and receives a first voltage output by the second end of the imaging device. The third end of the grafting chip is electrically connected to the first end of an original chip. When the first end of the grafting chip receives the first instruction, the third end of the grafting chip sends a first control signal to the first end of the original chip to cause the original chip to respond to the first instruction. When the first end of the grafting chip receives the second instruction, the grafting chip responds to the second instruction, and the third end of the grafting chip stops sending the first control signal to the first end of the original chip so that the original chip cannot respond to the second instruction. Alternatively, the first end of the grafting chip is electrically connected to the second end of the original chip; or, the second end of the grafting chip is electrically connected to the second end of the original chip. In this embodiment, when the grafting chip and the original chip receive a first instruction from the imaging device, the grafting chip can control the original chip to execute the first task corresponding to the first instruction in response to the first instruction. When the grafting chip and the original chip receive a second instruction from the imaging device, the grafting chip can execute the second task corresponding to the second instruction in response to the second instruction, and control the original chip to prevent it from completing the second task corresponding to the second instruction in response to the second instruction. That is, the original chip does not participate in the completion of the second task, thereby avoiding conflict between the original chip and the grafting chip. In other words, the original chip used to complete the first task and respond to the first instruction can directly receive the corresponding first instruction, and the grafting chip used to complete the second task and respond to the second instruction can directly receive the corresponding second instruction. In this way, the grafting chip can normally execute the second task corresponding to the second instruction in response to the second instruction, and can control the original chip to execute the first task corresponding to the first instruction sent by the imaging device in response to the first instruction. When the original chip performs the first task and responds to the first instruction, it can communicate directly with the imaging device. This avoids the high power consumption issue caused by protocol conversion when the grafted chip forwards information. Therefore, the power consumption for performing the first task and responding to the first instruction is not significantly different from the power consumption of either the original chip or the grafted chip performing the same tasks. When this grafted chip is used in an imaging device, it can meet the power consumption requirements of the imaging device for the grafted chip assembly consisting of the original chip and the grafted chip. A detailed explanation follows.

[0048] See Figure 1 This is a schematic diagram of the structure of a grafting chip 10 provided in an embodiment of this application, as shown below. Figure 1As shown, the grafting chip 10 includes: a first end 101, a second end 102 and a third end 103.

[0049] The first end 101 of the grafting chip 10 is used to be electrically connected to the first end 201 of the imaging device 20. The first end 101 of the grafting chip 10 is used to receive the task instructions sent by the first end 201 of the imaging device 20. The task instructions include a first instruction and a second instruction.

[0050] The second end 102 of the grafting chip 10 is used to electrically connect with the second end 202 of the imaging device 20, and the second end 102 of the grafting chip 10 receives the first voltage output by the second end 202 of the imaging device 20.

[0051] The third terminal 103 of the grafting chip 10 is used to electrically connect with the first terminal 301 of the original chip 30; when the first terminal 101 of the grafting chip 10 receives a first instruction, the third terminal 103 of the grafting chip 10 is used to send a first control signal to the first terminal 301 of the original chip 30 so that the original chip 30 responds to the first instruction; when the first terminal 101 of the grafting chip 10 receives a second instruction, the grafting chip 10 responds to the second instruction, and the third terminal 103 of the grafting chip 10 stops sending the first control signal to the first terminal 301 of the original chip 30 so that the original chip 30 cannot respond to the second instruction.

[0052] The first end 101 of the grafting chip 10 is used to electrically connect with the second end 302 of the original chip 30.

[0053] In this embodiment, the first end 101 of the grafted chip 10 is electrically connected to the first end 201 of the imaging device 20 and to the second end 302 of the original chip 30. Both the first end 101 of the grafted chip 10 and the second end 302 of the original chip 30 can receive task instructions sent by the imaging device 20.

[0054] In some embodiments, the grafted chip 10 or the original chip 30 responds to the task instructions sent by the imaging device 20 by parsing the task instructions sent by the imaging device 20 and executing the task corresponding to the task instructions.

[0055] The first instruction sent by the first end 201 of the imaging device 20 to the grafting chip 10 and the original chip 30 requires a response from the original chip 30. For example, the first task corresponding to the first instruction may be a task that can be accurately executed by the original chip 30 but that the grafting chip 10 does not have the capability to execute. In some embodiments, the first task may be that the original chip 30 completes authentication with the imaging device 20. Executing this task requires sending identity information or encrypted information to the imaging device 20, and the original chip 30 stores this information, therefore the first task needs to be executed by the original chip 30.

[0056] When the first end 201 of the imaging device 20 sends the first command, both the first end 101 of the grafted chip 10 and the second end 302 of the original chip 30 can receive the first command. At this time, the third end 103 of the grafted chip 10 sends a first control signal to the first end 301 of the original chip 30 so that the original chip 30 responds to the first command.

[0057] The second instruction sent by the first end 201 of the imaging device 20 to the grafting chip 10 and the original chip 30 requires a response from the grafting chip 10. Since the original chip 30 typically has the capability to execute tasks corresponding to different task instructions sent by the imaging device 20, and may produce incorrect results when executing some tasks, the original chip 30 should be avoided from responding to the second instruction. For example, in some embodiments, the second task may be that the grafting chip assembly 01 provides consumable balance information to the imaging device 20. The original chip 30 cannot provide correct consumable balance information, therefore this task needs to be executed by the grafting chip 10, and should be avoided by the original chip 30.

[0058] When the first end 201 of the imaging device 20 sends the second command, both the first end 101 of the grafting chip 10 and the first end 301 of the original chip 30 can receive the second command. Upon receiving the second command, the first end 101 of the grafting chip 10 responds to it. To avoid a conflict in the results of the second task, when the grafting chip 10 receives the second command, its second end 102 stops sending the first control signal to the first end 301 of the original chip 30, preventing the original chip 30 from responding to the second command.

[0059] The first end 101 of the grafted chip 10 and the second end 302 of the original chip 30 simultaneously receive the task instruction sent by the imaging device 20. When the grafted chip 10 and the original chip 30 simultaneously receive the same task instruction, the chip that performs the task corresponding to the task instruction can be determined and controlled by the grafted chip 10.

[0060] The grafted chip 10 controls the original chip 30 to execute the task corresponding to the task instruction sent by the imaging device 20, or not to execute the task corresponding to the task instruction sent by the imaging device 20. Specifically, it can control the original chip to receive or not receive the first control signal.

[0061] It should be noted that when the original chip 30 and the grafted chip 10 do not execute the task corresponding to the task instruction sent by the imaging device 20, the second end 302 of the original chip 30 and the first end 101 of the grafted chip 10 can maintain an electrical connection with the first end 201 of the imaging device 20. This ensures that the original chip 30 and the grafted chip 10 maintain communication with the imaging device 20, so that the task instruction sent by the imaging device 20 can be obtained and responded to by the corresponding chip.

[0062] As one possible implementation, the first terminal 101 of the grafting chip 10 is also used to receive a second voltage sent by the first terminal 201 of the imaging device 20; wherein the second voltage is a power supply voltage and the first voltage is a ground voltage; or, the second voltage is a ground voltage and the first voltage is a power supply voltage.

[0063] In this embodiment of the application, the first end 101 of the grafting chip 10 is also used to receive the second voltage sent by the first end 201 of the imaging device 20, and the second end 102 of the grafting chip 10 is used to receive the first voltage sent by the second end 202 of the imaging device 20. In this way, the grafting chip 10 can remain powered on.

[0064] In some embodiments, the first voltage may be the ground voltage, and the second voltage may be the power supply voltage.

[0065] In some embodiments, the first voltage may be the power supply voltage, and the second voltage may be the ground voltage.

[0066] For the original chip 30 to perform its first task, it must simultaneously receive both the second voltage and the first voltage to keep it powered on. The second terminal 302 of the original chip 30 can receive the second voltage sent by the first terminal 201 of the imaging device 20; the first control signal can be the first voltage. That is, when the grafting chip 10 receives the first instruction, its third terminal 103 sends the first voltage to the first terminal 301 of the original chip 30 to keep it powered on and respond to the first instruction. When the grafting chip 10 receives the second instruction, its third terminal 103 stops sending the first voltage to the first terminal 301 of the original chip 30, preventing the original chip from remaining powered on and thus from responding to the second instruction.

[0067] See Figure 2 This is a schematic diagram of the structure of a grafting chip 10 provided in an embodiment of this application, as shown below. Figure 2 As shown, the grafting chip 10 includes: a first end 101, a second end 102 and a third end 103.

[0068] The first end 101 of the grafting chip 10 is used to be electrically connected to the first end 201 of the imaging device 20. The first end 101 of the grafting chip 10 is used to receive the task instructions sent by the first end 201 of the imaging device 20. The task instructions include a first instruction and a second instruction.

[0069] The second end 102 of the grafting chip 10 is used to electrically connect with the second end 202 of the imaging device 20, and the second end 102 of the grafting chip 10 receives the first voltage output by the second end 202 of the imaging device 20.

[0070] The third terminal 103 of the grafting chip 10 is used to electrically connect with the first terminal 301 of the original chip 30; when the first terminal 101 of the grafting chip 10 receives a first instruction, the third terminal 103 of the grafting chip 10 is used to send a first control signal to the first terminal 301 of the original chip 30 so that the original chip 30 responds to the first instruction; when the first terminal 101 of the grafting chip 10 receives a second instruction, the grafting chip 10 responds to the second instruction, and the third terminal 103 of the grafting chip 10 stops sending the first control signal to the first terminal 301 of the original chip 30 so that the original chip 30 cannot respond to the second instruction.

[0071] The second end 102 of the grafting chip 10 is used for electrical connection with the second end 302 of the original chip 30.

[0072] In this embodiment, the second end 102 of the grafted chip 10 can be electrically connected to the second end 302 of the original chip 30, so that the second end 302 of the original chip 30 can receive the first voltage sent by the imaging device 20.

[0073] In some embodiments, the first control signal can be a second voltage. That is, when the grafting chip 10 receives a first instruction, the third terminal 103 of the grafting chip 10 sends a second voltage to the first terminal 301 of the original chip 30 to keep the original chip 30 powered on and respond to the first instruction. When the grafting chip 10 receives a second instruction, the third terminal 103 of the grafting chip 10 stops sending the second voltage to the first terminal 301 of the original chip 30, so that the original chip cannot keep powered on and therefore cannot respond to the second instruction.

[0074] It should be noted that when the original chip 30 and the grafted chip 10 do not execute the task corresponding to the task instruction sent by the imaging device 20, the first end 301 of the original chip 30 and the first end 101 of the grafted chip 10 can maintain an electrical connection with the first end 201 of the imaging device 20. This ensures that the original chip 30 and the grafted chip 10 maintain communication with the imaging device 20, so that the task instruction sent by the imaging device 20 can be obtained and responded to by the corresponding chip. In some embodiments, in order to maintain an electrical connection between the first end 301 of the original chip 30 and the first end 201 of the imaging device 20, the third end 103 of the grafted chip 10 can maintain an electrical connection with the first end 101 of the grafted chip 10.

[0075] In this embodiment, when the grafting chip and the original chip receive a first instruction from the imaging device, the grafting chip can control the original chip to execute the first task corresponding to the first instruction in response to the first instruction. When the grafting chip and the original chip receive a second instruction from the imaging device, the grafting chip can execute the second task corresponding to the second instruction in response to the second instruction, and control the original chip to prevent it from completing the second task corresponding to the second instruction in response to the second instruction. That is, the original chip does not participate in the completion of the second task, thereby avoiding conflict between the original chip and the grafting chip. In other words, the original chip used to complete the first task and respond to the first instruction can directly receive the corresponding first instruction, and the grafting chip used to complete the second task and respond to the second instruction can directly receive the corresponding second instruction. In this way, the grafting chip can normally execute the second task corresponding to the second instruction in response to the second instruction, and can control the original chip to execute the first task corresponding to the first instruction sent by the imaging device in response to the first instruction. When the original chip performs the first task and responds to the first instruction, it can communicate directly with the imaging device. This avoids the high power consumption issue caused by protocol conversion when the grafted chip forwards information. Therefore, the power consumption for performing the first task and responding to the first instruction is not significantly different from the power consumption of either the original chip or the grafted chip performing the same tasks. When this grafted chip is used in an imaging device, it can meet the power consumption requirements of the imaging device for the grafted chip assembly consisting of the original chip and the grafted chip.

[0076] As one possible implementation, such as Figure 3 and Figure 4 As shown, the grafting chip 10 includes a processing module 40 and a voltage divider module 50. The processing module 40 includes a first output terminal 401 and a second output terminal 402. The first output terminal 401 is electrically connected to the third terminal 103 of the grafting chip 10. The voltage divider module 50 is electrically connected between the second output terminal 402 and the third terminal 103 of the grafting chip 10.

[0077] When the first end 101 of the grafting chip 10 receives the first instruction, the first output end 401 is used to output the first control signal to the third end 103 of the grafting chip 10; when the first end 101 of the grafting chip 10 receives the second instruction, the first output end 401 stops outputting the first control signal to the third end 103 of the grafting chip 10 and the second output end 402 outputs the second control signal.

[0078] In this embodiment of the application, when the grafting chip 10 receives the first instruction, the first output terminal 401 of the processing module 40 outputs the first control signal to the third terminal 103 of the grafting chip 10. In this way, the first terminal 301 of the original chip 30 can receive the first control signal and respond to the first instruction.

[0079] When the grafting chip 10 receives the second instruction, its first output terminal 401 stops outputting the first control signal to its third terminal 103. This means the third terminal 103 of the grafting chip 10 stops sending the first control signal to the first terminal 301 of the original chip 30, and the first terminal 301 of the original chip 30 does not receive the first control signal. The second output terminal 402 of the processing module 40 outputs the second control signal. The second output terminal 402 of the processing module 40 is connected to the first terminal 301 of the original chip 30 via the voltage divider module 50. Thus, a path is formed between the first terminal 301 and the second terminal 302 of the original chip 30, the voltage divider module 50, and the second output terminal 402 of the processing module 40. The voltage divider module 50 generates a corresponding voltage difference across its two ends. By controlling the voltage divider module 50, the voltage at the first end 301 of the original chip 30 can be controlled. This means that the voltage difference between the first end 301 and the second end 302 of the original chip 30 is lower than the voltage difference between the first end 301 and the second end 302 when the original chip 30 is working normally. This prevents the original chip 30 from working normally and thus responds to the second instruction.

[0080] In this implementation, when the grafting chip 10 receives the second instruction, although the original chip 30 cannot execute the task corresponding to the task instruction sent by the imaging device 20, the original chip 30 remains powered on, and at least some of the data stored in the original chip 30 will not be lost. Thus, when the original chip 30 receives the first control signal again, this at least some data is still stored in the original chip 30, and the original chip 30 can execute tasks that require this at least some data. In some embodiments, this at least some data can be a temporary variable, such as a communication key.

[0081] In some embodiments, when the grafting chip 10 receives a first instruction, the first output terminal 401 of the processing module 40 outputs a first control signal to the third terminal 103 of the grafting chip 10, and the second output terminal 402 of the processing module 40 is electrically insulated from the third terminal 103 of the grafting chip 10. For example, the processing module 40 can control the second output terminal 402 of the processing module 40 to float.

[0082] Figure 3 Taking the example of the first end 101 of the grafted chip 10 being electrically connected to the second end 302 of the original chip 30, in this implementation, the first control signal can be a first voltage, and the second control signal can be a first voltage.

[0083] Figure 4 Taking the second terminal 102 of the grafted chip 10 as an example of being electrically connected to the second terminal 302 of the original chip 30, in this implementation, the first control signal can be the second voltage, and the second control signal can be the second voltage.

[0084] As one possible implementation, the voltage divider module 50 includes resistive elements and / or diodes.

[0085] In this embodiment, the voltage divider module 50 may include a resistor and / or a diode, such that when the second output terminal 402 of the processing module 40 and the second terminal 302 of the original chip 30 are connected through the voltage divider module 50, a corresponding voltage difference is generated across the voltage divider module 50. When the voltage divider module 50 includes a diode, the voltage difference between its two ends can remain relatively stable after the diode is forward-biased, thus ensuring that the voltage received by the original chip 30 is stable when the grafted chip 10 receives the second instruction.

[0086] As one possible implementation, such as Figure 5 As shown, the grafting chip 10 also includes an adapter 104, which is used to connect to the first end 101 of the grafting chip 10 and to the second end 302 of the original chip 30.

[0087] In this embodiment, for ease of connection, the adapter 104 of the grafting chip 10 is connected to the first end 101 of the grafting chip 10 and to the second end 302 of the original chip 30. The first end 101 of the grafting chip 10 is electrically connected to the first end 201 of the imaging device 20, thus the second end 302 of the original chip 30 is electrically connected to the first end 201 of the imaging device 20. In this embodiment, although communication between the original chip 30 and the imaging device 20 needs to pass through the first end 101 of the grafting chip 10, the electrical connection between the first end 101 of the grafting chip 10 and the second end 302 of the original chip 30 ensures that task commands sent by the imaging device 20 and information fed back from the original chip 30 to the imaging device 20 can be forwarded without processing by the grafting chip 10.

[0088] As one possible implementation, such as Figure 6 As shown, the grafting chip 10 also includes an adapter 104, which is used to connect to the second end 102 of the grafting chip 10 and to the second end 302 of the original chip 30.

[0089] In this embodiment, for ease of connection, the adapter 104 of the grafting chip 10 is connected to the second end 102 of the grafting chip 10 and to the second end 302 of the original chip 30. The second end 102 of the grafting chip 10 is electrically connected to the second end 202 of the imaging device 20. In this way, the second end 302 of the original chip 30 is electrically connected to the second end 202 of the imaging device 20, and the second end 302 of the original chip 30 can receive the first voltage sent by the second end 202 of the imaging device 20.

[0090] As one possible implementation, such as Figure 7 As shown, the first end 101 of the grafting chip 10 is used to electrically connect with the second end 302 of the original chip 30 via a connecting wire.

[0091] In this embodiment of the application, for ease of implementation, the first end 101 of the grafted chip 10 can be electrically connected to the second end 302 of the original chip 30 via a connecting wire, thereby electrically connecting the second end 302 of the original chip 30 to the first end 201 of the imaging device 20.

[0092] As one possible implementation, such as Figure 8 As shown, the second end 102 of the grafting chip 10 is used to electrically connect with the second end 302 of the original chip 30 via a connecting wire.

[0093] In this embodiment of the application, for ease of implementation, the third end 103 of the grafted chip 10 can be electrically connected to the second end 302 of the original chip 30 via a connecting wire, thereby electrically connecting the second end 302 of the original chip 30 to the second end 202 of the imaging device 20.

[0094] As one possible implementation, such as Figure 9 As shown, the first end 101 of the grafting chip 10 is used to connect to the first end 201 of the imaging device 20, and the first end 201 of the imaging device 20 and the second end 302 of the original chip 30 are electrically connected through a connecting wire.

[0095] In this embodiment, the second end 302 of the original chip 30 can be electrically connected to the first end 201 of the imaging device 20 via a connecting line without going through the grafting chip 10, thus ensuring the stability of the electrical connection.

[0096] As one possible implementation, such as Figure 10 As shown, the second end 102 of the grafting chip 10 is used to connect to the second end 202 of the imaging device 20, and the second end 202 of the imaging device 20 and the second end 302 of the original chip 30 are electrically connected through a connecting wire.

[0097] In this embodiment, the second end 302 of the original chip 30 can be electrically connected to the second end 202 of the imaging device 20 via a connecting wire without going through the grafting chip 10, thus ensuring the stability of the electrical connection.

[0098] As one possible implementation, such as Figure 11 As shown, the first end 101 of the grafting chip 10 is used to electrically connect with the second end 302 of the original chip 30, and the connection relationship between the third end 103 of the grafting chip 10 and the second end 102 of the grafting chip 10 switches between electrical connection and electrical insulation.

[0099] In this embodiment, the grafting chip 10 can be electrically connected to its third terminal 103 and second terminal 102, thereby enabling the third terminal 103 of the grafting chip 10 to send a first control signal to the first terminal 301 of the original chip 30. At this time, the first terminal 301 of the original chip 30 and the second terminal 102 of the grafting chip 10 are electrically connected; that is, the first control signal sent by the third terminal 103 of the grafting chip 10 to the first terminal 301 of the original chip 30 is the first voltage sent by the second terminal 202 of the imaging device 20.

[0100] The grafting chip 10 can stop sending the first control signal to the first end 301 of the original chip 30 by controlling the third end 103 of the grafting chip 10 to be electrically insulated from the second end 102 of the grafting chip 10.

[0101] In some embodiments, such as Figure 11 As shown, the grafting chip 10 also includes a switch S1, which is connected between the third terminal 103 and the second terminal 102 of the grafting chip 10. When the grafting chip 10 controls the switch S1 to be on, the third terminal 103 and the second terminal 102 of the grafting chip 10 are electrically connected; when the grafting chip 10 controls the switch S1 to be off, the third terminal 103 and the second terminal 102 of the grafting chip 10 are electrically insulated.

[0102] As one possible implementation, such as Figure 12 As shown, the second end 102 of the grafting chip 10 is used to electrically connect with the second end 302 of the original chip 30, and the connection relationship between the third end 103 of the grafting chip 10 and the first end 101 of the grafting chip 10 switches between electrical connection and electrical insulation.

[0103] In this embodiment, the grafting chip 10 can be electrically connected to its third terminal 103 and its first terminal 101, thereby enabling the third terminal 103 of the grafting chip 10 to send a first control signal to the first terminal 301 of the original chip 30. At this time, the first terminal 301 of the original chip 30 and the first terminal 101 of the grafting chip 10 are electrically connected; that is, the first control signal sent by the third terminal 103 of the grafting chip 10 to the first terminal 301 of the original chip 30 is the signal sent by the first terminal 201 of the imaging device 20 to the first terminal 101 of the grafting chip 10.

[0104] The grafting chip 10 can stop sending the first control signal to the first end 301 of the original chip 30 by controlling the third end 103 of the grafting chip 10 to be electrically insulated from the first end 101 of the grafting chip 10.

[0105] In some embodiments, such as Figure 12 As shown, the grafting chip 10 also includes a switch S2, which is connected between the third terminal 103 and the first terminal 101 of the grafting chip 10. When the control switch S1 is turned on, the third terminal 103 and the first terminal 101 of the grafting chip 10 are electrically connected; when the control switch S1 is turned off, the third terminal 103 and the first terminal 101 of the grafting chip 10 are electrically insulated.

[0106] As one possible implementation, the grafting chip 10 switches to the target working state when it receives the first instruction, and the power consumption of the grafting chip 10 in the target working state is less than the preset power consumption value.

[0107] In this embodiment, when the grafting chip 10 receives the first instruction, the original chip 30 executes the first task corresponding to the first instruction. At this time, the grafting chip 10 can switch to the target working state, reducing the power consumption of the grafting chip 10, so that the sum of the power consumption of the original chip 30 and the power consumption of the grafting chip 10 is within the power consumption range required by the imaging device 20, thus satisfying the power consumption requirements of the imaging device 20 for the grafting chip assembly composed of the original chip 30 and the grafting chip 10.

[0108] In some embodiments, the power consumption of the grafting chip 10 can be reduced by lowering its operating frequency. In some embodiments, the power consumption of the grafting chip 10 can be reduced by turning off its power-consuming module. In some embodiments, the grafting chip 10 includes a power adjustment module, and the power consumption of the grafting chip 10 can be reduced by decreasing the power consumption of the power adjustment module.

[0109] For example, such as Figure 5As shown, assuming the imaging device 20 sends task commands and power supply voltage through its first terminal 201. The first terminal 101 of the grafting chip 10 is electrically connected to the first terminal 201 of the imaging device 20, and the second terminal 102 of the grafting chip 10 is electrically connected to the second terminal 202 of the imaging device 20. The second terminal 202 of the imaging device 20 sends a ground voltage to the second terminal 102 of the grafting chip 10. The adapter terminal 104 of the grafting chip 10 is electrically connected to its first terminal 101. The second terminal 302 of the original chip 30 is electrically connected to the adapter terminal 104 of the grafting chip 10, meaning the second terminal 302 of the original chip 30 is electrically connected to the first terminal 201 of the imaging device 20. The first terminal 301 of the original chip 30 is its ground terminal. When the first terminal 201 of the imaging device 20 sends a first command, both the second terminal 302 of the original chip 30 and the first terminal 101 of the grafted chip 10 can receive the first command. Assume the first task corresponding to the first command is to provide identity information to the imaging device 20. At this time, the third terminal 103 of the grafted chip 10 sends a ground voltage to the first terminal 301 of the original chip 30, and the original chip 30 performs the first task of providing identity information to the imaging device 20. Simultaneously, the grafted chip 10 switches to the target operating state, reduces its operating frequency, shuts down the power consumption module, and reduces the power consumption of the power adjustment module. When the first terminal 201 of the imaging device 20 sends a second command, both the first terminal 101 of the grafted chip 10 and the second terminal 302 of the original chip 30 can receive the second command. Assume the second task corresponding to the second command is to provide remaining toner information to the imaging device 20. At this time, the grafting chip 10 performs the second task of providing the imaging device 20 with the remaining toner quantity information, and controls the third end 103 of the grafting chip 10 to float. The first end 301 of the original chip 30 cannot receive the ground voltage, and the original chip 30 cannot maintain the power-on state. Therefore, it cannot perform the second task of providing the imaging device 20 with the remaining toner quantity information.

[0110] For example, such as Figure 12As shown, assuming the imaging device 20 sends task commands and power supply voltage through its first terminal 201. The first terminal 101 of the grafting chip 10 is electrically connected to the first terminal 201 of the imaging device 20, and the second terminal 102 of the grafting chip 10 is electrically connected to the second terminal 202 of the imaging device 20. The second terminal 202 of the imaging device 20 sends a ground voltage to the second terminal 102 of the grafting chip 10. The adapter terminal 104 of the grafting chip 10 is electrically connected to the second terminal 102 of the grafting chip 10. The second terminal 302 of the original chip 30 is electrically connected to the adapter terminal 104 of the grafting chip 10, meaning the second terminal 302 of the original chip 30 is electrically connected to the second terminal 202 of the imaging device 20. The first terminal 301 of the original chip 30 is its communication terminal. The grafting chip 10 also includes a switch S2, which is connected between the third terminal 103 and the first terminal 101 of the grafting chip 10. When the first terminal 201 of the imaging device 20 sends a first command, both the first terminal 301 of the original chip 30 and the first terminal 101 of the grafted chip 10 can receive the first command. Assume the first task corresponding to the first command is to provide identity information to the imaging device 20. At this time, switch S2 is turned on, and the third terminal 103 of the grafted chip 10 is connected to the first terminal 101 of the grafted chip 10, sending power voltage to the first terminal 301 of the original chip 30. The original chip 30 then performs the first task of providing identity information to the imaging device 20. Simultaneously, the grafted chip 10 switches to the target operating state, reducing its operating frequency, shutting down the power consumption module, and reducing the power consumption of the power adjustment module. When the first terminal 201 of the imaging device 20 sends a second command, both the first terminal 101 of the grafted chip 10 and the first terminal 301 of the original chip 30 can receive the second command. Assume the second task corresponding to the second command is to provide remaining toner information to the imaging device 20. At this time, the grafted chip 10 performs the second task of providing the imaging device 20 with the remaining toner quantity information and controls the switch S2 to open. The third end 103 of the grafted chip 10 is floating. The first end 301 of the original chip 30 cannot receive the power supply voltage. The original chip 30 cannot maintain the power-on state and therefore cannot perform the second task of providing the imaging device 20 with the remaining toner quantity information.

[0111] For example, such as Figure 13 As shown, the grafting chip 10 includes a control module 40 and a voltage divider module 50. The voltage divider module 50 is electrically connected between the second output terminal 402 of the processing module 40 and the third terminal 103 of the grafting chip 10. The voltage divider module 50 is a diode.

[0112] It should be noted that the voltage divider module 50 may include multiple diodes, which can be connected in series or in parallel. The type, number, and connection relationship of the diodes can be adjusted according to actual needs, and this application does not impose any restrictions on this. Figure 13 This is just one example.

[0113] Assume that imaging device 20 sends task commands and power supply voltage through its first terminal 201. The first terminal 101 of grafting chip 10 is electrically connected to the first terminal 201 of imaging device 20, and the second terminal 102 of grafting chip 10 is electrically connected to the second terminal 202 of imaging device 20. The second terminal 202 of imaging device 20 sends a ground voltage to the second terminal 102 of grafting chip 10. The adapter terminal 104 of grafting chip 10 is electrically connected to its first terminal 101. The second terminal 302 of original chip 30 is electrically connected to the adapter terminal 104 of grafting chip 10, meaning the second terminal 302 of original chip 30 is electrically connected to the first terminal 201 of imaging device 20. The second terminal 302 of original chip 30 receives the power supply voltage and the task commands sent by imaging device 20. The first terminal 301 of original chip 30 is its ground terminal.

[0114] When the grafting chip 10 receives the first instruction, the first output terminal 401 of the processing module 40 outputs a ground voltage to the first terminal 301 of the original chip 30, and the processing module 40 controls the second output terminal 402 to float. The original chip 30 receives the ground voltage and executes the first task corresponding to the first instruction. When the grafting chip 10 receives the second instruction, the processing module 40 controls the first output terminal 401 to float, and the second output terminal 402 of the processing module 40 outputs a ground voltage. The diode between the second output terminal 402 of the processing module 40 and the third terminal 103 of the grafting chip 10 is turned on, generating a corresponding voltage difference across the diode. At this time, the voltage difference between the first terminal 301 and the second terminal 302 of the original chip 30 is lower than the voltage difference between the first terminal 301 and the second terminal 302 when the original chip 30 is working normally, causing the original chip 30 to malfunction and unable to execute the second task corresponding to the second instruction; however, the original chip 30 remains powered on, and the temporary variables stored in the original chip 30 are not lost.

[0115] For example, such as Figure 14 As shown, the grafting chip 10 includes a control module 40 and a voltage divider module 50. The voltage divider module 50 is electrically connected between the second output terminal 402 of the processing module 40 and the third terminal 103 of the grafting chip 10. The voltage divider module 50 is a diode.

[0116] It should be noted that the voltage divider module 50 may include multiple diodes, which can be connected in series or in parallel. The type, number, and connection relationship of the diodes can be adjusted according to actual needs, and this application does not impose any restrictions on this. Figure 13 This is just one example.

[0117] Assume that imaging device 20 sends task commands and power supply voltage through its first terminal 201. The first terminal 101 of grafting chip 10 is electrically connected to the first terminal 201 of imaging device 20, and the second terminal 102 of grafting chip 10 is electrically connected to the second terminal 202 of imaging device 20. The second terminal 202 of imaging device 20 sends a ground voltage to the second terminal 102 of grafting chip 10. The adapter terminal 104 of grafting chip 10 is electrically connected to the second terminal 102 of grafting chip 10. The second terminal 302 of original chip 30 is electrically connected to the adapter terminal 104 of grafting chip 10, meaning the second terminal 302 of original chip 30 is electrically connected to the second terminal 202 of imaging device 20. The second terminal 302 of original chip 30 receives the ground voltage sent by imaging device 20. The first terminal 301 of original chip 30 is its communication terminal.

[0118] When the grafting chip 10 receives the first instruction, the first output terminal 401 of the processing module 40 outputs a power supply voltage to the first terminal 301 of the original chip 30, and the processing module 40 controls the second output terminal 402 to float. The original chip 30 receives the power supply voltage and executes the first task corresponding to the first instruction. When the grafting chip 10 receives the second instruction, the processing module 40 controls the first output terminal 401 to float, and the second output terminal 402 of the processing module 40 outputs a power supply voltage. The diode between the second output terminal 402 of the processing module 40 and the third terminal 103 of the grafting chip 10 is turned on, generating a corresponding voltage difference across the diode. At this time, the voltage difference between the first terminal 301 and the second terminal 302 of the original chip 30 is lower than the voltage difference between the first terminal 301 and the second terminal 302 when the original chip 30 is working normally, causing the original chip 30 to malfunction and unable to execute the second task corresponding to the second instruction; however, the original chip 30 remains powered on, and the temporary variables stored in the original chip 30 are not lost.

[0119] Corresponding to the above embodiments, this application also provides a grafting chip assembly, including the grafting chip described in the above embodiments, and also including the original chip.

[0120] As one possible implementation, when the grafting chip component receives the first instruction, the grafting chip component switches to the first working state, wherein the original chip executes the first task corresponding to the first instruction, and the power consumption of the grafting chip in the first working state is less than the preset power consumption value.

[0121] When the grafted chip assembly receives the second instruction, it switches to the second working state, in which the original chip cannot complete the second task corresponding to the second instruction, and the grafted chip executes the second task corresponding to the second instruction.

[0122] In this embodiment, the grafting chip assembly comprises a grafting chip and an original chip. When the grafting chip assembly receives a first instruction, it switches to a first operating state. In the first operating state, the grafting chip controls the original chip to execute the first task corresponding to the first instruction. In some embodiments, when the grafting chip assembly switches to the first operating state, the grafting chip switches to a target operating state, where the power consumption of the grafting chip in the target operating state is less than a preset power consumption value.

[0123] When the grafting chip assembly receives the second instruction, it switches to the second operating state. In the second operating state, the grafting chip executes the second task corresponding to the second instruction; due to the control of the grafting chip, the original chip cannot execute the second task corresponding to the second instruction.

[0124] Corresponding to the above embodiments, this application also provides an imaging box, including the grafting chip assembly described in the above embodiments.

[0125] The same or similar parts between the various embodiments in this specification can be referred to interchangeably. In particular, the descriptions of the grafting chip assembly embodiment and the imaging box embodiment are relatively simple since they are basically similar to the grafting chip embodiment, and the relevant parts can be referred to the descriptions in the grafting chip embodiment.

Claims

1. A grafting chip, characterized in that, include: First end, the first end of the grafting chip is used to be electrically connected to the first end of the imaging device, and the first end of the grafting chip is used to receive task instructions sent by the first end of the imaging device, the task instructions including a first instruction and a second instruction; The second end of the grafting chip is used to be electrically connected to the second end of the imaging device, and the second end of the grafting chip is used to receive the first voltage output by the second end of the imaging device. The third end of the grafting chip is used to electrically connect with the first end of the original chip; when the first end of the grafting chip receives the first instruction, the third end of the grafting chip is used to send a first control signal to the first end of the original chip so that the original chip responds to the first instruction; when the first end of the grafting chip receives the second instruction, the grafting chip responds to the second instruction, and the third end of the grafting chip stops sending the first control signal to the first end of the original chip so that the original chip cannot respond to the second instruction; Wherein, the first end of the grafting chip is used to be electrically connected to the second end of the original chip; or, the second end of the grafting chip is used to be electrically connected to the second end of the original chip.

2. The grafting chip according to claim 1, characterized in that, The grafting chip includes a processing module and a voltage divider module. The processing module includes a first output terminal and a second output terminal. The first output terminal is electrically connected to a third terminal of the grafting chip. The voltage divider module is electrically connected between the second output terminal and the third terminal of the grafting chip. When the first end of the grafting chip receives the first instruction, the first output end is used to output the first control signal to the third end of the grafting chip; when the first end of the grafting chip receives the second instruction, the first output end stops outputting the first control signal to the third end of the grafting chip and the second output end outputs the second control signal.

3. The grafting chip according to claim 2, characterized in that, The voltage divider module includes resistive elements and / or diodes.

4. The grafting chip according to claim 1, characterized in that, The grafting chip also includes an adapter, which is used to connect to the first end or the second end of the grafting chip and to connect to the second end of the original chip.

5. The grafting chip according to claim 1, characterized in that, The first end or the second end of the grafted chip is used to electrically connect with the second end of the original chip via a connecting wire.

6. The grafting chip according to claim 1, characterized in that, The first end of the grafted chip is used for electrical connection with the first end of the imaging device, and the first end of the imaging device is used for electrical connection with the second end of the original chip via a connecting wire; or... The second end of the grafted chip is used to be electrically connected to the second end of the imaging device, and the second end of the imaging device is used to be electrically connected to the second end of the original chip via a connecting wire.

7. The grafting chip according to claim 1, characterized in that, The first end of the grafting chip is used for electrical connection with the second end of the original chip, and the connection relationship between the third end of the grafting chip and the second end of the grafting chip switches between electrical connection and electrical insulation; or, The second end of the grafting chip is used to electrically connect with the second end of the original chip, and the connection relationship between the third end of the grafting chip and the first end of the grafting chip switches between electrical connection and electrical insulation.

8. The grafting chip according to claim 1, characterized in that, The first end of the grafting chip is also used to receive a second voltage sent by the first end of the imaging device; wherein the second voltage is a power supply voltage and the first voltage is a ground voltage; or, the second voltage is a ground voltage and the first voltage is a power supply voltage.

9. The grafting chip according to claim 1, characterized in that, When the grafting chip receives the first instruction, it switches to the target working state, and the power consumption of the grafting chip in the target working state is less than the preset power consumption value.

10. A grafted chip assembly, characterized in that, The invention includes the grafted chip as described in any one of claims 1-9, and also includes the original chip.

11. The grafting chip assembly according to claim 10, characterized in that, When the grafting chip assembly receives the first instruction, the grafting chip assembly switches to a first working state, wherein the original chip responds to the first instruction, and the power consumption of the grafting chip in the first working state is less than a preset power consumption value. When the grafting chip assembly receives the second instruction, the grafting chip assembly switches to a second working state, wherein the original chip cannot respond to the second instruction, and the grafting chip responds to the second instruction.

12. An imaging box, characterized in that, Includes the grafting chip assembly as described in any one of claims 10-11.

Citation Information

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