A DC-DC converter and a control method, device and storage medium thereof

Abstract

The application discloses a control method and device of a DC-DC converter, the DC-DC converter and a storage medium, and the method comprises the following steps: after an initial state prediction quantity of a current sampling moment is calculated according to an output voltage and a switching control quantity of the DC-DC converter at a previous sampling moment, a steady-state error of the current sampling moment is calculated in combination with an output reference voltage prediction quantity; after a virtual reference voltage quantity of the current sampling moment is calculated according to the output reference voltage prediction quantity and the steady-state error of the current sampling moment, the switching control quantity of the current sampling moment is calculated in combination with the initial state prediction quantity and the steady-state error of the current sampling moment; and the duty cycle of a switching tube is controlled according to the switching control quantity of the current sampling moment. According to the scheme, the delay of the controller of the DC-DC converter is compensated, and the tracking accuracy and completeness of the control algorithm of the controller of the DC-DC converter are improved.

Description

Technical Field

[0001] This invention belongs to the field of DC-DC converter technology, specifically relating to a control method, device, DC-DC converter, and storage medium for a DC-DC converter, and more particularly to a method, device, DC-DC converter, and storage medium for virtual voltage adaptive continuous control set model predictive control delay compensation for a DC-DC converter, and a storage medium for such a DC-DC converter. Background Technology

[0002] In the control of DC-DC converters, applying continuous-set model predictive control (MPC) can completely eliminate steady-state errors. MPC is a novel control method distinct from correlation-based control schemes. It calculates and predicts the future values ​​of controlled variables using a system model and selects appropriate operations using an optimal criterion. MPC combines the advantages of hysteresis control for transient operation with the advantages of optimal pulse width control for steady-state operation. Due to the development of digital platforms, research on the application of MPC in power electronics is becoming increasingly active.

[0003] However, model predictive control methods are characterized by large online computation and significant action delay. Therefore, in order to improve the tracking accuracy and completeness of the control algorithm of the DC-DC converter controller, it is usually necessary to consider the delay compensation problem of the DC-DC converter controller.

[0004] The above content is only used to help understand the technical solution of the present invention and does not represent an admission that the above content is prior art. Summary of the Invention

[0005] The purpose of this invention is to provide a control method, apparatus, DC-DC converter, and storage medium for a DC-DC converter, in order to solve the problem that when applying continuous set model predictive control (MMRC) to a DC-DC converter, the large online computation of MMRC results in significant action delays, affecting the tracking accuracy and completeness of the control algorithm. The invention aims to improve the tracking accuracy and completeness of the control algorithm by compensating for the delay of the DC-DC converter's controller.

[0006] This invention provides a control method for a DC-DC converter, wherein the main circuit of the DC-DC converter has a switching transistor; the control method for the DC-DC converter includes: acquiring the output voltage of the DC-DC converter at each sampling time according to a set sampling period, and acquiring the switching control quantity of the main circuit of the DC-DC converter at the previous sampling time; calculating the initial state prediction quantity of the DC-DC converter at the current sampling time based on the output voltage of the DC-DC converter at the previous sampling time and the switching control quantity of the main circuit of the DC-DC converter at the previous sampling time; storing the output reference voltage prediction quantity of the DC-DC converter and the initial state prediction quantity of the DC-DC converter at the current sampling time; and calculating the initial state prediction quantity of the DC-DC converter at the current sampling time based on the output reference voltage prediction quantity of the DC-DC converter and the switching control quantity of the main circuit of the DC-DC converter at the previous sampling time. The initial state prediction at the current sampling time is used to calculate the steady-state error of the output voltage of the DC-DC converter at the current sampling time. Based on the steady-state error of the output voltage of the DC-DC converter at the current sampling time and the predicted output reference voltage of the DC-DC converter, the virtual reference voltage of the DC-DC converter at the current sampling time is calculated. Based on the virtual reference voltage of the DC-DC converter at the current sampling time, the initial state prediction of the DC-DC converter at the current sampling time, and the steady-state error of the output voltage of the DC-DC converter at the current sampling time, the switching control quantity of the main circuit of the DC-DC converter at the current sampling time is calculated. Based on the switching control quantity of the main circuit of the DC-DC converter at the current sampling time, the duty cycle of the switching transistors in the main circuit of the DC-DC converter is controlled.

[0007] In some implementations, the initial state prediction of the DC-DC converter at the current sampling time is calculated based on the output voltage of the DC-DC converter at the previous sampling time and the switching control quantity of the main circuit of the DC-DC converter at the previous sampling time. This includes calculating the initial state prediction of the DC-DC converter at the current sampling time according to the following formula:

[0008]

[0009] in, U is the initial state prediction of the DC-DC converter at the current sampling time k. or (k-1) is the output voltage of the DC-DC converter at the previous sampling time k-1, D v (k-1|k-2) represents the switching control quantity of the main circuit of the DC-DC converter at the previous sampling time k-1, T S For the set sampling period, fur is the actual value of the voltage rise slope, f dr is the actual value of the voltage fall slope.

[0010] In some embodiments, according to the predicted output reference voltage of the DC-DC converter and the predicted initial state of the DC-DC converter at the current sampling moment, the steady-state error of the output voltage of the DC-DC converter at the current sampling moment is calculated, including: calculating the steady-state error of the output voltage of the DC-DC converter at the current sampling moment according to the following formula:

[0011]

[0012] where e(k|k - 1) is the steady-state error of the output voltage of the DC-DC converter at the current sampling moment k, U dref is the predicted output reference voltage of the DC-DC converter, is the predicted initial state of the DC-DC converter at the current sampling moment k.

[0013] In some embodiments, according to the steady-state error of the output voltage of the DC-DC converter at the current sampling moment and the predicted output reference voltage of the DC-DC converter, the virtual reference voltage amount of the DC-DC converter at the current sampling moment is calculated, including: calculating the virtual reference voltage amount of the DC-DC converter at the current sampling moment according to the following formula:

[0014] U dref_v (k + 1|k) = U dref + se(k|k - 1);

[0015] where U dref_v (k + 1|k) is the virtual reference voltage amount of the DC-DC converter at the current sampling moment k, U dref is the predicted output reference voltage of the DC-DC converter, s is the proportionality coefficient and 0 < s ≤ 1, and e(k|k - 1) is the steady-state error of the output voltage of the DC-DC converter at the current sampling moment k.

[0016] In some embodiments, the switching control amount of the main circuit of the DC-DC converter calculated according to the virtual reference voltage amount of the DC-DC converter at the current sampling moment, the predicted initial state of the DC-DC converter at the current sampling moment, and the steady-state error of the output voltage of the DC-DC converter at the current sampling moment is the switching control amount after delay compensation.

[0017] In some implementations, the switching control quantity of the main circuit of the DC-DC converter at the current sampling time is calculated based on the virtual reference voltage of the DC-DC converter at the current sampling time, the initial state prediction of the DC-DC converter at the current sampling time, and the steady-state error of the output voltage of the DC-DC converter at the current sampling time. This includes calculating the switching control quantity of the main circuit of the DC-DC converter at the current sampling time by simultaneously applying the following two formulas:

[0018]

[0019]

[0020] Where J is the cost function, U dref_v (k+1|k) represents the virtual reference voltage of the DC-DC converter at the current sampling time k. Let λ be the initial state prediction of the DC-DC converter at the current sampling time k. e The error coefficient represents the proportion of the steady-state error in the cost function; e(k|k-1) is the steady-state error of the output voltage of the DC-DC converter at the current sampling time k; D v (k|k-1) represents the switching control quantity of the main circuit of the DC-DC converter at the current sampling time k, L is the inductance value of the output filter inductor of the DC-DC converter, and U i (k-1|k-1) is the input voltage of the DC-DC converter at the previous sampling time k-1, R c It is the equivalent series resistance on the output filter capacitor of the DC-DC converter.

[0021] In some implementations, controlling the duty cycle of the switching transistors in the main circuit of the DC-DC converter based on the switching control quantity of the main circuit of the DC-DC converter at the current sampling time includes: performing hysteresis limiting and pulse width modulation on the switching control quantity of the main circuit of the DC-DC converter at the current sampling time to generate a duty cycle for controlling the switching transistors in the main circuit of the DC-DC converter, so as to control the switching transistors in the main circuit of the DC-DC converter according to the generated duty cycle.

[0022] In accordance with the above method, another aspect of the present invention provides a control device for a DC-DC converter, wherein the main circuit of the DC-DC converter has a switching transistor; the control device for the DC-DC converter includes: an acquisition unit configured to acquire the output voltage of the DC-DC converter at each sampling time according to a set sampling period, and acquire the switching control quantity of the main circuit of the DC-DC converter at the previous sampling time; a control unit configured to calculate an initial state prediction quantity of the DC-DC converter at the current sampling time based on the output voltage of the DC-DC converter at the previous sampling time and the switching control quantity of the main circuit of the DC-DC converter at the previous sampling time; a storage unit configured to store the output reference voltage prediction quantity of the DC-DC converter and store the initial state prediction quantity of the DC-DC converter at the current sampling time; the control unit is further configured to calculate the initial state prediction quantity of the DC-DC converter at the current sampling time based on the output reference voltage prediction quantity of the DC-DC converter and the switching control quantity of the main circuit of the DC-DC converter at the previous ... The control unit is further configured to calculate the steady-state error of the DC-DC converter's output voltage at the current sampling time based on the initial state prediction of the DC-DC converter at the current sampling time and the output reference voltage prediction of the DC-DC converter; the control unit is further configured to calculate the virtual reference voltage of the DC-DC converter at the current sampling time based on the virtual reference voltage of the DC-DC converter at the current sampling time, the initial state prediction of the DC-DC converter at the current sampling time, and the steady-state error of the DC-DC converter's output voltage at the current sampling time; the control unit is further configured to control the duty cycle of the switching transistors in the main circuit of the DC-DC converter based on the switching control of the main circuit of the DC-DC converter at the current sampling time.

[0023] In some embodiments, the control unit calculates the predicted initial state of the DC-DC converter at the current sampling time based on the output voltage of the DC-DC converter at the previous sampling time and the switching control quantity of the main circuit of the DC-DC converter at the previous sampling time, including: calculating the predicted initial state of the DC-DC converter at the current sampling time according to the following formula:

[0024]

[0025] in, U is the initial state prediction of the DC-DC converter at the current sampling time k. or(k - 1) is the output voltage of the DC - DC converter at the previous sampling moment k - 1, D v (k - 1|k - 2) is the switching control quantity of the main circuit of the DC - DC converter at the previous sampling moment k - 1, T S is the set sampling period, f ur is the actual value of the voltage rising slope, f dr is the actual value of the voltage falling slope.

[0026] In some embodiments, the control unit calculates the steady - state error of the output voltage of the DC - DC converter at the current sampling moment according to the predicted output reference voltage of the DC - DC converter and the predicted initial state of the DC - DC converter at the current sampling moment, including: calculating the steady - state error of the output voltage of the DC - DC converter at the current sampling moment according to the following formula:

[0027]

[0028] where, e(k|k - 1) is the steady - state error of the output voltage of the DC - DC converter at the current sampling moment k, U dref is the predicted output reference voltage of the DC - DC converter, is the predicted initial state of the DC - DC converter at the current sampling moment k.

[0029] In some embodiments, the control unit calculates the virtual reference voltage quantity of the DC - DC converter at the current sampling moment according to the steady - state error of the output voltage of the DC - DC converter at the current sampling moment and the predicted output reference voltage of the DC - DC converter, including: calculating the virtual reference voltage quantity of the DC - DC converter at the current sampling moment according to the following formula:

[0030] U dref_v (k + 1|k)=U dref +se(k|k - 1);

[0031] where, U dref_v (k + 1|k) is the virtual reference voltage quantity of the DC - DC converter at the current sampling moment k, U dref is the predicted output reference voltage of the DC - DC converter, s is the proportionality coefficient and 0 < s ≤ 1, e(k|k - 1) is the steady - state error of the output voltage of the DC - DC converter at the current sampling moment k.

[0032] In some implementations, the control unit calculates the switching control quantity of the main circuit of the DC-DC converter at the current sampling time based on the virtual reference voltage of the DC-DC converter at the current sampling time, the initial state prediction of the DC-DC converter at the current sampling time, and the steady-state error of the output voltage of the DC-DC converter at the current sampling time. This calculated quantity is a switching control quantity after delay compensation.

[0033] In some implementations, the control unit calculates the switching control quantity of the main circuit of the DC-DC converter at the current sampling time based on the virtual reference voltage of the DC-DC converter at the current sampling time, the initial state prediction of the DC-DC converter at the current sampling time, and the steady-state error of the output voltage of the DC-DC converter at the current sampling time. This includes calculating the switching control quantity of the main circuit of the DC-DC converter at the current sampling time by simultaneously applying the following two formulas:

[0034]

[0035]

[0036] Where J is the cost function, U dref_v (k+1|k) represents the virtual reference voltage of the DC-DC converter at the current sampling time k. Let λ be the initial state prediction of the DC-DC converter at the current sampling time k. e The error coefficient represents the proportion of the steady-state error in the cost function; e(k|k-1) is the steady-state error of the output voltage of the DC-DC converter at the current sampling time k.

[0037] D v (k|k-1) represents the switching control quantity of the main circuit of the DC-DC converter at the current sampling time k, L is the inductance value of the output filter inductor of the DC-DC converter, and U i (k-1|k-1) is the input voltage of the DC-DC converter at the previous sampling time k-1, R c It is the equivalent series resistance on the output filter capacitor of the DC-DC converter.

[0038] In some embodiments, the control unit controls the duty cycle of the switching transistors in the main circuit of the DC-DC converter based on the switching control quantity of the main circuit of the DC-DC converter at the current sampling time, including: performing hysteresis limiting and pulse width modulation on the switching control quantity of the main circuit of the DC-DC converter at the current sampling time to generate a duty cycle for controlling the switching transistors in the main circuit of the DC-DC converter, so as to control the switching transistors in the main circuit of the DC-DC converter according to the generated duty cycle.

[0039] In conjunction with the above-described device, the present invention further provides a DC-DC converter, comprising: a control device for the DC-DC converter described above.

[0040] In conjunction with the above method, the present invention further provides a storage medium comprising a stored program, wherein, when the program is executed, the device on which the storage medium is located executes the control method for the DC-DC converter described above.

[0041] Therefore, the solution of this invention, for a DC-DC converter, obtains the output voltage of the DC-DC converter at a set sampling time, and based on the output voltage of the previous sampling time, uses an initial state prediction model to predict the output voltage prediction observation at the current sampling time; calculates the steady-state error at the current sampling time based on the output voltage of the previous sampling time; calculates the virtual reference voltage at the current sampling time based on the steady-state error at the current sampling time; calculates the optimal switching control quantity with the minimum corresponding cost function based on the virtual reference voltage at the current sampling time and combined with the virtual voltage reference error; the optimal switching control quantity is output as a PWM pulse wave after pulse width modulation, thereby controlling the power switching of the DC-DC converter; thus, by compensating for the delay of the DC-DC converter controller, it is beneficial to improve the tracking accuracy and completeness of the control algorithm of the DC-DC converter controller.

[0042] Other features and advantages of the invention will be set forth in the description which follows, and will be apparent in part from the description, or may be learned by practicing the invention.

[0043] The technical solution of the present invention will be further described in detail below with reference to the accompanying drawings and embodiments. Attached Figure Description

[0044] Figure 1 This is a flowchart illustrating an embodiment of the control method for the DC-DC converter of the present invention;

[0045] Figure 2 This is a schematic diagram of the structure of a control device for the DC-DC converter of the present invention;

[0046] Figure 3 A block diagram of an adaptive control delay compensation strategy for high steady-state accuracy model prediction;

[0047] Figure 4 This is a basic topology diagram of a Buck converter;

[0048] Figure 5 This is a schematic diagram of the output voltage waveform of a Buck converter;

[0049] Figure 6 This is a schematic diagram illustrating the principle of the adaptive method based on virtual reference values.

[0050] Figure 7 A schematic diagram of the ideal case with no delay;

[0051] Figure 8 This is a schematic diagram showing the delay without compensation.

[0052] Figure 9 A schematic diagram showing the situation when delay compensation is completed;

[0053] Figure 10 This is a schematic diagram of the output steady-state voltage curve of the Buck converter.

[0054] Figure 11 This is the voltage waveform when the input voltage of the Buck converter changes abruptly.

[0055] Figure 12 This is a schematic diagram of the output steady-state current of the Buck converter.

[0056] Figure 13 This is a schematic diagram of the current waveform when the input voltage of a Buck converter changes abruptly.

[0057] Referring to the accompanying drawings, the reference numerals in the embodiments of the present invention are as follows:

[0058] 102 - Acquisition unit; 104 - Storage unit; 106 - Control unit. Detailed Implementation

[0059] To make the objectives, technical solutions, and advantages of this invention clearer, the technical solutions of this invention will be clearly and completely described below in conjunction with specific embodiments and corresponding drawings. Obviously, the described embodiments are only a part of the embodiments of this invention, and not all of them. Based on the embodiments of this invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this invention.

[0060] Analysis of Controller Delay Errors in DC-DC Converters: Before proposing delay compensation control strategies, it's essential to analyze the potential delays caused by the DC-DC converter during application. The most common and significant causes of delay in DC-DC converter applications are as follows:

[0061] a. Delay caused by measurement signal: The measurement signal of a DC-DC converter is usually sampled at a fixed frequency, i.e., the switching frequency. Analog-to-digital conversion also typically has a delay, albeit a very small one, approximately 1µs.

[0062] b. Delay caused by upward transmission of communication: Digital computation is usually transmitted to a specific computing unit, such as a programmable logic controller (FPGA), a digital signal processor (DSP), or a central signal processing unit (CPU). In the above series of cases, the communication delay is usually 10µs or even more.

[0063] c. Computational Delay: Predictive control algorithms run under each communication unit. The calculation and operation of new switching vectors require a specific number of control algorithm clock cycles, meaning the delay can range from tens to tens of thousands of cycles. Computational resources are also affected by other processes, such as external control loops and monitoring tasks, which reduce the available computational power of the predictive controller and increase computational delay. If some states or controlled variables cannot be measured, an observer needs to be built to observe them, further increasing computational delay. Therefore, even the simplest predictive controller typically has a computational delay of at least 10 μs.

[0064] d. Delay caused by downlink communication: The process of sending the new switch vector to the converter after it has been calculated is called the downlink process, which usually causes a certain delay.

[0065] e. Action Delay: Before applying switching control signals, a protection mechanism is typically used to ensure reliable operation of the switching semiconductor and prevent redundant or erroneous switching control signals. For example, the upper and lower bridge arms of a three-phase controller cannot be directly connected. Before commutation, gate drive and additional interlocking time usually cause further delays. For example, with gate-commutated thyristors, the interlocking delay can typically reach several microseconds.

[0066] The various typical delay scenarios summarized above can even cause a delay of hundreds of microseconds when the power converter starts up.

[0067] Some solutions provide a model predictive adaptive control method for a DC-DC converter, including: acquiring the output voltage of the DC-DC converter at the current sampling moment in real time; calculating the steady-state error based on the output voltage at the current sampling moment and a predicted output reference voltage; performing adaptive judgment based on the steady-state error and the predicted output reference voltage to generate a virtual reference voltage; controlling the output duty cycle of the virtual reference voltage through continuous set model predictive control after hysteresis limiting; and outputting a PWM pulse wave after pulse width modulation of the duty cycle, thereby controlling the power switching of the DC-DC converter. This solution is a continuous set model predictive control and uses an adaptive method based on a virtual reference voltage, eliminating the inherent steady-state error of the model predictive controller and the steady-state error when the system experiences model mismatch, and eliminating the need to construct a complex system disturbance observer.

[0068] The above scheme details a method for applying continuous set model predictive control to a DC-DC converter and completely eliminating steady-state error. However, the reason for other delays in this scheme is that the cost function reference variable requires future values. It is generally assumed that the future reference value is the same as the actual reference value; this assumption applies when the reference value is constant or the sampling frequency is greater than the reference variable frequency. However, in dynamic instants and when using a virtual reference, a delay will occur between the controlled variable and the reference variable. To eliminate this delay, it is necessary to calculate the future reference variable. Therefore, this invention proposes a control method for a DC-DC converter, specifically a virtual voltage adaptive continuous set model predictive control delay compensation method for a DC-DC converter. The calculation method for the predictive control delay compensation strategy is explained to achieve better tracking of the predicted quantity with the controlled quantity.

[0069] According to embodiments of the present invention, a control method for a DC-DC converter is provided, such as... Figure 1 The diagram shows a flowchart of an embodiment of the method of the present invention. The main circuit of the DC-DC converter has a switching transistor, such as a controllable switching transistor S. To facilitate understanding of the high steady-state accuracy model prediction adaptive control delay compensation strategy of the present invention, a Buck circuit is used as an example to illustrate the specific execution process of the present invention. Figure 4 This is a basic topology diagram of a Buck converter. (Example:) Figure 4 As shown, in the basic topology of the Buck converter, U i Here, S is the input voltage of the Buck converter, S is the controllable switch, D is the diode, L is the output filter inductor, C is the output filter capacitor, and R is the input voltage of the Buck converter. c U is the equivalent series resistance on the output filter capacitor C, R is the load resistance, and U is the equivalent series resistance on the output filter capacitor C. o For the output voltage, i L This represents the inductor current. The input voltage U... iThe positive terminal is connected to the source of the controllable switch S, and the drain of the controllable switch S is connected to the equivalent series resistance R on the output filter inductor L and the output filter capacitor C. c And after the output filter capacitor C, and the input voltage U i The negative terminal is connected. The load resistor R is set at the output terminal of the Buck converter, and is connected in series with the equivalent series resistance R on the output filter capacitor C. c The series branch of the output filter capacitor C is connected in parallel; the output of the Buck converter can output voltage U. o The drain of the controllable switch S is also connected to the cathode of the diode D; the anode of the diode D is connected to the input voltage U. i The negative terminal is connected.

[0070] When a Buck circuit operates in continuous conduction mode (CCM), the time-domain expression for its inductor current is:

[0071]

[0072] In the formula, s(t) is the switching function, which has a value of 1 when the switch is closed and a value of 0 when the switch is open.

[0073] When the equivalent series resistance R on the output filter capacitor c When large enough, the output voltage ripple of the Buck converter can be approximated by R. c The ripples on the surface can be considered as linear changes.

[0074] In some schemes, it is assumed that the DC-DC converter operates in an ideal state, i.e., there is no delay before the sampled measurement value is applied to the new switching state. Figure 5 This is a schematic diagram of the output voltage waveform of the Buck converter. Figure 6 This is a schematic diagram illustrating the principle of the adaptive method based on virtual reference values. Figure 7 This is a schematic diagram illustrating the ideal scenario with no delay. Specifically, as shown... Figure 5 , Figure 6 and Figure 7 As shown, the output voltage U of the DC-DC converter o (k) Sample at time step k. The corresponding switch duty cycle D. v (k) is calculated within a very short switching time and applied during the k-th and (k+1)-th step times. The current is then sampled again at the (k+1)-th step time, at which point the switch duty cycle D is calculated. v (k+1), and so on.

[0075] In practical applications using model predictive control, if the digital controller itself enters an interrupt function or performs data calculations, there is an inherent delay. Consequently, the duty cycle calculated in the current cycle is typically loaded onto the digital PWM module at the start of the next cycle, resulting in a one-cycle control delay that impacts system performance. To address this issue, delay compensation is needed for the DC-DC converter controller.

[0076] In the solution of the present invention, such as Figure 1 As shown, the control method of the DC-DC converter includes steps S110 to S170.

[0077] In step S110, the sampling is performed according to a set sampling period, such as the set sampling period T. S Obtain the output voltage of the DC-DC converter at each sampling time, such as the output voltage U of the main circuit of the DC-DC converter. or And obtain the switching control quantity of the main circuit of the DC-DC converter at the previous sampling time, such as the switching control quantity calculated at the k-2 step time.

[0078] In step S120, based on the output voltage of the DC-DC converter at the previous sampling time and the switching control quantity of the main circuit of the DC-DC converter at the previous sampling time, the initial state prediction quantity of the DC-DC converter at the current sampling time is calculated, such as the initial state prediction quantity of the output voltage of the DC-DC converter at k-step time. That is, the voltage prediction observation at time k.

[0079] In step S130, the predicted output reference voltage of the DC-DC converter and the predicted initial state of the DC-DC converter at the current sampling time are stored.

[0080] At step S140, based on the predicted output reference voltage of the DC-DC converter and the predicted initial state of the DC-DC converter at the current sampling time, the steady-state error of the output voltage of the DC-DC converter at the current sampling time is calculated, such as the steady-state error e(k|k-1) at time k.

[0081] In step S150, based on the steady-state error of the output voltage of the DC-DC converter at the current sampling time and the predicted output reference voltage of the DC-DC converter, the virtual reference voltage of the DC-DC converter at the current sampling time is calculated, such as the virtual reference voltage U at time k. dref_v (k+1|k).

[0082] At step S160, based on the virtual reference voltage of the DC-DC converter at the current sampling time, the initial state prediction of the DC-DC converter at the current sampling time, and the steady-state error of the output voltage of the DC-DC converter at the current sampling time, the switching control quantity of the main circuit of the DC-DC converter at the current sampling time is calculated, such as the switching control quantity D output by the delay compensation module. v (k|k-1).

[0083] At step S170, the duty cycle of the switching transistor in the main circuit of the DC-DC converter is controlled according to the switching control quantity of the main circuit of the DC-DC converter at the current sampling time.

[0084] In the present invention, a delay compensation strategy for the controller of a DC-DC converter is provided. Figure 3 A block diagram of an adaptive control delay compensation strategy for high steady-state accuracy model prediction. Figure 3 In the example shown, delay compensation for predictive control is added to reduce steady-state voltage tracking errors caused by the large amount of online computation in predictive control. The block diagram of the model predictive adaptive control delay compensation proposed in this invention is as follows: Figure 3 As shown, the specific predictive control delay compensation method is as follows:

[0085] To simplify the description, simply consider all time delays T. d It is approximately equivalent to one sampling period T s Define the predicted switching control quantity in k steps as D. v (k). U will be used in the following statements. or (k|k) is defined as the control quantity predicted at time k within k steps. A delay of one sampling time results in D v (kk) will be applied at the next step time k+1.

[0086] Figure 5 The waveform diagram of the Buck converter output voltage variation within one control cycle under CCM is given. Figure 5 Middle U o (k) represents the output voltage at time k, U o (k+1) represents the output voltage value at time (k+1), D represents the duty cycle, and T represents the output voltage value at time (k+1). S For the sampling period, U dref f is the predicted value of the output reference voltage. u and f d These represent the voltage rise and fall slopes, respectively. Under steady-state conditions, the output voltage rises when switch S is turned on and falls when it is turned off, with constant rise and fall slopes. Considering equation (1-1), the simulated rise and fall slopes of the output voltage can be derived as follows:

[0087]

[0088] After obtaining the rise and fall slopes of the output voltage, the predicted output voltage value at the next sampling time, i.e., time k, can be predicted as follows:

[0089] U o (k)=U o (k-1)+f u D v (k-1)T S +f d (1-D v (k-1))T S (2).

[0090] Typically, delay compensation is achieved using digital control. To achieve delay compensation in predictive control, an additional prediction step needs to be added to the system's predictive model expression within each sampling period. Specifically, a two-step prediction method is used for delay compensation, employing the voltage sample value U at time k-1. or The predicted switching control quantity D at times (k-1) and (k-2) v (k-1|k-2) and the corresponding upward slope f ur and the descending slope f dr Equations (1) and (2) are expressions for the voltage prediction at time k-1 proposed in some schemes. Equation (2) can be rewritten as:

[0091]

[0092] In the formula, f ur f is the actual value of the voltage rise slope. dr U represents the actual value of the voltage drop slope. or This represents the actual output voltage of the adaptive method of this invention.

[0093] To achieve this goal, two variables can be designed in practical engineering to store the duty cycle and output voltage prediction observations calculated in the previous cycle. Thus, the voltage prediction observation at time k can be obtained according to equation (3). After time k-1, a variable needs to be set to store the virtual voltage reference value of the previous cycle in order to complete the constraint control of the output voltage of the DC-DC converter.

[0094] Figure 8 This is a schematic diagram illustrating the delay without compensation. The application of switching control variables will cause greater voltage fluctuations, such as... Figure 8 As described, this will also affect the stability of the closed loop. Figure 8This describes the latency during communication and computation, which are typically the most important parameters affecting latency. Figure 8 In the example shown, U and D refer to the delay during upward and downward transmission communication, respectively, and C refers to the calculation delay. The timing of action of the sampled measurement quantity and the switching control quantity is... Figure 8 It is marked with a black arrow.

[0095] Figure 9 This is a schematic diagram illustrating the situation when delay compensation is complete. Specifically, if the DC-DC converter's output voltage has no input at the initial moment, then the initial state prediction of the DC-DC converter's output voltage at time step k is... The switching control quantity D is calculated at step k-2. v (k-1|k-2), and the assumed voltage prediction observations. The results are derived from the application of the prediction model, as shown in the following details. Figure 9 As shown.

[0096] For practical engineering considerations and to simplify calculations, the prediction horizon in this invention is set to 1, meaning that the output voltage value at the next sampling time is predicted only within each sampling period. The cost function J selected for the prediction model in this invention is:

[0097] J = [U dref -U o (k)] 2 (4).

[0098] As can be seen from the form of the cost function, the control objective of the scheme control method of the present invention is to make the output voltage track the predicted value U of the output reference voltage. dref To minimize the cost function value, substitute equation (2) into equation (4) and set J = 0, that is:

[0099] U dref -U o (k)-f u D(k)T s -f d (1-D(k))T s =0(4-1).

[0100] There is a steady-state error between the actual output voltage and the predicted output reference voltage.

[0101] e(k-1)=U dref -U or (k-1)≠0 (5).

[0102] In the formula, e(k-1) is the steady-state error between the predicted output reference voltage and the actual output voltage at time k-1, and U orThis is the actual output voltage of the adaptive method in the solution of the present invention. For the convenience of analysis, let's assume that the reason for model mismatch is the reduction of the input voltage. At this time, it is easy to obtain f ur <f u ,f dr =f d ,e(k - 1)>0. If the virtual reference voltage is constructed as follows:

[0103] U dref_v (k)=U dref + se(k - 1) (6).

[0104] In the formula, U dref_v (k) is the finally generated virtual reference voltage, s is the proportionality coefficient, 0 < s ≤ 1. Substitute U dref_v (k) obtained in formula (6) into formula (4 - 1), replace U dref , and the duty cycle required to track U dref_v (k) can be obtained:

[0105]

[0106] Among them, D v (k - 1) is the duty cycle required by the DC - DC converter at the current k sampling moment, T S is the sampling period, U dref_v (k) is the virtual reference voltage, U or (k - 1) is the output voltage at the k - 1 sampling moment, U i (k - 1) is the input voltage of the DC - DC converter at the k - 1 sampling moment, R c is the equivalent series resistance on the output filter capacitor of the DC - DC converter, and L is the output filter inductor of the DC - DC converter.

[0107] The above formulas (4), (5), (6), and (7) are the key expressions of the adaptive prediction model proposed in some solutions. Now, a delay compensation strategy is set to enhance the voltage prediction control function proposed in some solutions. To achieve this goal, this control strategy needs to be added at the moment of step 1. In step 1, the prediction of the initial output voltage is completed, and the predicted observation value of the output voltage from k - 1 to k is obtained. Similarly, the output voltage reference needs to be further predicted. According to the strategy framework proposed in formulas (4), (5), (6), and (7), the error coefficient is introduced into the cost function expression to complete the high - precision control of the output voltage. In the k - 1 step, the virtual voltage prediction control algorithm can directly calculate D v (kk - 1) and directly apply it to the k moment.

[0108] This invention provides a virtual voltage adaptive continuous control set model predictive control delay compensation method for DC-DC converters. The calculation method for the predictive control delay compensation strategy is explained to achieve better tracking of the predicted quantity with the control quantity. In this invention, an additional delay compensation step is added to reduce the tracking error caused by the large amount of online computation in predictive control. Furthermore, to improve steady-state tracking accuracy, this invention sets a virtual reference voltage by estimating the error value for each cycle. In each sampling cycle, this invention actually tracks the virtual reference voltage, rather than the set voltage.

[0109] In some implementations, step S130, based on the output voltage of the DC-DC converter at the previous sampling time and the switching control quantity of the main circuit of the DC-DC converter at the previous sampling time, calculates the initial state prediction quantity of the DC-DC converter at the current sampling time, including: calculating the initial state prediction quantity of the DC-DC converter at the current sampling time according to the following formula:

[0110]

[0111] in, U is the initial state prediction of the DC-DC converter at the current sampling time k. or (k-1) is the output voltage of the DC-DC converter at the previous sampling time k-1, D v (k-1|k-2) represents the switching control quantity of the main circuit of the DC-DC converter at the previous sampling time k-1, T S For the set sampling period, f ur f is the actual value of the voltage rise slope. dr This represents the actual value of the voltage drop slope.

[0112] Specifically, such as Figure 3 As shown, the high steady-state accuracy model prediction adaptive control delay compensation strategy includes: Step 1: Sampling the output voltage U or (k-1), and use the initial state prediction expression (8) to predict the output voltage prediction observation at time k.

[0113]

[0114] In some implementations, step S140, based on the predicted output reference voltage of the DC-DC converter and the predicted initial state of the DC-DC converter at the current sampling time, calculates the steady-state error of the output voltage of the DC-DC converter at the current sampling time, including: calculating the steady-state error of the output voltage of the DC-DC converter at the current sampling time according to the following formula:

[0115]

[0116] Among them, e(k|k - 1) is the steady - state error of the output voltage of the DC - DC converter at the current sampling time k, and U dref is the predicted value of the output reference voltage of the DC - DC converter, and is the predicted value of the initial state of the DC - DC converter at the current sampling time k.

[0117] Specifically, as Figure 3 shown, the high - steady - state - accuracy model - predictive adaptive control delay compensation strategy further includes: Step 2: According to the output voltage at time k - 1 in Equation (8), use Equation (9) to calculate the steady - state error e(k|k - 1) at time k:

[0118]

[0119] In some embodiments, in Step S150, according to the steady - state error of the output voltage of the DC - DC converter at the current sampling time and the predicted value of the output reference voltage of the DC - DC converter, calculating the virtual reference voltage of the DC - DC converter at the current sampling time includes: calculating the virtual reference voltage of the DC - DC converter at the current sampling time according to the following formula:

[0120] U dref_v (k + 1|k)=U dref +se(k|k - 1).

[0121] Among them, U dref_v (k + 1|k) is the virtual reference voltage of the DC - DC converter at the current sampling time k, U dref is the predicted value of the output reference voltage of the DC - DC converter, s is a proportionality coefficient and 0 < s ≤ 1, and e(k|k - 1) is the steady - state error of the output voltage of the DC - DC converter at the current sampling time k.

[0122] Specifically, as Figure 3 shown, the high - steady - state - accuracy model - predictive adaptive control delay compensation strategy further includes: Step 3: According to the steady - state error e(k|k - 1), use Equation (10) to calculate the virtual reference voltage U dref_v (k + 1|k).

[0123] U dref_v (k + 1|k)=U dref +se(k|k - 1) (10).

[0124] In some implementations, the switching control quantity of the main circuit of the DC-DC converter at the current sampling time, calculated in step S160 based on the virtual reference voltage of the DC-DC converter at the current sampling time, the initial state prediction of the DC-DC converter at the current sampling time, and the steady-state error of the output voltage of the DC-DC converter at the current sampling time, is the switching control quantity after delay compensation.

[0125] Specifically, such as Figure 3 As shown, the high steady-state accuracy model predictive adaptive control delay compensation strategy includes: a DC-DC converter main circuit, a pulse width modulator, a delay compensation module, a predictive model (i.e., a continuous set model predictive control model), and a virtual reference adaptive model. Figure 3 In the example shown, the output voltage U of the DC-DC converter main circuit is... or These are respectively input to the prediction model and the delay compensation module. Virtual reference voltage U dref The steady-state error e(k|k-1) output by the prediction model is input to both the delay compensation module and the virtual reference adaptive model. The virtual reference voltage U output by the virtual reference adaptive model is input to both the prediction model and the virtual reference adaptive model. dref_v (k+1|k), after being processed by the hysteresis limiting circuit, is input into the prediction model. The switching control quantity D output by the delay compensation module... v (k|k-1), after passing through the pulse width modulator, is input to the main circuit of the DC-DC converter.

[0126] In some implementations, step S160 calculates the switching control quantity of the main circuit of the DC-DC converter at the current sampling time based on the virtual reference voltage of the DC-DC converter at the current sampling time, the initial state prediction of the DC-DC converter at the current sampling time, and the steady-state error of the output voltage of the DC-DC converter at the current sampling time. This includes: simultaneously applying the following two formulas to calculate the switching control quantity of the main circuit of the DC-DC converter at the current sampling time:

[0127]

[0128]

[0129] Where J is the cost function, U dref_v (k+1|k) represents the virtual reference voltage of the DC-DC converter at the current sampling time k. λ is the predicted initial state of the DC-DC converter at the current sampling time k; eThe error coefficient represents the proportion of the steady-state error in the cost function; e(k|k-1) is the steady-state error of the output voltage of the DC-DC converter at the current sampling time k; D v (k|k-1) represents the switching control quantity of the main circuit of the DC-DC converter at the current sampling time k, L is the inductance value of the output filter inductor of the DC-DC converter, and U i (k-1|k-1) is the input voltage of the DC-DC converter at the previous sampling time k-1, R c It is the equivalent series resistance on the output filter capacitor of the DC-DC converter.

[0130] Specifically, such as Figure 3 As shown, the high steady-state accuracy model prediction adaptive control delay compensation strategy also includes: Step 4: After incorporating the virtual voltage reference error e(k|k-1) into the constraint expression (11) at the corresponding time and combining equations (10) and (12), the switching control quantity D can be obtained. v (k|k-1).

[0131]

[0132]

[0133] In some embodiments, step S170, controlling the duty cycle of the switching transistors in the main circuit of the DC-DC converter based on the switching control quantity of the main circuit of the DC-DC converter at the current sampling time, includes: performing hysteresis limiting and pulse width modulation on the switching control quantity of the main circuit of the DC-DC converter at the current sampling time to generate a duty cycle for controlling the switching transistors in the main circuit of the DC-DC converter, so as to control the switching transistors in the main circuit of the DC-DC converter according to the generated duty cycle.

[0134] Specifically, such as Figure 3 As shown, the high steady-state accuracy model prediction adaptive control delay compensation strategy also includes: Step 5: the optimal switching control quantity D corresponding to the minimum cost function. v (k|k-1) can be calculated and applied to a DC-DC converter.

[0135] Steps 1 through 5 above are repeated sequentially in each subsequent prediction step. It is worth noting that the original and compensated optimal switching control values ​​are calculated at each time step. To achieve this, the compensated switching control value must be calculated starting at time k-1. Therefore, the compensation strategy needs to be applied at time k-1, and the corresponding output voltage needs to be sampled.

[0136] If the delay is shorter than the sampling time, then the initial state-space equation of equation (7) can be discretized into a form with the delay time T. d Equal time intervals. Specifically, equation (1) can be integrated into t = kT s up to t=kT s +T d And T in equation (7) s You can use T d Instead, for the case of the voltage prediction at time k in the third step of the control strategy, the predictive control delay compensation model is always directly discretized into the sampling period T. s Regardless of how long the delay is.

[0137] The following is an illustrative comparison with uncompensated non-virtual voltage prediction control.

[0138] To verify the effectiveness of the virtual voltage adaptive MPC algorithm with delay compensation, a non-virtual voltage prediction controller without compensation was built for comparison, and various performance parameters were compared. Figure 10 This is a schematic diagram of the output steady-state voltage curve of the Buck converter. Figure 11 This is the voltage waveform when the input voltage of the Buck converter changes abruptly. Figure 12 This is a schematic diagram of the output steady-state current of the Buck converter. Figure 13 This is a schematic diagram of the current waveform when the input voltage of a Buck converter changes abruptly. Figure 10 , Figure 11 , Figure 12 , Figure 13 It can be seen that, whether in steady-state conditions or during voltage surges, the control scheme proposed in this invention is superior to the uncompensated non-virtual voltage predictive control. Furthermore, the scheme proposed in this invention achieves the given voltage regulation within 0.7ms, while the uncompensated non-virtual voltage predictive control scheme experiences a certain drop after overshoot, with a final stabilization time of approximately 35.7ms, significantly exceeding the regulation time of this control algorithm. In handling load surges, the scheme proposed in this invention is also superior to the uncompensated non-virtual voltage predictive control. Figure 11 and Figure 13 In the simulation, when the load resistance decreases from 15Ω to 7.5Ω, the amplitude and duration of the voltage fluctuation in this predictive control are both smaller than those in the uncompensated non-virtual voltage predictive control. Comparative simulation results verify the steady-state accuracy and dynamic performance of the proposed solution.

[0139] Without delay compensation, the actual switching control signals are mostly applied in the middle of the cycle, and this middle time is uncontrollable. Furthermore, due to the limitations of each cycle, the actual switching control signals may even have extremely short durations, which is detrimental to algorithm implementation. Using delay compensation, by adding an extra prediction step, can significantly improve these issues, thus enhancing the completeness of the control algorithm.

[0140] The technical solution of this embodiment involves acquiring the output voltage of the DC-DC converter at a set sampling time according to the previous sampling time, and using an initial state prediction model based on the output voltage at the previous sampling time to predict the output voltage prediction observation at the current sampling time. The steady-state error at the current sampling time is calculated based on the output voltage at the previous sampling time. The virtual reference voltage at the current sampling time is calculated based on the steady-state error at the current sampling time. The optimal switching control quantity, which minimizes the corresponding cost function, is calculated based on the virtual reference voltage at the current sampling time and the virtual voltage reference error. The optimal switching control quantity is then pulse-width modulated (PWM) to output a PWM pulse wave, thereby controlling the power switching of the DC-DC converter. Therefore, by compensating for the delay of the DC-DC converter's controller, the tracking accuracy and completeness of the controller's control algorithm are improved.

[0141] According to embodiments of the present invention, a control device for a DC-DC converter, corresponding to a control method for a DC-DC converter, is also provided. See also Figure 2 The diagram shows a structural schematic of an embodiment of the device of the present invention. The main circuit of the DC-DC converter has a switching transistor, such as a controllable switching transistor S. To facilitate understanding of the high steady-state accuracy model prediction adaptive control delay compensation strategy of the present invention, a Buck circuit is used as an example to illustrate the specific execution process of the present invention. Figure 4 This is a basic topology diagram of a Buck converter. (Example:) Figure 4 As shown, in the basic topology of the Buck converter, U i Here, S is the input voltage of the Buck converter, S is the controllable switch, D is the diode, L is the output filter inductor, C is the output filter capacitor, and R is the input voltage of the Buck converter. c U is the equivalent series resistance on the output filter capacitor C, R is the load resistance, and U is the equivalent series resistance on the output filter capacitor C. o For the output voltage, i L This represents the inductor current. The input voltage U... i The positive terminal is connected to the source of the controllable switch S, and the drain of the controllable switch S is connected to the equivalent series resistance R on the output filter inductor L and the output filter capacitor C. c And after the output filter capacitor C, and the input voltage U iThe negative terminal is connected. The load resistor R is set at the output terminal of the Buck converter, and is connected in series with the equivalent series resistance R on the output filter capacitor C. c The series branch of the output filter capacitor C is connected in parallel; the output of the Buck converter can output voltage U. o The drain of the controllable switch S is also connected to the cathode of the diode D; the anode of the diode D is connected to the input voltage U. i The negative terminal is connected.

[0142] When a Buck circuit operates in Continuous Conduction Mode (CCM), the time-domain expression for its inductor current is:

[0143]

[0144] In the formula, s(t) is the switching function, which has a value of 1 when the switch is closed and a value of 0 when the switch is open.

[0145] When the equivalent series resistance R on the output filter capacitor c When large enough, the output voltage ripple of the Buck converter can be approximated by R. c The ripples on the surface can be considered as linear changes.

[0146] In some schemes, it is assumed that the DC-DC converter operates in an ideal state, i.e., there is no delay before the sampled measurement value is applied to the new switching state. Figure 5 This is a schematic diagram of the output voltage waveform of the Buck converter. Figure 6 This is a schematic diagram illustrating the principle of the adaptive method based on virtual reference values. Figure 7 This is a schematic diagram illustrating the ideal scenario with no delay. Specifically, as shown... Figure 5 , Figure 6 and Figure 7 As shown, the output voltage U of the DC-DC converter o (k) Sample at time step k. The corresponding switch duty cycle D. v (k) is calculated within a very short switching time and applied during the k-th and (k+1)-th step times. The current is then sampled again at the (k+1)-th step time, at which point the switch duty cycle D is calculated. v (k+1), and so on.

[0147] In practical applications using model predictive control, if the digital controller itself enters an interrupt function or performs data calculations, there is an inherent delay. Consequently, the duty cycle calculated in the current cycle is typically loaded onto the digital PWM module at the start of the next cycle, resulting in a one-cycle control delay that impacts system performance. To address this issue, delay compensation is needed for the DC-DC converter controller.

[0148] In the solution of the present invention, such as Figure 2 As shown, the control device of the DC-DC converter includes: an acquisition unit 102, a storage unit 104, and a control unit 106.

[0149] The acquisition unit 102 is configured to acquire the output voltage of the DC-DC converter at each sampling moment according to a set sampling period, such as the output voltage U of the main circuit of the DC-DC converter. or It also acquires the switching control quantity of the main circuit of the DC-DC converter at the previous sampling time, such as the switching control quantity calculated at step k-2. The specific functions and processing of this acquisition unit 102 are described in step S110.

[0150] The control unit 106 is configured to calculate the initial state prediction of the DC-DC converter at the current sampling time based on the output voltage of the DC-DC converter at the previous sampling time and the switching control quantity of the main circuit of the DC-DC converter at the previous sampling time, such as the initial state prediction of the output voltage of the DC-DC converter at k-step time. That is, the voltage prediction observation at time k. For the specific functions and processing of the control unit 106, please refer to step S120.

[0151] The storage unit 104 is configured to store the predicted output reference voltage of the DC-DC converter and the predicted initial state of the DC-DC converter at the current sampling time. The specific functions and processing of the storage unit 104 are described in step S130.

[0152] The control unit 106 is further configured to calculate the steady-state error of the output voltage of the DC-DC converter at the current sampling time, such as the steady-state error e(k|k-1) at time k, based on the predicted output reference voltage of the DC-DC converter and the predicted initial state of the DC-DC converter at the current sampling time. The specific functions and processing of this control unit 106 are further described in step S140.

[0153] The control unit 106 is further configured to calculate, based on the steady-state error of the output voltage of the DC-DC converter at the current sampling time and the predicted output reference voltage of the DC-DC converter, the virtual reference voltage of the DC-DC converter at the current sampling time, such as the virtual reference voltage U at time k. dref_v (k+1|k). For the specific functions and processing of the control unit 106, please refer to step S150.

[0154] The control unit 106 is further configured to calculate, based on the virtual reference voltage of the DC-DC converter at the current sampling time, the initial state prediction of the DC-DC converter at the current sampling time, and the steady-state error of the output voltage of the DC-DC converter at the current sampling time, the switching control quantity of the main circuit of the DC-DC converter at the current sampling time, such as the switching control quantity D output by the delay compensation module. v (k|k-1). For the specific functions and processing of the control unit 106, please refer to step S160.

[0155] The control unit 106 is further configured to control the duty cycle of the switching transistors in the main circuit of the DC-DC converter based on the switching control quantity of the main circuit of the DC-DC converter at the current sampling time. The specific functions and processing of the control unit 106 are further described in step S170.

[0156] In the present invention, a delay compensation strategy for the controller of a DC-DC converter is provided. Figure 3 A block diagram of an adaptive control delay compensation strategy for high steady-state accuracy model prediction. Figure 3 In the example shown, delay compensation for predictive control is added to reduce steady-state voltage tracking errors caused by the large amount of online computation in predictive control. The block diagram of the model predictive adaptive control delay compensation proposed in this invention is as follows: Figure 3 As shown, the specific predictive control delay compensation method is as follows:

[0157] To simplify the description, simply consider all time delays T. d It is approximately equivalent to one sampling period T s Define the predicted switching control quantity in k steps as D. v (k). U will be used in the following statements. or (k|k) is defined as the control quantity predicted at time k within a time step of k. A delay of one sampling time step results in D v (kk) will be applied at the next step time k+1.

[0158] Figure 5The waveform diagram of the Buck converter output voltage variation within one control cycle under CCM is given. Figure 5 Middle U o (k) represents the output voltage at time k, U o (k+1) represents the output voltage value at time (k+1), D represents the duty cycle, and T represents the output voltage value at time (k+1). S For the sampling period, U dref f is the predicted value of the output reference voltage. u and f d These represent the voltage rise and fall slopes, respectively. Under steady-state conditions, the output voltage rises when switch S is turned on and falls when it is turned off, with constant rise and fall slopes. Considering equation (1-1), the simulated rise and fall slopes of the output voltage can be derived as follows:

[0159]

[0160] After obtaining the rise and fall slopes of the output voltage, the predicted output voltage value at the next sampling time, i.e., time k, can be predicted as follows:

[0161] U o (k)=U o (k-1)+f u D v (k-1)T S +f d (1-D v (k-1))T S (2).

[0162] Typically, delay compensation is achieved using digital control. To achieve delay compensation in predictive control, an additional prediction step needs to be added to the system's predictive model expression within each sampling period. Specifically, a two-step prediction method is used for delay compensation, employing the voltage sample value U at time k-1. or The predicted switching control quantity D at times (k-1) and (k-2) v (k-1|k-2) and the corresponding upward slope f ur and the descending slope f dr Equations (1) and (2) are expressions for the voltage prediction at time k-1 proposed in some schemes. Equation (2) can be rewritten as:

[0163]

[0164] In the formula, f ur f is the actual value of the voltage rise slope. dr U represents the actual value of the voltage drop slope. or This represents the actual output voltage of the adaptive method of this invention.

[0165] To achieve this goal, two variables can be designed in practical engineering to store the duty cycle and output voltage prediction observations calculated in the previous cycle. Thus, the voltage prediction observation at time k can be obtained according to equation (3). After time k-1, a variable needs to be set to store the virtual voltage reference value of the previous cycle in order to complete the constraint control of the output voltage of the DC-DC converter.

[0166] Figure 8 This is a schematic diagram showing the delay without compensation. The application of switching control variables will cause greater voltage fluctuations, such as... Figure 8 As described, this will also affect the stability of the closed loop. Figure 8 This describes the latency during communication and computation, which are typically the two most important parameters affecting latency. Figure 8 In the example shown, U and D refer to the delay during upward and downward transmission communication, respectively, and C refers to the calculation delay. The timing of action of the sampled measurement quantity and the switching control quantity is... Figure 8 It is marked with a black arrow.

[0167] Figure 9 This is a schematic diagram illustrating the situation when delay compensation is complete. Specifically, if the DC-DC converter's output voltage has no input at the initial moment, then the initial state prediction of the DC-DC converter's output voltage at time step k is... The switching control quantity D is calculated at step k-2. v (k-1|k-2), and the assumed voltage prediction observations. The results are derived from the application of the prediction model, as shown in the following details. Figure 9 As shown.

[0168] For practical engineering considerations and to simplify calculations, the prediction horizon in this invention is set to 1, meaning that the output voltage value at the next sampling time is predicted only within each sampling period. The cost function J selected for the prediction model in this invention is:

[0169] J = [U dref -U o (k)] 2 (4).

[0170] As can be seen from the form of the cost function, the control objective of the scheme control method of the present invention is to make the output voltage track the predicted value U of the output reference voltage. dref To minimize the cost function value, substitute equation (2) into equation (4) and set J = 0, that is:

[0171] U dref -U o (k)-f u D(k)Ts -f d (1 - D(k))T s = 0 (4 - 1).

[0172] There is a steady - state error between the actual output voltage and the predicted output reference voltage:

[0173] e(k - 1)=U dref -U or (k - 1)≠0 (5).

[0174] In the formula, e(k - 1) is the steady - state error between the predicted output reference voltage and the actual output voltage at the k - 1 moment, U or is the actual output voltage of the adaptive method in the solution of the present invention. For the convenience of analysis, assume that the reason for the model mismatch is the reduction of the input voltage. At this time, it is easy to obtain f ur <f u , f dr = f d , e(k - 1)>0. If the virtual reference voltage is constructed as follows:

[0175] U dref_v (k)=U dref + se(k - 1) (6).

[0176] In the formula, U dref_v (k) is the finally generated virtual reference voltage, s is the proportionality coefficient, 0 < s ≤ 1. Substitute U dref_v (k) obtained in formula (6) into formula (4 - 1), replace U dref , and the duty cycle required to track U dref_v (k) can be obtained:

[0177]

[0178] Among them, D v (k - 1) is the duty cycle required by the DC - DC converter at the current k sampling moment, T S is the sampling period, U dref_v (k) is the virtual reference voltage, U or (k - 1) is the output voltage at the k - 1 sampling moment, U i (k - 1) is the input voltage of the DC - DC converter at the k - 1 sampling moment, R c is the equivalent series resistance on the output filter capacitor of the DC - DC converter, and L is the output filter inductor of the DC - DC converter.

[0179] Equations (4), (5), (6), and (7) above are key expressions of the adaptive prediction model proposed in some schemes. Now, we want to enhance the voltage prediction control function proposed in some schemes by setting a delay compensation strategy. To achieve this, the control strategy needs to be added at step 1. In step 1, the prediction of the initial output voltage is completed, and the predicted output voltage observation values ​​at times k-1 to k are obtained. Similarly, the output voltage reference needs to be further predicted. According to the strategy framework proposed in parts of equations (4), (5), (6), and (7), the high-precision control of the output voltage is achieved by introducing the error coefficient into the cost function expression. In the k-1 step, the virtual voltage prediction control algorithm can directly calculate D. v (k|k-1) and apply it directly to time k.

[0180] This invention provides a virtual voltage adaptive continuous control set model predictive control delay compensation method for DC-DC converters. The calculation method for the predictive control delay compensation strategy is explained to achieve better tracking of the predicted quantity with the control quantity. In this invention, an additional delay compensation step is added to reduce the tracking error caused by the large amount of online computation in predictive control. Furthermore, to improve steady-state tracking accuracy, this invention sets a virtual reference voltage by estimating the error value for each cycle. In each sampling cycle, this invention actually tracks the virtual reference voltage, rather than the set voltage.

[0181] In some embodiments, the control unit 106 calculates the initial state prediction of the DC-DC converter at the current sampling time based on the output voltage of the DC-DC converter at the previous sampling time and the switching control quantity of the main circuit of the DC-DC converter at the previous sampling time. Specifically, the control unit 106 is further configured to calculate the initial state prediction of the DC-DC converter at the current sampling time according to the following formula:

[0182]

[0183] in, U is the initial state prediction of the DC-DC converter at the current sampling time k. or (k-1) is the output voltage of the DC-DC converter at the previous sampling time k-1, D v (k-1|k-2) represents the switching control quantity of the main circuit of the DC-DC converter at the previous sampling time k-1, T S For the set sampling period, f ur f is the actual value of the voltage rise slope. dr This represents the actual value of the voltage drop slope.

[0184] Specifically, such as Figure 3 As shown, the high steady-state accuracy model prediction adaptive control delay compensation strategy includes: Step 1: Sampling the output voltage U or (k-1), and use the initial state prediction expression (8) to predict the output voltage prediction observation at time k.

[0185]

[0186] In some embodiments, the control unit 106 calculates the steady-state error of the output voltage of the DC-DC converter at the current sampling time based on the predicted output reference voltage of the DC-DC converter and the predicted initial state of the DC-DC converter at the current sampling time. Specifically, the control unit 106 is further configured to calculate the steady-state error of the output voltage of the DC-DC converter at the current sampling time according to the following formula:

[0187]

[0188] Where e(k|k-1) is the steady-state error of the output voltage of the DC-DC converter at the current sampling time k, U dref This is the predicted output reference voltage of the DC-DC converter. This is the initial state prediction of the DC-DC converter at the current sampling time k.

[0189] Specifically, such as Figure 3 As shown, the high steady-state accuracy model prediction adaptive control delay compensation strategy also includes: Step 2: Based on the output voltage at time k-1 in equation (8), use equation (9) to calculate the steady-state error e(k|k-1) at time k:

[0190]

[0191] In some embodiments, the control unit 106 calculates the virtual reference voltage of the DC-DC converter at the current sampling time based on the steady-state error of the output voltage of the DC-DC converter at the current sampling time and the predicted output reference voltage of the DC-DC converter. Specifically, the control unit 106 is further configured to calculate the virtual reference voltage of the DC-DC converter at the current sampling time according to the following formula:

[0192] U dref_v (k+1|k)=U dref +se(k|k-1).

[0193] Among them, U dref_v(k + 1|k) is the virtual reference voltage quantity of the DC-DC converter at the current sampling moment k, and U dref is the predicted output reference voltage of the DC-DC converter, s is the proportionality coefficient and 0 < s ≤ 1, and e(k|k - 1) is the steady-state error of the output voltage of the DC-DC converter at the current sampling moment k.

[0194] Specifically, as Figure 3 shown, the high steady-state accuracy model predictive adaptive control delay compensation strategy further includes: Step 3: According to the steady-state error quantity e(k|k - 1), use Equation (10) to calculate the virtual reference voltage quantity U dref_v (k + 1|k).

[0195] U dref_v (k + 1|k) = U dref + se(k|k - 1) (10).

[0196] In some embodiments, the control unit 106 calculates the switching control quantity of the main circuit of the DC-DC converter at the current sampling moment based on the virtual reference voltage quantity of the DC-DC converter at the current sampling moment, the predicted initial state quantity of the DC-DC converter at the current sampling moment, and the steady-state error of the output voltage of the DC-DC converter at the current sampling moment, and it is the switching control quantity after delay compensation.

[0197] Specifically, as Figure 3 shown, the high steady-state accuracy model predictive adaptive control delay compensation strategy includes: the main circuit of the DC-DC converter, a pulse width modulator, a delay compensation module, a prediction model (i.e., a continuous set model predictive control model), and a virtual reference quantity adaptive model. In Figure 3 the example shown, the output voltage U or of the main circuit of the DC-DC converter is respectively input to the prediction model and the delay compensation module. The virtual reference voltage U dref is respectively input to the prediction model and the virtual reference quantity adaptive model. The steady-state error e(k|k - 1) output by the prediction model is respectively input to the delay compensation module and the virtual reference quantity adaptive model. The virtual reference voltage quantity U dref_v (k + 1|k) is input to the prediction model after hysteresis limiter processing. The switching control quantity D v (k|k - 1) output by the delay compensation module is input to the main circuit of the DC-DC converter after passing through the pulse width modulator.

[0198] In some embodiments, the control unit 106 calculates the switching control quantity of the main circuit of the DC-DC converter at the current sampling time based on the virtual reference voltage of the DC-DC converter at the current sampling time, the initial state prediction of the DC-DC converter at the current sampling time, and the steady-state error of the output voltage of the DC-DC converter at the current sampling time. Specifically, the control unit 106 is further configured to calculate the switching control quantity of the main circuit of the DC-DC converter at the current sampling time by simultaneously applying the following two formulas:

[0199]

[0200]

[0201] Where J is the cost function, U dref_v (k+1|k) represents the virtual reference voltage of the DC-DC converter at the current sampling time k. Let λ be the initial state prediction of the DC-DC converter at the current sampling time k. e The error coefficient represents the proportion of the steady-state error in the cost function; e(k|k-1) is the steady-state error of the output voltage of the DC-DC converter at the current sampling time k; D v (k|k-1) represents the switching control quantity of the main circuit of the DC-DC converter at the current sampling time k, L is the inductance value of the output filter inductor of the DC-DC converter, and U i (k-1|k-1) is the input voltage of the DC-DC converter at the previous sampling time k-1, R c It is the equivalent series resistance on the output filter capacitor of the DC-DC converter.

[0202] Specifically, such as Figure 3 As shown, the high steady-state accuracy model prediction adaptive control delay compensation strategy also includes: Step 4: After incorporating the virtual voltage reference error e(k|k-1) into the constraint expression (11) at the corresponding time and combining equations (10) and (12), the switching control quantity D can be obtained. v (k|k-1).

[0203]

[0204]

[0205] In some embodiments, the control unit 106 controls the duty cycle of the switching transistors in the main circuit of the DC-DC converter based on the switching control quantity of the main circuit of the DC-DC converter at the current sampling time. Specifically, the control unit 106 is further configured to perform hysteresis limiting and pulse width modulation on the switching control quantity of the main circuit of the DC-DC converter at the current sampling time to generate a duty cycle for controlling the switching transistors in the main circuit of the DC-DC converter, so as to control the switching transistors in the main circuit of the DC-DC converter according to the generated duty cycle.

[0206] Specifically, such as Figure 3 As shown, the high steady-state accuracy model prediction adaptive control delay compensation strategy also includes: Step 5: the optimal switching control quantity D corresponding to the minimum cost function. v (k|k-1) can be calculated and applied to a DC-DC converter.

[0207] The above steps are repeated for each subsequent prediction step. It is important to note that the original and compensated optimal switching control values ​​are calculated at each time step. To achieve this, the compensated switching control value must be calculated as early as time step k-1. Therefore, the compensation strategy needs to be applied at time step k-1, and the corresponding output voltage needs to be sampled.

[0208] If the delay is shorter than the sampling time, then the initial state-space equation of equation (7) can be discretized into a form with the delay time T. d Equal time intervals. Specifically, equation (1) can be integrated into t = kT s up to t=kT s +T d And T in equation (7) s You can use T d Instead, for the case of the voltage prediction at time k in the third step of the control strategy, the predictive control delay compensation model is always directly discretized into the sampling period T. s Regardless of how long the delay is.

[0209] The following is an illustrative comparison with uncompensated non-virtual voltage prediction control.

[0210] To verify the effectiveness of the virtual voltage adaptive MPC algorithm with delay compensation, a non-virtual voltage prediction controller without compensation was built for comparison, and various performance parameters were compared. Figure 10 This is a schematic diagram of the output steady-state voltage curve of the Buck converter. Figure 11 This is the voltage waveform when the input voltage of the Buck converter changes abruptly. Figure 12 This is a schematic diagram of the output steady-state current of the Buck converter. Figure 13 This is a schematic diagram of the current waveform when the input voltage of a Buck converter changes abruptly. Figure 10 , Figure 11 , Figure 12 , Figure 13 It can be seen that, whether in steady-state conditions or during voltage surges, the control scheme proposed in this invention is superior to the uncompensated non-virtual voltage predictive control. Furthermore, the scheme proposed in this invention achieves the given voltage regulation within 0.7ms, while the uncompensated non-virtual voltage predictive control scheme experiences a certain drop after overshoot, with a final stabilization time of approximately 35.7ms, significantly exceeding the regulation time of this control algorithm. In handling load surges, the scheme proposed in this invention is also superior to the uncompensated non-virtual voltage predictive control. Figure 11 and Figure 13 In the simulation, when the load resistance decreases from 15Ω to 7.5Ω, the amplitude and duration of the voltage fluctuation in this predictive control are both smaller than those in the uncompensated non-virtual voltage predictive control. Comparative simulation results verify the steady-state accuracy and dynamic performance of the proposed solution.

[0211] Since the processing and functions implemented by the device in this embodiment are basically the same as the embodiments, principles and examples of the aforementioned methods, any details not covered in the description of this embodiment can be found in the relevant descriptions in the aforementioned embodiments, and will not be repeated here.

[0212] The technical solution of this invention involves acquiring the output voltage of a DC-DC converter at a set sampling time, based on the output voltage at the previous sampling time, and using an initial state prediction model to predict the output voltage prediction observation at the current sampling time. The steady-state error at the current sampling time is calculated based on the output voltage at the previous sampling time. A virtual reference voltage is calculated based on the steady-state error at the current sampling time. The optimal switching control quantity, minimizing the corresponding cost function, is calculated based on the virtual reference voltage and the virtual voltage reference error. This optimal switching control quantity is then pulse-width modulated (PWM) to output a PWM pulse wave, thereby controlling the power switch of the DC-DC converter to achieve high-precision control of the output voltage.

[0213] According to an embodiment of the present invention, a DC-DC converter corresponding to a control device for a DC-DC converter is also provided. This DC-DC converter may include the control device for the DC-DC converter described above.

[0214] Since the processing and functions implemented by the DC-DC converter in this embodiment are basically the same as the embodiments, principles and examples of the aforementioned devices, any details not covered in this embodiment can be found in the relevant descriptions in the aforementioned embodiments, and will not be repeated here.

[0215] The technical solution of this invention involves acquiring the output voltage of a DC-DC converter at a set sampling time, based on the output voltage at the previous sampling time, and using an initial state prediction model to predict the output voltage prediction observation at the current sampling time. The steady-state error at the current sampling time is calculated based on the output voltage at the previous sampling time. A virtual reference voltage is calculated based on the steady-state error at the current sampling time. The optimal switching control quantity, minimizing the corresponding cost function, is calculated based on the virtual reference voltage and the virtual voltage reference error. This optimal switching control quantity is then pulse-width modulated (PWM) to output a PWM pulse wave, thereby controlling the power switching of the DC-DC converter. Predictive control delay compensation is used to achieve better tracking of the control quantity by the predicted quantity.

[0216] According to an embodiment of the present invention, a storage medium corresponding to a control method for a DC-DC converter is also provided. The storage medium includes a stored program, wherein the program controls the device where the storage medium is located to execute the control method for the DC-DC converter described above when it is executed.

[0217] Since the processing and functions implemented by the storage medium in this embodiment are basically the same as the embodiments, principles and examples of the aforementioned methods, any details not covered in this embodiment can be found in the relevant descriptions in the aforementioned embodiments, and will not be repeated here.

[0218] The technical solution of this invention involves acquiring the output voltage of a DC-DC converter at a set sampling time, based on the output voltage at the previous sampling time, and using an initial state prediction model to predict the output voltage prediction observation at the current sampling time. The steady-state error at the current sampling time is calculated based on the output voltage at the previous sampling time. A virtual reference voltage is calculated based on the steady-state error at the current sampling time. The optimal switching control quantity, minimizing the corresponding cost function, is calculated based on the virtual reference voltage and the virtual voltage reference error. This optimal switching control quantity is then pulse-width modulated (PWM) to output a PWM pulse wave, thereby controlling the power switching of the DC-DC converter. By adding an additional delay compensation step, the tracking error caused by the large amount of online computation in predictive control is reduced.

[0219] In summary, it is readily understood by those skilled in the art that, without conflict, the aforementioned advantageous methods can be freely combined and superimposed.

[0220] The above description is merely an embodiment of the present invention and is not intended to limit the invention. Various modifications and variations can be made to the present invention by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the scope of the claims of the present invention.

Claims

1. A control method for a DC-DC converter, characterized in that, The main circuit of the DC-DC converter has a switching transistor; The control method for the DC-DC converter includes: According to the set sampling period, the output voltage of the DC-DC converter at each sampling moment is obtained, and the switching control quantity of the main circuit of the DC-DC converter at the previous sampling moment is obtained. Based on the output voltage of the DC-DC converter at the previous sampling time and the switching control quantity of the main circuit of the DC-DC converter at the previous sampling time, the initial state prediction quantity of the DC-DC converter at the current sampling time is calculated. Store the predicted output reference voltage of the DC-DC converter and the predicted initial state of the DC-DC converter at the current sampling time; Based on the predicted output reference voltage of the DC-DC converter and the predicted initial state of the DC-DC converter at the current sampling time, the steady-state error of the output voltage of the DC-DC converter at the current sampling time is calculated. Based on the steady-state error of the output voltage of the DC-DC converter at the current sampling time and the predicted output reference voltage of the DC-DC converter, the virtual reference voltage of the DC-DC converter at the current sampling time is calculated. Based on the virtual reference voltage of the DC-DC converter at the current sampling time, the initial state prediction of the DC-DC converter at the current sampling time, and the steady-state error of the output voltage of the DC-DC converter at the current sampling time, the switching control quantity of the main circuit of the DC-DC converter at the current sampling time is calculated. The duty cycle of the switching transistors in the main circuit of the DC-DC converter is controlled based on the switching control quantity of the main circuit of the DC-DC converter at the current sampling time.

2. The control method for the DC-DC converter according to claim 1, characterized in that, Based on the output voltage of the DC-DC converter at the previous sampling time and the switching control quantity of the main circuit of the DC-DC converter at the previous sampling time, the initial state prediction quantity of the DC-DC converter at the current sampling time is calculated, including: The initial state prediction of the DC-DC converter at the current sampling time is calculated using the following formula: in, U is the initial state prediction of the DC-DC converter at the current sampling time k. or (k-1) is the output voltage of the DC-DC converter at the previous sampling time k-1, D v (k-1|k-2) represents the switching control quantity of the main circuit of the DC-DC converter at the previous sampling time k-1, T S For the set sampling period, f ur f is the actual value of the voltage rise slope. dr This represents the actual value of the voltage drop slope.

3. The control method for the DC-DC converter according to claim 1, characterized in that, Based on the predicted output reference voltage of the DC-DC converter and the predicted initial state of the DC-DC converter at the current sampling time, the steady-state error of the output voltage of the DC-DC converter at the current sampling time is calculated, including: The steady-state error of the output voltage of the DC-DC converter at the current sampling moment can be calculated using the following formula: Where e(k|k-1) is the steady-state error of the output voltage of the DC-DC converter at the current sampling time k, U dref This is the predicted output reference voltage of the DC-DC converter. This is the initial state prediction of the DC-DC converter at the current sampling time k.

4. The control method for the DC-DC converter according to claim 1, characterized in that, Based on the steady-state error of the output voltage of the DC-DC converter at the current sampling moment and the predicted output reference voltage of the DC-DC converter, the virtual reference voltage of the DC-DC converter at the current sampling moment is calculated, including: The virtual reference voltage of the DC-DC converter at the current sampling moment is calculated using the following formula: IN dref_v (k+1|k)=U dref +se(k|k-1); Among them, U dref_v (k + 1|k) is the virtual reference voltage quantity of the DC-DC converter at the current sampling moment k, and U dref is the predicted output reference voltage of the DC-DC converter. s is a proportionality coefficient and 0 < s ≤ 1, and e(k|k - 1) is the steady-state error of the output voltage of the DC-DC converter at the current sampling moment k.

5. The control method for the DC-DC converter according to claim 1, characterized in that, The switching control quantity of the main circuit of the DC-DC converter at the current sampling time is calculated based on the virtual reference voltage of the DC-DC converter at the current sampling time, the initial state prediction of the DC-DC converter at the current sampling time, and the steady-state error of the output voltage of the DC-DC converter at the current sampling time. This is the switching control quantity after delay compensation.

6. The control method for the DC-DC converter according to claim 1, characterized in that, Based on the virtual reference voltage of the DC-DC converter at the current sampling time, the initial state prediction of the DC-DC converter at the current sampling time, and the steady-state error of the output voltage of the DC-DC converter at the current sampling time, the switching control quantities of the main circuit of the DC-DC converter at the current sampling time are calculated, including: By combining the following two formulas, the switching control quantity of the main circuit of the DC-DC converter at the current sampling time can be calculated: Where J is the cost function, U dref_v (k+1|k) represents the virtual reference voltage of the DC-DC converter at the current sampling time k. Let λ be the initial state prediction of the DC-DC converter at the current sampling time k. e The error coefficient represents the proportion of the steady-state error in the cost function; e(k|k-1) is the steady-state error of the output voltage of the DC-DC converter at the current sampling time k. D v (k|k-1) represents the switching control quantity of the main circuit of the DC-DC converter at the current sampling time k, L is the inductance value of the output filter inductor of the DC-DC converter, and U i (k-1|k-1) is the input voltage of the DC-DC converter at the previous sampling time k-1, R c It is the equivalent series resistance on the output filter capacitor of the DC-DC converter.

7. The control method for the DC-DC converter according to any one of claims 1 to 6, characterized in that, Based on the switching control quantity of the main circuit of the DC-DC converter at the current sampling time, the duty cycle of the switching transistors in the main circuit of the DC-DC converter is controlled, including: The switching control quantity of the main circuit of the DC-DC converter at the current sampling time is subjected to hysteresis limiting and pulse width modulation to generate the duty cycle for controlling the switching transistors in the main circuit of the DC-DC converter, so as to control the switching transistors in the main circuit of the DC-DC converter according to the generated duty cycle.

8. A control device for a DC-DC converter, characterized in that, The main circuit of the DC-DC converter has a switching transistor; The control device for the DC-DC converter includes: The acquisition unit is configured to acquire the output voltage of the DC-DC converter at each sampling time according to a set sampling period, and to acquire the switching control quantity of the main circuit of the DC-DC converter at the previous sampling time. The control unit is configured to calculate the initial state prediction of the DC-DC converter at the current sampling time based on the output voltage of the DC-DC converter at the previous sampling time and the switching control quantity of the main circuit of the DC-DC converter at the previous sampling time. The storage unit is configured to store the predicted output reference voltage of the DC-DC converter and the predicted initial state of the DC-DC converter at the current sampling time. The control unit is further configured to calculate the steady-state error of the output voltage of the DC-DC converter at the current sampling time based on the predicted output reference voltage of the DC-DC converter and the predicted initial state of the DC-DC converter at the current sampling time. The control unit is further configured to calculate the virtual reference voltage of the DC-DC converter at the current sampling time based on the steady-state error of the output voltage of the DC-DC converter at the current sampling time and the predicted output reference voltage of the DC-DC converter. The control unit is further configured to calculate the switching control quantity of the main circuit of the DC-DC converter at the current sampling time based on the virtual reference voltage of the DC-DC converter at the current sampling time, the initial state prediction of the DC-DC converter at the current sampling time, and the steady-state error of the output voltage of the DC-DC converter at the current sampling time. The control unit is further configured to control the duty cycle of the switching transistors in the main circuit of the DC-DC converter based on the switching control quantity of the main circuit of the DC-DC converter at the current sampling time.

9. A DC-DC converter, characterized in that, include: The control device for the DC-DC converter as described in claim 8.

10. A storage medium, characterized in that, The storage medium includes a stored program, wherein, when the program is executed, it controls the device containing the storage medium to perform the control method of the DC-DC converter according to any one of claims 1 to 7.

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