Impedance testing device and method
By using a digital circuit and range resistor impedance testing device built with an FPGA chip, the problems of slow impedance testing speed and low accuracy in the prior art are solved, realizing fast and accurate impedance testing, which is suitable for integrated circuit automatic testing machines.
Patent Information
- Application Number
- CN202311518347.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2023-11-14
- Publication Date
- 2025-12-26
- Estimated Expiration
- 2043-11-14
AI Technical Summary
Existing impedance testing methods suffer from slow speed and low accuracy. In particular, when using the automatic balancing bridge method, the accuracy is inaccurate when the test frequency exceeds 300KHz, and it is not suitable for automatic integrated circuit testing machines.
The control device, built with a field-programmable gate array (FPGA) chip, combines digital circuits and range resistors to perform impedance testing using a digital automatic balancing bridge method. Switching circuits and power amplifiers are used to improve the test speed and accuracy.
It enables fast and accurate impedance testing, is applicable to various test frequencies, and is suitable for integrated circuit automatic test machines, improving test speed and the stability of calculation results.
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Figure CN117761485B_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present application relates to the technical field of testing, in particular to an impedance testing device and method. BACKGROUND
[0002] The existing impedance testing methods include volt-ampere meter method, bridge method, automatic balance bridge method, radio frequency bridge method, network analysis method and resonance method. The volt-ampere meter method is generally used by a multimeter, and the precision is not high. The resonance method is generally not used for semiconductor testing because of its low testing precision. The bridge method is mainly used for impedance testing in a direct current mode, and is not suitable for semiconductor testing, and is rarely used. The network analysis method is rarely used because the network analyzer is relatively expensive. The radio frequency bridge method is generally used for testing capacitors and is generally used for testing radio frequency devices. For commonly used semiconductor devices such as MOS tubes, IGBTs and SiC devices, the automatic balance bridge method is used.
[0003] When the user needs to use a test frequency exceeding 300 KHz, the analog automatic balance bridge method will cause the testing precision to be inaccurate, and the radio frequency bridge method has a high requirement on the use environment, and an external switch cannot be added to realize the implementation of a relay, and is generally only suitable for radio frequency device measurement. The bridge method is used, and the precision of the testing method is not high, and the testing rate is not high, and is not suitable for use in an automatic test equipment (ATE) for integrated circuits. SUMMARY
[0004] Therefore, the technical problem to be solved by the present application is to solve the problems of slow impedance testing speed and low precision in the prior art, so as to provide an impedance testing device and method.
[0005] To achieve the above-mentioned purpose, the present application provides the following technical scheme:
[0006] In a first aspect, the present application provides an impedance testing device, comprising: a control device, a first signal generator, a second signal generator, a first sampling circuit, a second sampling circuit, a switch circuit and an adjusting circuit, wherein the control device is connected with the input end of the first signal generator at a first end, connected with the first end of the first sampling circuit at a second end, connected with the input end of the second signal generator at a third end, and connected with the first end of the second sampling circuit at a fourth end; the second end of the first sampling circuit is connected with the first end of the switch circuit; the output end of the first signal generator is connected with the first end of the measured power device and the second end of the switch circuit; the second end of the second sampling circuit is connected with the output end of the second signal generator and the first end of the adjusting circuit; the third end of the switch circuit is connected with the second end of the measured power device and the second end of the adjusting circuit; and the control device is a field programmable gate array, which is used for realizing the processing of a digital signal.
[0007] The impedance testing device provided by the application uses a Field-Programmable Gate ARay (FPGA) chip as a control device, carries out impedance testing through a signal source formed by a digital circuit, and realizes faster testing rate, more accurate and stable calculation structure through digital automatic balancing.
[0008] In an alternative embodiment, the adjusting circuit includes a gear resistor.
[0009] The impedance testing device provided by the application only includes a gear resistor in the adjusting circuit, and the second end voltage of the power device under test is adjusted by adjusting the resistance value of the gear resistor, so that the adjusting principle is simple and the equipment cost is low.
[0010] In an alternative embodiment, the switching circuit includes a first switch and a second switch, wherein the first end of the first switch is connected with the second end of the first sampling circuit, and the second end of the first switch is connected with the first end of the power device under test; the first end of the second switch is connected with the second end of the first sampling circuit, and the second end of the second switch is connected with the second end of the power device under test.
[0011] The impedance testing device provided by the application controls the on-off sequence of the two switches to form different independent acquisition circuits, so that the control device can acquire the voltage across the power device under test, the two acquisition circuits do not interfere with each other, and the reliability of the circuit is improved.
[0012] In an alternative embodiment, the impedance testing device further includes a first power amplifier and a second power amplifier, wherein the first end of the first power amplifier is connected with the output end of the first signal generator, and the second end of the first power amplifier is connected with the first end of the power device under test; the first end of the second power amplifier is connected with the output end of the second signal generator, and the second end of the second power amplifier is connected with the first end of the adjusting circuit.
[0013] The impedance testing device provided by the application amplifies the direct current bias voltage and the sine wave alternating current signal through the first power amplifier, and the first power amplifier and the second power amplifier can improve the strength of the signal by amplifying the amplitude and power of the signal, reduce the influence of interference in the circuit on the test result, and improve the precision of impedance testing.
[0014] In a second aspect, the present application provides an impedance testing method applied to the impedance testing device of the first aspect, the method comprising: after the control device obtains the voltage source signal, controlling the first signal generator to generate a signal source based on the voltage source signal; after the control device controls the signal source to excite the power device under test, controlling the switch circuit to switch the switch state, and the control device obtains the first terminal voltage of the power device under test; after the control device controls the second signal generator to generate an adjustment signal based on the first terminal voltage of the power device under test, the control device controls the adjustment circuit to adjust the resistance value based on the adjustment signal, so as to adjust the second terminal voltage of the power device under test; after the control device controls the switch circuit to switch the switch state, the second terminal voltage of the power device under test is obtained; when the second terminal voltage of the power device under test is stabilized to 0V, after the control device obtains the first terminal voltage of the power device under test again, the control device calculates the impedance of the power device under test based on the current voltage value, the resistance value of the adjustment circuit and the first terminal voltage of the power device under test.
[0015] The impedance testing method provided by the present application first calculates the current flowing through the adjustment circuit which is easy to calculate, and then adjusts the second terminal voltage of the power device under test to zero, so that the current flowing through the power device under test is consistent with the current flowing through the adjustment circuit, and finally the impedance of the power device under test is calculated according to the voltage across the power device under test and the known current size. The impedance is quickly processed and calculated in a digital way, and the principle of automatically balancing the bridge by the digital circuit is used, which is suitable for various test frequencies, and has the advantages of fast calculation speed, simple test principle and stable and accurate calculation result.
[0016] In an optional implementation, the process of controlling the first signal generator to generate a signal source based on the voltage source signal comprises: controlling the first signal generator to generate a small signal source based on the voltage source signal; and controlling the first power amplifier to generate the signal source after direct current following and power amplification of the small signal source.
[0017] The first power amplifier can amplify the direct current bias voltage and the sinusoidal signal in the small signal source, so as to reduce the influence of interference in the circuit on the test result and improve the precision of impedance testing.
[0018] In an optional implementation, the small signal source comprises a sinusoidal signal and a direct current bias voltage.
[0019] In an optional implementation, the process of controlling the second signal generator to generate an adjustment signal based on the first terminal voltage of the power device under test comprises: controlling the second signal generator to generate an initial adjustment signal based on the first terminal voltage of the power device under test; and controlling the second power amplifier to generate the adjustment signal after power amplification of the initial adjustment signal.
[0020] In an alternative embodiment, the process of obtaining the first terminal voltage or the second terminal voltage of the power device under test comprises: after the switch state of the switch circuit is switched, the first terminal voltage or the second terminal voltage of the power device under test is obtained by the first sampling circuit.
[0021] In an alternative embodiment, the process of obtaining the impedance of the power device under test based on the current voltage value, the resistance value of the adjusting circuit and the first terminal voltage of the power device under test comprises: the current voltage value and the resistance value of the adjusting circuit are obtained by the second sampling circuit, and the current value of the adjusting circuit is calculated; and the impedance of the power device under test is calculated based on the current value of the adjusting circuit and the first terminal voltage of the power device under test. BRIEF DESCRIPTION OF DRAWINGS
[0022] In order to more clearly illustrate the technical solutions of the embodiments of the present application or the prior art, the drawings needed in the description of the embodiments or the prior art will be briefly introduced. Obviously, the drawings in the following description are some embodiments of the present application, and other drawings can be obtained by those skilled in the art without creative effort.
[0023] Figure 1 is a block diagram of a specific example of an impedance testing device according to an embodiment of the present application;
[0024] Figure 2 is a block diagram of another specific example of an impedance testing device according to an embodiment of the present application;
[0025] Figure 3 is a flowchart of a specific example of an impedance testing method according to an embodiment of the present application. DETAILED DESCRIPTION
[0026] The technical solutions of the present application will be described in detail below with reference to the drawings. Obviously, the described embodiments are some embodiments of the present application, not all embodiments. Based on the embodiments of the present application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present application.
[0027] In the description of the present application, it should be noted that the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer" and the like indicate the orientation or positional relationship shown in the drawings, and are only for the convenience of describing the present application and simplifying the description, and do not indicate or imply that the device or element referred to must have a particular orientation, be constructed and operated in a particular orientation, and therefore cannot be understood as a limitation on the present application. In addition, the terms "first", "second", "third" are only for descriptive purposes and cannot be understood as indicating or implying relative importance.
[0028] In the description of the present application, it should be noted that unless otherwise explicitly specified and limited, the terms "mounting", "connecting", "connecting" should be understood broadly, for example, it can be fixedly connected, or it can be detachably connected, or integrally connected; it can be mechanically connected, or it can be electrically connected; it can be directly connected, or it can be indirectly connected through an intermediate medium; it can be the internal communication of two elements, it can be wireless connection, or it can be wired connection. For those skilled in the art, the specific meaning of the above terms in the present application can be understood according to the specific circumstances.
[0029] In addition, the technical features involved in the different embodiments of the application described below can be combined with each other as long as there is no conflict between them.
[0030] The present embodiment provides an impedance test device, as shown in Figure 1 It comprises a control device 1, a first signal generator 2, a second signal generator 3, a first sampling circuit 4, a second sampling circuit 5, a switch circuit 6 and an adjusting circuit 7.
[0031] As shown in Figure 1 The control device 1, the first end of which is connected with the input end of the first signal generator 2, the second end of which is connected with the first end of the first sampling circuit 4, the third end of which is connected with the input end of the second signal generator 3, and the fourth end of which is connected with the first end of the second sampling circuit 5; the second end of the first sampling circuit 4 is connected with the first end of the switch circuit 6; the output end of the first signal generator 2 is connected with the first end of the power device DUT to be tested and the second end of the switch circuit 6; the second end of the second sampling circuit 5 is connected with the output end of the second signal generator 3 and the first end of the adjusting circuit 7; the third end of the switch circuit 6 is connected with the second end of the power device DUT to be tested and the second end of the adjusting circuit 7; the control device 1 is a field programmable gate array, which is used to realize the processing of digital signal.
[0032] Specifically, as shown in Figure 1As shown, the embodiment utilizes the control device 1, the first signal generator 2, the second signal generator 3, the first sampling circuit 4, the second sampling circuit 5, the switching circuit 6, and the adjusting circuit 7 to implement the following impedance testing method:
[0033] (1) After the control device 1 obtains the voltage source signal Vref, the control device 1 controls the first signal generator 2 to generate a signal source based on the voltage source signal Vref; (2) After the control device 1 controls the signal source to excite the power device DUT to be tested, the control device 1 controls the switching circuit 6 to switch the switching state, so that the circuit between the first sampling circuit 4 and the first end of the power device DUT to be tested is turned on, and then the control device 1 obtains the first end voltage V x of the power device DUT to be tested; (3) After the control device 1 controls the second signal generator 3 to generate an adjusting signal based on the first end voltage V x of the power device DUT to be tested, the control device 1 controls the adjusting circuit 7 to adjust the resistance value based on the adjusting signal, so as to adjust the second end voltage V g of the power device DUT to be tested; (4) After the control device 1 controls the switching circuit 6 to switch the switching state, so that the circuit between the first sampling circuit 4 and the second end of the power device DUT to be tested is turned on, the control device 1 obtains the second end voltage of the power device DUT to be tested; (5) When the second end voltage of the power device DUT to be tested is stabilized to 0V, the control device 1 obtains the first end voltage V x of the power device DUT to be tested again, and then the control device 1 obtains the voltage value and the resistance value of the adjusting circuit 7 through the second sampling circuit 5, and calculates the impedance of the power device DUT to be tested based on the current voltage value and the resistance value of the adjusting circuit 7 and the first end voltage V x of the power device DUT to be tested.
[0034] The impedance testing device provided by the embodiment uses the FPGA chip as the control device, and uses the digital circuit to form the signal source for impedance testing. The digital automatic balancing makes the testing rate faster, and the calculation structure more accurate and stable.
[0035] In some optional embodiments, as shown in Figure 2 , the adjusting circuit 7 includes a gear resistor R.
[0036] Specifically, as shown in Figure 2 , the gear resistor R is used for voltage division, so as to adjust the size of the second end voltage V g of the power device DUT to be tested.
[0037] In some optional embodiments, as shown in Figure 2As shown, the switching circuit 6 includes a first switch K1 and a second switch K2. The first switch K1 has its first end connected to the second end of the first sampling circuit 4 and its second end connected to the first end of the power device under test (DUT). The second switch K2 has its first end connected to the second end of the first sampling circuit 4 and its second end connected to the second end of the power device under test (DUT).
[0038] Specifically, such as Figure 2 As shown, when the first switch K1 is closed, the first sampling circuit 4 collects the first terminal voltage Vx of the power device under test (DUT) and sends it to the control device 1; when the second switch K2 is closed, the first sampling circuit 4 collects the second terminal voltage Vx of the power device under test (DUT). g Send to control device 1.
[0039] In some alternative implementations, such as Figure 2 As shown, the impedance testing device further includes: a first power amplifier 8 and a second power amplifier 9, wherein the first power amplifier 8 has its first end connected to the output end of the first signal generator 2 and its second end connected to the first end of the power device under test (DUT); the second power amplifier 9 has its first end connected to the output end of the second signal generator 3 and its second end connected to the first end of the adjustment circuit 7.
[0040] Specifically, such as Figure 2 As shown, both the first power amplifier 8 and the second power amplifier 9 are used to amplify the input signal. The small signal source generated by the first signal generator 2 includes a sine wave signal and a DC bias voltage. The first power amplifier 8 includes a DC follower and an AC power amplifier. After the DC follower and the AC power amplifier amplify the DC bias voltage and the sine wave signal respectively, they send the DC bias voltage and the sine wave signal with greater power to the first terminal of the power device under test (DUT), thereby exciting the DUT.
[0041] This embodiment provides an impedance testing method, applicable to the impedance testing apparatus of the above embodiments and any of their optional implementations, such as... Figure 3 As shown, the method includes:
[0042] Step S1: After the control device acquires the voltage source signal, it controls the first signal generator to generate a signal source based on the voltage source signal.
[0043] Specifically, step S1 includes: (1) controlling the first signal generator to generate a small signal source based on the voltage source signal; (2) controlling the first power amplifier to perform DC following and power amplification on the small signal source to generate a signal source.
[0044] Specifically, such as Figure 2As shown, the control device 1 generates a small signal source required for testing according to the precision voltage source Vref and the first signal generator 2, wherein the small signal source comprises a sine wave signal and a DC bias voltage. The first power amplifier 8 generates a signal source after power amplifying the sine wave signal and the DC bias voltage.
[0045] Step S2: After the control device controls the signal source to excite the power device under test, the control device acquires the first end voltage of the power device under test by controlling the switch circuit to switch the switch state.
[0046] Specifically, as shown in Figure 2 , after the control device 1 controls the signal source to excite the power device under test DUT, the first end of the power device under test DUT generates a voltage V x , and the control device 1 controls the first switch K1 to be closed, the first sampling circuit 4 collects the first end voltage V x of the power device under test DUT and converts it into a digital signal, and then the control device 1 receives the digital mode first end voltage V x of the power device under test DUT and stores it.
[0047] Step S3: After the control device controls the second signal generator to generate an adjustment signal based on the first end voltage of the power device under test, the control device controls the adjustment circuit to adjust the resistance value based on the adjustment signal, so as to adjust the second end voltage of the power device under test.
[0048] Specifically, step S3 comprises: (1) controlling the second signal generator to generate an initial adjustment signal based on the first end voltage of the power device under test; (2) controlling the second power amplifier to generate an adjustment signal after power amplifying the initial adjustment signal.
[0049] Specifically, as shown in Figure 2 , the control device 1 generates an initial adjustment signal in the form of a sine wave that can make the second end voltage V g of the power device under test DUT be 0 potential based on the first end voltage V x of the power device under test DUT through the second signal generator 3, and then generates an adjustment signal in the form of a sine wave with a certain phase after power amplifying the initial adjustment signal through the second power amplifier 9, so as to improve the anti-interference ability of the initial adjustment signal. The resistance R adjusts the resistance value according to the adjustment signal, and makes the second end voltage V g of the DUT be 0 potential through voltage division.
[0050] Step S4: After the control device controls the switch circuit to switch the switch state, the second end voltage of the power device under test is acquired.
[0051] Specifically, as shown in Figure 2As shown, control device 1 controls the second switch K2 to close, and the first sampling circuit 4 acquires the second terminal voltage V of the power device under test (DUT). g After being converted into a digital signal, control device 1 receives and detects V at this time. g Is it 0? If V g If the voltage is not equal to 0V, then control device 1 adjusts the initial adjustment signal multiple times using an algorithm, thereby adjusting the resistance value of the range resistor R, and then repeatedly acquiring the second terminal voltage V of the power device under test (DUT). g Until the voltage V at the second terminal of the power device under test (DUT) is determined. g It equals 0V.
[0052] Step S5: When the voltage at the second terminal of the power device under test stabilizes at 0V, the control device acquires the voltage at the first terminal of the power device under test again. Based on the current voltage and resistance values of the adjustment circuit and the voltage at the first terminal of the power device under test, the control device calculates the impedance of the power device under test.
[0053] Specifically, step S5 includes: (1) obtaining the current voltage and resistance of the adjustment circuit through the second sampling circuit, and calculating the current current of the adjustment circuit; (2) calculating the impedance of the power device under test based on the current current of the adjustment circuit and the first terminal voltage of the power device under test.
[0054] Specifically, such as Figure 2 As shown, when the voltage at the second terminal of the power device under test (DUT) stabilizes at 0V, the control device 1 obtains the voltage V at the first terminal of the range resistor R at this time through the second sampling circuit 5. r Simultaneously, the first terminal voltage V of the power device under test (DUT) is obtained through the first sampling circuit 4. x Because at this time the voltage V at the second terminal of the power device DUT is... g If the voltage is equal to 0V, then the voltage at the second terminal of the power device under test and the voltage at the second terminal of the range resistor R are both 0. Therefore, the current I in the power device under test (DUT) is... x The current I flowing to 0 potential is equivalent to the current in the range resistor R. r The flow is directed to 0 potential. This is due to the resistance R of the range indicator. r If this is known, then the current I flowing through the range resistor R at this time is... r for
[0055]
[0056] The impedance Z of the power device under test (DUT) x for
[0057]
[0058] Because the current I flowing through the power device under test (DUT)x = I r , then the impedance of the power device under test DUT
[0059]
[0060] where V r , V x , I x and I r are complex numbers, the real and imaginary parts of Z x are the resistance R g and capacitance C g of the control terminal of the power device under test, respectively.
[0061] Although the embodiments of the present application have been described with reference to the drawings, various modifications and changes can be suggested to one skilled in the art, and it is intended that the appended claims encompass such modifications and changes as fall within the scope of the present application.
Claims
1. An impedance testing device, characterized in that, include: The control device comprises a first signal generator, a second signal generator, a first sampling circuit, a second sampling circuit, a switching circuit, and an adjustment circuit, wherein... The control device has a first end connected to the input end of the first signal generator, a second end connected to the first end of the first sampling circuit, a third end connected to the input end of the second signal generator, and a fourth end connected to the first end of the second sampling circuit. A first sampling circuit, the second terminal of which is connected to the first terminal of the switching circuit; a first signal generator, the output terminal of which is connected to the first terminal of the power device under test and the second terminal of the switching circuit; The second sampling circuit has its second terminal connected to the output terminal of the second signal generator and the first terminal of the adjustment circuit. A switching circuit, the third terminal of which is connected to the second terminal of the power device under test and the second terminal of the adjustment circuit; The control device is a field-programmable gate array (FPGA), which is used to process digital signals. After acquiring the voltage source signal, the control device controls the first signal generator to generate a signal source based on the voltage source signal. After the control device controls the signal source to excite the power device under test, the control switch circuit switches the switching state, and the control device obtains the first terminal voltage of the power device under test. After the control device controls the second signal generator to generate an adjustment signal based on the first terminal voltage of the power device under test, the control device controls the adjustment circuit to adjust the resistance value based on the adjustment signal, thereby adjusting the second terminal voltage of the power device under test. After the control device controls the switching circuit to switch the switching state, it obtains the second terminal voltage of the power device under test; When the voltage at the second terminal of the power device under test stabilizes to 0V, the control device acquires the voltage at the first terminal of the power device under test again. Based on the current voltage and resistance values of the adjustment circuit and the voltage at the first terminal of the power device under test, the control device calculates the impedance of the power device under test.
2. The impedance testing device according to claim 1, characterized in that, The adjustment circuit includes a range resistor.
3. The impedance testing device according to claim 2, characterized in that, The switching circuit includes: a first switch and a second switch, wherein... A first switch, the first end of which is connected to the second end of the first sampling circuit, and the second end of which is connected to the first end of the power device under test; The second switch has its first end connected to the second end of the first sampling circuit, and its second end connected to the second end of the power device under test.
4. The impedance testing device according to claim 3, characterized in that, Also includes: The first power amplifier and the second power amplifier, wherein... A first power amplifier, the first end of which is connected to the output end of the first signal generator, and the second end of which is connected to the first end of the power device under test; The second power amplifier has its first end connected to the output of the second signal generator and its second end connected to the first end of the adjustment circuit.
5. An impedance testing method, characterized in that, The method, applied to the impedance testing apparatus of claim 4, comprises: After acquiring the voltage source signal, the control device controls the first signal generator to generate a signal source based on the voltage source signal; After the control device controls the signal source to excite the power device under test, the control switch circuit switches the switching state, and the control device obtains the first terminal voltage of the power device under test. After the control device controls the second signal generator to generate an adjustment signal based on the first terminal voltage of the power device under test, the control device controls the adjustment circuit to adjust the resistance value based on the adjustment signal, thereby adjusting the second terminal voltage of the power device under test. After the control device controls the switching circuit to switch the switching state, it obtains the second terminal voltage of the power device under test; When the voltage at the second terminal of the power device under test stabilizes to 0V, the control device acquires the voltage at the first terminal of the power device under test again. Based on the current voltage and resistance values of the adjustment circuit and the voltage at the first terminal of the power device under test, the control device calculates the impedance of the power device under test.
6. The impedance testing method according to claim 5, characterized in that, The process of controlling the first signal generator to generate a signal source based on the voltage source signal includes: The first signal generator is controlled based on the voltage source signal to generate a small signal source; The first power amplifier is controlled to perform DC following and power amplification on the small signal source to generate a signal source.
7. The impedance testing method according to claim 6, characterized in that, The small signal source includes a sine wave signal and a DC bias voltage.
8. The impedance testing method according to claim 5, characterized in that, The process of controlling the second signal generator to generate an adjustment signal based on the first terminal voltage of the power device under test includes: The second signal generator is controlled to generate an initial adjustment signal based on the first terminal voltage of the power device under test; The initial adjustment signal is amplified by controlling the second power amplifier to generate the adjustment signal.
9. The impedance testing method according to claim 5, characterized in that, The process of acquiring the first terminal voltage or the second terminal voltage of the power device under test includes: After the control switch circuit switches the switch state, the first terminal voltage or the second terminal voltage of the power device under test is obtained through the first sampling circuit.
10. The impedance testing method according to claim 5, characterized in that, The process of calculating the impedance of the power device under test based on the current voltage and resistance values of the adjustment circuit and the first terminal voltage of the power device under test includes: The current voltage and resistance values of the regulating circuit are obtained through the second sampling circuit, and the current value of the regulating circuit is calculated. Based on the current value of the adjustment circuit and the first terminal voltage of the power device under test, the impedance of the power device under test is calculated.
Citation Information
Patent Citations
Enhanced automatic balance bridge and method for realizing impedance measurement
CN105548710A