An open circuit inductance current simulation circuit

Abstract

An open circuit inductance current simulation circuit is disclosed. A current sensing circuit senses a current at a first terminal of a lower bridge switch to output a current sensing signal. A simulation control circuit outputs a plurality of charging current signals according to current values at a plurality of rising wave segments of the current sensing signal. The simulation control circuit outputs a plurality of discharging current signals according to current values at a plurality of falling wave segments of the current sensing signal. A charging and discharging circuit generates a plurality of charging currents according to the plurality of charging current signals. The charging and discharging circuit generates a plurality of discharging currents according to the plurality of discharging current signals. The charging and discharging circuit alternately outputs the plurality of charging currents and the plurality of discharging currents to a capacitor to charge and discharge the capacitor multiple times to achieve the purpose of simulating inductance current.

Description

Technical Field

[0001] This invention relates to a power converter, and more particularly to an open-circuit inductor current simulation circuit suitable for power converters. Background Technology

[0002] For electronic devices, power converters are indispensable devices used to regulate power and supply the regulated power to the electronic devices. The upper and lower bridge switches of the power converter must be switched according to data such as voltage or current of the power converter's circuit components to provide appropriate power to the electrical devices connected to the power converter's output. However, the inductor current detected by the existing power converter's detection circuit is inaccurate and not real-time, and needs to be calibrated. Summary of the Invention

[0003] The technical problem to be solved by this invention is to provide an open-circuit inductor current simulation circuit, suitable for power converters, addressing the shortcomings of existing technologies. The power converter includes a drive circuit, an upper bridge switch, a lower bridge switch, an inductor, and an output capacitor. The output terminal of the drive circuit is connected to the control terminals of the upper and lower bridge switches. The first terminal of the upper bridge switch is coupled to the input voltage. The second terminal of the upper bridge switch is connected to the first terminal of the lower bridge switch. The second terminal of the lower bridge switch is grounded. The node between the second terminal of the upper bridge switch and the first terminal of the lower bridge switch is connected to the first terminal of the inductor. The second terminal of the inductor is connected to the first terminal of the output capacitor. The second terminal of the output capacitor is grounded. The inductor current simulation circuit includes a current sensing circuit, a simulation control circuit, and a charging / discharging circuit. The current sensing circuit is connected to the first terminal of the lower bridge switch. The current sensing circuit is configured to sense the current at the first terminal of the lower bridge switch and output a current sensing signal. The current sensing signal has multiple waveforms and multiple bands, including multiple rising bands and multiple falling bands. The simulation control circuit is connected to the current sensing circuit. The simulation control circuit is configured to generate multiple charging current signals based on multiple current values ​​on multiple rising bands of the current sensing signal. The simulation control circuit is also configured to generate multiple discharging current signals based on multiple falling bands of the current sensing signal. A charging / discharging circuit connects the simulation control circuit to the first terminal of a capacitor. The second terminal of the capacitor is grounded. The charging / discharging circuit is configured to generate multiple charging currents based on the multiple charging current signals. The charging / discharging circuit alternately outputs multiple charging currents and multiple discharging currents to the capacitor to perform multiple charging and discharging cycles. The current signal of the capacitor after charging and discharging is the simulated inductor current signal.

[0004] In this embodiment, the inductor current simulation circuit further includes an initial control circuit. The simulation control circuit outputs an initial signal to the initial control circuit based on the trough current of the current sensing signal. The initial control circuit transmits the initial signal output by the simulation control circuit to the capacitor to pull the voltage signal of the capacitor to the trough voltage.

[0005] In this embodiment, the initial control circuit includes a switching component. The first terminal of the switching component is connected to the output terminal of the simulation control circuit. The second terminal of the switching component is connected to the first terminal of a capacitor. The control terminal of the switching component receives a trough-time pulse signal from an external source. The switching component turns on or off according to the level of this trough-time pulse signal.

[0006] In this embodiment, the simulation control circuit includes a sample-and-hold circuit. The sample-and-hold circuit is configured to sample and hold multiple current values ​​across multiple bands of the current sensing signal.

[0007] In this embodiment, the multiple current values ​​held by the sampling and holding circuit include one or more trough values ​​on multiple bands of the current sensing signal.

[0008] In this embodiment, the sampling and holding circuit holds multiple current values ​​including the current value of the current sensing signal when the current time reaches half the time when the lower bridge switch is turned on.

[0009] In this embodiment, the simulation control circuit further includes a sensing current difference calculation circuit. The sensing current difference calculation circuit is connected to the sampling and holding circuit. The sensing current difference calculation circuit is configured to calculate a current difference value as the difference between a first current value at a first time point and a second current value at a second time point for each band of the current sensing signal held by the sampling and holding circuit.

[0010] In this embodiment, the simulation control circuit further includes a ramp current calculation circuit. The ramp current calculation circuit is configured to calculate a time difference between a second time point and a first time point for each band of the current sensing signal. Based on the current difference and time difference in each band, the ramp current calculation circuit calculates the slope and current value of each band of the current sensing signal.

[0011] In this embodiment, the ramp current calculation circuit outputs a charging current signal based on the slope and current value of each rising segment of the current sensing signal. The ramp current calculation circuit outputs a discharging current signal based on the slope and current value of each falling segment of the current sensing signal.

[0012] In this embodiment, the charging and discharging circuit includes a first charging current mirror. The input terminal of the first charging current mirror is connected to the output terminal of the simulation control circuit to receive the charging current signal. The output terminal of the first charging current mirror is connected to the first terminal of a capacitor.

[0013] In this embodiment, the charging and discharging circuit further includes a second charging current mirror. The input terminal of the second charging current mirror is connected to the output terminal of the first charging current mirror. The output terminal of the second charging current mirror is connected to the first terminal of the capacitor.

[0014] In this embodiment, the charging and discharging circuit further includes a charging switch. The first terminal of the charging switch is connected to the output terminal of the second charging current mirror. The second terminal of the charging switch is connected to the first terminal of the capacitor. The control terminal of the charging switch is connected to a drive circuit. The drive circuit activates the charging switch during the time the upper bridge switch is open.

[0015] In this embodiment, the first charging current mirror includes a first transistor and a second transistor. The first terminal of the first transistor is connected to the output terminal of the simulation control circuit, the control terminal of the first transistor, and the control terminal of the second transistor. The first terminal of the second transistor is connected to the input terminal of the second charging current mirror. The second terminals of both the first and second transistors are grounded.

[0016] In this embodiment, the second charging current mirror includes a third transistor and a fourth transistor. The first terminals of the third transistor and the fourth transistor are coupled to a shared voltage. The second terminal of the third transistor is connected to the first terminal of the second transistor, the control terminal of the third transistor, and the control terminal of the fourth transistor. The second terminal of the fourth transistor is connected to the first terminal of the charging switch.

[0017] In this embodiment, the charging and discharging circuit includes a first discharge current mirror. The input terminal of the first discharge current mirror is connected to the output terminal of the simulation control circuit to receive the discharge current signal. The output terminal of the first discharge current mirror is connected to the first terminal of a capacitor.

[0018] In this embodiment, the charging and discharging circuit further includes a discharge switch. The first terminal of the discharge switch is connected to the output terminal of the first discharge current mirror. The second terminal of the discharge switch is connected to the first terminal of the capacitor. The control terminal of the discharge switch is connected to a drive circuit. The drive circuit activates the discharge switch during the time the lower bridge switch is open.

[0019] In this embodiment, the first discharge current mirror includes a first transistor and a second transistor. The first terminal of the first transistor is connected to the output terminal of the simulation control circuit, the control terminal of the first transistor, and the control terminal of the second transistor. The first terminal of the second transistor is connected to the first terminal of the discharge switch. The second terminals of both the first and second transistors are grounded.

[0020] As described above, the present invention provides an open-circuit inductor current simulation circuit, which adopts a circuit architecture different from the detection circuit of a traditional power converter to detect multiple current values ​​in the rising and falling segments of multiple waveforms of the current sensing signal of the lower bridge switch of the power converter, and accurately and quickly simulates complete information of the inductor current based on these detected current values.

[0021] To further understand the features and technical content of the present invention, please refer to the following detailed description and drawings of the present invention. However, the drawings provided are for reference and illustration only and are not intended to limit the present invention. Attached Figure Description

[0022] Figure 1 This is a block diagram of the open-circuit inductor current simulation circuit of the first embodiment of the present invention.

[0023] Figure 2 This is a block diagram of the simulation control circuit of the open-circuit inductor current simulation circuit according to the second embodiment of the present invention.

[0024] Figure 3 This is a waveform diagram of the current sensing signal sensed by the current sensing circuit of the open-circuit inductor current simulation circuit according to the second embodiment of the present invention.

[0025] Figure 4 This is a block diagram of the charging and discharging circuit of the open-circuit inductor current simulation circuit according to the third embodiment of the present invention.

[0026] Figure 5 This is a block diagram of the initial control circuit of the open-circuit inductor current simulation circuit according to the fourth embodiment of the present invention.

[0027] Figure 6 The waveforms of the inductor current sensed, the simulated voltage signal, and the default voltage signal are shown in the first to fourth embodiments of the present invention using an open-circuit inductor current simulation circuit.

[0028] Figure 7 for Figure 6 The enlarged view of the waveform enclosed by line A in the image.

[0029] Figure 8 for Figure 6 The enlarged view of the waveform framed by line B.

[0030] Figure 9 The waveforms are shown for the inductor current sensed by the open-circuit inductor current simulation circuit, the simulated voltage signal, the default voltage signal, and the voltage signal simulated by the conventional inductor current simulation circuit in the first to fourth embodiments of the present invention. Detailed Implementation

[0031] The following specific embodiments illustrate the implementation of the present invention. Those skilled in the art can understand the advantages and effects of the present invention from the content disclosed in this specification. The present invention can be implemented or applied through other different specific embodiments, and various details in this specification can also be modified and changed based on different viewpoints and applications without departing from the concept of the present invention. Furthermore, the accompanying drawings of the present invention are for simple illustrative purposes only and are not depictions of actual dimensions, as stated in advance. The following embodiments will further describe the relevant technical content of the present invention in detail, but the disclosed content is not intended to limit the scope of protection of the present invention. In addition, the term "or" as used herein may, depending on the actual situation, include any combination of any one or more of the associated listed items.

[0032] Please see Figure 1 This is a block diagram of the open-circuit inductor current simulation circuit of the first embodiment of the present invention.

[0033] The inductor current simulation circuit of this invention is suitable for simulating the current of the inductor L of a power converter, i.e. Figure 1 The voltage signal corresponding to the inductor current IL is shown.

[0034] The power converter includes a driver circuit 10, an upper bridge switch UG, a lower bridge switch LG, an inductor L, and an output capacitor Cout. The output terminal of the driver circuit 10 is connected to the control terminals of the upper bridge switch UG and the lower bridge switch LG. The first terminal of the upper bridge switch UG is coupled to the input voltage VIN. The second terminal of the upper bridge switch UG is connected to the first terminal of the lower bridge switch LG. The second terminal of the lower bridge switch LG is grounded.

[0035] The node LX between the second terminal of the upper bridge switch UG and the first terminal of the lower bridge switch LG is connected to the first terminal of the inductor L. The second terminal of the inductor L is connected to the first terminal of the output capacitor Cout. The second terminal of the output capacitor Cout is grounded. The voltage at the node between the second terminal of the inductor L and the first terminal of the output capacitor Cout is the output voltage VOUT of the power converter.

[0036] It is worth noting that the inductor current simulation circuit in this embodiment of the invention may include a current sensing circuit 20, a simulation control circuit 30, and a charging / discharging circuit 40. If necessary, the inductor current simulation circuit may further include an initial control circuit 50.

[0037] The input terminal of the current sensing circuit 20 is connected to the first terminal of the lower bridge switch LG. The output terminal of the current sensing circuit 20 is connected to the input terminal of the simulation control circuit 30. The output terminal of the simulation control circuit 30 is connected to the input terminals of the charging / discharging circuit 40 and the initial control circuit 50. The output terminals of the charging / discharging circuit 40 and the initial control circuit 50 are connected to the first terminal of the capacitor Cm. The second terminal of the capacitor Cm is grounded.

[0038] First, the current sensing circuit 20 senses the current at the first terminal of the lower bridge switch LG to output a current sensing signal Isen. The current sensing signal Isen has multiple waveforms and multiple bands, including multiple rising bands and multiple falling bands.

[0039] The simulation control circuit 30 outputs multiple charging current signals Ichg based on multiple current values ​​on multiple rising bands of the current sensing signal Isen received from the current sensing circuit 20. The simulation control circuit 30 also outputs multiple discharging current signals Idischg based on multiple falling bands of the current sensing signal Isen received from the current sensing circuit 20.

[0040] The charging / discharging circuit 40 generates multiple charging currents based on multiple charging current signals Ichg received from the simulation control circuit 30. The charging / discharging circuit 40 also generates multiple discharging currents based on multiple discharging current signals Idischg received from the simulation control circuit 30. The charging / discharging circuit 40 alternately outputs the multiple charging currents and multiple discharging currents to the capacitor Cm to perform multiple charging and discharging cycles on the capacitor Cm. The voltage signal of the capacitor Cm after multiple charging and discharging cycles is an actual simulated voltage signal generated by the inductor current simulation circuit of this invention based on the inductor current IL of the power converter.

[0041] Whenever the charging / discharging circuit 40 provides a discharge current to the capacitor Cm based on the discharge current signal Idischg, causing the voltage signal of capacitor Cm to reach the trough value of the inductor current IL, the simulation control circuit 30 can output an initial signal Vinit to the initial control circuit 50 based on the trough current of the discharge current signal Idischg. The initial control circuit 50 transmits the initial signal Vinit output by the simulation control circuit 30 to the capacitor Cm to pull the voltage signal of capacitor Cm to a trough voltage. In this way, the inductor current simulation circuit of the present invention can more smoothly generate an actual simulated voltage signal based on the inductor current IL of the power converter.

[0042] Please see Figure 2 and Figure 3 ,in Figure 2 This is a block diagram of the simulation control circuit of the open-circuit inductor current simulation circuit according to the second embodiment of the present invention. Figure 3 This is a waveform diagram of the current sensing signal sensed by the current sensing circuit of the open-circuit inductor current simulation circuit according to the second embodiment of the present invention.

[0043] The inductor current simulation circuit of the present invention may include, for example: Figure 2 The simulation control circuit 30 is shown. (For example...) Figure 1The configuration of the simulation control circuit 30 shown can be compared with, for example... Figure 2 The configuration of the simulation control circuit 30 shown is the same; this is only an example and is not intended to limit the invention.

[0044] like Figure 2 As shown, the simulation control circuit 30 may include a sample and hold circuit 301, a sensed current difference calculation circuit 302, and a ramp current calculation circuit 303. In practice, the sensed current difference calculation circuit 302 and the ramp current calculation circuit 303 may be integrated into a single calculation circuit. If necessary, the simulation control circuit 30 may also include a first resistor R1.

[0045] The sampling and holding circuit 301 of the simulation control circuit 30 is connected to the current sensing circuit 20 and the sensing current difference calculation circuit 302 of the simulation control circuit 30, and can also be connected to the initial control circuit 50 and the first terminal of the first resistor R1. The second terminal of the first resistor R1 is grounded. The ramp current calculation circuit 303 of the simulation control circuit 30 is connected to the sensing current difference calculation circuit 302 of the simulation control circuit 30, and is also connected to the charging and discharging circuit 40.

[0046] The sampling and holding circuit 301 of the simulation control circuit 30 can be a single circuit, or it can contain multiple sampling and holding circuits, such as, but not limited to, those mentioned above. Figure 2 The first sampling and holding circuit 31, the second sampling and holding circuit 32, the third sampling and holding circuit 33, the fourth sampling and holding circuit 34, and the fifth sampling and holding circuit 35 are shown.

[0047] The sensing current difference calculation circuit 302 of the simulation control circuit 30 can be a single circuit, or it can include multiple arithmetic operators, such as, but not limited to, those mentioned above. Figure 2 The first arithmetic unit 321 and the second arithmetic unit 322 are shown.

[0048] The ramp current calculation circuit 303 of the simulation control circuit 30 can be a single circuit, or it can contain multiple ramp current calculation circuits, for example, but not limited to... Figure 2 The first ramp current calculation circuit 331 and the second ramp current calculation circuit 332 are shown.

[0049] like Figure 2 As shown, the first sampling and holding circuit 31, the second sampling and holding circuit 32, the third sampling and holding circuit 33, the fourth sampling and holding circuit 34, and the fifth sampling and holding circuit 35 of the simulation control circuit 30 are all connected to the current sensing circuit 20.

[0050] Within the simulation control circuit 30, the first sampling and holding circuit 31 and the second sampling and holding circuit 32 of the sampling and holding circuit 301 are connected to the first arithmetic unit 321 of the sensing current difference calculation circuit 302. The first arithmetic unit 321 is connected to the first ramp current calculation circuit 331 of the ramp current calculation circuit 303. The first ramp current calculation circuit 331 of the ramp current calculation circuit 303 of the simulation control circuit 30 is connected to the charging and discharging circuit 40.

[0051] Within the simulation control circuit 30, the third sampling and holding circuit 33 and the fourth sampling and holding circuit 34 of the sampling and holding circuit 301 are connected to the second arithmetic unit 322 of the sensing current difference calculation circuit 302. The second arithmetic unit 322 is connected to the second ramp current calculation circuit 332 of the ramp current calculation circuit 303. The second ramp current calculation circuit 332 of the ramp current calculation circuit 303 of the simulation control circuit 30 is connected to the charging and discharging circuit 40.

[0052] The fifth sample and hold circuit 35 of the sampling and hold circuit 301 of the simulation control circuit 30 is connected to the first terminal of the first resistor R1. The initial control circuit 50 can be connected to the first terminal of the first resistor R1 or directly connected to the fifth sample and hold circuit 35.

[0053] First, the third sample and hold circuit 33 of the sampling and hold circuit 301 of the simulation control circuit 30 can sample and hold a current value at a certain time point on each falling segment of multiple waveforms of the current sensing signal Isen as the first current value at the first time point, for example, but not limited to, at the time point when the current sensing signal Isen reaches a certain value. Figure 1 When the lower bridge switch LG is open for half the time shown, as Figure 3 The current value I1 of the current sensing signal Isen is shown.

[0054] The fourth sample and hold circuit 34 of the sampling and hold circuit 301 of the simulation control circuit 30 can sample and hold a current value at another time point on each falling segment of multiple waveforms of the current sensing signal Isen as a second current value at a second time, for example, but not limited to, such as Figure 3 The trough current value I2 of the current sensing signal Isen is shown.

[0055] The second arithmetic unit 322 of the sensing current difference calculation circuit 302 of the simulation control circuit 30 calculates the difference between the first current value at the first time point and the second current value at the second time point on each falling band of the current sensing signal Isen as a current difference value.

[0056] The second ramp current calculation circuit 332 of the ramp current calculation circuit 303 of the simulation control circuit 30 calculates the time difference between the second time point and the first time point of each falling band of the current sensing signal Isen.

[0057] The second ramp current calculation circuit 332 of the ramp current calculation circuit 303 of the simulation control circuit 30 calculates the slope and current value of each ramp of the current sensing signal Isen based on the current difference and time difference on each ramp.

[0058] The second ramp current calculation circuit 332 of the ramp current calculation circuit 303 of the simulation control circuit 30 outputs multiple discharge current signals Idischg to the charge / discharge circuit 40 based on the slope and current value of multiple falling bands of the current sensing signal Isen. The charge / discharge circuit 40 generates multiple discharge currents based on the multiple discharge current signals Idischg.

[0059] The first sampling and holding circuit 31 of the sampling and holding circuit 301 of the simulation control circuit 30 can sample and hold a current value at a certain time point on each rising wave of multiple waveforms of the current sensing signal Isen as the first current value at the first time, for example, but not limited to, the current value of the current sensing signal Isen when the lower bridge switch LG is turned on at half the time.

[0060] The second sampling and holding circuit 32 of the sampling and holding circuit 301 of the simulation control circuit 30 can sample and hold a current value at another time point on each rising segment of multiple waveforms of the current sensing signal Isen as a second current value at the second time point, such as, but not limited to, the trough current value of the current sensing signal Isen.

[0061] The first arithmetic unit 321 of the sensing current difference calculation circuit 302 of the simulation control circuit 30 calculates the difference between the first current value at the first time point and the second current value at the second time point for each rising band of the current sensing signal Isen as a current difference value.

[0062] The first ramp current calculation circuit 331 of the ramp current calculation circuit 303 of the simulation control circuit 30 calculates a time difference between the second time point and the first time point of each rising wave of the current sensing signal Isen.

[0063] The first ramp current calculation circuit 331 of the ramp current calculation circuit 303 of the simulation control circuit 30 calculates the slope and current value of each ramp of the current sensing signal Isen based on the current difference and time difference on each ramp.

[0064] The first ramp current calculation circuit 331 of the ramp current calculation circuit 303 of the simulation control circuit 30 outputs multiple charging current signals Ichg to the charging and discharging circuit 40 based on the slope and current value of multiple rising bands of the current sensing signal Isen. The charging and discharging circuit 40 generates multiple charging currents based on the multiple charging current signals Ichg.

[0065] In other words, the second ramp current calculation circuit 332 of the ramp current calculation circuit 303 of the simulation control circuit 30 can execute the following equations:

[0066] Toff = Ts × (VIN - VOUT) / VIN;

[0067] |FS|=[(It1-It2)] / (Toff / 2)=2×[(It1-It2)]×VIN / [Ts×(VIN-VOUT)];

[0068] Where Toff represents the conduction time of the lower bridge switch, Ts represents the period of the upper bridge switch conduction signal UGS or the lower bridge conduction signal LGS, VIN represents the input voltage of the power converter, VOUT represents the output voltage of the power converter, FS represents the slope of the falling band of the current sensing signal Isen, and It1 represents the first current value of each band of the current sensing signal Isen at the first time point (e.g., ...). Figure 3 The current value I1 of the current sensing signal Isen is shown, and It2 represents the second current value of each band of the current sensing signal Isen at the second time point (e.g., the current value I1). Figure 3 The trough current value I2 of the current sensing signal Isen is shown.

[0069] The first ramp current calculation circuit 331 of the ramp current calculation circuit 303 of the simulation control circuit 30 can execute the following equations:

[0070] |RS|=FS×(VIN-VOUT) / VOUT=2×[(It1-It2)]×VIN / (Ts×VOUT);

[0071] Where RS represents the slope of the rising band of the current sensing signal Isen, FS represents the slope of the falling band of the same current sensing signal Isen, VIN represents the input voltage of the power converter, VOUT represents the output voltage of the power converter, and It1 represents the first current value (e.g., for each band of the current sensing signal Isen at the first time point) at the first time point. Figure 3 The current value I1 of the current sensing signal Isen is shown, and It2 represents the second current value of each band of the current sensing signal Isen at the second time point (e.g., the current value I1). Figure 3The current sensing signal Isen (I2) shown is the trough current value, and Ts represents the period of the upper bridge switch on signal UGS or the lower bridge on signal LGS.

[0072] The charging and discharging circuit 40 alternately outputs multiple charging current and multiple discharging current signals to the capacitor Cm to charge and discharge the capacitor Cm multiple times. After the capacitor Cm has undergone multiple charging and discharging cycles, the voltage signal of the capacitor Cm is an actual simulated voltage signal generated by the inductor current simulation circuit of this invention based on the inductor current IL of the power converter.

[0073] The fifth sample-and-hold circuit 35 of the sample-and-hold circuit 301 of the simulation control circuit 30 can sample and hold the trough current of the current sensing signal Isen to output the initial signal Vinit to the initial control circuit 50. Alternatively, the first sample-and-hold circuit 31 can provide the held trough current of the current sensing signal Isen to the first resistor R1 to charge the first resistor R1, and the voltage signal of the first resistor R1 after charging is provided to the initial control circuit 50 as the initial signal Vinit.

[0074] Whenever the charging / discharging circuit 40 provides a discharge current to the capacitor Cm based on the discharge current signal Idischg, causing the voltage signal of the capacitor Cm to reach a trough, the fifth sampling and holding circuit 35 of the sampling and holding circuit 301 of the simulation control circuit 30 can output an initial signal Vinit based on the trough current of the discharge current signal Idischg. The initial control circuit 50 can transmit the initial signal Vinit output by the simulation control circuit 30 to the capacitor Cm to pull down the voltage signal of the capacitor Cm to a trough voltage. In this way, the inductor current simulation circuit of the present invention can more smoothly generate an actual simulated voltage signal based on the inductor current IL of the power converter.

[0075] Please see Figure 4 This is a block diagram of the charging and discharging circuit of the open-circuit inductor current simulation circuit according to the third embodiment of the present invention.

[0076] The inductor current simulation circuit of the present invention may include, for example: Figure 4 The charging and discharging circuit 40 is shown. (As shown...) Figure 1 The configuration of the charging / discharging circuit 40 shown can be used with, for example... Figure 4 The configuration of the charging and discharging circuit 40 shown is the same; this is only an example and is not intended to limit the invention.

[0077] The charging and discharging circuit 40 may include one or more current mirrors, such as, but not limited to, a first charging current mirror MR1, a second charging current mirror MR2, and a first discharging current mirror MR3. If necessary, the charging and discharging circuit 40 may further include one or more switching components, such as, but not limited to, a charging switch SWU and a discharging switch SWL.

[0078] For example, the first charging current mirror MR1 may include a first transistor T11 and a second transistor T12, the second charging current mirror MR2 may include a third transistor T23 and a fourth transistor T24, and the first discharging current mirror MR3 may include a first transistor T31 and a second transistor T32. This is only an example and the present invention is not limited thereto.

[0079] The first terminal of the first transistor T11 of the first charging current mirror MR1 of the charging and discharging circuit 40 (i.e., the input terminal of the first charging current mirror MR1) is connected to the output terminal of the simulation control circuit 30.

[0080] In the first charging current mirror MR1 of the charging and discharging circuit 40, the first terminal of the first transistor T11 is connected to the control terminal of the first transistor T11 and the control terminal of the second transistor T12, and the second terminal of the first transistor T11 and the second terminal of the second transistor T12 are grounded.

[0081] Within the charging and discharging circuit 40, the first terminal of the second transistor T12 of the first charging current mirror MR1 (i.e., the output terminal of the first charging current mirror MR1) is connected to the second terminal of the third transistor T23 of the second charging current mirror MR2 (i.e., the input terminal of the second charging current mirror MR2).

[0082] Within the second charging current mirror MR2 of the charging / discharging circuit 40, the second terminal of the third transistor T23 is connected to the control terminal of the third transistor T23 and the control terminal of the fourth transistor T24. The first terminals of the third transistor T23 and the fourth transistor T24 are coupled to a shared voltage VCC.

[0083] Within the charging / discharging circuit 40, the second terminal of the fourth transistor T24 is connected to the first terminal of the charging switch SWU. The second terminal of the charging switch SWU is connected to the first terminal of the capacitor Cm. The control terminal of the charging switch SWU can be connected to the output terminal of the drive circuit 10.

[0084] The first terminal of the first transistor T31 of the first discharge current mirror MR3 of the charging and discharging circuit 40 (i.e. the input terminal of the first discharge current mirror MR3) is connected to the output terminal of the simulation control circuit 30.

[0085] In the first discharge current mirror MR3 of the charging and discharging circuit 40, the first terminal of the first transistor T31 is connected to the control terminal of the first transistor T31 and the control terminal of the second transistor T32, and the second terminal of the first transistor T31 and the second terminal of the second transistor T32 are grounded.

[0086] Within the charging / discharging circuit 40, the first terminal of the second transistor T32 of the first discharge current mirror MR3 (i.e., the output terminal of the first discharge current mirror MR3) is connected to the first terminal of the discharge switch SWL. The second terminal of the discharge switch SWL is connected to the first terminal of the capacitor Cm. The control terminal of the discharge switch SWL can be connected to the output terminal of the drive circuit 10.

[0087] First, the first terminal of the first transistor T11 of the first charging current mirror MR1 receives the charging current signal Ichg from the simulation control circuit 30; this is the input current of the first charging current mirror MR1. The current at the first terminal of the second transistor T12 of the first charging current mirror MR1 is the output current of the first charging current mirror MR1. The ratio of the input current to the output current of the first charging current mirror MR1 is 1:N, where N is a positive value. Thus, the charging current signal Ichg received from the simulation control circuit 30 can be amplified or reduced by a factor of N to form the output current of the first charging current mirror MR1.

[0088] The input current at the second terminal of the third transistor T23 of the second charging current mirror MR2 is the output current of the first charging current mirror MR1. The current at the second terminal of the fourth transistor T24 of the second charging current mirror MR2 is the output current of the second charging current mirror MR2. The ratio of the input current to the output current of the second charging current mirror MR2 is 1:M, where M is a positive value. In this way, the first charging current mirror MR1 and the second charging current mirror MR2 can amplify or reduce the charging current signal Ichg by a factor of N×M.

[0089] On the other hand, the current at the first terminal of the first transistor T31 of the first discharge current mirror MR3 receives the discharge current signal Idischg from the simulation control circuit 30; this is the input current of the first discharge current mirror MR3. The current at the first terminal of the second transistor T32 of the first discharge current mirror MR3 is the output current of the first discharge current mirror MR3. The ratio of the input current to the output current of the first discharge current mirror MR3 is 1:P, where P is a positive value. Thus, the first discharge current mirror MR3 can amplify or reduce the discharge current signal Idischg by a factor of P.

[0090] The drive circuit 10 alternately turns on the upper bridge switch UG and the lower bridge switch LG multiple times. Whenever the drive circuit 10 outputs a (high-level) upper bridge turn-on signal UGS to the control terminal of the upper bridge switch UG to turn on the upper bridge switch UG, the drive circuit 10 can also output a (high-level) upper bridge turn-on signal UGS to the control terminal of the charging switch SWU to turn on the charging switch SWU. As a result, the charging current, amplified or reduced by a factor of N×M by the first charging current mirror MR1 and the second charging current mirror MR2, flows through the turned-on charging switch SWU to the capacitor Cm to charge the capacitor Cm.

[0091] When the driving circuit 10 outputs a (high-level) lower bridge turn-on signal LGS to the control terminal of the lower bridge switch LG to turn on the lower bridge switch LG, the driving circuit 10 can also output a (high-level) lower bridge turn-on signal LGS to the control terminal of the discharge switch SWL to turn on the discharge switch SWL. As a result, the discharge current, amplified or reduced by a factor of P by the first discharge current mirror MR3, flows through the turned-on discharge switch SWL to the capacitor Cm to discharge the capacitor Cm.

[0092] After repeatedly charging and discharging capacitor Cm, the final voltage signal of capacitor Cm is an actual simulated voltage signal generated by the inductor current simulation circuit of this embodiment of the invention based on the inductor current IL of the power converter.

[0093] Please see Figure 5 This is a block diagram of the initial control circuit of the open-circuit inductor current simulation circuit of the fourth embodiment of the present invention.

[0094] The inductor current simulation circuit of the present invention may include, for example: Figure 5 The initial control circuit 50 is shown. (As shown) Figure 1 The configuration of the initial control circuit 50 shown can be compared with, for example... Figure 5 The configuration of the initial control circuit 50 shown is the same; this is merely an example and is not intended to limit the invention.

[0095] like Figure 5 As shown, the initial control circuit 50 may include a switching component SW51. The first terminal of the switching component SW51 is connected to the output terminal of the simulation control circuit 30. The second terminal of the switching component SW51 is connected to the first terminal of the capacitor Cm.

[0096] like Figure 5 The control terminal of the switch assembly SW51 shown can be connected to, for example... Figure 1 The output of the driving circuit 10 shown is used to receive a trough time pulse signal VTPS from the driving circuit 10. Based on the trough time pulse signal VTPS, whenever... Figure 1 The charging and discharging circuit 40 shown provides a discharge current to capacitor Cm based on the discharge current signal Idischg. When the voltage signal of capacitor Cm reaches the trough, the switching component SW51 is turned on.

[0097] The simulation control circuit 30 outputs an initial signal Vinit, which is transmitted to capacitor Cm through the activated switching component SW51, thereby directly pulling down the voltage signal of capacitor Cm to a trough voltage. In this way, the inductor current simulation circuit of the present invention can more smoothly generate an actual simulated voltage signal based on the inductor current IL of the power converter.

[0098] Please see Figures 5 to 9 ,in Figure 6The above are waveforms of the inductor current sensed, the simulated voltage signal, and the default voltage signal obtained by the open-circuit inductor current simulation circuits in the first to fourth embodiments of the present invention. Figure 7 for Figure 6 A magnified view of the waveform enclosed by line A in the image. Figure 8 for Figure 6 A magnified view of the waveform enclosed by line B in the image. Figure 9 The waveforms are shown for the inductor current sensed by the open-circuit inductor current simulation circuit, the simulated voltage signal, the default voltage signal, and the voltage signal simulated by the conventional inductor current simulation circuit in the first to fourth embodiments of the present invention.

[0099] like Figures 6 to 9 As shown, the default voltage signal Vtar is equal to the inductor current IL (i.e., ... Figure 1 The current value of the inductor L is half of the current value.

[0100] like Figures 6 to 8 As shown, the inductor current simulation circuit of this invention generates an actual simulated voltage signal Vem based on the inductor current IL, which is basically the same as the default voltage signal Vtar.

[0101] like Figure 9 As shown, a conventional inductor current simulation circuit generates an actual simulated voltage signal Vprt based on the inductor current. Clearly, compared to the voltage of the actual simulated voltage signal Vprt generated by the conventional inductor current simulation circuit, the voltage of the actual simulated voltage signal Vem generated by the inductor current simulation circuit of this invention catches up with the voltage of the default voltage signal Vtar much faster.

[0102] In summary, this invention provides an open-circuit inductor current simulation circuit that employs a circuit architecture different from that of traditional power converter detection circuits. This circuit detects multiple current values ​​in the rising and falling segments of the current sensing signal of the lower bridge switch of the power converter, and accurately and quickly simulates complete inductor current information based on these detected current values.

[0103] The above-disclosed content is only a preferred embodiment of the present invention and is not intended to limit the claims of the present invention. Therefore, all equivalent technical changes made based on the description and drawings of the present invention are included in the claims of the present invention.

Claims

1. An open-circuit inductor current simulation circuit, suitable for a power converter, the power converter comprising a drive circuit, an upper bridge switch, a lower bridge switch, an inductor, and an output capacitor, wherein the output terminal of the drive circuit is connected to the control terminals of the upper bridge switch and the lower bridge switch, a first terminal of the upper bridge switch is coupled to an input voltage, a second terminal of the upper bridge switch is connected to the first terminal of the lower bridge switch, the second terminal of the lower bridge switch is grounded, a node between the second terminal of the upper bridge switch and the first terminal of the lower bridge switch is connected to the first terminal of the inductor, the second terminal of the inductor is connected to the first terminal of the output capacitor, and the second terminal of the output capacitor is grounded, characterized in that... The inductor current simulation circuit includes: A current sensing circuit is connected to the first terminal of the lower bridge switch and configured to sense the current at the first terminal of the lower bridge switch to output a current sensing signal, wherein the multiple waveforms of the current sensing signal include multiple rising bands and multiple falling bands. A simulation control circuit, connected to the current sensing circuit, is configured to output multiple charging current signals based on multiple current values ​​on multiple rising bands of the current sensing signal, and to output multiple discharging current signals based on multiple current values ​​on multiple falling bands of the current sensing signal. A charging and discharging circuit is connected to the simulation control circuit and the first terminal of the capacitor. The second terminal of the capacitor is grounded. The charging and discharging circuit is configured to generate multiple charging currents based on the multiple charging current signals and to generate multiple discharging currents based on the multiple discharging current signals. The multiple charging currents and multiple discharging current signals are alternately output to the capacitor to charge and discharge the capacitor multiple times. The current signal of the capacitor after charging and discharging is the simulation signal of the current of the inductor. as well as An initial control circuit is connected to the simulation control circuit and the first terminal of the capacitor. The simulation control circuit is configured to output an initial signal to the initial control circuit based on the valley current of the current sensing signal. The initial control circuit transmits the initial signal output by the simulation control circuit to the capacitor to pull the voltage of the capacitor's voltage signal to a valley voltage.

2. The open-circuit inductor current simulation circuit according to claim 1, characterized in that, The initial control circuit includes a switching component. The first end of the switching component is connected to the output end of the simulation control circuit, and the second end of the switching component is connected to the first end of the capacitor. The control end of the switching component receives a trough time pulse signal from the outside, and the switching component turns on or off according to the level of the trough time pulse signal.

3. The open-circuit inductor current simulation circuit according to claim 1, characterized in that, The simulation control circuit includes a sample-and-hold circuit configured to sample and hold the plurality of current values ​​in the plurality of bands of the current sensing signal.

4. The open-circuit inductor current simulation circuit according to claim 3, characterized in that, The plurality of current values ​​held by the sampling and holding circuit include one or more trough values ​​on the plurality of bands of the current sensing signal.

5. The open-circuit inductor current simulation circuit according to claim 3, characterized in that, The plurality of current values ​​held by the sampling and holding circuit include the current value of the current sensing signal when the current time reaches half the time when the lower bridge switch is turned on.

6. The open-circuit inductor current simulation circuit according to claim 3, characterized in that, The simulation control circuit further includes a sensing current difference calculation circuit connected to the sampling and holding circuit, configured to calculate a current difference value as the difference between a first current value at a first time point and a second current value at a second time point for each band of the current sensing signal held by the sampling and holding circuit.

7. The open-circuit inductor current simulation circuit according to claim 6, characterized in that, The simulation control circuit further includes a ramp current calculation circuit configured to calculate a time difference between the second time point and the first time point for each band of the current sensing signal, and to calculate the slope and current value of each band of the current sensing signal based on the current difference and the time difference for each band.

8. The open-circuit inductor current simulation circuit according to claim 7, characterized in that, The ramp current calculation circuit outputs the charging current signal based on the slope and current value of each rising segment of the current sensing signal, and outputs the discharging current signal based on the slope and current value of each falling segment of the current sensing signal.

9. The open-circuit inductor current simulation circuit according to claim 1, characterized in that, The charging and discharging circuit includes a first charging current mirror. The input terminal of the first charging current mirror is connected to the output terminal of the simulation control circuit to receive the charging current signal, and the output terminal of the first charging current mirror is connected to the first terminal of the capacitor.

10. The open-circuit inductor current simulation circuit according to claim 9, characterized in that, The charging and discharging circuit further includes a second charging current mirror, the input terminal of which is connected to the output terminal of the first charging current mirror, and the output terminal of which is connected to the first terminal of the capacitor.

11. The open-circuit inductor current simulation circuit according to claim 10, characterized in that, The charging and discharging circuit further includes a charging switch, a first end of which is connected to the output terminal of the second charging current mirror, a second end of which is connected to the first terminal of the capacitor, and a control terminal of which is connected to the driving circuit. The driving circuit turns on the charging switch during the time the upper bridge switch is turned on.

12. The open-circuit inductor current simulation circuit according to claim 11, characterized in that, The first charging current mirror includes a first transistor and a second transistor. The first terminal of the first transistor is connected to the output terminal of the simulation control circuit, the control terminal of the first transistor, and the control terminal of the second transistor. The first terminal of the second transistor is connected to the input terminal of the second charging current mirror. The second terminals of the first transistor and the second transistor are grounded.

13. The open-circuit inductor current simulation circuit according to claim 12, characterized in that, The second charging current mirror includes a third transistor and a fourth transistor. The first terminal of the third transistor and the first terminal of the fourth transistor are coupled to a shared voltage. The second terminal of the third transistor is connected to the first terminal of the second transistor, the control terminal of the third transistor, and the control terminal of the fourth transistor. The second terminal of the fourth transistor is connected to the first terminal of the charging switch.

14. The open-circuit inductor current simulation circuit according to claim 1, characterized in that, The charging and discharging circuit includes a first discharge current mirror. The input terminal of the first discharge current mirror is connected to the output terminal of the simulation control circuit to receive the discharge current signal. The output terminal of the first discharge current mirror is connected to the first terminal of the capacitor.

15. The open-circuit inductor current simulation circuit according to claim 14, characterized in that, The charging and discharging circuit further includes a discharge switch, a first end of which is connected to the output terminal of the first discharge current mirror, a second end of which is connected to the first terminal of the capacitor, and a control terminal of which is connected to the driving circuit. The driving circuit turns on the discharge switch during the time the lower bridge switch is turned on.

16. The open-circuit inductor current simulation circuit according to claim 15, characterized in that, The first discharge current mirror includes a first transistor and a second transistor. The first terminal of the first transistor is connected to the output terminal of the simulation control circuit, the control terminal of the first transistor, and the control terminal of the second transistor. The first terminal of the second transistor is connected to the first terminal of the discharge switch. The second terminals of the first transistor and the second transistor are grounded.

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