An inductance current simulation circuit using a closed loop

Abstract

An inductor current simulation circuit employing a closed loop is disclosed. A simulation control circuit generates a simulation voltage signal based on a current at a first terminal of a lower bridge switch of a power converter. A charge-discharge circuit outputs a charge-discharge current to a first terminal of a capacitor based on the simulation voltage signal when the simulation control circuit outputs the simulation voltage signal to the charge-discharge circuit. The charge-discharge circuit outputs the charge-discharge current to the first terminal of the capacitor based on an input voltage, an output voltage, or both of the power converter when the simulation control circuit outputs the simulation voltage signal to a control terminal of the capacitor to adjust a capacitance value of the capacitor.

Description

Technical Field

[0001] This invention relates to power converters, and more particularly to an inductor current simulation circuit employing a closed loop suitable for power converters. Background Technology

[0002] For electronic devices, power converters are indispensable devices used to regulate power and supply the regulated power to the electronic devices. The upper and lower bridge switches of the power converter must switch according to data such as voltage or current of the power converter's circuit components to provide appropriate power to the electronic devices connected to the power converter's output. However, the inductor current detected by the detection circuit of existing power converters is inaccurate and not real-time, and needs to be calibrated. Summary of the Invention

[0003] The technical problem to be solved by this invention is to provide an inductor current simulation circuit employing a closed loop, addressing the shortcomings of existing technologies. This inductor current simulation circuit is suitable for power converters. The power converter includes a drive circuit, an upper bridge switch, a lower bridge switch, an inductor, and an output capacitor. The output terminal of the drive circuit is connected to the control terminals of the upper and lower bridge switches. The first terminal of the upper bridge switch is coupled to the input voltage. The second terminal of the upper bridge switch is connected to the first terminal of the lower bridge switch. The second terminal of the lower bridge switch is grounded. The node between the second terminal of the upper bridge switch and the first terminal of the lower bridge switch is connected to the first terminal of the inductor. The second terminal of the inductor is connected to the first terminal of the output capacitor. The second terminal of the output capacitor is grounded. The inductor current simulation circuit employing a closed loop includes a current sensing circuit, a simulation control circuit, a feedback circuit, and a charging / discharging circuit. The current sensing circuit is connected to the first terminal of the lower bridge switch. The current sensing circuit is configured to sense the current flowing through the first terminal of the lower bridge switch and output a current sensing signal. The simulation control circuit is connected to the current sensing circuit. The simulation control circuit is configured to determine multiple voltage values ​​of multiple waveforms of a simulated voltage signal based on multiple current values ​​of a current sensing signal, and outputs the simulated voltage signal. A feedback circuit is connected to the first terminal of a capacitor and the simulation control circuit. The second terminal of the capacitor is grounded. The feedback circuit is configured to output a feedback signal based on the voltage or current signal of the capacitor. The simulation control circuit compensates for the simulated voltage signal based on the feedback signal and outputs the compensated simulated voltage signal. A charging / discharging circuit is connected to the first terminal of the capacitor. When the simulation control circuit outputs a simulated voltage signal to the connected charging / discharging circuit, the charging / discharging circuit outputs a charging / discharging current to the capacitor based on the simulated voltage signal. When the simulation control circuit outputs a simulated voltage signal to the control terminal of the connected capacitor to adjust the capacitor's capacitance, the charging / discharging circuit outputs another charging / discharging current to the first terminal of the capacitor based on the input voltage, the voltage at the node between the second terminal of the inductor and the first terminal of the output capacitor, or both.

[0004] In this embodiment, the feedback circuit obtains the voltage signal of the capacitor and then converts the voltage signal of the capacitor into a current signal as a feedback signal.

[0005] In one embodiment, the simulation control circuitry includes a sample-and-hold circuit. The sample-and-hold circuitry is configured to sample and hold multiple current values ​​on multiple bands of multiple waveforms of the current sensing signal and the feedback signal.

[0006] In an embodiment, the sampled and held current values ​​sampled and held by the sample and hold circuit include the trough values ​​of one or more waveforms of a current sensing signal, a feedback signal, or both.

[0007] In an embodiment, the sample and hold circuit samples and holds multiple current values ​​including the current sensing signal, the feedback signal, or both, at the current value when the current time reaches half the time the lower bridge switch is open.

[0008] In this embodiment, the simulation control circuit also includes an arithmetic circuit. The arithmetic circuit is connected to the sample-and-hold circuit. The arithmetic circuit is configured to calculate the difference between multiple current values ​​at different time points on each band of the current sensing signal.

[0009] In one embodiment, the computational circuitry is configured to calculate the difference between multiple current values ​​at different time points on each band of the feedback signal.

[0010] In this embodiment, the simulation control circuit further includes a first resistor and a second resistor. A first terminal of the first resistor and a first terminal of the second resistor are connected to the arithmetic circuit. Second terminals of the first resistor and the second resistor are grounded. The arithmetic circuit provides the difference between multiple current values ​​of the current sensing signal to the first resistor and the difference between multiple current values ​​of the feedback signal to the second resistor. The voltage of the simulated voltage signal depends on the voltage of the first resistor, the second resistor, or both.

[0011] In one embodiment, the simulation control circuit further includes a comparator circuit. The comparator circuit is connected to a first terminal of a first resistor and a first terminal of a second resistor. The comparator circuit is configured to compare the voltage at the first terminal of the first resistor with the voltage at the first terminal of the second resistor to output a comparison signal. The voltage of the simulated voltage signal depends on the comparison signal.

[0012] In this embodiment, the simulation control circuit further includes a counter. The counter is connected to a comparator circuit. The counter is configured to count based on a comparison signal to output a simulated voltage signal.

[0013] In this embodiment, the simulation control circuit further includes a third resistor. A first terminal of the third resistor is connected to the sample-and-hold circuit. A second terminal of the third resistor is grounded. The third resistor is configured to receive the initial current of each waveform of the current sensing signal sampled by the sample-and-hold circuit. The voltage across the third resistor is supplied to the capacitor.

[0014] In this embodiment, the inductor current simulation circuit employing a closed loop further includes an initial control circuit. The initial control circuit is connected to the simulation control circuit and the first terminal of the capacitor. The simulation control circuit outputs an initial signal based on the trough current of the current sensing signal or the voltage of the third resistor after charging with the initial current. Based on the initial signal, the initial control circuit outputs an initial current to the capacitor to pull the voltage signal of the capacitor to a trough voltage.

[0015] In this embodiment, the initial control circuit includes a switching component. A first terminal of the switching component is connected to the simulation control circuit. A second terminal of the switching component is connected to a first terminal of a capacitor. The control terminal of the switching component is coupled to a trough-time pulse signal. The switching component is turned on or off according to the level of the trough-time pulse signal.

[0016] In this embodiment, the charging / discharging circuit includes a first comparator, a first charging resistor, and a first transistor. The first input terminal of the first comparator is connected to the node between the second terminal of an inductor and the first terminal of an output capacitor. The second input terminal of the first comparator is connected to the first terminal of the first charging resistor. The second terminal of the first charging resistor is grounded. The output terminal of the first comparator is connected to the control terminal of the first transistor. The first terminal of the first transistor is coupled to a shared voltage. The second terminal of the first transistor is connected to the first terminal of the first charging resistor. The first terminal of the capacitor is connected to the first terminal of the first transistor.

[0017] In this embodiment, the simulation control circuit is connected to the control terminal of the first charging resistor to output a simulation voltage signal to the control terminal of the first charging resistor in order to adjust the resistance value of the first charging resistor.

[0018] In one embodiment, the charging / discharging circuit further includes a second transistor. The control terminal of the second transistor is connected to the output terminal of the first comparator. The first terminal of the second transistor is coupled to a shared voltage. The second terminal of the second transistor is connected to the first terminal of a capacitor.

[0019] In this embodiment, the charging and discharging circuit further includes a third transistor and a fourth transistor. The first terminal and control terminal of the third transistor are connected to the second terminal of the second transistor and the control terminal of the fourth transistor. The first terminal of the fourth transistor is connected to the first terminal of the first charging resistor. The second terminals of both the third and fourth transistors are grounded.

[0020] In this embodiment, the charging / discharging circuit further includes a second comparator, a second charging resistor, and a fifth transistor. The first input terminal of the second comparator is coupled to an input voltage. The second input terminal of the second comparator is connected to the first terminal of the second charging resistor. The second terminal of the second charging resistor is grounded. The output terminal of the first comparator is connected to the control terminal of the fifth transistor. The first terminal of the fifth transistor is coupled to a shared voltage. The second terminal of the fifth transistor is connected to the first terminal of the second charging resistor. The first terminal of a capacitor is connected to the first terminal of the fifth transistor.

[0021] In this embodiment, the simulation control circuit is connected to the control terminal of the second charging resistor to output a simulation voltage signal to the control terminal of the second charging resistor in order to adjust the resistance value of the second charging resistor.

[0022] In this embodiment, the charging / discharging circuit further includes a sixth transistor. The control terminal of the sixth transistor is connected to the output terminal of the second comparator. The first terminal of the sixth transistor is coupled to a shared voltage. The second terminal of the sixth transistor is connected to the first terminal of a capacitor.

[0023] In this embodiment, the charging and discharging circuit further includes a switching component. A first terminal of the switching component is connected to a second terminal of the sixth transistor. The second terminal of the switching component is connected to a first terminal of the capacitor. A control terminal of the switching component is connected to a driving circuit to receive an upper-bridge turn-on signal from the driving circuit for controlling the operation of the upper-bridge switch. During the conduction time of the upper-bridge turn-on signal, the upper-bridge switch and the switching component are turned on.

[0024] As described above, the present invention provides an inductor current simulation circuit that employs a closed loop. It uses a circuit architecture different from the detection circuit of a traditional power converter to detect multiple current values ​​of multiple waveforms of the current signal of the lower bridge switch of the power converter, and accurately simulates the complete information of the inductor current based on the detected multiple current values ​​of multiple waveforms of the lower bridge switch.

[0025] To further understand the features and technical content of the present invention, please refer to the following detailed description and drawings of the present invention. However, the drawings provided are for reference and illustration only and are not intended to limit the present invention. Attached Figure Description

[0026] Figure 1 This is a circuit diagram of the inductor current simulation circuit using a closed loop according to the first embodiment of the present invention.

[0027] Figure 2 This is a circuit diagram of the simulation control circuit of the inductor current simulation circuit using a closed loop according to the second embodiment of the present invention.

[0028] Figure 3 This is a circuit diagram of the charging and discharging circuit of the inductor current simulation circuit using a closed loop according to the third embodiment of the present invention.

[0029] Figure 4 This is a circuit diagram of the initial control circuit of the inductor current simulation circuit using a closed loop according to the fourth embodiment of the present invention.

[0030] Figure 5 The circuit diagram is for the inductor current simulation circuit using a closed loop according to the fifth embodiment of the present invention.

[0031] Figure 6 The circuit diagram is shown for the simulation control circuit of the closed-loop inductor current simulation circuit according to the sixth embodiment of the present invention.

[0032] Figure 7 This is a circuit diagram of the charging and discharging circuit of the inductor current simulation circuit using a closed loop according to the seventh embodiment of the present invention.

[0033] Figure 8 This is a circuit diagram of the initial control circuit of the inductor current simulation circuit using a closed loop according to the eighth embodiment of the present invention.

[0034] Figure 9 The waveform diagrams are of the signals of the inductor current simulation circuits using closed loops in the first to eighth embodiments of the present invention.

[0035] Figure 10A The waveform diagrams are of the signals of the inductor current simulation circuits using closed loops in the first to eighth examples of the present invention.

[0036] Figure 10B The waveform diagrams are of the signals of the inductor current simulation circuits using closed loops in the first to eighth embodiments of the present invention.

[0037] Figure 11 The waveform diagrams are of the signals of the inductor current simulation circuits using closed loops in the first to eighth embodiments of the present invention. Detailed Implementation

[0038] The following specific embodiments illustrate the implementation of the present invention. Those skilled in the art can understand the advantages and effects of the present invention from the content disclosed in this specification. The present invention can be implemented or applied through other different specific embodiments, and various details in this specification can also be modified and changed based on different viewpoints and applications without departing from the concept of the present invention. Furthermore, the accompanying drawings of the present invention are for simple illustrative purposes only and are not depictions of actual dimensions, as stated in advance. The following embodiments will further describe the relevant technical content of the present invention in detail, but the disclosed content is not intended to limit the scope of protection of the present invention. In addition, the term "or" as used herein may, depending on the actual situation, include any combination of any one or more of the associated listed items.

[0039] Please see Figure 1 , Figure 9 , Figure 10A , Figure 10B and Figure 11 ,in Figure 1 This is a circuit diagram of the inductor current simulation circuit using a closed loop according to the first embodiment of the present invention. Figure 9 , Figure 10A , Figure 10B and Figure 11 The waveform diagrams are of the signals of the inductor current simulation circuits using closed loops in the first to eighth embodiments of the present invention.

[0040] The inductor current simulation circuit of this invention is suitable for simulating the current of the inductor L of a power converter (i.e., Figure 1 The voltage signal corresponding to the inductor current IL shown.

[0041] The power converter includes a driver circuit 90, an upper bridge switch UG, a lower bridge switch LG, an inductor L, and an output capacitor Cout. The output of the driver circuit 90 is connected to the control terminals of both the upper bridge switch UG and the lower bridge switch LG. The first terminal of the upper bridge switch UG is coupled to the input voltage VIN. The second terminal of the upper bridge switch UG is connected to the first terminal of the lower bridge switch LG. The second terminal of the lower bridge switch LG is grounded.

[0042] The node LX between the second terminal of the upper bridge switch UG and the first terminal of the lower bridge switch LG is connected to the first terminal of the inductor L. The second terminal of the inductor L is connected to the first terminal of the output capacitor Cout. The second terminal of the output capacitor Cout is grounded. The node between the second terminal of the inductor L and the first terminal of the output capacitor Cout is the output terminal of the power converter, and the voltage at the output terminal of this power converter is the output voltage VOUT.

[0043] It is worth noting that the inductor current simulation circuit in this embodiment of the invention may include a current sensing circuit 10, a simulation control circuit 20, a charging and discharging circuit 31, and a feedback circuit 40. If necessary, the inductor current simulation circuit may further include an initial control circuit 50.

[0044] The input terminal of the current sensing circuit 10 is connected to the first terminal of the lower bridge switch LG. The output terminal of the current sensing circuit 10 is connected to the input terminal of the simulation control circuit 20. The output terminal of the simulation control circuit 20 is connected to the input terminal of the initial control circuit 50. The output terminal of the initial control circuit 50 is connected to the first terminal of the capacitor Cm1. The second terminal of the capacitor Cm1 is grounded.

[0045] The output terminal of the charging / discharging circuit 31 is connected to the first terminal of capacitor Cm1. The input terminal of the feedback circuit 40 is connected to the first terminal of capacitor Cm1. The output terminal of the feedback circuit 40 is connected to the input terminal of the simulation control circuit 20. The output terminal of the simulation control circuit 20 is connected to the input terminal of the charging / discharging circuit 31.

[0046] First, the current sensing circuit 10 senses the current flowing through the first terminal of the lower bridge switch LG and outputs a current sensing signal Isen. The simulation control circuit 20 determines multiple voltage values ​​of multiple waveforms of a simulated voltage signal Vcomp1 based on multiple current values ​​of multiple waveforms of the current sensing signal Isen received from the current sensing circuit 10, and outputs the simulated voltage signal Vcomp1 to the charging / discharging circuit 31. The charging / discharging circuit 31 outputs a charging / discharging current to the capacitor Cm1 based on the simulated voltage signal Vcomp1 received from the simulation control circuit 20, thereby charging and discharging the capacitor Cm1.

[0047] Furthermore, the feedback circuit 40 outputs a feedback signal Iemu1 to the simulation control circuit 20 based on the voltage or current signal of the capacitor Cm1. For example, the feedback circuit 40 obtains the voltage signal of the capacitor Cm1, then converts the voltage signal of the capacitor Cm1 into a current signal and outputs it to the simulation control circuit 20 as the feedback signal Iemu1. This is only an example and is not intended to limit the invention.

[0048] When the simulation control circuit 20 receives the feedback signal Iemu1 from the feedback circuit 40, the simulation control circuit 20 compensates the simulation voltage signal Vcomp1 based on the feedback signal Iemu1 (which is the voltage or current signal of capacitor Cm1), and outputs the compensated simulation voltage signal Vcomp1 to the charging and discharging circuit 31. The charging and discharging circuit 31 outputs another charging and discharging current to capacitor Cm1 based on the compensated simulation voltage signal Vcomp1 to charge and discharge capacitor Cm1.

[0049] In other words, the simulation control circuit 20 can output a simulation voltage signal Vcomp1 to the charge / discharge circuit 31 based on the current sensing signal Isen received from the current sensing circuit 10, the feedback signal Iemu1 obtained from the feedback circuit 40, or both. The charge / discharge circuit 31 charges and discharges the capacitor Cm1 based on the simulation voltage signal Vcomp1 received from the simulation control circuit 20.

[0050] Finally, the inductor current simulation circuit of the present invention can simulate multiple waveforms of a voltage signal Vemu1 corresponding to the inductor current IL by using the capacitor voltage after the capacitor Cm1 is charged and the voltage signal after the capacitor Cm1 is discharged (to the feedback circuit 40). These waveforms include rising and falling waveforms.

[0051] like Figure 9 , Figure 10A and Figure 10B As shown, the default voltage signal Vtar is half the current value of the inductor current IL. The inductor current simulation circuit of this invention simulates the voltage signal Vem based on the inductor current IL.

[0052] If the inductance value of inductor L is different, for example, 0.47uH and 0.68uH respectively, the current in inductor L can be as follows: Figure 11 The inductor currents IL1 and IL2 are shown. Figure 11 As shown, the voltage signal Vem21 simulated by the inductor current simulation circuit of the present invention based on the inductor current IL1 essentially overlaps with a default voltage signal Vtar21. The voltage signal Vem22 simulated by the inductor current simulation circuit of the present invention based on the inductor current IL2 essentially overlaps with a default voltage signal Vtar22. Clearly, regardless of the inductance value of inductor L, the present invention can accurately simulate the inductor current information.

[0053] Whenever the voltage signal of capacitor Cm1 charged by the charging / discharging circuit 31 according to the charging / discharging current provided by the simulated voltage signal Vcomp1 reaches the trough value of the inductor current IL, the initial control circuit 50 can output an initial current to capacitor Cm1 according to the initial signal Vinit obtained from the simulation control circuit 20, so as to directly pull the voltage signal Vemu1 of capacitor Cm1 to a trough voltage. In this way, the corresponding voltage signal of the inductor current IL of the power converter can be simulated more smoothly.

[0054] Please see Figure 2 This is a circuit diagram of the simulation control circuit of the inductor current simulation circuit using a closed loop according to the second embodiment of the present invention.

[0055] The inductor current simulation circuit of the present invention may include a simulation control circuit, for example... Figure 2 The simulation control circuit 20 shown. The configuration within the simulation control circuit 20 of the first embodiment of the present invention can be compared with, for example... Figure 2 The configuration of the simulation control circuit 20 shown is the same; it is only an example and is not intended to limit the invention.

[0056] like Figure 2 As shown, the circuit components of the simulation control circuit 20 may include one or more of the following: a sampling and holding circuit 201, an arithmetic circuit 202, a comparison circuit (including a comparator 203), a counter 204, a first resistor R1, a second resistor R2, and a third resistor R3.

[0057] The output terminals of the current sensing circuit 10 and the feedback circuit 40 are connected to the input terminals of the sampling and holding circuit 201 of the simulation control circuit 20.

[0058] The output of the sample-and-hold circuit 201 is connected to the input of the arithmetic circuit 202, the input of the initial control circuit 50, and the first terminal of the third resistor R3. The second terminal of the third resistor R3 is grounded. The output of the arithmetic circuit 202 is connected to the first and second inputs of the comparator 203 of the comparison circuit, the first terminal of the first resistor R1, and the first terminal of the second resistor R2. The second terminals of the first resistor R1 and the second terminal of the second resistor R2 are grounded.

[0059] The output of comparator 203 in the comparator circuit is connected to the input of counter 204. The output of counter 204 is connected to the input of charge / discharge circuit 31. Figure 1 As shown, the output terminal of the charging / discharging circuit 31 and the output terminal of the initial control circuit 50 are connected to capacitor Cm1.

[0060] The sample and hold circuit 201 may be a single circuit, or it may contain multiple sample and hold circuits, for example, but not limited to... Figure 2 The first sampling and holding circuit 21, the second sampling and holding circuit 22, the third sampling and holding circuit 23, the fourth sampling and holding circuit 24, and the fifth sampling and holding circuit 25 are shown.

[0061] The arithmetic circuit 202 may be a single circuit, or it may contain multiple arithmetic units, such as, but not limited to, those mentioned above. Figure 2 The first arithmetic unit 2021 and the second arithmetic unit 2022 are shown.

[0062] like Figure 2 As shown, the input terminals of the first sample and hold circuit 21, the second sample and hold circuit 22, and the third sample and hold circuit 23 can be connected to the output terminal of the current sensing circuit 10. The output terminal of the first sample and hold circuit 21 can be connected to the input terminal of the initial control circuit 50 and the first terminal of the third resistor R3.

[0063] The outputs of the second sample-and-hold circuit 22 and the third sample-and-hold circuit 23 can be connected to the inputs of the first arithmetic unit 2021. The output of the first arithmetic unit 2021 can be connected to the first input of the comparator 203 of the comparison circuit and the first terminal of the first resistor R1.

[0064] The input terminals of the fourth sample-and-hold circuit 24 and the fifth sample-and-hold circuit 25 can be connected to the output terminal of the feedback circuit 40. The output terminals of the fourth sample-and-hold circuit 24 and the fifth sample-and-hold circuit 25 can be connected to the input terminals of the second arithmetic unit 2022. The output terminal of the second arithmetic unit 2022 can be connected to the second input terminal of the comparator 203 of the comparator circuit and the first terminal of the second resistor R2.

[0065] First, the second sample-and-hold circuit 22 can sample and hold one of multiple current values ​​from multiple current values ​​on each segment (including rising and falling segments) of the multiple waveforms of the current sensing signal Isen, for example, but not limited to, at the point where... Figure 1 The current value of the falling band of the current sensing signal Isen when the lower bridge switch LG is open for half the time shown.

[0066] The third sample and hold circuit 23 can sample and hold another current value among multiple current values ​​on each band (including rising and falling bands) of multiple waveforms of the current sensing signal Isen, such as the trough current value of the current sensing signal Isen.

[0067] Next, the first arithmetic unit 2021 can calculate the difference between the current value held by the second sample and hold circuit 22 and the current value held by the third sample and hold circuit 23, so as to output the first current signal to the first input terminal of the comparator 203 or the first terminal of the first resistor R1.

[0068] The fourth sample-and-hold circuit 24 can sample and hold one of multiple voltage or current values ​​on each segment (including rising and falling segments) of multiple waveforms of the feedback signal Iemu1 (which is the voltage or current signal of capacitor Cm1), for example, but not limited to, at the point where... Figure 1 The voltage or current value of the feedback signal Iemu1 when the lower bridge switch LG is open for half the time shown.

[0069] The fifth sample and hold circuit 25 can sample and hold another current value among multiple current values ​​on each segment (including rising and falling segments) of multiple waveforms of the feedback signal Iemu1, such as, but not limited to, the valley voltage value or valley current value of the feedback signal Iemu1.

[0070] The second arithmetic unit 2022 can calculate the difference between the value (voltage value or current value) held by the fourth sample and hold circuit 24 and the value (voltage value or current value) held by the fifth sample and hold circuit 25, so as to output a second current signal or a second voltage signal to the second input terminal of the comparator 203 or the first terminal of the second resistor R2.

[0071] Next, comparator 203 compares the voltage at its first input terminal with the voltage at its second input terminal to output a comparison signal. Counter 204 counts based on the comparison signal received from comparator 203 to output a simulated voltage signal Vcomp1.

[0072] The first sample-and-hold circuit 21 can sample and hold the trough current of the current sensing signal Isen, and output an initial signal Vinit to the initial control circuit 50 based on the held trough current of the current sensing signal Isen. Alternatively, the first sample-and-hold circuit 21 can provide the held trough current of the current sensing signal Isen to the third resistor R3 to charge the third resistor R3, and provide the voltage signal of the charged third resistor R3 as the initial signal Vinit to the initial control circuit 50.

[0073] Whenever the charging / discharging circuit 31 charges the capacitor Cm according to the charging / discharging current provided by the simulated voltage signal Vcomp1, and the voltage signal of the capacitor Cm reaches the trough of the inductor current IL, the initial control circuit 50 can output an initial current to the capacitor Cm1 based on the initial signal Vinit obtained from the first sampling and holding circuit 21 or the third resistor R3 of the simulation control circuit 20, so as to pull the voltage signal Vemu1 of the capacitor Cm1 to a trough voltage. In this way, the corresponding voltage signal of the inductor current IL of the power converter can be simulated more smoothly.

[0074] Please see Figure 3 This is a circuit diagram of the charging and discharging circuit of the inductor current simulation circuit using a closed loop according to the third embodiment of the present invention.

[0075] The inductor current simulation circuit of the present invention may include a charging and discharging circuit, for example... Figure 3 The charging / discharging circuit 31 shown. The configuration of the charging / discharging circuit 31 in the first embodiment of the present invention can be compared with that shown below. Figure 2 The configuration of the charging and discharging circuit 31 shown is the same; this is only an example and is not intended to limit the invention.

[0076] like Figure 3 As shown, the charging and discharging circuit 31 may include a first comparator 310, a first charging resistor R41, and a first transistor T1.

[0077] The first input terminal of the first comparator 310 in the charging / discharging circuit 31, for example, the non-inverting input terminal, is connected to the output terminal of the power converter, i.e. Figure 1 The node between the second end of the inductor L and the first end of the output capacitor Cout is used to receive the output voltage VOUT at this node.

[0078] The second input terminal of the first comparator 310, for example, the inverting input terminal, is connected to the first terminal of the first charging resistor R41. The output terminal of the first comparator 310 is connected to the control terminal of the first transistor T1. The first terminal of the first transistor T1 is coupled to the shared voltage VCC. The second terminal of the first transistor T1 is connected to the first terminal of the first charging resistor R41. The second terminal of the first charging resistor R41 is grounded.

[0079] It is worth noting that in this embodiment, the first charging resistor R41 of the charging and discharging circuit 31 is a variable resistor. The simulation control circuit 20 is connected to the control terminal of the first charging resistor R41 to output a simulation voltage signal Vcomp1 to the control terminal of the first charging resistor R41. The resistance value of the first charging resistor R41 is adjusted according to the voltage value of the simulation voltage signal Vcomp1, thereby adjusting the current flowing through the first charging resistor R41 and thus adjusting the current of the first transistor T1.

[0080] If necessary, the charging / discharging circuit 31 may further include a second transistor T2, forming a first current mirror with the first transistor T1. The current at the first terminal of the first transistor T1 serves as the input current of the first current mirror, and the current at the second terminal of the second transistor T2 serves as the output current of the first current mirror. The ratio of the input current to the output current of the first current mirror is 1:N, where N is a positive value. In this way, the current at the first terminal of the first transistor T1 can be amplified or reduced by a factor of N to form the current at the second terminal of the second transistor T2.

[0081] If necessary, the charging / discharging circuit 31 may further include a third transistor T3 and a fourth transistor T4 to form a second current mirror. The current from the first terminal to the second terminal of the third transistor T3 is equal to the current from the first terminal to the second terminal of the second transistor T2. The current from the first terminal of the third transistor T3 serves as the input current of the second current mirror, and the current from the first terminal to the second terminal of the fourth transistor T4 serves as the output current of the second current mirror. The ratio of the input current to the output current of the second current mirror is 1:M, where M is a positive value. In this way, the current from the first terminal to the second terminal of the first transistor T1 can be amplified or reduced by a factor of N×M to form the current from the first terminal to the second terminal of the fourth transistor T4.

[0082] The current from the first terminal to the second terminal of the first transistor T1 (after being amplified or reduced to N×M times) can discharge capacitor Cm1. The voltage signal of capacitor Cm1 after discharge serves as the (falling) band of the corresponding voltage signal simulated by the inductor current simulation circuit of this invention based on the inductor current IL of the power converter's inductor L.

[0083] The charging and discharging circuit 31 may further include a second comparator 320, a second charging resistor R51, and a fifth transistor T5.

[0084] If necessary, the first input terminal of the second comparator 320, for example, the non-inverting input terminal, is coupled to the input voltage VIN. The second input terminal of the second comparator 320, for example, the inverting input terminal, is connected to the first terminal of the second charging resistor R51. The second terminal of the second charging resistor R51 is grounded.

[0085] The output of the second comparator 320 is connected to the control terminal of the fifth transistor T5. The first terminal of the fifth transistor T5 is coupled to the shared voltage VCC. The second terminal of the fifth transistor T5 is connected to the first terminal of the second charging resistor R51.

[0086] It is worth noting that in this embodiment, the second charging resistor R51 of the charging and discharging circuit 31 is a variable resistor. The simulation control circuit 20 is connected to the control terminal of the second charging resistor R51 to output a simulation voltage signal Vcomp1 to the control terminal of the second charging resistor R51, so as to adjust the resistance value of the second charging resistor R51 according to the voltage value of the simulation voltage signal Vcomp1, thereby adjusting the current value flowing through the second charging resistor R51 and the fifth transistor T5.

[0087] If necessary, the charging / discharging circuit 31 may further include a sixth transistor T6, which, together with the fifth transistor T5, forms a third current mirror. The current at the first terminal of the fifth transistor T5 serves as the input current of the third current mirror, and the current at the second terminal of the sixth transistor T6 serves as the output current of the third current mirror. The ratio of the input current to the output current of the third current mirror is 1:P, where P is a positive value. In this way, the current from the first terminal to the second terminal of the fifth transistor T5 can be amplified or reduced by a factor of P to form the current at the second terminal of the sixth transistor T6.

[0088] If necessary, the charging / discharging circuit 31 may further include a switching component SW1. The first terminal of the switching component SW1 is connected to the second terminal of the sixth transistor T6. The second terminal of the switching component SW1 is connected to the first terminal of the capacitor Cm1. The control terminal of the switching component SW1 can be connected to, for example... Figure 1 The output terminal of the driving circuit 90 or other driving circuit shown.

[0089] When the drive circuit 90 drives the switching component SW1 to turn on during the conduction time of the upper bridge conduction signal (at a high level), i.e., during the time the upper bridge switch UG is turned on, the current from the first terminal to the second terminal of the fifth transistor T5 (after being amplified or reduced to a factor of P) is supplied to the capacitor Cm1 through the switching component SW1 to charge the capacitor Cm1. The voltage signal of the charged capacitor Cm1 serves as the (rising) band of the corresponding voltage signal simulated by the inductor current simulation circuit of this invention based on the inductor current IL of the power converter's inductor L.

[0090] Please see Figure 4 This is a circuit diagram of the initial control circuit of the inductor current simulation circuit using a closed loop according to the fourth embodiment of the present invention.

[0091] like Figure 1 The inductor current simulation circuit shown may include, for example: Figure 4 The initial control circuit 50 is shown. (As shown) Figure 1The circuit component configuration of the initial control circuit 50 shown can be compared with, for example... Figure 4 The initial control circuit 50 shown is the same.

[0092] like Figure 4 As shown, the initial control circuit 50 may include a switching component SW501. The first terminal of the switching component SW501 is connected to the output terminal of the simulation control circuit 20. The second terminal of the switching component SW501 is connected to the first terminal of the capacitor Cm1.

[0093] The control terminal of the SW501 switch assembly can be connected to, for example... Figure 1 The output of the driving circuit 90 shown receives a trough time pulse signal VTPS from the driving circuit 90. Based on the trough time pulse signal VTPS, at each trough time point when the voltage signal of capacitor Cm1 after charging or discharging by the simulation control circuit 20 reaches the trough, the switching component SW501 is turned on to pull the voltage signal of capacitor Cm1 to a trough voltage.

[0094] Please see Figure 5 This is a circuit diagram of the inductor current simulation circuit using a closed loop according to the fifth embodiment of the present invention. The similarities between the fifth embodiment and the first embodiment will not be repeated here.

[0095] One difference between the fifth embodiment and the first embodiment is that the capacitor Cm1 in the first embodiment is a fixed capacitor, but the capacitor Cm2 in the fifth embodiment is a variable capacitor and the control terminal of this variable capacitor is connected to the simulation control circuit 20 so that the capacitance value of the capacitor Cm2 can be adjusted by the simulation control circuit 20.

[0096] The simulation control circuit 20 outputs a simulation voltage signal Vcomp2 to the control terminal of capacitor Cm2 based on the current sensing signal Isen received from the current sensing circuit 10, so as to adjust the capacitance value of capacitor Cm2 according to the voltage value of the simulation voltage signal Vcomp2.

[0097] In the fifth embodiment, the charging and discharging circuit 32 does not rely on the simulated voltage signal Vcomp2, but rather on the input voltage Vin of the first terminal of the upper bridge switch UG of the power converter and the output voltage VOUT of the power converter (i.e., the voltage at the node between the second terminal of the inductor L and the first terminal of the output capacitor Cout) or both, to output a charging and discharging current to the first terminal of the capacitor Cm2 to charge the capacitor Cm2.

[0098] The feedback circuit 40 can output a feedback signal Iemu2 to the simulation control circuit 20 based on the voltage or current signal of the capacitor Cm2. For example, the feedback circuit 40 obtains the voltage signal of the capacitor Cm2, and then converts the voltage signal of the capacitor Cm2 into a current signal as the feedback signal Iemu2 and outputs it to the simulation control circuit 20. This is an example, and the present invention is not limited thereto.

[0099] Next, the simulation control circuit 20 can compensate the simulation voltage signal Vcomp2 based on the feedback signal Iemu2 received from the feedback circuit 40, and output the compensated simulation voltage signal Vcomp2 to the control terminal of the capacitor Cm2, so as to adjust the capacitance value of the capacitor Cm2 according to the voltage value of the compensated simulation voltage signal Vcomp2.

[0100] In other words, the simulation control circuit 20 can adjust the capacitance value of capacitor Cm2 based on the current sensing signal Isen received from the current sensing circuit 10, the feedback signal Iemu2 received from the feedback circuit 40, or both.

[0101] Please see Figure 6 This is a circuit diagram of the simulation control circuit of the closed-loop inductor current simulation circuit according to the sixth embodiment of the present invention. The similarities between the sixth embodiment and the second embodiment will not be repeated here.

[0102] like Figure 6 The simulation control circuit 20 shown can be used with, for example Figure 2 The simulation control circuit 20 shown is the same; it is only illustrated here as an example, and the invention is not limited thereto. Figure 5 The configuration within the simulation control circuit 20 shown can be compared with, for example... Figure 6 The configuration within the simulation control circuit 20 shown is the same.

[0103] Figure 6 The sixth embodiment and Figure 2 The second embodiment differs only in that, Figure 2 The output terminal of the counter 204 in the simulation control circuit 20 is connected to the input terminal of the charging and discharging circuit 30, but Figure 6 The output terminal of the counter 204 of the simulation control circuit 20 is connected to the control terminal of the capacitor Cm2. In the sixth embodiment, the capacitance value of the capacitor Cm2 is adjusted according to the voltage value of the simulation voltage signal Vcomp2 output by the counter 204 of the simulation control circuit 20.

[0104] Please see Figure 7 This is a circuit diagram of the charging and discharging circuit of the inductor current simulation circuit using a closed loop according to the seventh embodiment of the present invention.

[0105] like Figure 7 The charging and discharging circuit 32 shown can be used with, for example Figure 3 The charging and discharging circuit 32 shown is the same; it is only illustrated here as an example, and the invention is not limited thereto. Figure 5 The configuration within the charging / discharging circuit 32 shown can be used with, for example... Figure 7 The configuration within the charging / discharging circuit 32 shown is the same. The similarities between the seventh embodiment and the third embodiment will not be repeated here.

[0106] Figure 7 The seventh embodiment and Figure 3 The difference in the embodiments is that, Figure 3 The first charging resistor R41 and the second charging resistor R51 are variable resistors. The resistance value of these variable resistors is adjusted according to the voltage of the simulated voltage signal Vcomp1. Figure 7 The first charging resistor R42 and the second charging resistor R52 are fixed resistors. The resistance value of these fixed resistors is constant and does not change with the voltage value of the simulated voltage signal Vcomp2.

[0107] Furthermore, Figure 3 The second terminal of the switching component SW1 in the charging / discharging circuit 31 and the first terminal of the fourth transistor T4 are connected to the first terminal of the capacitor Cm1, which is a fixed capacitor. Figure 7 The second terminal of the switching component SW1 of the charging and discharging circuit 32 and the first terminal of the fourth transistor T4 are connected to the first terminal of the capacitor Cm2, which is a variable capacitor.

[0108] Please see Figure 8 This is a circuit diagram of the initial control circuit of the closed-loop inductor current simulation circuit of the eighth embodiment of the present invention. The similarities between the eighth embodiment and the fourth embodiment will not be repeated here.

[0109] Figure 4 The fourth embodiment and Figure 8 The difference in the eighth embodiment is that, Figure 4 The second terminal of the switching component SW501 is connected to the first terminal of the fixed capacitor Cm1, but the simulation control circuit 20 is not connected to capacitor Cm1. Figure 8 The second terminal of the switching component SW501 is connected to the first terminal of the variable capacitor Cm2, and the simulation control circuit 20 is connected to the control terminal of the variable capacitor Cm2 to adjust the capacitance value of the variable capacitor Cm2.

[0110] In summary, this invention provides an inductor current simulation circuit that employs a closed loop. It uses a circuit architecture different from the detection circuit of a traditional power converter to detect multiple current values ​​of multiple waveforms of the current signal of the lower bridge switch of the power converter, and accurately simulates complete information of the inductor current based on the detected multiple current values ​​of multiple waveforms of the lower bridge switch.

[0111] The above-disclosed content is only a preferred embodiment of the present invention and is not intended to limit the claims of the present invention. Therefore, all equivalent technical changes made based on the description and drawings of the present invention are included in the claims of the present invention.

Claims

1. A closed-loop inductor current simulation circuit, suitable for power converters, the power converter comprising a drive circuit, an upper bridge switch, a lower bridge switch, an inductor, and an output capacitor; the output terminal of the drive circuit is connected to the control terminals of the upper bridge switch and the lower bridge switch; a first terminal of the upper bridge switch is coupled to an input voltage; a second terminal of the upper bridge switch is connected to the first terminal of the lower bridge switch; the second terminal of the lower bridge switch is grounded; a node between the second terminal of the upper bridge switch and the first terminal of the lower bridge switch is connected to the first terminal of the inductor; the second terminal of the inductor is connected to the first terminal of the output capacitor; and the second terminal of the output capacitor is grounded. The circuit is characterized in that... The inductor current simulation circuit includes: A current sensing circuit is connected to the first terminal of the lower bridge switch and configured to sense the current flowing through the first terminal of the lower bridge switch to output a current sensing signal. A simulation control circuit, connected to the current sensing circuit, is configured to determine multiple voltage values ​​of multiple waveforms of a simulated voltage signal based on multiple current values ​​of the current sensing signal, and output the simulated voltage signal. A feedback circuit is connected to the first terminal of a capacitor and the simulation control circuit. The second terminal of the capacitor is grounded. The feedback circuit is configured to output a feedback signal based on the voltage signal or current signal of the capacitor. The simulation control circuit compensates for the simulation voltage signal based on the feedback signal and outputs the compensated simulation voltage signal. as well as A charging and discharging circuit is connected to the first terminal of the capacitor; When the simulation control circuit outputs the simulation voltage signal to the connected charging and discharging circuit, the charging and discharging circuit outputs a charging and discharging current to the first terminal of the capacitor based on the simulation voltage signal. When the simulation control circuit outputs the simulation voltage signal to the control terminal of the connected capacitor to adjust the capacitance value, the charging and discharging circuit outputs another charging and discharging current to the first terminal of the capacitor based on the input voltage, the voltage of the node between the second terminal of the inductor and the first terminal of the output capacitor, or both.

2. The inductor current simulation circuit employing a closed loop according to claim 1, characterized in that, The feedback circuit obtains the voltage signal of the capacitor, and then converts the voltage signal of the capacitor into a current signal as the feedback signal.

3. The inductor current simulation circuit employing a closed loop according to claim 1, characterized in that, The simulation control circuit includes a sample-and-hold circuit configured to sample and hold multiple current values ​​on multiple bands of multiple waveforms of the current sensing signal and the feedback signal.

4. The inductor current simulation circuit employing a closed loop according to claim 3, characterized in that, The plurality of current values ​​sampled and held by the sample-and-hold circuit include the trough values ​​of one or more of the plurality of waveforms of the current sensing signal, the feedback signal, or both.

5. The inductor current simulation circuit employing a closed loop according to claim 3, characterized in that, The sample and hold circuit samples and holds the plurality of current values ​​including the current sensing signal, the feedback signal, or both, at the current value when the current time reaches half the time the lower bridge switch is turned on.

6. The inductor current simulation circuit employing a closed loop according to claim 3, characterized in that, The simulation control circuit also includes an arithmetic circuit connected to the sampling and holding circuit, configured to calculate the difference between the plurality of current values ​​at different time points on each of the current sensing signals in each band.

7. The inductor current simulation circuit employing a closed loop according to claim 6, characterized in that, The computing circuit is configured to calculate the difference between the plurality of current values ​​at different time points on each of the bands of the feedback signal.

8. The inductor current simulation circuit employing a closed loop according to claim 7, characterized in that, The simulation control circuit further includes a first resistor and a second resistor. A first end of the first resistor and a first end of the second resistor are connected to the arithmetic circuit and the charging / discharging circuit. A second end of the first resistor and a second end of the second resistor are grounded. The arithmetic circuit provides the difference between the plurality of current values ​​of the current sensing signal to the first resistor and provides the difference between the plurality of current values ​​of the feedback signal to the second resistor. The voltage of the simulated voltage signal depends on the voltage of the first resistor, the second resistor, or both.

9. The inductor current simulation circuit employing a closed loop according to claim 8, characterized in that, The simulation control circuit further includes a comparison circuit connected to the first terminal of the first resistor and the first terminal of the second resistor, configured to compare the voltage at the first terminal of the first resistor with the voltage at the first terminal of the second resistor to output a comparison signal, wherein the voltage of the simulation voltage signal depends on the comparison signal.

10. The inductor current simulation circuit employing a closed loop according to claim 9, characterized in that, The simulation control circuit also includes a counter connected to the comparison circuit, configured to count according to the comparison signal to output the simulation voltage signal.

11. The inductor current simulation circuit employing a closed loop according to claim 10, characterized in that, The simulation control circuit further includes a third resistor, a first end of which is connected to the sampling and holding circuit, a second end of which is grounded, and the third resistor is configured to receive an initial current for each waveform of the current sensing signal sampled by the sampling and holding circuit, and the voltage of the third resistor is provided to the capacitor.

12. The inductor current simulation circuit employing a closed loop according to claim 11, characterized in that, The inductor current simulation circuit also includes: An initial control circuit is connected to the simulation control circuit and the first terminal of the capacitor. The simulation control circuit outputs an initial signal based on the trough current of the current sensing signal or the voltage of the third resistor after being charged by the starting current. The initial control circuit outputs an initial current to the capacitor based on the initial signal to pull the voltage of the capacitor's voltage signal to a trough voltage.

13. The inductor current simulation circuit employing a closed loop according to claim 12, characterized in that, The initial control circuit includes a switching component. The first end of the switching component is connected to the simulation control circuit, and the second end of the switching component is connected to the first end of the capacitor. The control terminal of the switching component is coupled to a trough time pulse signal, and the switching component is turned on or off according to the level of the trough time pulse signal.

14. The inductor current simulation circuit employing a closed loop according to claim 1, characterized in that, The charging and discharging circuit includes a first comparator, a first charging resistor, and a first transistor. The first input terminal of the first comparator is connected to the node between the second terminal of the inductor and the first terminal of the output capacitor. The second input terminal of the first comparator is connected to the first terminal of the first charging resistor, and the second terminal of the first charging resistor is grounded. The output terminal of the first comparator is connected to the control terminal of the first transistor. The first terminal of the first transistor is coupled to a shared voltage. The second terminal of the first transistor is connected to the first terminal of the first charging resistor. The first terminal of the capacitor is connected to the first terminal of the first transistor.

15. The inductor current simulation circuit employing a closed loop according to claim 14, characterized in that, The simulation control circuit is connected to the control terminal of the first charging resistor to output the simulation voltage signal to the control terminal of the first charging resistor in order to adjust the resistance value of the first charging resistor.

16. The inductor current simulation circuit employing a closed loop according to claim 14, characterized in that, The charging and discharging circuit further includes a second transistor, the control terminal of which is connected to the output terminal of the first comparator, the first terminal of which is coupled to the shared voltage, and the second terminal of which is connected to the first terminal of the capacitor.

17. The inductor current simulation circuit employing a closed loop according to claim 16, characterized in that, The charging and discharging circuit further includes a third transistor and a fourth transistor. The first terminal and the control terminal of the third transistor are connected to the second terminal of the second transistor and the control terminal of the fourth transistor. The first terminal of the fourth transistor is connected to the first terminal of the first charging resistor. The second terminals of the third transistor and the fourth transistor are grounded.

18. The inductor current simulation circuit employing a closed loop according to claim 17, characterized in that, The charging and discharging circuit further includes a second comparator, a second charging resistor, and a fifth transistor. The first input terminal of the second comparator is coupled to the input voltage, the second input terminal of the second comparator is connected to the first terminal of the second charging resistor, the second terminal of the second charging resistor is grounded, the output terminal of the first comparator is connected to the control terminal of the fifth transistor, the first terminal of the fifth transistor is coupled to the shared voltage, the second terminal of the fifth transistor is connected to the first terminal of the second charging resistor, and the first terminal of the capacitor is connected to the first terminal of the fifth transistor.

19. The inductor current simulation circuit employing a closed loop according to claim 18, characterized in that, The simulation control circuit is connected to the control terminal of the second charging resistor to output the simulation voltage signal to the control terminal of the second charging resistor in order to adjust the resistance value of the second charging resistor.

20. The inductor current simulation circuit employing a closed loop according to claim 19, characterized in that, The charging and discharging circuit further includes a sixth transistor, the control terminal of which is connected to the output terminal of the second comparator, the first terminal of which is coupled to the shared voltage, and the second terminal of which is connected to the first terminal of the capacitor.

21. The inductor current simulation circuit employing a closed loop according to claim 20, characterized in that, The charging and discharging circuit further includes a switching assembly, a first end of which is connected to the second end of the sixth transistor, a second end of which is connected to the first end of the capacitor, and a control end of which is connected to the driving circuit to receive an upper bridge conduction signal from the driving circuit for controlling the operation of the upper bridge switch. The upper bridge switch and the switching assembly are turned on during the conduction time of the upper bridge conduction signal.

Images