A topcon solar cell and a method for manufacturing the same

Abstract

The application discloses a Topcon solar cell, which comprises a silicon wafer substrate and a back electrode, a tunneling oxide layer is arranged on the back surface of the silicon wafer substrate, a doped polysilicon layer is arranged on the corresponding area of the back electrode on the tunneling oxide layer, the back electrode is arranged on the doped polysilicon layer, and a passivation layer is arranged on the tunneling oxide layer except the corresponding area of the back electrode. The application discloses a preparation method of the Topcon solar cell, after an amorphous silicon layer is deposited on the tunneling oxide layer on the back surface of the silicon wafer substrate, a polysilicon area is formed through heat treatment, and then the amorphous silicon is selectively etched by using an etchant to reserve the polysilicon and form the doped polysilicon layer. The application can reduce the parasitic absorption of incident light, enhance the utilization of light, improve the passivation effect, improve the short-circuit current and open-circuit voltage of the cell, and improve the photoelectric conversion efficiency of the cell.

Description

TECHNICAL FIELD

[0001] The present application relates to a kind of Topcon solar cell and its preparation method, belong to photoelectric conversion device technical field. BACKGROUND

[0002] The structure of Topcon solar cell mainly includes silicon wafer substrate: responsible for absorbing sunlight and generating photo-generated current. Doped layer and passivation anti-reflection layer are sequentially arranged on the front of silicon wafer substrate, and positive electrode is arranged. The back of the silicon wafer substrate is a very thin tunneling oxide layer as the charge transport channel between the silicon wafer substrate and the doped polysilicon, a layer of doped polysilicon layer and passivation layer, and back electrode is arranged.

[0003] In the prior art, Topcon solar cell mainly uses the structure of cell back tunneling oxide layer and doped polysilicon layer to block the passage of minority carriers and allow the passage of majority carriers, forming a very high carrier concentration barrier, enhancing passivation and contact effect, reducing recombination loss to improve cell efficiency. However, the existence of polysilicon in the non-contact area of the back doped polysilicon layer affects the parasitic light absorption of long-wave band, resulting in loss of photoelectric conversion efficiency. SUMMARY

[0004] In view of the defects of the above prior art, the present application provides a kind of Topcon solar cell, solve the problem of parasitic light absorption of long-wave band on the back of the cell to improve the photoelectric conversion efficiency of the cell. The present application also provides a preparation method of Topcon solar cell.

[0005] The technical scheme of the present application is as follows:

[0006] A kind of Topcon solar cell, including silicon wafer substrate and back electrode, the back of the silicon wafer substrate is provided with tunneling oxide layer, the corresponding area of the back electrode is provided with doped polysilicon layer on the tunneling oxide layer, the back electrode is arranged on the doped polysilicon layer, and the passivation layer is arranged on the tunneling oxide layer except the corresponding area of the back electrode.

[0007] A kind of Topcon solar cell, including silicon wafer substrate and back electrode, the corresponding area of the back of the silicon wafer substrate is sequentially provided with tunneling oxide layer and doped polysilicon layer, the back electrode is arranged on the doped polysilicon layer, and the passivation layer is arranged on the back of the silicon wafer substrate except the corresponding area of the back electrode.

[0008] Further, the width of the back electrode is 20-50 μm, and the width of the doped polysilicon layer under the back electrode is 100-200 μm.

[0009] Further, the crystal size in the doped polysilicon layer decreases from the center to both sides along the extension direction of the cell surface.

[0010] Further, two sides of the top surface of the doped polysilicon layer provided with the back electrode are formed with trapezoidal chamfers, and the chamfer angle is 45°-80°.

[0011] Another technical solution of the application is as follows:

[0012] A preparation method of a Topcon solar cell comprises the following steps: preparing a tunneling oxide layer on the back surface of a silicon wafer substrate, depositing a doped amorphous silicon layer on the surface of the tunneling oxide layer, performing heat treatment on the doped amorphous silicon layer according to a preset pattern of a back electrode to convert amorphous silicon into polysilicon, using an etchant to selectively etch and remove the amorphous silicon region and retain the polysilicon region of the doped amorphous silicon layer after heat treatment to form a doped polysilicon layer, depositing a passivation layer on the surface after selective etching, and finally screen printing a back electrode on the surface of the doped polysilicon layer.

[0013] Further, the etchant selectively removes the tunneling oxide layer corresponding to the amorphous silicon region when selectively etching and removing the amorphous silicon region.

[0014] Further, the etching rate ratio of the amorphous silicon to the polysilicon of the doped amorphous silicon layer after heat treatment is >10.

[0015] Further, the etchant comprises an oxidizing agent and hydrofluoric acid, and the oxidizing agent is one of heavy chromic acid H2Cr2O7, potassium dichromate K2Cr2O7, permanganic acid HMnO4, potassium permanganate, perchloric acid HClO4, hypoiodous acid HIO, chloric acid HClO3, bromic acid HBrO3, and chromium trioxide CrO3.

[0016] Further, the heat treatment is laser scanning or electron beam scanning.

[0017] The technical solution provided by the application has the following advantages:

[0018] The doped polysilicon layer on the back side of the Topcon cell is formed in the area where the back electrode is needed by using heat treatment conversion, and the doped amorphous silicon layer in other areas is removed, thereby reducing the polysilicon in the non-passivated contact area on the back side of the existing Topcon cell, greatly reducing the light absorption in the long-wave band, and improving the cell efficiency.

[0019] Further, the crystal size in the doped polysilicon layer decreases from the center to both sides along the direction of the cell surface extension. The selective etching forms a trapezoidal chamfer on both sides of the top surface of the doped polysilicon layer in the area where the back electrode is arranged to thin the doped polysilicon layer. On the one hand, the thinned polysilicon reduces the parasitic absorption of incident light, enhances the utilization of light, and improves the short-circuit current of the cell. On the other hand, the peripheral part of the center part is mainly nanocrystals, which has a large surface area and is not easy to achieve good passivation effect. After thinning, it is also beneficial to improve the passivation performance and improve the open-circuit voltage. The above two aspects comprehensively improve the photoelectric conversion efficiency of the cell. BRIEF DESCRIPTION OF DRAWINGS

[0020] Figure 1 is a structural schematic diagram of a Topcon solar cell of Example 1.

[0021] Figure 2 is a partial structural schematic diagram of a passivation contact on the back side of the Topcon solar cell of Example 1.

[0022] Figure 3 is a structural schematic diagram of a Topcon solar cell of Example 1. DETAILED DESCRIPTION

[0023] The present application will be further described below in conjunction with examples, which should be understood as only for illustrating the present application and not for limiting the scope of the present application. After reading the present description, those skilled in the art can make various modifications to the present description, which all fall within the scope defined by the claims attached hereto.

[0024] Example 1, please combine Figure 1 and Figure 2 shown, the Topcon solar cell involved in the present embodiment includes an n-type silicon wafer substrate 100, a p-type doped layer 101 is arranged on the front surface of the n-type silicon wafer 100 substrate to form an emitter, and a passivation anti-reflection layer 102 is arranged on the surface of the p-type doped layer 101. Generally, the passivation anti-reflection layer 102 is Al2O3 and a silicon nitride (SiN x ) coating layer is coated on the surface thereof. An Ag positive electrode 103 is further led out on the surface of the p-type doped layer 101.

[0025] A very thin tunneling oxide layer 104, mainly silicon dioxide, is provided on the back surface of the n-type silicon wafer 100 substrate, and a doped polysilicon layer 106 is provided on the tunneling oxide layer 104 in the area where the back electrode 105 is to be provided. The area of the tunneling oxide layer 104 where the back electrode 105 is not to be provided is covered with a passivation layer 107. It should be noted that the passivation layer 107 is directly provided on the area of the tunneling oxide layer 104 where the back electrode 105 is not to be provided, rather than only on the area where the back electrode 105 is not to be provided. In actual production, the passivation layer 107 also covers the doped polysilicon layer 106. The Ag back electrode 105 is led out on the doped polysilicon layer 106.

[0026] The doped polysilicon layer 106 is obtained by heat treating (generally by laser scanning or electron beam scanning, but not limited thereto) a doped amorphous silicon layer in a predetermined pattern, and then selectively etching the doped amorphous silicon with an etchant to retain the doped polysilicon part. The width of the Ag back electrode 105 can be 20-50 μm, and the width of the corresponding doped polysilicon layer 106 under the Ag back electrode 105 is 100-200 μm. The doped polysilicon layer 106 in this area also has a parasitic absorption problem due to not being thinned. Therefore, by taking advantage of the difference in crystallization energy of heat treatment, a larger-sized crystal is formed in the center of the doped polysilicon layer, and the periphery of the doped polysilicon layer extending from the center to both sides of the cell surface is mainly composed of smaller-sized nanocrystals. After selective etching, a trapezoidal chamfer A with a chamfer angle of 45-80° is formed on both sides of the top surface of the doped polysilicon layer 106, so as to thin the polysilicon, reduce the parasitic absorption of incident light, enhance the utilization of light, increase the short-circuit current of the cell, reduce the small-sized nanocrystals, improve the passivation performance, and increase the open-circuit voltage.

[0027] The method for producing the Topcon solar cell of the present embodiment is as follows:

[0028] First, the surface damage formed during the production of the n-type silicon wafer 100 substrate is removed, and then the n-type silicon wafer 100 substrate is cleaned and preheated, and a p-type doped layer 101 is formed on the front surface by boron diffusion using trimethyl borate, tripropyl borate, or boron tribromide as the boron source to form an emitter.

[0029] The back surface of the n-type silicon wafer 100 substrate is etched and polished, and then the n-type silicon wafer 100 substrate is exposed to a high-temperature oxygen environment at 800-1200°C to form a very thin tunneling oxide layer 104, i.e., a silicon dioxide layer, on the back surface. An n-type doped amorphous silicon layer is then deposited on the surface of the tunneling oxide layer 104 by LPCVD.

[0030] The n-type amorphous silicon layer is scanned according to the preset pattern of the back electrode 105 by using a pulsed laser or a continuous wave laser with a wavelength ranging from 190 nm to 545 nm. In this embodiment, the laser radiation source is an Ar+ laser, and the main wavelengths are 488 nm and 514.5 nm. The laser scanning line width is 20-300 µm. The amorphous silicon in the scanned area is converted into polycrystalline silicon. Due to the difference in laser energy, the temperature in the central area is high enough to induce complete melting of the amorphous silicon. Therefore, the central part of the scanned area mainly consists of a small number of large crystals, and the periphery of the central part (i.e., the area extending to both sides of the central area along the surface of the cell) mainly consists of small nanocrystals.

[0031] Then, selective etching is realized by using the different etching rates of amorphous silicon and polycrystalline silicon in etchants. The etchant is composed of a strong oxidant and hydrofluoric acid. The strong oxidant is selected from one of the following: dichromic acid H2Cr2O7, potassium dichromate K2Cr2O7, permanganic acid HMnO4, potassium permanganate, perchloric acid HClO4, hypoiodous acid HIO, chloric acid HClO3, bromic acid HBrO3, and chromium trioxide CrO3. The strong oxidant is used to oxidize the amorphous silicon layer, and the hydrofluoric acid is used to remove the SiO2 formed by oxidation. In addition, part of HNO3 can be added to increase the oxidation rate and thus promote corrosion.

[0032] In this embodiment, the etchant is composed of potassium dichromate H2Cr2O7 and hydrofluoric acid HF diluted in DI water, and the proportion is K2Cr2O7:H2O:HF = 22 g:500 ml:1000 ml. In actual application, the etching rate can be adjusted and controlled according to the relative proportion. The etching speed of the etchant on amorphous silicon is about 100 nm / s, and the etching speed ratio (etching selectivity) of amorphous silicon to polycrystalline silicon is >10.

[0033] The mechanism of selective etching is that the potassium dichromate component in the etchant oxidizes the weak Si-Si bonds in the grain boundary of amorphous silicon and polycrystalline silicon to produce SiO2, which is then etched by hydrofluoric acid. The central part of the polycrystalline silicon after laser scanning mainly consists of large crystals, has high crystallinity, and has strong corrosion resistance. The crystallinity of the peripheral part is lower than that of the central part, and the corrosion resistance is slightly weaker. Therefore, after selective etching, a trapezoidal chamfer A is formed on both sides of the top surface of the doped polycrystalline silicon layer 106. The chamfer angle is 45°-80°, and in this embodiment, the chamfer angle is about 45°.

[0034] After selective etching, conventional BSG etching and cleaning texturing are performed. Then, a passivation antireflection layer 102 is deposited on the p-type doped layer surface on the front side, and a passivation layer 107 is deposited on the back side. The passivation layer 107 directly covers the tunneling oxide layer 104 and the doped polycrystalline silicon layer 106. Then, an Ag positive electrode 103 is formed on the front side and an Ag back electrode 105 is formed on the back side by screen printing. The Ag back electrode 105 is aligned with the doped polycrystalline silicon layer 106 and contacts and is led out from the doped polycrystalline silicon layer 106. Its width is about 20 to 50 μm. The width of the retained doped polycrystalline silicon layer 106 is 100 to 200 μm. Finally, the solar cell structure is rapidly sintered.

[0035] Example 2, please refer to Figure 3 As shown, the Topcon solar cell involved in this embodiment includes an n-type silicon wafer substrate 200. A p-type doped layer 201 is disposed on the front side of the n-type silicon wafer substrate 200 to form an emitter. A passivation antireflection layer 202 is disposed on the surface of the p-type doped layer 201. Generally, the passivation antireflection layer 202 is Al2O3 and silicon nitride (SiN) is coated on its surface. x A coating is applied. An Ag positive electrode 203 is then drawn out on the surface of the p-type doped layer 201.

[0036] A thin tunneling oxide layer 204, mainly composed of silicon dioxide, is disposed on the back side of the n-type silicon substrate 200 in the area where a back electrode 205 needs to be set. A doped polysilicon layer 206 is then disposed on the tunneling oxide layer 204. A passivation layer 207 covers other areas on the back side of the n-type silicon substrate 200 where a back electrode 205 does not need to be set. Similar to Example 1, the passivation layer 207 directly covers other areas of the n-type silicon substrate 200 where a back electrode 205 does not need to be set, rather than only covering those areas. In actual fabrication, the passivation layer 107 also covers the doped polysilicon layer 206. The Ag back electrode 205 is then led out from the doped polysilicon layer 206.

[0037] The fabrication method of the Topcon solar cell in this embodiment is the same as that in Embodiment 1. The difference is that, during selective etching, in addition to removing the doped amorphous silicon portion that was not scanned by the laser, the tunneling oxide layer that was not covered by the doped polycrystalline silicon layer is also removed. The passivation layer on the back side is directly covered on the back side of the n-type amorphous silicon substrate.

Claims

1. A Topcon solar cell comprising a silicon wafer substrate and a back electrode, the back surface of the silicon wafer substrate being provided with a tunneling oxide layer, characterized in that, The corresponding area of the back electrode on the tunneling oxide layer is provided with a doped polysilicon layer, the back electrode is arranged on the doped polysilicon layer, a passivation layer is arranged on the tunneling oxide layer except the corresponding area of the back electrode, the crystal size of the doped polysilicon layer decreases from the center to both sides along the extending direction of the cell surface, and the two sides of the top surface of the doped polysilicon layer provided with the back electrode form a trapezoidal chamfer, and the chamfer angle is 45°-80°.

2. The Topcon solar cell according to claim 1, characterized by The width of the back electrode is 20-50 μm, and the width of the doped polysilicon layer under the back electrode is 100-200 μm.

3. A Topcon solar cell comprising a silicon wafer substrate and a back electrode, characterized by, The corresponding area of the back electrode on the tunneling oxide layer is provided with a doped polysilicon layer, the back electrode is arranged on the doped polysilicon layer, a passivation layer is arranged on the tunneling oxide layer except the corresponding area of the back electrode, the crystal size of the doped polysilicon layer decreases from the center to both sides along the extending direction of the cell surface, and the two sides of the top surface of the doped polysilicon layer provided with the back electrode form a trapezoidal chamfer, and the chamfer angle is 45°-80°.

4. The Topcon solar cell according to claim 3, characterized by The width of the back electrode is 20-50 μm, and the width of the doped polysilicon layer under the back electrode is 100-200 μm.

5. A method for manufacturing a Topcon solar cell, characterized by, The method comprises the steps of: preparing a tunneling oxide layer on the back surface of a silicon wafer substrate, depositing a doped amorphous silicon layer on the surface of the tunneling oxide layer, performing heat treatment on the doped amorphous silicon layer according to a preset pattern of arranging a back electrode to convert amorphous silicon into polysilicon, selectively etching and removing the amorphous silicon region of the doped amorphous silicon layer after heat treatment to retain the polysilicon region and form a doped polysilicon layer, depositing a passivation layer on the surface after selective etching, and finally screen printing a back electrode on the surface of the doped polysilicon layer, the crystal size of the doped polysilicon layer decreases from the center to both sides along the extending direction of the cell surface, and the two sides of the top surface of the doped polysilicon layer provided with the back electrode form a trapezoidal chamfer, and the chamfer angle is 45°-80°.

6. The method of producing a Topcon solar cell according to claim 5, wherein The etchant selectively etches and removes the tunneling oxide layer corresponding to the amorphous silicon region when selectively etching and removing the amorphous silicon region.

7. The method of producing a Topcon solar cell according to claim 5, wherein The etching rate ratio of the amorphous silicon to the polysilicon of the doped amorphous silicon layer after heat treatment is greater than 10.

8. The method of producing a Topcon solar cell according to claim 5, wherein The etchant comprises an oxidizing agent and hydrofluoric acid, and the oxidizing agent is one of heavy chromic acid H2Cr2O7, potassium dichromate K2Cr2O7, permanganic acid HMnO4, potassium permanganate, perchloric acid HClO4, hypoiodous acid HIO, chloric acid HClO3, bromic acid HBrO3, and chromium trioxide CrO3.

9. The method of producing a Topcon solar cell according to claim 5, wherein The heat treatment is laser scanning or electron beam scanning.

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