Reset method and electronic device

Abstract

The embodiment of the application is suitable for the technical field of terminal equipment, and provides a reset method and an electronic device. The electronic device comprises a master device and a slave device. The master device is used for sending a clock signal to the slave device. Data interaction is performed between the master device and the slave device based on the clock signal. The slave device sends early warning information to the master device. When the master device receives the early warning information, the master device is reset. The early warning information is used for indicating that the master device is in an abnormal state. Thus, the reset operation of the master device can solve the hanging problem of the master device. Compared with the traditional method which can only solve the hanging problem of the slave device, the reset method provided by the embodiment of the application can solve the hanging problem of the master device when the number of electronic devices in the electronic device increases or the size of the electronic device decreases, thereby effectively restoring the data interaction between the electronic devices.

Description

Technical Field

[0001] This application relates to the technical field of terminal devices, and more specifically, to a reset method and an electronic device. Background Technology

[0002] Electronic devices typically contain multiple electronic components that communicate with each other via a Serial Peripheral Interface (SPI) to perform different functions.

[0003] The aforementioned electronic devices typically include one master device and multiple slave devices. The master device sends clock signals to each slave device to keep them synchronized and enable data exchange. Electromagnetic interference in electronic devices can prevent slave devices from receiving the clock signals from the master device, thus preventing them from maintaining synchronization and hindering data exchange. This phenomenon is known as device hang. In the event of a device hang, the slave devices are usually reset to restore synchronization between the master and slave devices. However, with the increasing number of electronic devices and the decreasing size of devices, traditional methods are no longer sufficient to restore data exchange between them.

[0004] Therefore, at present, how to restore the data interaction between various electronic devices when the device is dead has become an urgent problem to be solved. Summary of the Invention

[0005] This application provides a reset method that can effectively restore data interaction between various electronic devices.

[0006] Firstly, a reset method is provided, which is applied to a master device in an electronic device. The master device sends a clock signal to a slave device, and the master device and the slave device interact with each other based on the clock signal. The electronic device includes a master device and a slave device. The method includes:

[0007] Receive warning information sent by slave devices, which indicates that the master device is in an abnormal state;

[0008] Perform a reset operation based on the warning information.

[0009] The reset method provided in the embodiments of this application is applied to the master device in an electronic device. The master device is used to send clock signals to the slave device, and the master device and the slave device interact with each other based on the clock signals. The slave device sends a warning message to the master device. When the master device receives the warning message, it performs a reset operation. The warning message is used to indicate that the master device is in an abnormal state. In this way, when the chip size is getting smaller and the master device is in an abnormal state due to the influence of electromagnetic interference signals in the electronic device, the problem of the master device being stuck can be solved by resetting the master device. Compared with the traditional method, which can only solve the problem of the slave device being stuck, the reset method provided in the embodiments of this application can solve the problem of the master device being stuck when the number of electronic devices in the electronic device increases or the size of the electronic devices decreases, and thus can effectively restore the data interaction between electronic devices.

[0010] In one embodiment, the master device being in an abnormal state includes: a state where the chip select CS signal is at a first level and no clock signal is sent to the slave device.

[0011] It should be understood that the first level can be either a high level or a low level, and the embodiments of this application do not limit this.

[0012] In one embodiment, the master device being in an abnormal state includes: when the chip select CS signal is at the first level, no data interaction occurs between the master device and the slave device.

[0013] In one embodiment, the abnormal state of the master device includes: the time taken for the chip select CS signal to switch to the first level is less than a preset time threshold.

[0014] In one embodiment, the method further includes sending a reset command to the slave device, the reset command being used to instruct the slave device to perform a reset operation.

[0015] The reset method provided in the embodiments of this application involves the master device performing a reset operation when it receives a warning message from the slave device. Then, the master device sends a reset command to the slave device, instructing it to perform a reset operation. In other words, in the embodiments of this application, after the master device performs a reset operation on itself upon receiving a warning message from the slave device, it also sends a reset command to the slave device, enabling the slave device to perform a reset operation based on the reset command. This avoids the situation where resetting only the master device is insufficient to resolve the device hang-up problem in electronic devices when both the master and slave devices malfunction simultaneously, thereby further improving the reliability of resolving device hang-up problems in electronic devices.

[0016] In one embodiment, the reset instruction includes a first reset instruction or a second reset instruction. The first reset instruction is used to instruct the device to be reset by triggering the reset button of the slave device, and the second reset instruction is used to instruct the slave device to be reset through the serial peripheral interface (SPI).

[0017] Secondly, a reset method is provided, which is applied to a slave device in an electronic device. The master device sends a clock signal to the slave device, and the master and slave devices interact with each other based on the clock signal. The electronic device includes a master device and a slave device. The method includes:

[0018] The main device was detected to be in an abnormal state.

[0019] Send a warning message to the main device. The warning message is used to indicate that the main device is in an abnormal state.

[0020] The reset method provided in the embodiments of this application involves a slave device sending a first signal to a master device. This first signal requests data interaction with the master device. The slave device then detects whether it has received a clock signal from the master device. If no clock signal is detected, the slave device sends a warning message to the master device. This is equivalent to sending the warning message when a clock signal has not been detected after the slave device has already requested data interaction with the master device. This makes the warning message more accurate in indicating that the master device is in an abnormal state, thereby improving the accuracy of the master device's reset operation based on the warning message and more effectively solving the problem of device hang-up in electronic devices.

[0021] In one embodiment, detecting that the main device is in an abnormal state includes: sending a first signal to the main device, the first signal being used to request data interaction with the main device; detecting whether a clock signal sent by the main device is received; and if no clock signal sent by the main device is detected, determining that the main device is in an abnormal state.

[0022] It should be understood that the first signal can indicate an interrupt (INT) signal.

[0023] In one embodiment, the above-mentioned detection of the master device being in an abnormal state includes: when the chip select CS signal is detected to be at the first level, no data transmission is detected on the master transmit / slave receive signal line MOSI and the master receive / slave transmit signal line MISO between the master device and the slave device.

[0024] In one embodiment, detecting that the main device is in an abnormal state includes: detecting that the time taken for the chip select CS signal to convert to the first level is less than a preset time threshold.

[0025] In one embodiment, the master device being in an abnormal state includes: a state where the chip select CS signal is at a first level and no clock signal is sent to the slave device.

[0026] It should be understood that the first level can be either a high level or a low level, and the embodiments of this application do not limit this.

[0027] Thirdly, an electronic device is provided, including a unit for performing any of the methods of the first aspect. The device may be a chip within a terminal device. The device may include an acquisition unit and a processing unit.

[0028] When the device is a chip within a terminal device, the processing unit can be an internal processing unit of the chip, and the acquisition unit can be an output interface, pin, or circuit, etc.; the chip may also include a memory, which can be an internal memory of the chip (e.g., registers, cache, etc.) or an external memory (e.g., read-only memory, random access memory, etc.); the memory is used to store computer program code, and when the processor executes the computer program code stored in the memory, the chip performs any of the methods in the first aspect.

[0029] In one possible implementation, the memory is used to store computer program code; the processor executes the computer program code stored in the memory, and when the computer program code stored in the memory is executed, the processor performs the following: receiving warning information sent by the slave device, the warning information indicating that the master device is in an abnormal state; and performing a reset operation based on the warning information.

[0030] Fourthly, an electronic device is provided, including a unit for performing any of the methods of the second aspect. The device may be a chip within a terminal device. The device may include an acquisition unit and a processing unit.

[0031] When the device is a chip within a terminal device, the processing unit can be an internal processing unit of the chip, and the acquisition unit can be an output interface, pin, or circuit, etc.; the chip may also include a memory, which can be an internal memory of the chip (e.g., registers, cache, etc.) or an external memory (e.g., read-only memory, random access memory, etc.); the memory is used to store computer program code, and when the processor executes the computer program code stored in the memory, the chip performs any of the methods in the second aspect.

[0032] In one possible implementation, the memory is used to store computer program code; the processor executes the computer program code stored in the memory, and when the computer program code stored in the memory is executed, the processor performs the following: detecting that the main device is in an abnormal state; sending a warning message to the main device, the warning message indicating that the main device is in an abnormal state.

[0033] Fifthly, an electronic device is provided, comprising a master device and a slave device, the master device being configured to perform a method as described in any of the first aspects, and the slave device being configured to perform a method as described in any of the second aspects.

[0034] In one embodiment, the electronic device includes a mobile phone or a tablet computer, the main device includes a system-on-a-chip (SoC), and the slave device includes a fingerprint sensor.

[0035] In one embodiment, the electronic device includes a smart wearable device, the master device includes a microcontroller unit (MCU), and the slave device includes a heart rate sensor.

[0036] In a sixth aspect, a computer-readable storage medium is provided, which stores computer program code that, when executed by a reset device, causes the reset device to perform any of the reset methods in the first aspect, or causes the reset device to perform any of the reset methods in the second aspect.

[0037] In a seventh aspect, a computer program product is provided, comprising: computer program code, which, when executed by a reset device, causes the reset device to perform any of the methods in the first aspect, or causes the reset device to perform any of the methods in the second aspect.

[0038] The reset method and electronic device provided in this application include a master device and a slave device. The master device sends a clock signal to the slave device, and the master device and slave device interact with each other based on the clock signal. The slave device sends a warning message to the master device. When the master device receives the warning message, it performs a reset operation. The warning message indicates that the master device is in an abnormal state. This allows the master device to be reset when it is in an abnormal state due to electromagnetic interference signals in the electronic device, especially as chip sizes become smaller. Compared with traditional methods that can only solve the slave device's problem, the reset method provided in this application can solve the master device's problem when the number of electronic devices in the electronic device increases or the size of the electronic devices decreases, thereby effectively restoring data interaction between electronic devices. Attached Figure Description

[0039] Figure 1 This is a schematic diagram illustrating the connection relationship between a master device and a slave device;

[0040] Figure 2 This is a schematic diagram of the signal between a master device and a slave device;

[0041] Figure 3 This is a schematic diagram of a hardware system for an electronic device applicable to this application;

[0042] Figure 4 This is a schematic diagram of a software system applicable to an electronic device of this application;

[0043] Figure 5 This is a schematic diagram illustrating an application scenario of a reset method according to an embodiment of this application;

[0044] Figure 6 This is a schematic diagram illustrating an application scenario of another reset method in the embodiments of this application;

[0045] Figure 7 This is a schematic diagram illustrating an application scenario of another reset method in the embodiments of this application;

[0046] Figure 8 This is a flowchart illustrating a reset method provided in an embodiment of this application;

[0047] Figure 9 This is a schematic diagram of the signals between the master device and the slave device when the master device is in an abnormal state, as described in this application embodiment.

[0048] Figure 10 This is a flowchart illustrating another reset method provided in an embodiment of this application;

[0049] Figure 11 This is a flowchart illustrating another reset method provided in an embodiment of this application;

[0050] Figure 12 This is a flowchart illustrating another reset method provided in an embodiment of this application;

[0051] Figure 13 This is a schematic diagram of the structure of a master device and a slave device provided in an embodiment of this application;

[0052] Figure 14 This is a flowchart illustrating another reset method provided in an embodiment of this application;

[0053] Figure 15 This is a schematic diagram of the structure of a main device provided in this application;

[0054] Figure 16 This is a schematic diagram of the structure of a slave device provided in this application;

[0055] Figure 17 This is a schematic diagram of a reset electronic device provided in this application. Detailed Implementation

[0056] The technical solutions of the embodiments of this application will be described below with reference to the accompanying drawings. In the description of the embodiments of this application, unless otherwise stated, " / " means "or," for example, A / B can mean A or B; "and / or" in this text is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, and B existing alone. Furthermore, in the description of the embodiments of this application, "multiple" refers to two or more than two.

[0057] Hereinafter, the terms "first," "second," and "third" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first," "second," or "third" may explicitly or implicitly include one or more of that feature.

[0058] For ease of understanding, the examples provided are for reference only and are related to the concepts in the embodiments of this application.

[0059] Serial Peripheral Interface (SPI)

[0060] SPI stands for Synchronous Serial Interface, a high-speed, full-duplex synchronous communication bus. SPI typically operates in a master-slave mode, used in systems consisting of one master device and one or more slave devices. Generally, SPI requires four wires for data transmission:

[0061] 1. Chip Select (SS / CS) signal lines: These are used to select the slave device to communicate with. IIC master devices select the slave device by sending its address, while SPI master devices do not need to send the address; they simply pull the corresponding slave device's chip select signal low.

[0062] 2. Serial Clock (SCK): Similar to SCL in IIC, it provides the clock for SPI communication. SCK can also be simply referred to as Clock (CLK).

[0063] 3. Master Out Slave In / Serial Data Output (MOSI / SDO) signal line: This data line can only be used for the master device to send data to the slave device, that is, the master device outputs and the slave device inputs.

[0064] 4. Master In Slave Out / Serial Data Input (MISO / SDI) signal line: This data line can only be used for the slave device to send data to the master device, that is, the master device inputs and the slave device outputs.

[0065] For example, such as Figure 1 As shown in (a), the master and slave devices are connected via four data lines: CS, CLK, MOSI, and MISO. An interrupt signal (INT) also exists between the master and slave devices. After the master pulls SS low, it sends a clock signal to the slave device. For example, the clock signal sent by the master to the slave device is as follows: Figure 1 The CLK signal shown in (b) comprises two time slots. The master device transmits data to the slave device via MOSI in the first time slot and receives data from the slave device via MISO in the second time slot. During data transmission between the master and slave devices, the SS signal is low.

[0066] Currently, electronic devices typically use SPI to implement data exchange between master and slave devices. Generally, when a slave device needs to exchange data with the master, it sends an interrupt (INT) signal (equivalent to the first signal). The master device responds to the INT signal by pulling down the corresponding CS signal of the slave device and simultaneously sending an SCK signal (clock signal) to the slave. Based on the received clock signal, the slave device synchronizes with the master and exchanges data via MISO or MOSI. Typically, slave devices are small and highly susceptible to electromagnetic interference (EMI) within the electronic device. Therefore, in the event of an abnormal data exchange between the master and slave devices, the master device usually sends a reset command to the slave device to reset it and restore data exchange. However, with advancements in chip technology, the size of master devices has become increasingly smaller. Simultaneously, the number of electronic components in electronic devices has increased, leading to more severe EMI. Master devices can also be affected by EMI, causing them to malfunction and resulting in abnormal data exchange between the master and slave devices. Traditional methods, such as resetting the slave device, cannot completely resolve the problem of abnormal data interaction between master and slave devices in current electronic devices.

[0067] For example, in the case of normal communication between the master and slave devices, such as Figure 2 As shown in (a), when the INT signal of the slave device is low, the slave device is in an idle state, and the master device can exchange data with the slave device. Every preset time interval, the master device sends a pulse signal on CS, and simultaneously sends a clock signal along with the pulse on CS.

[0068] When the main component is subjected to electromagnetic interference signals and experiences a hang-up phenomenon, such as Figure 2 As shown in (b), when the INT signal of the slave device is low, the slave device is in an idle state, and the master device can exchange data with the slave device. At preset intervals, the master device sends a pulse signal on CS. However, due to electromagnetic interference, the slave device can only receive the pulse signal on CS and cannot receive the clock signal sent by the master device. Because the slave device cannot receive the clock signal sent by the master device, the master and slave devices cannot restore communication synchronization based on the clock signal, and therefore, data exchange between the master and slave devices cannot be resumed.

[0069] It should be understood that when the main device is subjected to electromagnetic interference signals and hangs up, the CS signal, CLK signal, and MOSI signal may also be abnormal. This application does not limit this.

[0070] In view of this, embodiments of this application provide a reset method applied to a master device in an electronic device. The master device sends a clock signal to a slave device, and the master and slave devices interact with each other based on the clock signal. The slave device sends a warning message to the master device. When the master device receives the warning message, it performs a reset operation. The warning message indicates that the master device is in an abnormal state. This allows the master device to resolve its dead state when it is affected by electromagnetic interference signals in the electronic device, especially as chip sizes become smaller. Compared with traditional methods that can only resolve slave device dead states, the reset method provided in this application can resolve master device dead states even when the number of electronic devices in the electronic device increases or the size of the electronic devices decreases, thereby effectively restoring data interaction between electronic devices.

[0071] The reset method provided in this application can be applied to electronic devices. Optionally, the electronic device includes a terminal device, which may also be referred to as a terminal, user equipment (UE), mobile station (MS), mobile terminal (MT), etc. The terminal device can be a mobile phone, smart TV, wearable device, tablet computer, computer with wireless transceiver function, virtual reality (VR) terminal device, augmented reality (AR) terminal device, wireless terminal in industrial control, wireless terminal in self-driving, wireless terminal in remote medical surgery, wireless terminal in smart grid, wireless terminal in transportation safety, wireless terminal in smart city, wireless terminal in smart home, etc. The embodiments of this application do not limit the specific technology or device form used in the terminal device.

[0072] For example, Figure 3 A schematic diagram of the structure of electronic device 100 is shown. Electronic device 100 may include a processor 110, an external memory interface 120, an internal memory 121, a universal serial bus (USB) interface 130, a charging management module 140, a power management module 141, a battery 142, antenna 1, antenna 2, a mobile communication module 150, a wireless communication module 160, an audio module 170, a speaker 170A, a receiver 170B, a microphone 170C, a headphone jack 170D, a sensor module 180, buttons 190, a motor 191, an indicator 192, a camera 193, a display screen 194, and a subscriber identification module (SIM) card interface 195, etc. The sensor module 180 may include a pressure sensor 180A, a gyroscope sensor 180B, a barometric pressure sensor 180C, a magnetic sensor 180D, an accelerometer sensor 180E, a distance sensor 180F, a proximity sensor 180G, a fingerprint sensor 180H, a temperature sensor 180J, a touch sensor 180K, an ambient light sensor 180L, a bone conduction sensor 180M, etc.

[0073] It is understood that the structures illustrated in the embodiments of this application do not constitute a specific limitation on the electronic device 100. In other embodiments of this application, the electronic device 100 may include more or fewer components than illustrated, or combine some components, or split some components, or have different component arrangements. The illustrated components may be implemented in hardware, software, or a combination of software and hardware.

[0074] Processor 110 may include one or more processing units, such as: application processor (AP), modem processor, graphics processing unit (GPU), image signal processor (ISP), controller, memory, video codec, digital signal processor (DSP), baseband processor, and / or neural network processing unit (NPU), etc. Different processing units may be independent devices or integrated into one or more processors.

[0075] The controller can be the nerve center and command center of the electronic device 100. The controller can generate operation control signals according to the instruction opcode and timing signals to complete the control of fetching and executing instructions.

[0076] The processor 110 may also include a memory for storing instructions and data. In some embodiments, the memory in the processor 110 is a cache memory. This memory can store instructions or data that the processor 110 has just used or that are used repeatedly. If the processor 110 needs to use the instruction or data again, it can retrieve it directly from the memory. This avoids repeated accesses, reduces the waiting time of the processor 110, and thus improves the efficiency of the system.

[0077] In some embodiments, the processor 110 may include one or more interfaces. Interfaces may include an inter-integrated circuit (I2C) interface, an inter-integrated circuit sound (I2S) interface, a pulse code modulation (PCM) interface, a universal asynchronous receiver / transmitter (UART) interface, a mobile industry processor interface (MIPI), a general-purpose input / output (GPIO) interface, a subscriber identity module (SIM) interface, and / or a universal serial bus (USB) interface, etc.

[0078] It is understood that the interface connection relationships between the modules illustrated in the embodiments of this application are merely illustrative and do not constitute a structural limitation on the electronic device 100. In other embodiments of this application, the electronic device 100 may also employ different interface connection methods or combinations of multiple interface connection methods as described in the above embodiments.

[0079] The fingerprint sensor 180H is used to collect fingerprints. The electronic device 100 can utilize the characteristics of the collected fingerprints to achieve fingerprint unlocking, accessing application locks, taking photos with fingerprints, answering calls with fingerprints, etc.

[0080] It should be noted that any electronic device mentioned in the embodiments of this application may include more or fewer modules in electronic device 100.

[0081] The software system of electronic device 100 can adopt a layered architecture, event-driven architecture, microkernel architecture, microservice architecture, or cloud architecture. This application embodiment uses the layered architecture Android system as an example to exemplify the software structure of electronic device 100.

[0082] Figure 4 This is a software structure block diagram of the electronic device 100 according to an embodiment of this application.

[0083] The layered architecture of the electronic device 100 divides the software into several layers, each with a clear role and division of labor. Layers communicate with each other through software interfaces. In some embodiments, the Android system is divided into four layers, from top to bottom: the application layer, the application framework layer, the Android runtime and system libraries, and the kernel layer.

[0084] The application layer can include a series of application packages.

[0085] like Figure 4 As shown, the application package may include applications such as camera, gallery, calendar, call, map, navigation, WLAN, Bluetooth, music, video, and SMS.

[0086] The application framework layer provides application programming interfaces (APIs) and a programming framework for applications in the application layer. The application framework layer includes some predefined functions.

[0087] like Figure 4 As shown, the application framework layer may include a window manager, content provider, view system, phone manager, resource manager, notification manager, etc.

[0088] The window manager is used to manage windowed applications. It can retrieve screen size, determine the presence of a status bar, lock the screen, and capture screenshots, among other things.

[0089] Content providers store and retrieve data, making that data accessible to applications. This data can include videos, images, audio, phone calls made and received, browsing history and bookmarks, phone books, and more.

[0090] A view system includes visual controls, such as controls for displaying text and controls for displaying images. View systems can be used to build applications. A display interface can consist of one or more views. For example, a display interface including a text notification icon could include views for displaying text and views for displaying images.

[0091] The phone manager is used to provide communication functions for electronic device 100. For example, it manages call status (including connection and disconnection).

[0092] The file explorer provides applications with various resources, such as localized strings, icons, images, layout files, video files, and more.

[0093] The notification manager allows applications to display notifications in the status bar. These notifications can be used to deliver informational messages and can disappear automatically after a short pause, requiring no user interaction. For example, the notification manager can be used to notify users of completed downloads or message alerts. The notification manager can also display notifications as icons or scrolling text in the top status bar, such as notifications from background applications, or as dialog boxes on the screen. Examples include displaying text messages in the status bar, emitting sounds, vibrating electronic devices, and flashing indicator lights.

[0094] The Android Runtime consists of core libraries and a virtual machine. The Android runtime is responsible for the scheduling and management of the Android system.

[0095] The core library consists of two parts: one part is the functionalities that need to be called by the Java language, and the other part is the Android core library.

[0096] The application layer and application framework layer run in a virtual machine. The virtual machine executes the Java files of the application layer and application framework layer as binary files. The virtual machine is used to perform functions such as object lifecycle management, stack management, thread management, security and exception management, and garbage collection.

[0097] System libraries can include multiple functional modules. For example: surface manager, media libraries, 3D graphics processing libraries (e.g., OpenGL ES), 2D graphics engines (e.g., SGL), etc.

[0098] The Surface Manager is used to manage the display subsystem and provides the blending of 2D and 3D layers for multiple applications.

[0099] The media library supports playback and recording of various common audio and video formats, as well as still image files. It supports multiple audio and video encoding formats, such as MPEG4, H.264, MP3, AAC, AMR, JPG, and PNG.

[0100] The 3D graphics processing library is used to implement 3D graphics drawing, image rendering, compositing, and layer processing.

[0101] A 2D graphics engine is a graphics engine for 2D drawing.

[0102] The kernel layer is the layer between hardware and software. The kernel layer includes at least display drivers, camera drivers, audio drivers, sensor drivers, Wi-Fi drivers, etc.

[0103] It should be noted that the electronic device mentioned in the embodiments of this application may include more or fewer modules of the aforementioned electronic device. For example, the electronic device may also include a memory, a timer, etc.

[0104] The following is through Figures 5 to 7 The application scenarios in which the reset method provided in the embodiments of this application is applied are described.

[0105] Figure 5 This diagram illustrates an application scenario in which the reset method provided in this embodiment is used. The reset method is applied in a mobile phone, which includes a system-on-chip (SoC) and a fingerprint sensor. The SoC acts as the master device, and the fingerprint sensor acts as the slave device. The SoC and the fingerprint sensor interact via SPI.

[0106] Figure 6 This diagram illustrates an application scenario of the reset method provided in this application embodiment, which is applied in a smart wearable device. For example, the smart wearable device is a smart bracelet. The smart bracelet can be as follows... Figure 6 As shown in (a) above, it can also be as follows: Figure 6 As shown in (b) above, this application does not impose limitations on the embodiments. The smart bracelet includes a microcontroller unit (MCU) and a heart rate sensor. The MCU is equivalent to the master device, and the heart rate sensor is equivalent to the slave device. The MCU and the heart rate sensor communicate with each other via SPI.

[0107] It should be understood that the reset method provided in this application embodiment is applied to an electronic device that may include a system consisting of a master device and a slave device, such as... Figure 7 As shown in (a); it can also include a system consisting of multiple sets of master and slave devices, such as Figure 7 As shown in (b) above; this application does not limit this aspect. In a system consisting of a group of master devices and slave devices, the number of master devices is 1, and the number of slave devices is greater than or equal to 1, as shown in (b). Figure 7 As shown in (c) in the figure.

[0108] It should be understood that the above description of the application scenarios is only an example and does not constitute a limitation on the scenarios in which the embodiments of this application are applied.

[0109] The following is combined with Figures 8 to 14 The reset method provided in the embodiments of this application will be described in detail.

[0110] Figure 8 This is a flowchart illustrating a reset method provided in an embodiment of this application, as shown below. Figure 8As shown, this method is applied in an electronic device, which includes a master device and a slave device. The master device sends a clock signal to the slave device, and the master device and the slave device interact with each other based on the clock signal. The method includes:

[0111] S101. The slave device sends a warning message to the master device. The warning message is used to indicate that the master device is in an abnormal state.

[0112] It should be understood that in some electronic devices, the master device is typically a device with higher processing power, while the slave device is a device with lower processing power. The master and slave devices can interact via an SPI bus, where the slave device can perform data interaction based on control signals sent by the master device. For example, the master device sends a clock signal to the slave device, enabling the slave device to synchronize with the master device based on that clock signal, thereby facilitating data interaction between the master and slave devices.

[0113] With the continuous advancement of chip technology, the size of main components is getting smaller and smaller. At the same time, the number of electronic devices in electronic equipment is increasing, and electromagnetic interference in electronic equipment is becoming more and more serious. Main components are also subject to interference signals from electromagnetic interference, which can cause the devices to malfunction.

[0114] Optionally, the master device being in an abnormal state includes: a state where the chip select CS signal is at the first level and no clock signal is sent to the slave device.

[0115] For example, in the case where the main component is jammed due to electromagnetic interference signals, such as... Figure 9 As shown in (a), the master device has set the CS signal corresponding to the slave device to a preset level (e.g., the first level), but cannot send the CLK signal to the slave device. This prevents the slave device from obtaining a clock signal to synchronize with the master device, thus preventing data interaction between the master and slave devices. When the slave device detects that the CS signal is at the first level but does not receive the CLK signal, the slave device determines that the master device is malfunctioning and sends a warning message to the master device. This warning message indicates that the master device is in an abnormal state.

[0116] It should be understood that, in some cases, a master device is connected to multiple slave devices, each with its corresponding chip select signal line. When the master device sets the level on one or more of its chip select signal lines to a first level, it indicates that data interaction is performed between the master device and the slave device corresponding to that chip select signal line. It should be understood that, depending on the setting, the first level can refer to a high level or a low level, and this application embodiment does not impose any limitation on this.

[0117] Optionally, the master device being in an abnormal state includes: when the chip select CS signal is at the first level, no data exchange occurs between the master device and the slave device.

[0118] For example, in the case where the main component is jammed due to electromagnetic interference signals, such as... Figure 9 As shown in (b), the master device has set the CS signal corresponding to the slave device to a preset level (e.g., the first level), but there is no data transmission on the MOSI and / or MISO. When the slave device detects that the CS signal is at the first level, but no data transmission is detected on the MOSI and MISO, the slave device determines that the master device is abnormal and sends a warning message to the master device to indicate that the master device is in an abnormal state.

[0119] Optionally, the main device being in an abnormal state includes: the time taken for the chip select CS signal to switch to the first level is less than a preset time threshold.

[0120] For example, in the case where the main component is jammed due to electromagnetic interference signals, such as... Figure 9 As shown in (c), if the time Δt taken by the slave device to set the CS signal to the preset level (first level) of the master device is less than the preset time threshold, the slave device determines that the master device is in an abnormal state and sends a warning message to the master device. This warning message is used to indicate that the master device is in an abnormal state.

[0121] S102. When the main device receives the warning information, it performs a reset operation based on the warning information.

[0122] A reset operation refers to modifying a device to remove the influence of erroneous processes on its operation. This can typically be achieved by powering down and restarting the device or by clearing processes from the device. A reset by powering down and restarting the device is called a hard reset, while a reset by clearing processes is called a soft reset. When the master device receives a warning message from the slave device, it can power down and restart to complete a reset. Alternatively, it can clear related processes to complete a reset.

[0123] The reset method provided in the embodiments of this application is applied to the master device in an electronic device. The master device is used to send clock signals to the slave device, and the master device and the slave device interact with each other based on the clock signals. The slave device sends a warning message to the master device. When the master device receives the warning message, it performs a reset operation. The warning message is used to indicate that the master device is in an abnormal state. In this way, when the chip size is getting smaller and the master device is in an abnormal state due to the influence of electromagnetic interference signals in the electronic device, the problem of the master device being stuck can be solved by resetting the master device. Compared with the traditional method, which can only solve the problem of the slave device being stuck, the reset method provided in the embodiments of this application can solve the problem of the master device being stuck when the number of electronic devices in the electronic device increases or the size of the electronic devices decreases, and thus can effectively restore the data interaction between electronic devices.

[0124] In some possible situations, before sending an alert message to the master device, the slave device can first detect whether the master device is in an abnormal state, and if the master device is in an abnormal state, send an alert message to the master device. The following is an example... Figure 9 The embodiments shown will be described in detail below.

[0125] Figure 10 This is a flowchart illustrating another reset method provided in an embodiment of this application. The method is applied in an electronic device, which includes a master device and a slave device. The master device sends a clock signal to the slave device, and the master device and slave device interact with each other based on the clock signal. The method includes:

[0126] S201. The slave device sends a first signal to the master device, wherein the first signal is used to request data interaction with the master device.

[0127] When a slave device needs to interact with a master device, it sends an interrupt (INT) signal (equivalent to the first signal) to the master device. Upon receiving the interrupt signal, the master device determines that the slave device can interact with the slave device. At this time, the master device sets the level of the chip select signal line corresponding to the slave device to the first level and sends a clock signal to the slave device.

[0128] S202: The slave device detects whether it has received a clock signal sent by the master device; if no clock signal sent by the master device is detected, then S203 is executed.

[0129] When the slave device detects that the level on the chip select signal line is the first level, if it detects the clock signal sent by the master device, it can synchronize with the master device based on the clock signal and then exchange data with the master device after synchronization; if it does not detect the clock signal sent by the master device, it determines that the master device is in an abnormal state.

[0130] S203, The slave device sends a warning message to the master device.

[0131] The warning information is sent by the device when the chip select CS signal is at the first level and no clock signal is received from the master device.

[0132] The reset method provided in the embodiments of this application involves a slave device sending a first signal to a master device. This first signal requests data interaction with the master device. The slave device then detects whether it has received a clock signal from the master device. If no clock signal is detected, the slave device sends a warning message to the master device. This is equivalent to sending the warning message when a clock signal has not been detected after the slave device has already requested data interaction with the master device. This makes the warning message more accurate in indicating that the master device is in an abnormal state, thereby improving the accuracy of the master device's reset operation based on the warning message and more effectively solving the problem of device hang-up in electronic devices.

[0133] S204. When the main device receives the warning information, it performs a reset operation based on the warning information.

[0134] S205. The master device sends a reset command to the slave device. The reset command is used to instruct the slave device to perform a reset operation.

[0135] A reset operation refers to performing a related operation on an electronic device to remove the influence of erroneous processes running within the device. Reset operations are typically performed by powering down and restarting the device, or by clearing processes from the device. A reset operation by powering down and restarting the device is called a hard reset, while a reset operation by clearing processes from the device is called a soft reset.

[0136] Optionally, the reset instruction includes a first reset instruction and a second reset instruction, wherein the first reset instruction includes resetting the device by triggering the reset button of the slave device.

[0137] It should be understood that resetting a device by triggering the reset button of the slave device refers to performing a power-down restart reset operation on the slave device. In other words, the first reset command can be a reset command performed through a hard reset operation.

[0138] Optionally, the second reset instruction includes resetting the slave device via the SPI interface.

[0139] It should be understood that resetting a slave device via the SPI interface usually refers to clearing the process in the slave device through the SPI interface. In other words, the second reset instruction can refer to a reset instruction performed through a soft reset operation.

[0140] S206. The slave device performs a reset operation based on the reset command.

[0141] The reset method provided in the embodiments of this application involves the master device performing a reset operation when it receives a warning message from the slave device. Then, the master device sends a reset command to the slave device, instructing it to perform a reset operation. In other words, in the embodiments of this application, after the master device performs a reset operation on itself upon receiving a warning message from the slave device, it also sends a reset command to the slave device, enabling the slave device to perform a reset operation based on the reset command. This avoids the situation where resetting only the master device is insufficient to resolve the device hang-up problem in electronic devices when both the master and slave devices malfunction simultaneously, thereby further improving the reliability of resolving device hang-up problems in electronic devices.

[0142] In one possible scenario, the slave device can also continue to detect whether data interaction has occurred between the master and slave devices when the CS signal is detected to be at the first level, to determine whether the master device is in an abnormal state. The following is a demonstration... Figure 11 The embodiments shown will be described in detail below.

[0143] Figure 11 This is a flowchart illustrating a reset method provided in another embodiment of this application. The method is applied in an electronic device, which includes a master device and a slave device. The master device sends a clock signal to the slave device, and the master and slave devices interact with each other based on the clock signal. Figure 11 As shown, the method includes:

[0144] S301: When the slave device detects that the chip select CS signal is at the first level, it checks whether there is data transmission on the MOSI and MISO between the master and slave devices. If not, it executes S302.

[0145] It should be understood that when the CS signal is at its first level, data exchange occurs between the master and slave devices. If the slave device detects no data transmission on either the MOSI or MISO, it indicates no data exchange between the master and slave devices, equivalent to a signal abnormality on the MOSI and / or MISO. This abnormality is caused by electromagnetic interference affecting the master device. The slave device then determines that the master device is in an abnormal state.

[0146] S302, The slave device sends a warning message to the master device.

[0147] S303. When the main device receives the warning information, it performs a reset operation based on the warning information.

[0148] S304. The master device sends a reset command to the slave device. The reset command is used to instruct the slave device to perform a reset operation.

[0149] S305, The slave device performs a reset operation based on the reset command.

[0150] In one possible scenario, the slave device can also detect the duration taken for the CS signal to transition to the first level to determine whether the master device is in an abnormal state. The following is a breakdown... Figure 12 The embodiments shown will be described in detail.

[0151] Figure 12 This is a flowchart illustrating a reset method provided in another embodiment of this application. The method is applied in an electronic device, which includes a master device and a slave device. The master device sends a clock signal to the slave device, and the master and slave devices interact with each other based on the clock signal. Figure 12 As shown, the method includes:

[0152] S401: Check if the time taken for the device to detect the chip select CS signal to convert to the first level is less than a preset time threshold. If so, execute S402.

[0153] Let's take a low level as an example for explanation.

[0154] It should be understood that when the master device is operating normally, and data exchange is required between the master and slave devices, the master device pulls the CS signal down to the first level. The time taken for the CS signal level to transition to the first level, i.e., the duration of the falling edge of the signal, is usually a preset duration. When the master device experiences abnormal interference from electromagnetic interference signals, the duration of the falling edge of this signal is usually shorter. Therefore, when the duration of the falling edge of the CS signal is less than the preset duration threshold, the slave device determines that the master device is in an abnormal state.

[0155] S402, The slave device sends a warning message to the master device.

[0156] S403. When the main device receives the warning information, it performs a reset operation based on the warning information.

[0157] S404. The master device sends a reset command to the slave device. The reset command is used to instruct the slave device to perform a reset operation.

[0158] S405, The slave device performs a reset operation based on the reset command.

[0159] In one possible scenario, a main component detection module can also be added to determine the problem with the main component. For example, such as... Figure 13As shown, the main device detection module may include a CS detection submodule, a CLK detection submodule, a MOSI detection submodule, and a MISO detection submodule. The CS detection submodule is connected to the CS signal line and is used to detect the CS signal; the CLK detection submodule is connected to the CLK signal line and is used to detect the CLK signal; the MOSI detection submodule is connected to the MOSI signal line and is used to detect the MOSI signal; and the MISO detection submodule is connected to the MISO signal line and is used to detect the MISO signal.

[0160] For example, when the main device detection module detects that the CS signal level is pulled low (set to low level), but there is no clock signal on the CLK signal line, it indicates that the main device may be stuck. Therefore, a warning message can be sent to the main device so that the main device can be reset based on the warning message.

[0161] It should be understood that the main device detection module can be integrated into the main device or it can be a circuit module set outside the main device. This application embodiment does not limit this.

[0162] In one possible scenario, due to the limited processing power of some slave devices, they may lack the ability to detect clock signals. In this case, the master device can directly perform a reset operation without needing to reset itself upon receiving a warning message from the slave device. The following will illustrate... Figure 14 The embodiments shown will be described in detail.

[0163] Figure 14 This is a flowchart illustrating a reset method provided in another embodiment of this application. The method is applied in an electronic device, which includes a master device and a slave device. The master device sends a clock signal to the slave device, and the master device and slave device interact with each other based on the clock signal. The method includes:

[0164] S501. When the main device detects an abnormal signal on the data line, it performs a reset operation on the main device.

[0165] It should be understood that the data cable may include Figure 1 The diagram shows the CS, CLK, MOSI, and MISO signal lines. If the master device detects an abnormality on any of these signal lines, it will perform a reset operation.

[0166] It should be understood that any signal anomaly on any data line can be caused by either a faulty master device or a faulty slave device. This means that whenever there is an anomaly in the data interaction between the master and slave devices, the master device will automatically reset itself. In other words, the slave device does not need to detect whether the master device is in an abnormal state.

[0167] S502, The master device sends a reset command to the slave device.

[0168] S503, The slave device performs a reset operation based on the reset command.

[0169] The reset method provided in the embodiments of this application is applied in an electronic device, which includes a master device and a slave device. The master device sends a clock signal to the slave device, and the master device and the slave device interact with each other based on the clock signal. The method includes: when the master device detects an abnormal signal on the data line, it performs a reset operation on the master device; then, the master device sends a reset command to the slave device, and the slave device performs a reset operation based on the reset command. The reset method provided in the embodiments of this application eliminates the need for the slave device to detect whether the master device is in an abnormal state. This allows the master device to actively perform a reset operation when its processing power is weak, preventing it from detecting whether the master device is in an abnormal state. This solves the problem of the master device being stuck and effectively restores data interaction between electronic devices.

[0170] It should be understood that although the steps in the flowcharts of the above embodiments are shown sequentially according to the arrows, these steps are not necessarily executed in the order indicated by the arrows. Unless explicitly stated herein, there is no strict order restriction on the execution of these steps, and they can be executed in other orders. Moreover, at least some steps in the flowchart may include multiple sub-steps or multiple stages. These sub-steps or stages are not necessarily completed at the same time, but can be executed at different times. The execution order of these sub-steps or stages is not necessarily sequential, but can be performed alternately or in turn with other steps or at least some of the sub-steps or stages of other steps.

[0171] Figure 15 This is a schematic diagram of a main device 500 provided in an embodiment of this application.

[0172] It should be understood that the main device 500 can perform... Figures 8 to 14 The reset method shown; the main device 500 includes: an acquisition unit 510 and a processing unit 520.

[0173] The processing unit 520 is used to receive warning information sent by the slave device, and the warning information is used to indicate that the master device is in an abnormal state.

[0174] The processing unit 520 is used to perform a reset operation based on the warning information.

[0175] In one embodiment, the master device being in an abnormal state includes: a state where the chip select CS signal is at a first level and no clock signal is sent to the slave device.

[0176] In one embodiment, the processing unit 520 is further configured to send a reset command to the slave device, the reset command being used to instruct the slave device to perform a reset operation.

[0177] In one embodiment, the reset instruction includes a first reset instruction or a second reset instruction. The first reset instruction is used to instruct the device to be reset by triggering the reset button of the slave device, and the second reset instruction is used to instruct the slave device to be reset through the Serial Peripheral Interface (SPI) interface.

[0178] The main device provided in this embodiment is used to execute the reset method of the above embodiment. The technical principle and technical effect are similar, and will not be described again here.

[0179] It should be noted that the aforementioned main component 500 is embodied in the form of a functional unit. The term "unit" here can be implemented in software and / or hardware, without specific limitations.

[0180] For example, a "unit" can be a software program, a hardware circuit, or a combination of both that implements the above functions. The hardware circuit may include an application-specific integrated circuit (ASIC), electronic circuitry, a processor (e.g., a shared processor, a proprietary processor, or a group processor) and memory for executing one or more software or firmware programs, integrated logic circuitry, and / or other suitable components that support the described functions.

[0181] Therefore, the units of the various examples described in the embodiments of this application can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0182] Figure 16 This is a schematic diagram of a slave device 600 provided in an embodiment of this application.

[0183] It should be understood that device 600 can perform Figures 8 to 14 The reset method shown; the slave device 600 includes: an acquisition unit 610 and a processing unit 620.

[0184] The processing unit 620 is used to detect when the main device is in an abnormal state;

[0185] The processing unit 620 is used to send warning information to the main device, which indicates that the main device is in an abnormal state.

[0186] In one embodiment, the processing unit 620 is configured to send a first signal to the master device, the first signal being used to request data interaction with the master device; detect whether a clock signal sent by the master device is received; and if no clock signal sent by the master device is detected, determine that the master device is in an abnormal state.

[0187] In one embodiment, the master device being in an abnormal state includes: a state where the chip select CS signal is at a first level and no clock signal is sent to the slave device.

[0188] The slave device provided in this embodiment is used to execute the reset method of the above embodiment. The technical principle and technical effect are similar, and will not be described again here.

[0189] It should be noted that the aforementioned device 600 is embodied in the form of a functional unit. The term "unit" here can be implemented in software and / or hardware, without specific limitations.

[0190] For example, a "unit" can be a software program, hardware circuitry, or a combination of both that implements the above-described functions. Hardware circuitry may include application-specific integrated circuits (ASICs), electronic circuitry, a processor (e.g., a shared processor, a proprietary processor, or a group processor) and memory for executing one or more software or firmware programs, integrated logic circuitry, and / or other suitable components that support the described functions.

[0191] Therefore, the units of the various examples described in the embodiments of this application can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0192] Figure 17 A schematic diagram of the structure of an electronic device provided in this application is shown. Figure 17 The dashed lines indicate that the unit or module is optional. The electronic device 700 can be used to implement the reset method described in the above method embodiments.

[0193] Electronic device 700 includes one or more processors 701, which can support the reset method in the method embodiments of electronic device 700. Processor 701 can be a general-purpose processor or a special-purpose processor. For example, processor 701 can be a central processing unit (CPU), a digital signal processor (DSP), an application-specific integrated circuit (ASIC), a field-programmable gate array (FPGA), or other programmable logic devices, such as discrete gate, transistor logic devices, or discrete hardware components.

[0194] The processor 701 can be used to control the electronic device 700, execute software programs, and process data from the software programs. The electronic device 700 may also include a communication unit 705 for inputting (receiving) and outputting (transmitting) signals.

[0195] For example, electronic device 700 may be a chip, communication unit 705 may be the input and / or output circuit of the chip, or communication unit 705 may be the communication interface of the chip, and the chip may be a component of terminal device or other electronic device.

[0196] For example, electronic device 700 can be a terminal device, communication unit 705 can be the transceiver of the terminal device, or communication unit 705 can be the transceiver circuit of the terminal device.

[0197] The electronic device 700 may include one or more memories 702, which store a program 704. The program 704 can be executed by the processor 701 to generate instructions 703, causing the processor 701 to execute the impedance matching method described in the above method embodiments according to the instructions 703.

[0198] Optionally, the memory 702 may also store data. Optionally, the processor 701 may also read the data stored in the memory 702, which may be stored at the same memory address as the program 704, or the data may be stored at a different memory address than the program 704.

[0199] The processor 701 and memory 702 can be configured separately or integrated together; for example, integrated on the system on chip (SOC) of the terminal device.

[0200] For example, the memory 702 can be used to store the relevant program 704 of the reset method provided in the embodiments of this application, and the processor 701 can be used to call the relevant program 704 of the reset method stored in the memory 702 when performing a reset, and execute the reset method of the embodiments of this application; including: receiving the warning information sent by the slave device, the warning information being used to indicate that the master device is in an abnormal state; and performing a reset operation according to the warning information.

[0201] For example, the memory 702 can be used to store the relevant program 704 of the reset method provided in the embodiments of this application, and the processor 701 can be used to call the relevant program 704 of the reset method stored in the memory 702 when performing a reset, and execute the reset method of the embodiments of this application; including: detecting that the main device is in an abnormal state; sending a warning message to the main device, the warning message being used to indicate that the main device is in an abnormal state.

[0202] This application also provides a computer program product that, when executed by processor 701, implements the reset method of any method embodiment in this application.

[0203] The computer program product can be stored in memory 702, for example, program 704. Program 704 is finally converted into an executable object file that can be executed by processor 701 after processing such as preprocessing, compilation, assembly and linking.

[0204] This application also provides a computer-readable storage medium storing a computer program thereon, which, when executed by a computer, implements the reset method of any of the method embodiments of this application. The computer program may be a high-level language program or an executable object program.

[0205] The computer-readable storage medium is, for example, memory 702. Memory 702 can be volatile memory or non-volatile memory, or memory 702 can include both volatile and non-volatile memory. The non-volatile memory can be read-only memory (ROM), programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), or flash memory. The volatile memory can be random access memory (RAM), which is used as an external cache. By way of example, but not limitation, many forms of RAM are available, such as static random access memory (SRAM), dynamic random access memory (DRAM), synchronous dynamic random access memory (SDRAM), double data rate synchronous dynamic random access memory (DDR SDRAM), enhanced synchronous dynamic random access memory (ESDRAM), synchronous linked dynamic random access memory (SLDRAM), and direct rambus RAM (DR RAM).

[0206] In this application, "at least one" means one or more, and "more than one" means two or more. "At least one of the following" or similar expressions refer to any combination of these items, including any combination of single or multiple items. For example, at least one of a, b, or c can mean: a, b, c, ab, ac, bc, or abc, where a, b, and c can be single or multiple.

[0207] It should be understood that in the various embodiments of this application, the order of the above-mentioned processes does not imply the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of this application.

[0208] Those skilled in the art will recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0209] Those skilled in the art will understand that, for the sake of convenience and brevity, the specific working processes of the systems, devices, and units described above can be referred to the corresponding processes in the foregoing method embodiments, and will not be repeated here.

[0210] In the several embodiments provided in this application, it should be understood that the disclosed apparatus and methods can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative; for example, the division of units is merely a logical functional division, and there may be other division methods in actual implementation; for example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be through some interfaces, and the indirect coupling or communication connection between apparatuses or units may be electrical, mechanical, or other forms.

[0211] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0212] In addition, the functional units in the various embodiments of this application can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit.

[0213] The above are merely specific embodiments of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. A reset method, characterized by, The method is applied to an electronic device including a master device and a slave device, data interaction between the master device and the slave device is performed through a serial peripheral interface (SPI) bus, the serial peripheral interface (SPI) bus includes a chip select (CS) line, and the method includes the following steps. The slave device sends an interrupt signal to the master device; The master device sets a level of the chip select (CS) line from a second level to a first level in response to the interrupt signal; The slave device sends early warning information to the master device in a case where the level of the chip select (CS) line changes from the second level to the first level and a time length for the level of the chip select (CS) line to change from the second level to the first level is less than a preset time length threshold; The slave device receives a clock signal sent by the master device in a case where the time length for the level of the chip select (CS) line to change from the second level to the first level is greater than or equal to the preset time length threshold; The slave device sends early warning information to the master device in a case where the slave device does not receive the clock signal sent by the master device; The slave device performs synchronization based on the clock signal in a case where the slave device receives the clock signal sent by the master device; The slave device sends early warning information to the master device in a case where synchronization based on the clock signal is performed and data interaction between the master device and the slave device is not detected; The master device performs a reset operation according to the early warning information after receiving the early warning information, and sends a reset instruction to the slave device, and the slave device performs a reset operation according to the reset instruction.

2. The method of claim 1, wherein, The reset instruction includes a first reset instruction or a second reset instruction, the first reset instruction is used to instruct to perform device reset by triggering a reset key of the slave device, and the second reset instruction is used to instruct to perform device reset on the slave device through a serial peripheral interface (SPI) interface.

3. An electronic device, comprising: The electronic device includes a master device and a slave device, data interaction between the master device and the slave device is performed through a serial peripheral interface (SPI) bus, the serial peripheral interface (SPI) bus includes a chip select (CS) line, The slave device is configured to send an interrupt signal to the master device; The master device is configured to set a level of the chip select (CS) line to a first level in response to the interrupt signal; The slave device is configured to send early warning information to the master device in a case where the level of the chip select (CS) line changes from a second level to the first level and a time length for the level of the chip select (CS) line to change from the second level to the first level is less than a preset time length threshold. In a case where a time length for converting the level of the chip select signal CS line from the second level to the first level by the second device is greater than or equal to a preset time length threshold, the clock signal transmitted by the master device is received; the slave device is further configured to transmit early warning information to the master device in a case where the clock signal transmitted by the master device is not received; the slave device is further configured to perform synchronization based on the clock signal in a case where the clock signal transmitted by the master device is received; and the slave device is further configured to transmit early warning information to the master device in a case where synchronization based on the clock signal is performed and data interaction between the master device and the slave device is not detected. The master device is further configured to perform a reset operation according to the early warning information and transmit a reset instruction to the slave device after the early warning information is received. The slave device is further configured to perform a reset operation according to the reset instruction.

4. The electronic device of claim 3, wherein, The electronic device includes a mobile phone or a tablet computer, the master device includes a system on chip (SOC), and the slave device includes a fingerprint sensor.

5. The electronic device of claim 3, wherein, The electronic device includes a smart wearable device, the master device includes a micro control unit (MCU), and the slave device includes a heart rate sensor.

6. A computer-readable storage medium, characterized in that, The computer readable storage medium stores a computer program, and when the computer program is executed by a processor, the processor executes the method in claim 1 or 2.

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