A circuit design method and system, electronic device and computer storage medium

Abstract

The application provides a circuit design method and system, electronic equipment and computer storage medium, comprising: obtaining all basic modules, the design contents of each basic module are not completely same; integrating all basic modules to obtain a total module; dividing the total module into multiple different sub-modules according to a preset mode; establishing a mapping for the required sub-modules according to the circuit design requirement to obtain a mapping module; and performing circuit design by using the mapping module to obtain a circuit design file. By integrating all existing basic modules and re-dividing them into sub-modules, and performing circuit design by using the mapping module of the sub-modules, the same sub-module can be mapped multiple times and fully reused, the utilization rate of the sub-modules can be improved, the circuit design is more flexible, and the problem of low utilization rate of the basic modules in the existing circuit design is solved.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of circuit design, in particular to a circuit design method and system, an electronic device and a computer storage medium. BACKGROUND

[0002] The existing circuit design usually uses some electronic design automation software (such as EDA) to perform circuit layout, function design, layout, rule setting, simulation verification, etc. Since these electronic design automation software usually presets a design library, the design library generally contains some basic components, basic function modules or even partial circuit layout, etc., which can be directly called during circuit design, thereby greatly reducing the circuit design time and saving the development cost.

[0003] In actual circuit design, the R&D personnel usually add some designed design modules as basic modules in the design library, thereby avoiding repeated development process. However, in different circuit designs, the situation of having completely same basic modules is very rare, and usually needs to be fine-tuned on the basis of the existing basic modules. Thus, if similar design modules are all added as basic modules in the design library, not only the design library occupies a large amount of storage resources due to a large number of similar basic modules, but also these similar basic modules are difficult to reuse, resulting in resource waste. SUMMARY

[0004] The purpose of the present application is to provide a circuit design method and system, an electronic device and a computer storage medium, to at least solve the problem of low utilization rate of basic modules in the existing circuit design.

[0005] To solve the above technical problems, the present application provides a circuit design method, comprising:

[0006] Obtaining all basic modules, the design contents of each basic module being not completely same;

[0007] Integrating all basic modules to obtain a total module;

[0008] Dividing the total module into a plurality of different sub-modules according to a preset mode;

[0009] According to the circuit design requirement, establishing a mapping of the required sub-modules to obtain a mapping module;

[0010] Using the mapping module to perform circuit design to obtain a circuit design file.

[0011] Optionally, in the circuit design method, the structure of the basic module is a hierarchical structure, and the design contents of each level in the same basic module are different; or, the structure of the basic module is a plane structure.

[0012] Optionally, in the circuit design method, when the structure of the basic module is a hierarchical structure, the method of integrating all the basic modules to obtain a total module comprises:

[0013] comparing the basic modules two by two;

[0014] if the hierarchical design contents are the same, merging the hierarchical design contents that are the same into one hierarchical level;

[0015] if the hierarchical design contents are different, keeping the hierarchical level;

[0016] merging all the hierarchical levels to obtain the total module.

[0017] Optionally, in the circuit design method, the method of dividing the total module into a plurality of different sub-modules in a preset manner comprises:

[0018] dividing the total module into a plurality of different sub-modules in a manner of taking one hierarchical level as one sub-module.

[0019] Optionally, in the circuit design method, when the structure of the basic module is a planar structure, the method of integrating all the basic modules to obtain a total module comprises:

[0020] splicing all the basic modules to obtain the total module.

[0021] Optionally, in the circuit design method, the method of dividing the total module into a plurality of different sub-modules in a preset manner comprises:

[0022] extracting the regions with the same design contents in the total module in a manner of taking the region area from large to small, and merging the regions with the same design contents into one sub-module;

[0023] the remaining regions with different design contents are divided into separate sub-modules according to the original basic module.

[0024] Optionally, in the circuit design method, the method of establishing a mapping for the required sub-module according to the circuit design requirement to obtain a mapping module comprises:

[0025] selecting the required sub-module from the total module according to the circuit design requirement;

[0026] establishing a mapping for the selected sub-module, so that the mapping module has all the design contents of the sub-module.

[0027] Optionally, in the circuit design method, the method of performing circuit design by using the mapping module to obtain a circuit design file comprises:

[0028] According to the circuit design requirement, all the mapping modules are integrated to obtain the circuit design file.

[0029] To solve the above technical problems, the application further provides a circuit design system for implementing the circuit design method as any one of the above, the circuit design system comprises:

[0030] The basic module acquisition unit is configured to acquire all the basic modules.

[0031] The sub-module division unit is configured to integrate all the basic modules to obtain a total module, and divide the total module into a plurality of different sub-modules according to a preset mode.

[0032] The mapping relationship establishment unit is configured to establish mapping for the required sub-modules according to the circuit design requirement to obtain mapping modules.

[0033] The circuit design unit is configured to perform circuit design by using the mapping modules to obtain a circuit design file.

[0034] To solve the above technical problems, the application further provides an electronic device comprising a memory, a processor, and an executable program stored in the memory and capable of being executed by the processor; when the processor executes the executable program, the circuit design method as any one of the above is executed.

[0035] To solve the above technical problems, the application further provides a computer storage medium, the computer storage medium stores an executable program; when the executable program is executed, the circuit design method as any one of the above is implemented.

[0036] The circuit design method and system, the electronic device and the computer storage medium provided by the application comprise: acquiring all the basic modules, the design contents of each basic module are not completely the same; integrating all the basic modules to obtain a total module; dividing the total module into a plurality of different sub-modules according to a preset mode; establishing mapping for the required sub-modules according to the circuit design requirement to obtain mapping modules; and performing circuit design by using the mapping modules to obtain a circuit design file. By integrating all the existing basic modules and re-dividing them into sub-modules, and performing circuit design by using the mapping modules of the sub-modules, each sub-module can be fully reused, and the utilization rate of the sub-modules is improved; at the same time, since the mapping mode is adopted in the circuit design, the same sub-module can be mapped multiple times, which can improve the utilization rate of the sub-modules, make the circuit design more flexible, and solve the problem of low utilization rate of the basic modules in the existing circuit design. BRIEF DESCRIPTION OF DRAWINGS

[0037] Figure 1A flowchart of the circuit design method provided in the embodiment is shown in the figure;

[0038] Figure 2 A structural diagram of the basic module of the hierarchical structure provided in the embodiment is shown in the figure;

[0039] Figure 3 A structural diagram of the basic module of the planar structure provided in the embodiment is shown in the figure;

[0040] Figure 4 A module structural diagram of the total module obtained under the hierarchical structure provided in the embodiment is shown in the figure;

[0041] Figure 5 A module structural diagram of the total module obtained under the planar structure provided in the embodiment is shown in the figure;

[0042] Figure 6 A module structural diagram when establishing mapping under the hierarchical structure provided in the embodiment is shown in the figure;

[0043] Figure 7 A structural diagram of the circuit design system provided in the embodiment is shown in the figure. DETAILED DESCRIPTION

[0044] The circuit design method and system, electronic device and computer storage medium provided in the embodiment are further described in detail below in combination with the drawings and specific embodiments. It should be noted that the drawings are all very simplified and use non-precise proportions, and are only used to facilitate and clarify the purpose of assisting in the description of the embodiment of the present application. In addition, the structure shown in the drawings is often a part of the actual structure. In particular, the emphasis shown in each drawing is different, and sometimes different proportions are used.

[0045] It should be noted that "first", "second", and the like in the specification and claims of the present application and the drawing description are used to distinguish similar objects in order to describe the embodiments of the present application, and are not intended to describe a specific order or sequence. It should be understood that the structures used in this way can be interchanged under appropriate circumstances. In addition, the terms "include" and "have" and any variations thereof are intended to cover non-exclusive inclusion, for example, a process, method, system, product or device that includes a series of steps or units does not have to be limited to those steps or units clearly listed, but can include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0046] The embodiment provides a circuit design method, as shown in Figure 1 , comprising:

[0047] S1, obtaining all the basic modules;

[0048] S2, integrating all the basic modules to obtain a total module;

[0049] S3, dividing the total module into a plurality of different sub-modules according to a preset mode;

[0050] S4, establishing a mapping for the required sub-modules according to the circuit design requirements to obtain a mapping module;

[0051] S5, using the mapping module to perform circuit design to obtain a circuit design file.

[0052] The circuit design method provided in the embodiment integrates all existing basic modules and re-divides them into sub-modules, and uses the mapping module of the sub-modules to perform circuit design, so that each sub-module can be fully reused, improving the utilization rate of the sub-modules; at the same time, since the mapping mode is used in circuit design, the same sub-module can be mapped multiple times, which can improve the utilization rate of the sub-modules and make the circuit design more flexible, solving the problem of low utilization rate of basic modules in existing circuit design.

[0053] Specifically, in the embodiment, step S1, all basic modules are obtained, wherein the design contents of each basic module are not completely the same, and the structures of the basic modules are different according to different circuit design software.

[0054] For example, in some circuit design software, the structure of the basic module is a hierarchical structure, and the design contents of each level in the same basic module are different. The design contents of each level can be an outer frame, a scale description, an icon logo, etc. As shown in Figure 2 , the basic module has n levels with different design contents, n≥1, wherein the design content of level 1 can be an outer frame, the design content of level 2 can be a scale description, the design content of level 3 can be an icon logo, etc. The design contents of each level are not described in detail, and the order of the levels is not limited.

[0055] For another example, in some circuit design software, the structure of the basic module is a planar structure, and different regions of the planar structure are designed, such as power supply, voltage stabilization module, filter module, chip, etc. As shown in Figure 3 , the basic module is divided into a plurality of regions according to the functions or connection relationships of the regions. The specific design contents in each region are not limited.

[0056] Further, in the embodiment, when the structure of the basic module is a hierarchical structure, the method of step S2, integrating all the basic modules to obtain a total module, includes:

[0057] S21, comparing the basic modules two by two, i.e., comparing the design contents of each two basic modules layer by layer;

[0058] S22, if the design contents of the layers are the same, merging the layers with the same design contents into one layer, i.e., performing the de-duplication processing on the layers with the same design contents so that only one layer with the same design content is reserved;

[0059] S23, if the design contents of the layers are different, reserving the layers, i.e., if the design contents of the layers are not repeated, reserving the layers;

[0060] S24, merging all the layers to obtain a total module, so that the total module obtained contains all the layers existing in the basic modules, and the design contents of each layer are different.

[0061] In a specific embodiment, as shown in Figure 4 wherein the basic module A includes 5 layers, the basic module B also includes 5 layers, and it is defined that the layers with the same layer number have the same design contents, it can be seen that the layer 1, the layer 3 and the layer 5 in the basic module A are repeated with the layer 1, the layer 3 and the layer 5 in the basic module B, so the de-duplication is performed on the three layers, and one of them is reserved in the total module, while the layer 2 and the layer 4 in the basic module A and the layer 7 and the layer 8 in the basic module B are not repeated, so they need to be put into the total module, so that after the integration of the basic module A and the basic module B, the total module obtained includes the layer 1, the layer 2, the layer 3, the layer 4, the layer 5, the layer 7 and the layer 8.

[0062] Of course, Figure 4 only the way of integrating two basic modules to obtain a total module is given, and those skilled in the art can obtain the way of integrating multiple basic modules to obtain a total module on the basis of the above-mentioned way, and the present application does not repeat it.

[0063] Furthermore, in the present embodiment, the method of dividing the total module into multiple different sub-modules in a preset manner in step S3 includes dividing the total module into multiple different sub-modules by taking one layer as one sub-module.

[0064] Because the design content of each level differs within a hierarchical structure, a single level can be directly treated as a sub-module, simplifying the overall module division. Of course, in other embodiments, multiple levels can be grouped into a single sub-module based on actual design needs. For example, if it is found during the design process that a level 1 is required when level 3 exists, but not needed when other levels are present, then level 1 and level 3 can be merged into a single sub-module. This ensures circuit design flexibility while avoiding design oversights caused by missing levels, improving design accuracy and efficiency.

[0065] Furthermore, in this embodiment, when the structure of the basic module is a planar structure, step S2, the method of integrating all the basic modules to obtain a total module, includes: splicing all the basic modules together to obtain the total module.

[0066] In one specific embodiment, such as Figure 5 As shown, basic module C includes 4 regions, and basic module D includes 5 regions. Regions with the same region number have the same design content. Although there are regions with the same design content (region 1 and region 2) in basic module C and basic module D, in this embodiment, regardless of whether their design content is repeated, the various basic modules are simply spliced ​​together to obtain the total module.

[0067] certainly, Figure 5 This application only describes a method for integrating two basic modules to obtain the overall module. Those skilled in the art can, based on the above method, obtain methods for integrating multiple basic modules to obtain the overall module, which will not be elaborated upon here. Furthermore, for ease of explanation, this application divides the basic modules into regions, and these regions are rectangular. However, in practical applications, the region division is based on the actual design content, and the shape of the divided regions can be arbitrary; this application does not impose any restrictions on this.

[0068] Furthermore, in this embodiment, step S3, the method of dividing the total module into multiple distinct sub-modules according to a preset method, includes:

[0069] S31, extract the regions with the same design content from the main module in descending order of area size, and merge the regions with the same design content into a sub-module;

[0070] S32, the remaining areas with different design content are divided into separate sub-modules according to the original basic module.

[0071] In practical application, since each basic module exists as an independent whole under the planar structure, simple splicing is performed to reduce workload when obtaining the total module. When obtaining the sub-module, the regions with the same design content can be merged to obtain the sub-module. Meanwhile, considering that part of the design content in similar basic modules is the same, in different designs, the region that can be changed can be large or small. Therefore, in order to improve the reuse rate of the sub-module, the same region is extracted according to the area size from large to small.

[0072] Still taking the total module structure shown in Figure 5 For example, in the total module, the repeated regions are region 1 and region 2, and the total area of region 1 plus region 2 is the largest. Therefore, region 1 and region 2 are merged as a sub-module. The remaining regions are region 6, region 8, region 7, region 3 and region 4 in order of area size. Since they do not exist repeatedly, they are divided into separate sub-modules according to the original basic module. Since region 3 and region 4 originally belong to basic module C, region 3 and region 4 are taken as a separate sub-module. Similarly, since region 6, region 7 and region 8 originally belong to basic module D, region 6, region 7 and region 8 are taken as a separate sub-module.

[0073] Of course, if region 3 exists repeatedly with other basic modules, region 3 needs to be extracted as a separate sub-module, and region 4 is a separate sub-module at this time. In this way, each sub-module can be fully reused.

[0074] In other embodiments, since each basic module is divided into several regions according to the function or connection relationship, the same region can be merged to obtain a sub-module according to the obtaining method of the sub-module under the hierarchical structure, and different regions are taken as separate sub-modules, thereby improving the flexibility of the sub-module. For example, taking the total module shown in Figure 5 For example, region 1 and region 2 that exist repeatedly are taken as sub-modules, region 3 and region 4 that belong to basic module C are taken as separate sub-modules, and region 6, region 7 and region 8 that belong to basic module D are taken as separate sub-modules. At this time, the final obtained sub-modules include region 1, region 2, region 3, region 4, region 6, region 7 and region 8.

[0075] Further, in the embodiment, the method for establishing mapping for the required sub-module to obtain the mapping module according to the circuit design requirement in step S4 includes:

[0076] S41, selecting the required sub-module from the total module according to the circuit design requirement;

[0077] S42, establishing mapping for the selected sub-module, so that the mapping module has all the design contents of the sub-module.

[0078] Thus, the mapping is established for each required sub-module separately, and the structure and content of the total module can be obtained without changing, and in addition, multiple mappings can be constructed for a sub-module to different designs. Thus, not only the reuse rate of the sub-module can be improved, but also the design content of the sub-module can be ensured not to change due to the current design, and the security and stability of the design content are improved. At the same time, if technical upgrading occurs and the same design content needs to be changed, the design content of all mapping modules can be changed synchronously by changing the design content of the corresponding sub-module, and the efficiency and accuracy of updating and upgrading are improved.

[0079] The way of establishing mapping for the sub-module is well known to those skilled in the art, and the present application will not be repeated here.

[0080] Further, in the embodiment, the method of using the mapping module to perform circuit design to obtain a circuit design file in step S5 includes: integrating all mapping modules according to circuit design requirements to obtain a circuit design file.

[0081] For example, according to the hierarchical arrangement order requirement, the mapping modules are arranged and integrated in hierarchical order; or according to the area connection relationship requirement, the mapping modules are laid out and connected according to the connection relationship. The specific implementation of obtaining the circuit design file is generally consistent with the existing implementation process, except that the original basic module is replaced by the mapping module.

[0082] In a specific embodiment, taking a hierarchical circuit design as an example, as shown in Figure 6 The total module includes sub-module 1, sub-module 2, sub-module 3, sub-module 4, sub-module 5, sub-module 7 and sub-module 8. In X design, sub-module 1, sub-module 3, sub-module 4, sub-module 7 and sub-module 8 are required, so the mapping is established for these sub-modules in the total module to obtain mapping module 1, mapping module 3, mapping module 4, mapping module 7 and mapping module 8. Similarly, in Y design, sub-module 1, sub-module 2, sub-module 4, sub-module 5 and sub-module 8 are required, so the mapping is established for these sub-modules in the total module to obtain mapping module 1, mapping module 2, mapping module 4, mapping module 5 and mapping module 8.

[0083] From Figure 6It can be seen that the design contents of the required sub-modules can be obtained by the mapping relationship design X and the mapping relationship design Y, and the same sub-module can be reused at the same time (such as sub-module 1, sub-module 4 and sub-module 8). Then, according to the circuit design requirements of the design X and the design Y, the mapping modules are sorted, so that the final design X includes the mapping module 1, the mapping module 3, the mapping module 4, the mapping module 7 and the mapping module 8 arranged from top to bottom, and the final design Y includes the mapping module 1, the mapping module 2, the mapping module 4, the mapping module 5 and the mapping module 8 arranged from top to bottom.

[0084] Of course, in actual application, the circuit design requirements can be more complex, but the person skilled in the art can know the specific implementation manner of using the mapping module to perform circuit design to obtain the circuit design file under the more complex circuit design requirements through the above manner.

[0085] The embodiment also provides a circuit design system for implementing the circuit design method as described above. Figure 7 As shown in the figure, the circuit design system includes: a basic module acquisition unit configured to acquire all basic modules; a sub-module division unit configured to integrate all basic modules to obtain a total module, and divide the total module into a plurality of different sub-modules according to a preset manner; a mapping relationship establishment unit configured to establish a mapping for the required sub-modules according to circuit design requirements to obtain a mapping module; and a circuit design unit configured to perform circuit design by using the mapping module to obtain a circuit design file.

[0086] The circuit design system provided by the embodiment acquires a plurality of sub-modules with different design contents by using the sub-module division unit, and obtains the required mapping module by using the mapping relationship establishment unit, so as to complete the circuit design and obtain the circuit design file, which can ensure the reliability of the sub-module design content, improve the reuse rate of the sub-module, and make the circuit design more flexible and efficient.

[0087] In addition, the embodiment also provides an electronic device including a memory, a processor and an executable program stored in the memory and capable of being executed by the processor; the processor executes the executable program to perform the circuit design method as described above.

[0088] In addition, the embodiment also provides a computer storage medium storing an executable program; the executable program is executed to implement the circuit design method as described above.

[0089] It should be noted that the various embodiments described in the specification are progressive and each embodiment highlights the differences from other embodiments, and the same and similar parts between embodiments can be mutually referred to, and in addition, the different parts between embodiments can also be used in combination with each other, and the present application is not limited thereto.

[0090] The circuit design method and system, electronic equipment and computer storage medium provided by the embodiment comprise: obtaining all basic modules, the design contents of each basic module are not completely same; integrating all basic modules to obtain a total module; dividing the total module into a plurality of different sub-modules according to a preset mode; establishing a mapping for the required sub-modules according to the circuit design requirement to obtain a mapping module; and performing circuit design by using the mapping module to obtain a circuit design file. By integrating all existing basic modules and re-dividing them into sub-modules, and performing circuit design by using the mapping module of the sub-modules, each sub-module can be fully reused, and the utilization rate of the sub-modules is improved; at the same time, since the mapping mode is used in the circuit design, the same sub-module can be mapped multiple times, the utilization rate of the sub-modules can be improved, and the circuit design is more flexible, thereby solving the problem of low utilization rate of the basic modules in the existing circuit design.

[0091] The above description is only a description of the preferred embodiments of the present application, and does not limit the scope of the present application in any way, and any modification or modification of the present application by a person skilled in the art according to the above disclosure is within the protection scope of the claims.

Claims

1. A method of circuit design, characterized by, The method comprises the following steps: all basic modules are obtained, and design contents of each basic module are not completely same; structures of the basic modules are hierarchical structures or plane structures; all the basic modules are integrated to obtain a total module; when the structures of the basic modules are hierarchical structures, the basic modules are compared two by two, if design contents of the hierarchical structures are same, the hierarchical structures with same design contents are combined into one hierarchical structure, if the design contents of the hierarchical structures are different, the hierarchical structures are reserved, and all the hierarchical structures are combined to obtain the total module; when the structures of the basic modules are plane structures, all the basic modules are spliced to obtain the total module; the total module is divided into a plurality of different sub-modules according to a preset mode; a mapping module is obtained by mapping the required sub-modules according to circuit design requirements; 2. The circuit design method of claim 1, wherein, circuit design is performed by using the mapping module to obtain a circuit design file.

3. The circuit design method of claim 1, wherein, Design contents of each hierarchical structure in the same basic module are different. The method of dividing the total module into a plurality of different sub-modules according to the preset mode comprises:

4. The circuit design method of claim 1, wherein, the total module is divided into a plurality of different sub-modules by taking one hierarchical structure as one sub-module. The method of dividing the total module into a plurality of different sub-modules according to the preset mode comprises: regions with same design contents in the total module are extracted in turn according to a mode of area from large to small, and the regions with same design contents are combined into one sub-module; 5. The circuit design method of claim 1, wherein, remaining regions with different design contents are divided into separate sub-modules according to the original basic module. The method of obtaining the mapping module by mapping the required sub-modules according to circuit design requirements comprises: the required sub-modules are selected from the total module according to circuit design requirements; 6. The circuit design method of claim 1, wherein, the selected sub-modules are mapped to make the mapping module have all the design contents of the sub-modules. The method of obtaining the circuit design file by using the mapping module to perform circuit design comprises:

7. A circuit design system for implementing the circuit design method according to any one of claims 1 to 6, characterized by all the mapping modules are integrated to obtain the circuit design file according to circuit design requirements. The circuit design system comprises: a basic module obtaining unit for obtaining all the basic modules; a sub-module dividing unit for integrating all the basic modules to obtain a total module, and dividing the total module into a plurality of different sub-modules according to a preset mode; a mapping relationship establishing unit for mapping the required sub-modules to obtain a mapping module according to circuit design requirements; 8. An electronic device, comprising: a circuit design unit for performing circuit design by using the mapping module to obtain a circuit design file.

9. A computer storage medium, characterized in that The computer storage medium stores an executable program; when the executable program is executed, the circuit design method of any one of claims 1-6 is realized. The computer storage medium stores an executable program; when the executable program is executed, the circuit design method of any one of claims 1-6 is realized.

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