A laser drive signal self-shutdown circuit
By designing a laser driving signal self-shutdown circuit, using the MCU to output the PWM signal and automatically shut down through the logic circuit components, the problem of the MCU difficulty in shutting off the laser driving signal in a timely manner in a low-cost system is solved, and the safe driving of the laser and the reduction of system cost are achieved.
Patent Information
- Application Number
- CN202410053264.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2024-01-12
- Publication Date
- 2025-03-25
- Estimated Expiration
- 2044-01-12
AI Technical Summary
In low-cost systems, when the MCU is used to drive a laser, it is difficult to turn off the driving signal in time due to limited pins and interruption delays, which may cause the laser to be damaged.
A laser driving signal self-shutdown circuit is designed, using the MCU to output the PWM signal, and through logic circuit components such as inverter, NAND gate and D flip-flop, the laser driving signal is automatically shut down, simplifying the design logic of the MCU and reducing system costs.
This circuit can turn off the driving signal in time after the laser light is emitted, avoiding laser damage, simplifying the design logic of the MCU and reducing system costs.
Smart Images
Figure CN117996679B_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of laser technology, and in particular to a laser drive signal self-shutdown circuit. Background Art
[0002] In some laser driving circuits, it is necessary to turn off the driving signal in time after the laser generates laser light to prevent the driving circuit from continuously injecting current and causing damage to the laser.
[0003] In order to achieve the above functions, FPGA is generally used to generate the driving signal, and the laser light detection circuit is used to detect the laser light state, so as to shut down the driving signal in time. However, in some low-cost systems, the cost of FPGA is too high, and the use of MCU has the following problems:
[0004] ① Low-cost MCUs have limited pins. When multiple lasers work together, an MCU with more IO pins is needed to drive them;
[0005] ② The duration of the laser light pulse is extremely short, and the signal pulse width output by the light detection circuit may be only on the order of 10ns, which may be difficult to detect by the MCU IO pin;
[0006] ③ Due to the influence of interruption delay, the driving signal cannot be shut down in time, which may cause damage to the laser.
[0007] Therefore, a laser drive signal self-shutdown circuit is urgently needed to solve the problem of using MCU to drive the laser under low-cost requirements and ensure the normal operation of the laser. Summary of the invention
[0008] The purpose of the present application is to provide a laser drive signal self-shutdown circuit to address the above-mentioned problems existing in the prior art.
[0009] In order to achieve the above application purpose, the present application adopts the following technical solution: a laser drive signal self-shutdown circuit includes a laser drive circuit, a laser light detection circuit, a laser LD and a photosensor D3, and also includes:
[0010] MCU, used to output PWM signal;
[0011] The inverter INV1, the input end is connected to the output end of the MCU;
[0012] The NOR gate NOR1, the input end of which is respectively connected to the output end of the inverter INV1 and the output end of the D flip-flop D2, and the output end of the NOR gate NOR1 is connected to the input end of the laser driving circuit;
[0013] D flip-flop D1, D end is respectively connected to Q_n end of D flip-flop D1, the first end of pull-down resistor R3, input end of inverter INV2 and CLK end of D flip-flop D2, CLK end of D flip-flop D1 is connected to the output end of laser light detection circuit;
[0014] The CLR_n terminal of the D flip-flop D2 is connected to the output terminal of the inverter INV2 through the resistor R1, and the CLR_n terminal of the D flip-flop D2 is also connected to the capacitor C1 to form an RC delay circuit;
[0015] The inverter INV2, the CLR_n terminal is connected to the output terminal of the inverter INV2 through the resistor R2, and the CLR_n terminal of the D flip-flop D1 is also connected to the capacitor C2 to form an RC delay circuit;
[0016] The second end of the pull-down resistor R3 is grounded.
[0017] Furthermore, before the MCU sends a laser light signal:
[0018] The PWM signal output by the MCU is logic low, which is converted to PWM_n by the inverter INV1 and becomes logic high. The output DRI of the NOR gate NOR1 is in a logic low state, so that the laser drive circuit is turned off. The D flip-flop D1 and the D flip-flop D2 are both in the enabled state, and the default output state Q is logic high and Q_n is logic low.
[0019] Furthermore, before the MCU sends a laser drive signal and before the laser LD emits light:
[0020] The D flip-flop D1 and the flip-flop D2 are both in an unchanged state, so that the EN signal output from the Q_n terminal of the flip-flop D2 is logic low, and the PWM signal output by the MCU is logic high, which is converted to PWM_n by the inverter INV1 and becomes logic low, so that the output DRI of the NOR gate NOR1 is in a logic high state, so that the laser drive circuit is turned on and the laser LD emits light.
[0021] Furthermore, after the MCU sends a laser drive signal and the laser LD emits light:
[0022] The photosensor D3 inputs the output signal to the laser light detection circuit to output a narrow pulse LD_TRI signal. The D trigger D1 performs signal conversion at the rising edge of the LD_TRI signal to output the Q1_n signal from the Q_n terminal and changes to logic high at the rising edge of the LD_TRI signal. The Q1 signal at the Q terminal changes to logic low at the rising edge of the LD_TRI signal.
[0023] Furthermore, after the MCU sends a laser drive signal and the laser LD emits light:
[0024] After receiving the Q1_n signal, the D flip-flop D2 outputs a logic high EN signal at the Q_n terminal, so that the NOR gate NOR1 outputs a logic low and turns off the DRI signal.
[0025] Furthermore, the RC time of each RC delay circuit is greater than the time when the PWM signal is logic high.
[0026] Furthermore, after the MCU sends a signal to turn off the laser drive:
[0027] During the time when the PWM signal is logic high, the D flip-flops D1 and D2 maintain the circuit state. After the PWM signal is converted to logic low, it is converted to PWM_n through the inverter INV1 to become logic high, so that the DRI signal at the output end of the NOR gate NOR1 is all logic low and in the off state.
[0028] Furthermore, after the MCU sends a signal to turn off the laser drive:
[0029] When the reset signal RST_n1 of D flip-flop D1 and the reset signal RST_n2 of D flip-flop D2 reach the threshold value of setting the input to logic low, the two D flip-flops start to reset, setting the Q1_n signal of D flip-flop D1 to logic low, setting the EN signal of D flip-flop D2 to logic low, restoring the circuit to the default state, and waiting for the next PWM signal from the MCU.
[0030] Furthermore, the RC size of the RC delay circuit is:
[0031] R*C*ln(VCC / VIL)≥t HPWM
[0032] Where R is the resistance value of resistors R1 and R2, C is the capacitance value of capacitors C1 and C2, VCC is the power supply voltage, VIL is the threshold value of the D flip-flop input to logic low, t HPWM This is the time that the PWM signal is logic high.
[0033] Furthermore, both D flip-flops have a reset or set function.
[0034] Compared with the prior art, this application has the following beneficial effects:
[0035] 1. In this application, before the MCU sends out the laser light signal, the output DRI of the NOR gate NOR1 is in a logic low state, the default output state Q of the D flip-flop is logic high, Q_n is logic low, that is, EN is logic low, which does not affect the output of the NOR gate NOR1, that is, it can ensure that the laser drive circuit is in a closed state;
[0036] 2. After the MCU turns off the laser drive signal, the present application can ensure that the laser drive signal DRI is in the off state regardless of how the EN input of the NOR gate NOR1 changes;
[0037] 3. This application can realize the driving of the laser by a single IO pin of the MCU without detecting the narrow pulse signal of the laser light detection circuit, and can shut down the laser driving signal in time, thereby simplifying the design logic of the MCU and reducing the cost of the system. BRIEF DESCRIPTION OF THE DRAWINGS
[0038] Figure 1 is a circuit diagram of the present application;
[0039] Figure 2 It is the expected waveform diagram of the circuit operation of this application. DETAILED DESCRIPTION
[0040] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. All other embodiments obtained by ordinary technicians in this field based on the embodiments in the present application belong to the scope of protection of this application.
[0041] like Figure 1 As shown, the laser drive signal self-shutdown circuit includes a laser drive circuit, a laser light detection circuit, a laser LD and a photosensor D3, wherein the laser drive circuit, the laser light detection circuit, the laser LD and the photosensor D3 are all prior arts, and the laser light detection circuit of the laser light detection circuit outputs a signal LD_TRI for indicating whether the laser LD emits a laser. After the laser LD emits light, the signal will output a narrow pulse signal (on the order of tens of nanoseconds to hundreds of nanoseconds), and the functions and principles are consistent with the prior art, which will not be repeated here.
[0042] The improvements include:
[0043] MCU, used to output PWM signal;
[0044] In this embodiment, the MCU, Microcontroller Unit, which is particularly suitable for low-cost requirements, can send out a PWM signal, that is, an original laser driving signal, such as a laser light emitting signal, a laser driving signal on, a laser driving signal off, and the like.
[0045] The inverter INV1, the input end is connected to the output end of the MCU;
[0046] In this embodiment, the inverter INV1 is a logic gate, and its main function is to invert the logic state of the input signal, such as converting the PWM signal into PWM_n, that is, the inverted signal of the laser drive signal. When the PWM signal state is logic high (high level), the converted PWM_n signal state is logic low (low level). The function of the following inverter INV2 is the same, but the input signal is different.
[0047] The NOR gate NOR1, the input end of which is respectively connected to the output end of the inverter INV1 and the output end of the D flip-flop D2, and the output end of the NOR gate NOR1 is connected to the input end of the laser driving circuit;
[0048] In this embodiment, the NOR gate is a basic digital logic gate, which has two inputs and one output. Its logic function is opposite to that of the "OR gate". Specifically, the output of the NOR gate is logic 0 when any one input is logic 1, and the output is logic 1 only when both inputs are logic 0. As in this application, logic high represents logic 1, and logic low represents logic 0. As the output of the NOR gate NOR1, DRI is a laser driving signal, which drives the laser to emit laser when it is high (logic high), and turns off the laser when it is low (logic low).
[0049] D flip-flop D1, D end is respectively connected to Q_n end of D flip-flop D1, the first end of pull-down resistor R3, input end of inverter INV2 and CLK end of D flip-flop D2, CLK end of D flip-flop D1 is connected to the output end of laser light detection circuit;
[0050] The CLR_n terminal of the D flip-flop D2 is connected to the output terminal of the inverter INV2 through the resistor R1, and the CLR_n terminal of the D flip-flop D2 is also connected to the capacitor C1 to form an RC delay circuit;
[0051] In this embodiment, the two D flip-flops are connected to each other through a CK branch, and both flip-flops are D flip-flops with reset or set. The output signal of the Q_n terminal of the D flip-flop D2 is the EN signal, which forms the final laser driving signal after passing through the NOR gate NOR1 with the PWM_n signal.
[0052] The inverter INV2, the CLR_n terminal is connected to the output terminal of the inverter INV2 through the resistor R2, and the CLR_n terminal of the D flip-flop D1 is also connected to the capacitor C2 to form an RC delay circuit;
[0053] The second end of the pull-down resistor R3 is grounded.
[0054] In this embodiment, the working state of the circuit of the present application is the following four states:
[0055] ① Before the MCU sends out the laser light signal: When the PWM signal output by the MCU is low, it is converted to PWM_n by the inverter INV1 and becomes logic high, and the output DRI of the NOR gate NOR1 is in a logic low state, so that the laser drive circuit is turned off; at this time, the CK network is in a logic low state due to the pull-down effect of R3, and CK is converted to a logic high state after passing through the inverter INV2, so that RST_n1 and RST_n2 are both logic high, D1 and D2 are both in the enabled state, and the default output state Q of the trigger is logic high, Q_n is logic low, and EN is low and does not affect the output of the NOR gate NOR1;
[0056] ②MCU sends out the laser drive signal. Before the laser emits light: Since the CLK signal of D1 comes from LD_TRI, before the laser emits light, the signals of D1 and D2 are in an unchanged state, and the EN signal is logic low. After the PWM signal output by the MCU is converted to logic high, it is converted to PWM_n as logic low by the inverter INV1. Therefore, the output signal of the NOR gate NOR1 is logic high. At this time, the laser drive circuit supplies power to the laser LD, and the photodiode (photosensitive sensor) D3 is used to detect whether the LD emits light.
[0057] ③MCU sends out a laser drive signal, and after the laser LD emits light: when the laser LD emits light, the photosensor D3 passes through the laser light detection circuit to form a narrow pulse LD_TRI signal, and D1 performs signal conversion on the rising edge of the LD_TRI signal. The output Q1* of the D flip-flop D1 is D1=Q1_n, so that Q1 becomes logic low on the rising edge of LD_TRI, and Q1_n becomes logic high, that is, the CK signal becomes high, and then the D flip-flop D2 starts state conversion, and the output Q2* of the D flip-flop D2 is D2=PWM_n. At this time, PWM_n is logic low, so the output of Q2_n is high, that is, EN is logic high, so that the output of the NOR gate NOR1 is logic low, thereby turning off the DRI signal; it is worth noting that since the CK signal has an RC delay circuit after passing through the inverter INV2, the states of D1 and D2 will not be cleared immediately, so the size of RC needs to be set reasonably. A reference formula is:
[0058] R*C*ln(VCC / VIL)≥t HPWM , where R is the resistance value (i.e. the resistance value of R1 and R2), C is the capacitance value (the capacitance value of C1 and C2), VCC is the power supply voltage, VIL is the threshold value of the D flip-flop input being low, t HPWM The time when PWM is logic high;
[0059] ④: MCU turns off the laser drive signal: After the laser emits light, the circuit has set the laser drive signal DRI signal to logic low, and the CK signal is high, causing the output of the inverter INV2 to be low. The RC time set by the circuit is greater than the time when PWM is logic high, so D1D2 will maintain the state of the circuit during the time when PWM is logic high. When PWM turns to logic low, PWM_n remains logic high. At this time, no matter how the EN input of the NOR gate NOR1 changes, the laser drive signal DRI can be guaranteed to be in the off state. After the reset signals RST_n1 and RST_n2 of D1D2 reach the input low threshold (VIL), D1D2 starts to reset, and Q1_n is set to logic low again, that is, CK is low, and Q2_n is set to logic low, that is, EN is logic low, to restore the default state of the circuit and wait for the next MCU to send a PWM signal.
[0060] The expected waveform of the circuit of this application is as follows Figure 2 As shown, it can be seen that when the MCU drives the laser, the driving signal completes the circuit of the self-shutdown function after the laser emits light.
[0061] The parts not described in detail in this application are prior art, so this application does not describe them in detail.
[0062] It is to be understood that the term "one" should be understood as "at least one" or "one or more", that is, in one embodiment, the number of an element may be one, while in another embodiment, the number of the element may be multiple, and the term "one" should not be understood as a limitation on the quantity.
[0063] Although this article uses more professional terms, it does not exclude the possibility of using other terms. These terms are used only to more conveniently describe and explain the essence of this application; interpreting them as any additional restrictions is contrary to the spirit of this application.
[0064] The present application is not limited to the above-mentioned optimal implementation mode. Anyone can derive other forms of products under the inspiration of the present application. However, no matter what changes are made in the shape or structure, any technical solution that is the same or similar to that of the present application falls within the protection scope of the present application.
Claims
1. A laser drive signal self-shutdown circuit, comprising a laser drive circuit, a laser light detection circuit, a laser LD and a photosensor D3, characterized in that: Also includes: MCU, used to output PWM signal; An inverter INV1, whose input end is connected to the output end of the MCU; A NOR gate NOR1, whose input end is respectively connected to the output end of the inverter INV1 and the output end of the D flip-flop D2, and whose output end is connected to the input end of the laser driving circuit; D flip-flop D1, D end is respectively connected to the Q_n end of the D flip-flop D1, the first end of the pull-down resistor R3, the input end of the inverter INV2 and the CLK end of the D flip-flop D2, and the CLK end of the D flip-flop D1 is connected to the output end of the laser light detection circuit; The CLR_n terminal of the D flip-flop D2 is connected to the output terminal of the inverter INV2 through the resistor R1, and the CLR_n terminal of the D flip-flop D2 is also connected to the capacitor C1 to form an RC delay circuit; The inverter INV2, the CLR_n terminal is connected to the output terminal of the inverter INV2 through the resistor R2, and the CLR_n terminal of the D flip-flop D1 is also connected to the capacitor C2 to form an RC delay circuit; The second end of the pull-down resistor R3 is grounded.
2. A laser drive signal self-shutdown circuit according to claim 1, characterized in that: Before the MCU sends a laser light signal: The PWM signal output by the MCU is logic low, which is converted to PWM_n by the inverter INV1 to become logic high. The output DRI of the NOR gate NOR1 is in a logic low state, so that the laser driving circuit is turned off. The D flip-flop D1 and the D flip-flop D2 are both in an enabled state, and the default output state Q is logic high and Q_n is logic low.
3. A laser drive signal self-shutdown circuit according to claim 2, characterized in that: Before the MCU sends out the laser drive signal and before the laser LD emits light: The D trigger D1 and the trigger D2 are both in an unchanged state, so that the EN signal output from the Q_n terminal of the trigger D2 is logic low, and the PWM signal output by the MCU is logic high, which is converted into PWM_n by the inverter INV1 and becomes logic low, so that the output DRI of the NOR gate NOR1 is in a logic high state, so that the laser drive circuit is turned on and the laser LD emits light.
4. The laser drive signal self-shutdown circuit according to claim 1, characterized in that: After the MCU sends out the laser driving signal and the laser LD emits light: The photosensor D3 inputs the output signal to the laser light detection circuit to output a narrow pulse LD_TRI signal. The D trigger D1 performs signal conversion at the rising edge of the LD_TRI signal to output the Q1_n signal from the Q_n terminal and changes to logic high at the rising edge of the LD_TRI signal. The Q1 signal at the Q terminal changes to logic low at the rising edge of the LD_TRI signal.
5. A laser drive signal self-shutdown circuit according to claim 4, characterized in that: After the MCU sends out the laser driving signal and the laser LD emits light: After receiving the Q1_n signal, the D flip-flop D2 outputs a logic high EN signal at the Q_n terminal, so that the NOR gate NOR1 outputs a logic low and turns off the DRI signal.
6. A laser drive signal self-shutdown circuit according to any one of claims 1 to 5, characterized in that: The RC time of each of the RC delay circuits is greater than the time during which the PWM signal is logic high.
7. A laser drive signal self-shutdown circuit according to claim 6, characterized in that: After the MCU sends a signal to turn off the laser drive: During the time when the PWM signal is logic high, the D flip-flop D1 and the D flip-flop D2 maintain the circuit state. After the PWM signal is converted to logic low, it is converted to PWM_n by the inverter INV1 to become logic high, so that the DRI signal at the output end of the NOR gate NOR1 is all logic low and in a closed state.
8. The laser drive signal self-shutdown circuit according to claim 7, characterized in that: After the MCU sends a signal to turn off the laser drive: When the reset signal RST_n1 of the D flip-flop D1 and the reset signal RST_n2 of the D flip-flop D2 reach the threshold value of setting the input to logic low, the two D flip-flops start to reset, set the Q1_n signal of the D flip-flop D1 to logic low, set the EN signal of the D flip-flop D2 to logic low, restore the circuit to the default state, and wait for the next MCU to send a PWM signal.
9. The laser drive signal self-shutdown circuit according to claim 6, characterized in that: The RC size of the RC delay circuit is: R*C*ln(VCC / VIL)≥t HPWM Where R is the resistance value of resistors R1 and R2, C is the capacitance value of capacitors C1 and C2, VCC is the power supply voltage, VIL is the threshold value of the D flip-flop input to logic low, t HPWM This is the time that the PWM signal is logic high.
10. A laser drive signal self-shutdown circuit according to any one of claims 1 to 5, characterized in that: Both D flip-flops have reset or set functions.
Citation Information
Patent Citations
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CN107046751A
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CN110729991A