A high-voltage triboelectric energy management circuit based on switched capacitor converter

By using the electrical management circuit based on switch -based capacitors in the rubbing nanometer, the problem of high inductances and impedance loss of impedance in the existing technology, and realized high -efficiency electrical collection and storage, suitable for the demand for low -voltage sensors.

CN118100640BActive Publication Date: 2025-01-28WUHAN POWER SEMICON CO LTD
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Patent Information

Application Number
CN202410144976.X
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2024-02-01
Publication Date
2025-01-28
Estimated Expiration
2044-02-01

AI Technical Summary

Technical Problem

The prior art has problems such as large inductance and impedance mismatch in the electrical energy management of friction nanogenerators, resulting in low energy collection efficiency.

Method used

The high -voltage friction energy management circuit based on switching capacitor converters is adopted, and the impedance matching, the increase in charge, and the voltage decrease through the combination of rectifier, switch capacitor converter, control circuit and energy storage device.

Benefits of technology

The energy collection efficiency of the friction nanometer is improved, the maximum energy output cycle is achieved, the static power consumption of the circuit is reduced, and the low -voltage energy storage unit is applicable.

✦ Generated by Eureka AI based on patent content.

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Abstract

The present invention relates to a high-voltage friction electric energy management circuit based on a switched capacitor converter, comprising a friction nanogenerator TENG, a rectifier, a switched capacitor converter, a control circuit and an energy storage device; the output end of the friction nanogenerator TENG is connected to the input end of the rectifier, the output end of the rectifier is connected to the input end of the energy storage device through a switched capacitor converter, the input end of a peak detection circuit is connected between the rectifier and the switched capacitor converter, and the output end of the peak detection circuit is connected to the input end of the switched capacitor converter through a switching signal generating circuit; the present invention adopts synchronous charge extraction technology to realize a collection scheme of a high-voltage friction electric energy collection system based on a switched capacitor converter, and solves the problem of low efficiency of existing capacitive energy management strategies; the specific circuit adopts an electronic switch to realize peak detection, which is highly practical; the switched capacitor has an initial voltage to reduce energy loss during charging.
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Description

Technical Field

[0001] The present invention relates to the field of microelectronics technology, and in particular to a high-voltage triboelectric energy management circuit based on a switched capacitor converter. Background Art

[0002] At present, the development of Internet of Things technology has put forward higher requirements for power technology. The power demand shows the characteristics of wide distribution, large number, low power and wireless. The traditional power grid is stable and efficient, but the distribution is concentrated and the flexibility is insufficient, which is neither economical nor conducive to maintenance. Battery power supply is convenient, but the battery capacity limits the life of the sensor and the maintenance cost is high. Distributed energy can effectively meet the power demand of future sensors. For example, friction nanogenerators can reduce the dependence and maintenance cost of sensors on traditional energy (such as chemical batteries), extend the service life of electronic products, and minimize environmental pollution. In addition, friction nanogenerators have the characteristics of low cost, small size, light weight, high conversion efficiency, etc., and have considerable application prospects. Triboelectric Nanogenerators (TENG) have nonlinear capacitive internal characteristics and low-frequency working characteristics. The high voltage (kV), low current (μA), and high internal resistance (GΩ) output by the device cannot be directly applied to low-voltage small electronic devices. Therefore, the power management unit is indispensable. In order to improve the energy management efficiency of friction nanogenerators, a variety of friction energy harvesting technologies have been proposed. Existing technologies can be divided into inductive and capacitive management strategies. Inductive management strategies include inductive synchronous switch collection technology, flyback transformer collection technology (flyback converter), and maximum power point tracing (MPPT) technology based on buck circuits. These technologies rely on large-volume inductors and extract energy based on LC oscillation. The commonly used inductance reaches the millihenry level (mH), which is not conducive to integration. The difficulty of capacitive management technology is the huge impedance mismatch between the power supply capacitor (pA~nA) and the energy storage capacitor (uF~mF), and the efficiency of direct charging is not ideal. Only when the capacitors are matched can the maximum efficiency output be achieved. Summary of the invention

[0003] The technical problem to be solved by the present invention is to provide a high-voltage friction electric energy management circuit based on a switched capacitor converter to overcome the deficiencies in the above-mentioned prior art.

[0004] The technical solution of the present invention to solve the above technical problems is as follows: a high-voltage triboelectric energy management circuit based on a switched capacitor converter, comprising a triboelectric nanogenerator TENG, a rectifier, a switched capacitor converter, a control circuit and an energy storage device; the control circuit comprises a peak detection circuit and a switch signal generating circuit;

[0005] The output end of the friction nanogenerator TENG is connected to the input end of the rectifier, the output end of the rectifier is connected to the input end of the energy storage device through the switching capacitor converter, the input end of the peak detection circuit is connected between the rectifier and the switching capacitor converter, and the output end of the peak detection circuit is connected to the input end of the switching capacitor converter through the switching signal generating circuit.

[0006] Based on the above technical solution, the present invention can also be improved as follows.

[0007] Further, the switched capacitor converter includes capacitor C1, capacitor C2, capacitor C3, capacitor C4, capacitor C5, capacitor C6, diode D1, diode D2, diode D3, diode D4, diode D5, diode D6, diode D7, diode D8, diode D9, diode D 10 、Diode D 11 、Diode D 12 、Diode D 13 、Diode D 14 、Diode D 15 、Diode D 16 、Diode D 17 , PMOS tube P1, NMOS tube N1, NMOS tube N2, NMOS tube N3, NMOS tube N4, NMOS tube N5 and NMOS tube N6, wherein the capacitance value of capacitor C1, capacitor C2, capacitor C3, capacitor C4, capacitor C5 and capacitor C6 is all C0.

[0008] Furthermore, the DC positive output terminal of the rectifier is connected to the positive terminal of the diode D1 and the diode D 15 The negative terminal of the rectifier is connected to the first terminal of the capacitor C1 and the peak detection circuit, and the DC negative output terminal of the rectifier is connected to the drain of the PMOS tube P1;

[0009] The cathode terminal of the diode D1 is connected to the anode terminal of the diode D2 and the first terminal of the energy storage device;

[0010] The cathode terminal of the diode D2 is connected to the first terminal of the capacitor C6, the anode terminal of the diode D3 and the cathode terminal of the diode D4;

[0011] The cathode terminal of the diode D3 is connected to the anode terminal of the diode D6, the cathode terminal of the diode D7 and the first terminal of the capacitor C5;

[0012] The cathode terminal of diode D6 and the anode terminal of diode D9, diode D 10 The negative terminal of and the first end of capacitor C4 are connected;

[0013] The cathode terminal of diode D9 is connected to the 12 The positive terminal of diode D13 The negative terminal of and the first end of capacitor C3 are connected;

[0014] Diode D 12 The negative terminal of the diode D 15 The positive terminal of diode D 16 The negative terminal of and the first end of capacitor C2 are connected;

[0015] The second terminal of capacitor C1 is connected to diode D 16 The positive terminal of diode D 17 The negative terminal of and the drain of NMOS tube N2 are connected;

[0016] The source of NMOS tube N2 and diode D 17 The positive terminal of diode D 14 The negative terminal of diode D 13 The positive terminal of the capacitor C2, the second terminal of the capacitor C2 and the drain of the NMOS tube N3 are connected, and the gate of the NMOS tube N2 is connected to the gate of the NMOS tube N3;

[0017] The source of NMOS tube N3 and diode D 14 The positive terminal of diode D 11 The negative terminal of diode D 10 The positive terminal of the capacitor C3, the second terminal of the capacitor C3 and the drain of the NMOS tube N4 are connected, and the gate of the NMOS tube N3 is connected to the gate of the NMOS tube N4;

[0018] The source of NMOS tube N4 and diode D 11 The positive terminal of the diode D8, the negative terminal of the diode D7, the second terminal of the capacitor C4 and the drain of the NMOS tube N5 are connected, and the gate of the NMOS tube N4 is connected to the gate of the NMOS tube N5;

[0019] The source of the NMOS tube N5 is connected to the positive terminal of the diode D8, the negative terminal of the diode D5, the positive terminal of the diode D4, the second end of the capacitor C5 and the drain of the NMOS tube N6, and the gate of the NMOS tube N5 is connected to the gate of the NMOS tube N6;

[0020] The source of the NMOS tube N6 is connected to the positive terminal of the diode D5, the second terminal of the capacitor C6 and the source of the NMOS tube N1;

[0021] The second end of the energy storage device is connected to the drain of the NMOS tube N1;

[0022] The alternating current V of the friction nanogenerator TENG T Converted into DC power V by rectifier and switched capacitor converter R Enter the peak detection circuit.

[0023] Furthermore, the source of the PMOS tube P1 is grounded; the source of the NMOS tube N1 is grounded.

[0024] Furthermore, the rectifier is a full-bridge rectifier, and the rectifier includes a diode D 18 、Diode D 19 、Diode D 20 And diode D 21 ; The positive terminal of the friction nanogenerator TENG is connected to the diode D 18 The positive terminal and D 21 The negative end of the friction nanogenerator TENG is connected to the negative end of the diode D 19 The positive terminal and diode D 20 The negative terminal link;

[0025] Diode D 18 The negative terminal of the diode D 19 The negative terminal of the diode D1 is connected to the positive terminal of the diode D 15 The negative terminal of and the first terminal of capacitor C1 are connected;

[0026] Diode D 21 The positive terminal and diode D 20 The positive terminals of the transistors are connected to the drain of the PMOS tube P1.

[0027] Further, the peak detection circuit includes an active differentiator, a comparator and a D flip-flop connected in series in sequence;

[0028] The input of the active differential is connected to the DC positive output of the rectifier, which passes through resistor R1 and capacitor C7 in turn and is connected to the negative input of the operational amplifier; the positive input of the operational amplifier passes through resistor R B Grounding;

[0029] The output of the operational amplifier V dif The feedback loop with the negative input terminal is composed of resistor R2 and capacitor C8 in parallel;

[0030] The comparator output V com Connect the CP terminal of the D flip-flop, and the Q terminal of the D flip-flop outputs V M The CLR terminal of the D flip-flop is connected through the parallel resistor R3 and the diode D 22 Connected to the Q terminal of the D flip-flop, the resistor R3, the positive terminal of the diode and the CRL terminal of the D flip-flop are grounded through the capacitor C9.

[0031] Further, the switch signal generating circuit includes a non-repeatable monostable trigger, a repeatable monostable trigger, a first selector, a second selector, an inverter, a delay module, an OR gate and a third selector;

[0032] The input ends of the non-repeatable monostable trigger and the repeatable monostable trigger are connected to the Q end of the D trigger, the output end of the non-repeatable monostable trigger is connected to the first selector, and the selection end of the first selector outputs the switching timing θ3 of the NMOS tubes N2 to NMOS tubes N6;

[0033] The output end of the repeatable monostable trigger is connected to the input end of the inverter and the input end of the delay module, the output end of the inverter is connected to the second selector, and the selection end of the second selector outputs the switching timing θ1 of the PMOS tube P1;

[0034] The output end of the delay module is connected to the input end of the OR gate, the output end of the OR gate is connected to the third selector, and the third selector outputs the switching timing θ2 of the NMOS tube N1.

[0035] Furthermore, the delay module includes a resistor R d , capacitor C d , NOT gate and NOR gate; the output of the NOT gate is connected through the resistor R d Connect one input terminal of the NOR gate to the capacitor C d The first end of the repeatable monostable trigger is connected to the other input end of the NOR gate and the input end of the NOT gate; the capacitor C d The second end of is grounded, and the output end of the NOR gate is connected to the input end of the OR gate.

[0036] Furthermore, the PMOS transistor P1 , the NMOS transistor N1 , the NMOS transistor N2 , the NMOS transistor N3 , the NMOS transistor N4 , the NMOS transistor N5 and the NMOS transistor N6 are all metal-oxide semiconductor field effect transistors.

[0037] The beneficial effects of the present invention are as follows: the high-voltage friction electric energy management circuit based on the switched capacitor converter of the present invention realizes impedance matching, voltage reduction, and charge multiplication, and does not require a large inductor or transformer, thereby effectively improving the energy collection efficiency;

[0038] First, the synchronous switch integration technology can completely transfer the energy accumulated in each cycle of the friction nanogenerator to the load, thus realizing the Cycle for Maximized Energy Output (CMEO), and the output power is independent of the load.

[0039] Second, the switch timing uses deep depletion technology to provide a negative voltage across the gate-source when the switch is turned off to prevent switch leakage, thereby reducing the static power consumption of the circuit system;

[0040] Third, the switched capacitor converter can achieve impedance matching, charge multiplication, and voltage reduction, and can be applied to low-voltage energy storage units to meet the current needs of low-voltage sensors and is practical.

[0041] Fourthly, in the previous circuits based on switched capacitor converters, the switch voltage had no initial voltage, resulting in large energy loss when the friction nanogenerator charged it; this solution allows the energy storage device to charge the switched capacitor in parallel, so that the switch voltage has an initial voltage, which can reduce the energy loss during the charging process and improve the energy transfer efficiency; this solution is highly flexible and practical, suitable for various types of friction generators, has a simple circuit structure, and is low in cost, and can be widely used in the application field of friction electricity;

[0042] The present invention balances the circuit area and the collection efficiency, adopts the synchronous charge extraction technology, realizes the collection scheme of the high-voltage friction electric energy collection system based on the switched capacitor converter, and solves the problem of low efficiency of the existing capacitive energy management strategy; the specific circuit adopts an electronic switch to realize peak detection, which is highly practical; the switched capacitor has an initial voltage to reduce the energy loss during the charging process; the switch deep depletion technology is designed to reduce the circuit loss, and ensure that the wireless sensor node can operate stably for a long time; the present invention has a simple overall structure, low circuit loss, strong practicality, and a wide range of applications. BRIEF DESCRIPTION OF THE DRAWINGS

[0043] Figure 1 It is the overall framework diagram of the electric energy collection system of the present invention;

[0044] Figure 2 A circuit diagram of the triboelectric energy collection system of the present invention;

[0045] Figure 3 is a circuit diagram of a peak detection circuit of the present invention;

[0046] Figure 4 The switch signal generating circuit of the present invention is a circuit diagram

[0047] Figure 5 It is a circuit node timing diagram of the present invention. DETAILED DESCRIPTION

[0048] The principles and features of the present invention are described below in conjunction with the accompanying drawings. The examples given are only used to explain the present invention and are not used to limit the scope of the present invention.

[0049] like Figure 1 to Figure 5 As shown, in Example 1, a high-voltage triboelectric energy management circuit based on a switched capacitor converter includes a triboelectric nanogenerator TENG, a rectifier, a switched capacitor converter, a control circuit and an energy storage device; the control circuit includes a peak detection circuit and a switch signal generating circuit;

[0050] The output end of the friction nanogenerator TENG is connected to the input end of the rectifier, the output end of the rectifier is connected to the input end of the energy storage device through the switching capacitor converter, the input end of the peak detection circuit is connected between the rectifier and the switching capacitor converter, and the output end of the peak detection circuit is connected to the input end of the switching capacitor converter through the switching signal generating circuit.

[0051] The rectifier is used to convert the alternating current generated by the friction nanogenerator TENG into direct current;

[0052] The peak detection circuit is used to detect the maximum voltage of the friction nanogenerator TENG and generate a peak pulse signal. The peak pulse signal is passed through the switch signal generation circuit to obtain the final switch signal, thereby switching the switch state of the switched capacitor converter.

[0053] The energy storage device only extracts energy at the voltage peak of the triboelectric nanogenerator TENG and remains disconnected for the rest of the time.

[0054] Embodiment 2: This embodiment is a further improvement on the basis of embodiment 1, and its details are as follows:

[0055] The switched capacitor converter includes capacitor C1, capacitor C2, capacitor C3, capacitor C4, capacitor C5, capacitor C6, diode D1, diode D2, diode D3, diode D4, diode D5, diode D6, diode D7, diode D8, diode D9, diode D 10 、Diode D 11 、Diode D 12 、Diode D 13 、Diode D 14 、Diode D 15 、Diode D 16 、Diode D 17 , PMOS tube P1, NMOS tube N1, NMOS tube N2, NMOS tube N3, NMOS tube N4, NMOS tube N5 and NMOS tube N6, wherein the capacitance value of capacitor C1, capacitor C2, capacitor C3, capacitor C4, capacitor C5 and capacitor C6 is all C0.

[0056] Embodiment 3, this embodiment is a further improvement on the basis of embodiment 2, and its details are as follows:

[0057] The DC positive output terminal of the rectifier is connected to the positive terminal of the diode D1 and the diode D 15 The negative terminal of the rectifier is connected to the first terminal of the capacitor C1 and the peak detection circuit, and the DC negative output terminal of the rectifier is connected to the drain of the PMOS tube P1;

[0058] The cathode terminal of the diode D1 is connected to the anode terminal of the diode D2 and the first terminal of the energy storage device;

[0059] The cathode terminal of the diode D2 is connected to the first terminal of the capacitor C6, the anode terminal of the diode D3 and the cathode terminal of the diode D4;

[0060] The cathode terminal of the diode D3 is connected to the anode terminal of the diode D6, the cathode terminal of the diode D7 and the first terminal of the capacitor C5;

[0061] The cathode terminal of diode D6 and the anode terminal of diode D9, diode D 10 The negative terminal of and the first end of capacitor C4 are connected;

[0062] The cathode terminal of diode D9 is connected to the 12 The positive terminal of diode D 13 The negative terminal of and the first end of capacitor C3 are connected;

[0063] Diode D 12 The negative terminal of the diode D 15 The positive terminal of diode D 16 The negative terminal of and the first end of capacitor C2 are connected;

[0064] The second terminal of capacitor C1 is connected to diode D 16 The positive terminal of diode D 17 The negative terminal of and the drain of NMOS tube N2 are connected;

[0065] The source of NMOS tube N2 and diode D 17 The positive terminal of diode D 14 The negative terminal of diode D 13 The positive terminal of the capacitor C2, the second terminal of the capacitor C2 and the drain of the NMOS tube N3 are connected, and the gate of the NMOS tube N2 is connected to the gate of the NMOS tube N3;

[0066] The source of NMOS tube N3 and diode D 14 The positive terminal of diode D 11 The negative terminal of diode D 10 The positive terminal of the capacitor C3, the second terminal of the capacitor C3 and the drain of the NMOS tube N4 are connected, and the gate of the NMOS tube N3 is connected to the gate of the NMOS tube N4;

[0067] The source of NMOS tube N4 and diode D 11 The positive terminal of the diode D8, the negative terminal of the diode D7, the second terminal of the capacitor C4 and the drain of the NMOS tube N5 are connected, and the gate of the NMOS tube N4 is connected to the gate of the NMOS tube N5;

[0068] The source of the NMOS tube N5 is connected to the positive terminal of the diode D8, the negative terminal of the diode D5, the positive terminal of the diode D4, the second end of the capacitor C5 and the drain of the NMOS tube N6, and the gate of the NMOS tube N5 is connected to the gate of the NMOS tube N6;

[0069] The source of the NMOS tube N6 is connected to the positive terminal of the diode D5, the second terminal of the capacitor C6 and the source of the NMOS tube N1;

[0070] The second end of the energy storage device is connected to the drain of the NMOS tube N1;

[0071] The alternating current V of the friction nanogenerator TENG T Converted into DC power V by rectifier and switched capacitor converter R Enter the peak detection circuit.

[0072] One end of the rectifier is connected to the friction nanogenerator TENG, and the other end is connected to the switched capacitor converter. T Convert to DC V R ;

[0073] First, when the voltage of the friction nanogenerator TENG gradually rises and does not reach the peak, the switch NMOS tubes N1 to NMOS tubes N6 are closed, and the PMOS tube P1 is disconnected, with an initial voltage V L The energy storage device charges 6 switched capacitors with an initial voltage of 0 in parallel, so that the voltage of each capacitor is equal to V L ;

[0074] Then, when the peak detection circuit detects the voltage peak of the friction nanogenerator TENG, the PMOS tube P1 is closed, and the NMOS tubes N1 to NMOS tubes N6 are disconnected. The friction nanogenerator TENG charges the capacitors C1, C2, C3, C4, C5, and C6 connected in series. At this time, the equivalent capacitance of the switched capacitor converter is C0 / 6, which is closer to the intrinsic capacitance (pF to nF) of the friction nanogenerator TENG, achieving impedance matching. In addition, the capacitors C1, C2, C3, C4, C5, and C6 are connected in series for voltage division to prevent overvoltage damage to the energy storage device during the next charging process, thereby improving system stability.

[0075] Finally, the PMOS tube P1 is disconnected, the NMOS tube N1 is closed, and the capacitors C1, C2, C3, C4, C5, and C6 are connected in parallel to charge the energy storage device. At this time, the equivalent capacitance of the switched capacitor converter is C0*6, and the charge is multiplied by 6 times, ensuring stable power supply to the energy storage device; the NMOS tubes N2 to N6 are closed only when the friction nanogenerator TENG reaches the first peak, in order to allow the switched capacitor to have an initial voltage; Figure 2 The unidirectional conductivity of the diode realizes automatic switching of the circuit, reducing the complexity of the system structure.

[0076] Embodiment 4: This embodiment is a further improvement on the basis of embodiment 3, and its details are as follows:

[0077] The source of the PMOS tube P1 is grounded; the source of the NMOS tube N1 is grounded.

[0078] Embodiment 5: This embodiment is a further improvement on the basis of embodiment 2, and its details are as follows:

[0079] The rectifier is a full-bridge rectifier, which includes a diode D 18 、Diode D 19 、Diode D 20 And diode D 21 ; The positive terminal of the friction nanogenerator TENG is connected to the diode D 18 The positive terminal and D 21 The negative end of the friction nanogenerator TENG is connected to the negative end of the diode D 19 The positive terminal and diode D 20 The negative terminal link;

[0080] Diode D 18 The negative terminal of the diode D 19 The negative terminal of the diode D1 is connected to the positive terminal of the diode D 15 The negative terminal of and the first terminal of capacitor C1 are connected;

[0081] Diode D 21 The positive terminal and diode D 20 The positive terminals of the transistors are connected to the drain of the PMOS tube P1.

[0082] Embodiment 6: This embodiment is a further improvement on the basis of embodiment 1, and its details are as follows:

[0083] The peak detection circuit includes an active differentiator, a comparator and a D flip-flop connected in series in sequence;

[0084] The input of the active differential is connected to the DC positive output of the rectifier, which passes through resistor R1 and capacitor C7 in turn and is connected to the negative input of the operational amplifier; the positive input of the operational amplifier passes through resistor R B Grounding;

[0085] The output of the operational amplifier V dif The feedback loop with the negative input terminal is composed of resistor R2 and capacitor C8 in parallel;

[0086] The comparator output Vcom Connect the CP terminal of the D flip-flop, and the Q terminal of the D flip-flop outputs V M The CLR terminal of the D flip-flop is connected through the parallel resistor R3 and the diode D 22 Connected to the Q terminal of the D flip-flop, the resistor R3, the positive terminal of the diode and the CRL terminal of the D flip-flop are grounded through the capacitor C9.

[0087] The comparator converts V dif Compared with zero voltage, when V dif >0, the comparator output V com is high level, otherwise it is low level; at the same time, V com It is the clock signal of the D flip-flop, which realizes monostable trigger. When the clock rises, V M The output is high level, and the duration is determined by the time constant of resistor R3 and capacitor C9; therefore, when the voltage of the friction nanogenerator TENG reaches its peak, it corresponds to V M Will output a high level.

[0088] Embodiment 7, this embodiment is a further improvement on the basis of embodiment 2, and its details are as follows:

[0089] The switch signal generating circuit includes a non-repeatable monostable trigger, a repeatable monostable trigger, a first selector, a second selector, an inverter, a delay module, an OR gate and a third selector;

[0090] The input ends of the non-repeatable monostable trigger and the repeatable monostable trigger are connected to the Q end of the D trigger, the output end of the non-repeatable monostable trigger is connected to the first selector, and the selection end of the first selector outputs the switching timing θ3 of the NMOS tubes N2 to NMOS tubes N6;

[0091] The output end of the repeatable monostable trigger is connected to the input end of the inverter and the input end of the delay module, the output end of the inverter is connected to the second selector, and the selection end of the second selector outputs the switching timing θ1 of the PMOS tube P1;

[0092] The output end of the delay module is connected to the input end of the OR gate, the output end of the OR gate is connected to the third selector, and the third selector outputs the switching timing θ2 of the NMOS tube N1.

[0093] The input of the switch signal generating circuit is V M , used to generate the switching timings θ1, θ2, θ3 of the PMOS tube P1, NMOS tube N1, NMOS tube N2-NMOS tube N6;

[0094] V MAfter the non-repeatable monostable triggering, V1 is obtained; the TTL integrated chip 74121 can realize the non-repeatable monostable through the corresponding connection of the external resistor and capacitor; the high level time of V1 is equal to the monostable maintenance time, which is determined by the time constant of the external resistor and capacitor of the TTL integrated chip 74121; V1 passes through the first selector and outputs 5V or -5V to obtain the gate voltage θ3 of the NMOS tube N2-NMOS tube N6, and 5V can make the NMOS tube N2~NMOS tube N6 maintain the negative voltage between the gate and the source when it is turned off, so as to realize the deep depletion technology.

[0095] V M After the repeatable monostable trigger, V2 is obtained; the commercial chip 74CD4538 can realize the repeatable monostable module by connecting the corresponding pins through external resistors and capacitors; the duty cycle of V2 is determined by the charging and discharging time constant of the external resistors and capacitors connected to the commercial chip 74CD4538; V2 passes through the inverter and the second selector to output the gate voltage θ1 of the PMOS tube P1, and the positive voltage between the gate and the source is maintained when the PMOS tube P1 is turned off.

[0096] In addition, V2 passes through the delay module to obtain the voltage V delay ,V delay And V1 pass through an OR gate, and then connect to the third selector to output the gate voltage θ2 of the NMOS tube N1.

[0097] Embodiment 8, this embodiment is a further improvement on the basis of embodiment 7, and its details are as follows:

[0098] The delay module includes a resistor R d , capacitor C d , NOT gate and NOR gate; the output of the NOT gate is connected through the resistor R d Connect one input terminal of the NOR gate to the capacitor C d The first end of the repeatable monostable trigger is connected to the other input end of the NOR gate and the input end of the NOT gate; the capacitor C d The second end of is grounded, and the output end of the NOR gate is connected to the input end of the OR gate.

[0099] The purpose is to obtain a two-phase non-overlapping clock to prevent the PMOS tube P1 and the NMOS tube N1 from being turned on at the same time, thereby ensuring the stability of the circuit operation.

[0100] Embodiment 9: This embodiment is a further improvement on the basis of embodiment 2, and its details are as follows:

[0101] PMOS tube P1, NMOS tube N1, NMOS tube N2, NMOS tube N3, NMOS tube N4, NMOS tube N5 and NMOS tube N6 all use metal-oxide semiconductor field effect transistors. The universality of the power management system can be improved and flexibly applied to different types of friction nanogenerators TENG. Although the embodiments of the present invention have been shown and described above, it can be understood that the above embodiments are exemplary and cannot be understood as limitations of the present invention. Ordinary technicians in this field can change, modify, replace and modify the above embodiments within the scope of the present invention.

Claims

1. A high voltage triboelectric energy management circuit based on a switched capacitor converter, characterized in that: It includes a friction nanogenerator TENG, a rectifier, a switch capacitor converter, a control circuit and an energy storage device; the control circuit includes a peak detection circuit and a switch signal generation circuit; The output end of the friction nanogenerator TENG is connected to the input end of the rectifier, the output end of the rectifier is connected to the input end of the energy storage device through the switch capacitor converter, the input end of the peak detection circuit is connected between the rectifier and the switch capacitor converter, and the output end of the peak detection circuit is connected to the input end of the switch capacitor converter through the switch signal generating circuit; The switch capacitor converter includes capacitor C1, capacitor C2, capacitor C3, capacitor C4, capacitor C5, capacitor C6, diode D1, diode D2, diode D3, diode D4, diode D5, diode D6, diode D7, diode D8, diode D9, diode D 10 、Diode D 11 、Diode D 12 、Diode D 13 、Diode D 14 、Diode D 15 、Diode D 16 、Diode D 17 , PMOS tube P1, NMOS tube N1, NMOS tube N2, NMOS tube N3, NMOS tube N4, NMOS tube N5 and NMOS tube N6, wherein the capacitance values ​​of capacitor C1, capacitor C2, capacitor C3, capacitor C4, capacitor C5 and capacitor C6 are all C0; The DC positive output terminal of the rectifier is connected to the positive terminal of the diode D1 and the diode D 15 The negative terminal of the rectifier is connected to the first terminal of the capacitor C1 and the peak detection circuit, and the DC negative output terminal of the rectifier is connected to the drain of the PMOS tube P1; The cathode terminal of the diode D1 is connected to the anode terminal of the diode D2 and the first terminal of the energy storage device; The cathode terminal of the diode D2 is connected to the first end of the capacitor C6, the anode terminal of the diode D3 and the cathode terminal of the diode D4; The cathode terminal of the diode D3 is connected to the anode terminal of the diode D6, the cathode terminal of the diode D7 and the first terminal of the capacitor C5; The cathode end of the diode D6 and the anode end of the diode D9, 10 and a first end of the capacitor C4; The cathode terminal of the diode D9 is connected to the cathode terminal of the diode D 12 The positive terminal of the diode D 13 The negative terminal of the capacitor C3 is connected to the first terminal of the capacitor C3; The diode D 12 The negative terminal of the diode D 15 The positive terminal of the diode D 16 The negative terminal of the capacitor C2 is connected to the first terminal of the capacitor C2; The second end of the capacitor C1 is connected to the diode D 16 The positive terminal of the diode D 17 The negative terminal of and the drain of the NMOS tube N2 are connected; The source of the NMOS tube N2 and the diode D 17 The positive terminal of the diode D 14 The negative terminal of the diode D 13 The positive terminal of the transistor C2, the second terminal of the capacitor C2 and the drain of the NMOS transistor N3 are connected, and the gate of the NMOS transistor N2 is connected to the gate of the NMOS transistor N3; The source of the NMOS tube N3 and the diode D 14 The positive terminal of the diode D 11 The negative terminal of the diode D 10 The positive terminal of the transistor C3, the second terminal of the capacitor C3 and the drain of the NMOS transistor N4 are connected, and the gate of the NMOS transistor N3 is connected to the gate of the NMOS transistor N4; The source of the NMOS tube N4 and the diode D 11 The positive terminal of the diode D8, the positive terminal of the diode D7, the second end of the capacitor C4 and the drain of the NMOS tube N5 are connected, and the gate of the NMOS tube N4 is connected to the gate of the NMOS tube N5; The source of the NMOS tube N5 is connected to the positive terminal of the diode D8, the negative terminal of the diode D5, the positive terminal of the diode D4, the second end of the capacitor C5 and the drain of the NMOS tube N6, and the gate of the NMOS tube N5 is connected to the gate of the NMOS tube N6; The source of the NMOS tube N6 is connected to the positive terminal of the diode D5, the second end of the capacitor C6 and the source of the NMOS tube N1; The second end of the energy storage device is connected to the drain of the NMOS tube N1; The alternating current V of the friction nanogenerator TENG T The rectifier and the switched capacitor converter convert the DC power V R Enter the peak detection circuit.

2. A high-voltage triboelectric energy management circuit based on a switched capacitor converter according to claim 1, characterized in that: The source of the PMOS tube P1 is grounded; the source of the NMOS tube N1 is grounded.

3. The high-voltage triboelectric energy management circuit based on a switched capacitor converter according to claim 1, characterized in that: The rectifier is a full-bridge rectifier, and the rectifier includes a diode D 18 、Diode D 19 、Diode D 20 And diode D 21 The positive terminal of the friction nanogenerator TENG is connected to the diode D 18 The positive terminal and the D 21 The negative terminal of the friction nanogenerator TENG is connected to the negative terminal of the diode D 19 The positive terminal of the diode D 20 The negative terminal link; The diode D 18 The negative terminal of the diode D 19 The negative terminal of the diode D1 is connected to the positive terminal of the diode D 15 The negative terminal of and the first terminal of capacitor C1 are connected; The diode D 21 The positive terminal of the diode D 20 The positive terminals of the transistors are connected to the drain of the PMOS tube P1.

4. The high-voltage triboelectric energy management circuit based on a switched capacitor converter according to claim 1, characterized in that: The peak detection circuit comprises an active differentiator, a comparator and a D flip-flop connected in series in sequence; The input end of the active differential is connected to the DC positive output end of the rectifier, and the DC positive output end of the rectifier passes through the resistor R1 and the capacitor C7 in sequence, and is connected to the negative input end of the operational amplifier; the positive input end of the operational amplifier is connected to the negative input end of the operational amplifier through the resistor R B Grounding; The output terminal V of the operational amplifier dif The feedback loop with the negative input terminal is composed of resistor R2 and capacitor C8 in parallel; The comparator output V com Connect the CP terminal of the D flip-flop, the Q terminal of the D flip-flop outputs V M The CLR terminal of the D flip-flop is connected in parallel with the resistor R3 and the diode D 22 Connected to the Q end of the D flip-flop, the resistor R3, the positive terminal of the diode and the CRL end of the D flip-flop are grounded through the capacitor C9.

5. The high-voltage triboelectric energy management circuit based on a switched capacitor converter according to claim 1, characterized in that: The switch signal generating circuit includes a non-repeatable monostable trigger, a repeatable monostable trigger, a first selector, a second selector, an inverter, a delay module, an OR gate and a third selector; The input ends of the non-repeatable monostable trigger and the repeatable monostable trigger are connected to the Q end of the D trigger, the output end of the non-repeatable monostable trigger is connected to the first selector, and the selection end of the first selector outputs the switching timing θ3 of the NMOS tubes N2 to N6; The output end of the repeatable monostable trigger is connected to the input end of the inverter and the input end of the delay module, the output end of the inverter is connected to the second selector, and the selection end of the second selector outputs the switching timing θ1 of the PMOS tube P1; The output end of the delay module is connected to the input end of the OR gate, the output end of the OR gate is connected to the third selector, and the third selector outputs the switching timing θ2 of the NMOS tube N1.

6. A high-voltage triboelectric energy management circuit based on a switched capacitor converter according to claim 5, characterized in that: The delay module includes a resistor R d , capacitor C d , NOT gate and NOR gate; the output end of the NOT gate is connected through a resistor R d Connect one input terminal of the NOR gate and the capacitor C d The first end of the capacitor C is connected to the output end of the repeatable monostable trigger, the other input end of the NOR gate and the input end of the NOT gate; the capacitor C d The second end of is grounded, and the output end of the NOR gate is connected to the input end of the OR gate.

7. The high-voltage triboelectric energy management circuit based on a switched capacitor converter according to claim 1, characterized in that: The PMOS transistor P1, NMOS transistor N1, NMOS transistor N2, NMOS transistor N3, NMOS transistor N4, NMOS transistor N5 and NMOS transistor N6 are all metal-oxide semiconductor field effect transistors.