A bandgap reference circuit, power management circuit, chip and electronic equipment

Abstract

The embodiment of the present invention discloses a bandgap reference circuit, including: a bandgap reference core module and a pre-stabilization module. When the bandgap reference circuit is started, the pre-stabilization module operates in a first state and outputs a power supply voltage to the bandgap reference core module. The bandgap reference core module starts working under the drive of the power supply voltage, and after entering the working steady state, generates a first reference voltage and a first bandgap reference voltage; the first bandgap reference voltage controls the pre-stabilization module to operate in a second state, and generates a first pre-stabilization voltage based on the first reference voltage; the bandgap reference core module generates a bandgap reference voltage under the drive of the first pre-stabilization voltage. The embodiment of the present invention can solve the technical problem that the bandgap reference core module cannot generate an accurate bandgap reference voltage.

Description

Technical Field

[0001] The present invention relates to the field of electronic circuits, and in particular to a bandgap reference circuit, a power management circuit, a chip and an electronic device. Background Art

[0002] The bandgap reference circuit is a widely used circuit design technology for providing a stable and accurate reference voltage inside a chip. Specifically, the bandgap reference circuit can generate a reference voltage that does not change with temperature fluctuations.

[0003] Inside the chip, the power management module usually uses the aforementioned reference voltage to generate the voltage or current required by other modules in the chip. It is precisely because the reference voltage generated by the bandgap reference circuit is the reference starting point for the voltage or current used by other modules in the chip, so its performance will directly affect the performance of the entire chip.

[0004] Power Supply Rejection Ratio (PSRR) is an important design parameter of bandgap reference circuit. It characterizes the ability of bandgap reference circuit to resist power supply interference (such as ripple, noise and other interference signals). The better the PSRR design of the bandgap reference circuit, the less the interference signal on the power supply will affect the reference voltage of the bandgap reference circuit.

[0005] To this end, in the related art, in addition to the bandgap reference core module, the bandgap reference circuit may also include a pre-regulator module with a higher PSRR index. The pre-regulator module can generate a bandgap reference voltage based on the reference voltage generated by the bandgap reference core module. However, the current bandgap reference circuit often cannot stably enter a normal working state after power-on, and thus cannot generate an accurate bandgap reference voltage. Summary of the invention

[0006] To solve the above technical problems, the main purpose of the embodiments of the present invention is to provide a bandgap reference circuit, a power management circuit, a chip and an electronic device to solve the technical problem that the bandgap reference core module cannot generate an accurate bandgap reference voltage.

[0007] To achieve the above objectives, the embodiments of the present invention adopt the following technical solutions:

[0008] A bandgap reference circuit comprises: a bandgap reference core module and a pre-stabilization module; when the bandgap reference circuit is started, the pre-stabilization module operates in a first state and outputs a power supply voltage (VDD) to the bandgap reference core module; the bandgap reference core module starts working under the drive of the power supply voltage (VDD), and generates a first reference voltage and a first bandgap reference voltage after entering a steady state; the first bandgap reference voltage controls the pre-stabilization module to operate in a second state, and generates a first pre-stabilization voltage based on the first reference voltage; the bandgap reference core module generates a bandgap reference voltage under the drive of the first pre-stabilization voltage.

[0009] Optionally, the bandgap reference core module includes a bias voltage point, and the bias voltage point is used to generate the first reference voltage; the pre-regulator module includes a first constant current source, a first P-type field effect transistor (Mp1) and a second P-type field effect transistor (Mp2); the source of the first P-type field effect transistor (Mp1) is electrically connected to the power supply terminal, the drain of the first P-type field effect transistor (Mp1) is electrically connected to the source of the second P-type field effect transistor (Mp2), and is connected to the power supply terminal of the bandgap reference core module; the drain of the second P-type field effect transistor (Mp2) is electrically connected to the ground terminal (VSS) via the first constant current source, and the gate is electrically connected to the bias voltage. The voltage point is electrically connected; when the bandgap reference circuit is started, the first constant current source is controlled to stop outputting current, and the first P-type field effect transistor (Mp1) is controlled to be fully turned on, and the pre-voltage regulator module outputs the power supply voltage (VDD) to the power supply end of the bandgap reference core module via the first P-type field effect transistor (Mp1); after the bandgap reference core module generates the first reference voltage, the first constant current source is controlled to output current, and the first P-type field effect transistor (Mp1) is controlled to be incompletely turned on, and the pre-voltage regulator module outputs the first pre-stabilized voltage to the power supply end of the bandgap reference core module via the first P-type field effect transistor (Mp1).

[0010] Optionally, the pre-voltage stabilization module also includes a first switch tube (MQ1), a fourth switch tube (MQ4), a first N-type field effect tube (Mn1), and a second constant current source; the gate of the first P-type field effect tube (Mp1) is electrically connected to the ground terminal (VSS) (VSS) through the first switch tube (MQ1); the first N-type field effect tube (Mn1), the second constant current source and the fourth switch tube (MQ4) are connected in series; the gate of the first N-type field effect tube (Mn1) is electrically connected to the bias voltage point, and the source is electrically connected to the ground terminal (VSS) through the first constant current source; when the bandgap reference circuit is started, the first switch tube (MQ1) is controlled to be turned on, and the fourth switch tube (MQ4) is controlled to be turned off so that the second constant current source stops outputting current; after the bandgap reference core module generates the first reference voltage, the first switch tube (MQ1) is controlled to be turned off, and the fourth switch tube (MQ4) is controlled to be turned on so that the second constant current source outputs current.

[0011] Optionally, the pre-voltage stabilization module also includes a third switch tube (MQ3), and the first constant current source includes a third N-type field effect tube (Mn3); the drain of the third N-type field effect tube (Mn3) is connected to the drain of the second P-type field effect tube (Mp2), and the source is grounded; when the bandgap reference circuit is started, the third switch tube (MQ3) is controlled to be turned on, so that the third N-type field effect tube (Mn3) is turned off, so that the first constant current source stops outputting current; after the bandgap reference core module generates the first reference voltage, the third switch tube (MQ3) is controlled to be turned off, so that the third N-type field effect tube (Mn3) is turned on, so that the first constant current source outputs current.

[0012] Optionally, the bandgap reference circuit further comprises a control module; the bandgap reference voltage comprises a first bandgap reference voltage; the bandgap reference core module is provided with a reference voltage output terminal (VBG) for outputting the bandgap reference voltage; the first input terminal of the control module is electrically connected to the reference voltage output terminal (VBG), and the first output terminal of the control module is electrically connected to the gate of the first switch tube (MQ1); the first switch tube (MQ1) is an N-type field effect tube;

[0013] When the control module detects that the voltage value generated by the reference voltage output terminal (VBG) is less than a preset threshold value, a high level signal is output at the first output terminal, the first switch tube (MQ1) is turned on, the first P-type field effect tube (Mp1) is fully turned on, and the power supply voltage (VDD) supplies power to the bandgap reference core module through the first P-type field effect tube (Mp1) to generate a first reference voltage at the bias voltage point (Vb), and generate the first bandgap reference voltage at the reference voltage output terminal (VBG);

[0014] When the control module detects that the voltage value generated by the reference voltage output terminal (VBG) is greater than a preset threshold, a low-level signal is output at the first output terminal, so that the first switch tube (MQ1) is turned off, the first P-type field effect tube (Mp1) is not fully turned on, and the pre-stabilization module generates a first pre-stabilized voltage at the voltage output terminal (VDD_CORE) of the pre-stabilization module based on the first reference voltage.

[0015] Optionally, the bandgap reference core module generates a second reference voltage at the bias voltage point (Vb) based on the first pre-stabilized voltage, and outputs a second bandgap reference voltage at the reference voltage output terminal (VBG).

[0016] Optionally, the pre-regulator module generates a second pre-regulated voltage at a voltage output terminal (VDD_CORE) of the pre-regulator module based on the second reference voltage, and outputs the second pre-regulated voltage to a power supply terminal of the bandgap reference core module.

[0017] Optionally, the first constant current source is a mirror image constant current source; the first constant current source further comprises a second N-type field effect transistor (Mn2); the second N-type field effect transistor (Mn2) is electrically connected to the drain of the first P-type field effect transistor (Mp1) via a third P-type field effect transistor (Mp3);

[0018] When the first P-type field effect transistor (Mp1) is not fully turned on, current flows through the third P-type field effect transistor (Mp3), thereby causing current to flow through the second N-type field effect transistor (Mn2) and the third N-type field effect transistor (Mn3).

[0019] Optionally, a second switch tube (MQ2) is arranged between the third P-type field effect tube (Mp3) and the second N-type field effect tube (Mn2); the second switch tube (MQ2) is a P-type field effect tube; when the bandgap reference circuit is started, the second switch tube (MQ2) is controlled to be turned off so that current stops flowing through the third P-type field effect tube (Mp3), the second N-type field effect tube (Mn2) and the third N-type field effect tube (Mn3).

[0020] Optionally, the second constant current source is a mirror image constant current source; the second constant current source includes a fourth P-type field effect transistor (Mp4) and a fifth P-type field effect transistor (Mp5), the drain of the fourth P-type field effect transistor (Mp4) is electrically connected to the drain of the fifth P-type field effect transistor (Mp5); the fourth P-type field effect transistor (Mp4) is electrically connected to the ground terminal (VSS) via a fourth N-type field effect transistor (Mn4); the gate and drain of the fourth P-type field effect transistor (Mp4) are electrically connected; The fourth N-type field effect transistor (Mn4), the second N-type field effect transistor (Mn2) and the third N-type field effect transistor (Mn3) form a third constant current source; the third constant current source is a mirror current source; when the first P-type field effect transistor (Mp1) is not fully turned on, current flows through the third P-type field effect transistor (Mp3), thereby causing current to flow through the fourth N-type field effect transistor (Mn4), the fourth P-type field effect transistor (Mp4) and the fifth P-type field effect transistor (Mp5).

[0021] Optionally, a fifth switch tube (MQ5) is connected between the source and drain of the fourth P-type field effect transistor (Mp4); the fifth switch tube (MQ5) is a P-type field effect transistor; when the bandgap reference circuit is started, the fifth switch tube (MQ5) is controlled to be turned on, so that the current stops flowing through the fourth P-type field effect transistor (Mp4), the fifth P-type field effect transistor (Mp5) and the fourth N-type field effect transistor (Mn4); when the first P-type field effect transistor (Mp1) is not fully turned on, the bandgap reference circuit controls the fifth switch tube (MQ5) to be turned off, so that the current flows through the fourth P-type field effect transistor (Mp4), the fifth P-type field effect transistor (Mp5) and the fourth N-type field effect transistor (Mn4).

[0022] The bandgap reference circuit also includes a startup circuit module; the startup circuit module includes a sixth switch tube; when the bandgap reference circuit is started, the first P-type field effect tube (Mp1) is controlled to be fully turned on, and the sixth switch tube (MQ6) is controlled to be turned on, and the pre-regulator module outputs the power supply voltage (VDD) to the power supply end of the bandgap reference core module via the first P-type field effect tube (Mp1); the power supply voltage (VDD) is injected into the bandgap reference core module via the sixth switch tube (MQ6), thereby generating a first reference voltage at the bias voltage point (Vb), and outputting the first bandgap reference voltage at the reference voltage output end (VBG).

[0023] Optionally, when the voltage value output by the reference voltage output terminal (VBG) is less than the preset threshold, the sixth switch tube is turned on, and when the voltage value output by the reference voltage output terminal (VBG) is greater than or equal to the preset threshold, the sixth switch tube is turned off.

[0024] A power management circuit comprises any of the bandgap reference circuits described above.

[0025] A chip comprises the power management circuit described in any one of the above items.

[0026] An electronic device comprises the chip described in any one of the above items.

[0027] In the embodiment of the present invention, since the first reference voltage has been generated in the first time period before the pre-stabilization module uses the first reference voltage to generate the first pre-stabilization voltage, the pre-stabilization module can enter a normal working state based on the first reference voltage and generate the first pre-stabilization voltage. The pre-stabilization module will not be unable to enter a normal working state, thereby solving the technical problem that the bandgap reference core module cannot generate an accurate bandgap reference voltage.

[0028] Other beneficial effects of the present invention will be explained in the specific implementation manner through the introduction of specific technical features and technical solutions. Through the introduction of these technical features and technical solutions, those skilled in the art should be able to understand the beneficial technical effects brought about by the technical features and technical solutions. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] The preferred embodiments of the present invention will be described below with reference to the accompanying drawings.

[0030] Figure 1 A schematic structural diagram of a bandgap reference circuit according to a preferred embodiment of the present invention;

[0031] Figure 2 A schematic structural diagram of a bandgap reference circuit according to another preferred embodiment of the present invention;

[0032] Figure 3 is a structural schematic diagram of a control module according to another preferred embodiment of the present invention;

[0033] Figure 4 FIG. 4 is a schematic structural diagram of an inverter according to another preferred embodiment of the present invention. DETAILED DESCRIPTION

[0034] The present invention is described below based on embodiments, but the present invention is not limited to these embodiments. In the following detailed description of the present invention, some specific details are described in detail. In order to avoid confusing the essence of the present invention, known methods, processes, procedures, and components are not described in detail.

[0035] In addition, persons of ordinary skill in the art will appreciate that the drawings provided herein are for illustration purposes and are not necessarily drawn to scale.

[0036] Unless the context clearly requires otherwise, throughout the specification and claims, the words "include", "comprising" and similar words should be interpreted in an inclusive sense rather than an exclusive or exhaustive sense; that is, in the sense of "including but not limited to".

[0037] In the description of the present invention, it should be understood that the terms "first", "second", etc. are only used for descriptive purposes and cannot be understood as indicating or implying relative importance. In addition, in the description of the present invention, unless otherwise specified, "plurality" means two or more.

[0038] To facilitate understanding of the technical solutions of the embodiments of the present invention, the terms involved in the embodiments of the present invention are first explained below.

[0039] Bandgap reference circuit, also known as energy gap reference source, is often used to generate high-precision bandgap reference voltage due to its excellent temperature stability. The so-called bandgap refers to the energy difference between the lowest point of the conduction band of a semiconductor or insulator and the highest point of the valence band. The excellent temperature stability of the bandgap reference circuit comes from the clever circuit design. The core idea is that since the change of ambient temperature will cause the change of transistor parameters, the voltage value output by the circuit will inevitably change with the temperature, so the change caused by temperature should be compensated. Different materials or circuits have different temperature coefficients, some are positive temperature coefficients, and some are negative temperature coefficients. Reasonable configuration of materials or circuits with positive temperature coefficients and negative temperature coefficients can make the changes caused by temperature offset each other, and a bandgap reference voltage that is basically independent of temperature changes can be obtained.

[0040] The power supply rejection ratio (PSRR), also known as the power supply noise rejection ratio, is an indicator that measures the circuit's ability to suppress power supply noise. Specifically, PSRR is determined by the ratio of the output voltage change to the input voltage change when the input voltage changes. The calculation formula for PSRR is PSRR = 20log (ΔVout / ΔVin), where ΔVout is the change in output voltage and ΔVin is the change in input voltage. The larger the PSRR value, the stronger the circuit's ability to resist power supply interference.

[0041] Next, a bandgap reference circuit provided by an embodiment of the present invention is introduced.

[0042] Figure 1 FIG. 1 is a schematic diagram showing the architecture of a bandgap reference circuit provided by an embodiment of the present invention. Figure 1 As shown, the bandgap reference circuit may include a bandgap reference core module 1 and a pre-regulator module 2 .

[0043] The bandgap reference core module can be divided into a current mode bandgap reference core module and a voltage mode bandgap reference core module. The bandgap reference core module can generate a constant current or voltage that is almost unaffected by power supply voltage fluctuations and temperature fluctuations by superimposing currents or voltages with positive and negative temperature coefficients. Among them, the reference source formed by superimposing currents with different temperature coefficients is called a current mode bandgap reference core module. The reference source formed by superimposing voltages with different temperature coefficients is called a voltage mode bandgap reference core module. Figure 1 The bandgap reference core module 1 is a current mode bandgap reference core module.

[0044] The pre-stabilization module 2 uses the power supply voltage VDD as the input voltage, and the pre-stabilization voltage outputted by it can be used as the input voltage of the bandgap reference core module 1. Since the pre-stabilization module 2 has the power supply noise suppression capability, when the power supply voltage VDD fluctuates, the fluctuation of the pre-stabilization voltage outputted by it is much smaller than the fluctuation of the power supply voltage VDD. The bandgap reference core module 1 uses the pre-stabilization voltage as the input voltage and outputs the bandgap reference voltage. Since the bandgap reference core module 1 also has the power supply noise suppression capability, the fluctuation of the bandgap reference voltage is much smaller than the fluctuation of the pre-stabilization voltage.

[0045] Exemplarily, according to the aforementioned PSRR calculation formula, the PSRR of the pre-regulator module 2 and the bandgap reference core module 1 are both 40, which means that when the fluctuation of the power supply voltage VDD is 1V, the fluctuation of the pre-regulator voltage is 10mV, while the fluctuation of the bandgap reference voltage is only 0.1mV.

[0046] In practical applications, in the first case, the pre-stabilization module 2 can work independently of the bandgap reference core module. In this case, the pre-stabilized voltage output by the pre-stabilization module 2 is used as the input voltage of the bandgap reference core module. However, the pre-stabilization module 2 does not rely on the voltage generated by the bandgap reference core module when generating the pre-stabilized voltage. In the second case, the pre-stabilization module 2 needs to rely on the voltage generated by the bandgap reference core module (i.e., the first reference voltage) when generating the pre-stabilized voltage. The embodiment of the present invention does not limit the type of the first reference voltage. For example, Figure 1 As shown, the first reference voltage can be Figure 1 The voltage generated by the bias voltage point Vb shown in .

[0047] In the second case, the pre-voltage regulator module 2 needs to be based on the first reference voltage generated by the bandgap reference core module 1 in order to enter the normal working state and generate the pre-stabilized voltage. The bandgap reference core module 1 needs to rely on the pre-stabilized voltage generated by the pre-voltage regulator module 2 to work normally and generate the first reference voltage. Therefore, when the bandgap reference circuit is powered on, due to the lack of a stable first reference voltage, it is easy for the pre-voltage regulator module 2 to be unable to enter the normal working state, which in turn causes the bandgap reference core module 1 to be unable to generate an accurate bandgap reference voltage. It should be noted that the normal working state here refers to the second state described below.

[0048] In order to solve this technical problem, in an embodiment of the present invention, in the first time stage, when the bandgap reference circuit is powered on and started, the pre-voltage regulator module 2 operates in the first state, so that the power supply voltage VDD can be output to the bandgap reference core module 1. The bandgap reference core module 1 can start working under the drive of the power supply voltage VDD, and generate a first reference voltage after entering the working steady state. In the second time stage, the pre-voltage regulator module 2 can operate in the second state, so that the first pre-stabilized voltage can be generated based on the first reference voltage. Then, the bandgap reference core module 1 can generate a bandgap reference voltage under the drive of the first pre-stabilized voltage.

[0049] Therefore, in the embodiment of the present invention, since the power supply voltage VDD has been established in the first time stage, the power supply voltage VDD can be used to power the bandgap reference core module first, so that the bandgap reference core module 1 first generates a first reference voltage under the drive of the power supply voltage VDD. Then, in the second time stage, the pre-stabilization module 2 generates a first pre-stabilization voltage based on the first reference voltage under the control of the first bandgap reference voltage, and then the bandgap reference core module 1 generates a bandgap reference voltage based on the first pre-stabilization voltage. In this way, since the first reference voltage has been generated in the first time stage before the pre-stabilization module 2 generates the first pre-stabilization voltage using the first reference voltage, the pre-stabilization module 2 can enter a normal working state based on the first reference voltage and generate a first pre-stabilization voltage, and the situation of being unable to enter a normal working state will not occur, which solves the technical problem that the bandgap reference core module cannot generate an accurate bandgap reference voltage in the second situation.

[0050] It can be understood that the above-mentioned technical problem does not exist in the first situation mentioned above, and the embodiment of the present invention is suitable for solving the technical problem existing in the second situation.

[0051] In some embodiments of the present invention, the bandgap reference core module 1 may include a bias voltage point Vb, such as Figure 1 The voltage generated by the bias voltage point Vb can be used as the first reference voltage.

[0052] The pre-regulator module 2 may include a first constant current source, a first P-type field effect transistor Mp1, and a second P-type field effect transistor Mp2. Figure 1 As shown, the source of the first P-type field effect transistor Mp1 is electrically connected to the power supply terminal, the drain of the first P-type field effect transistor Mp1 is electrically connected to the source of the second P-type field effect transistor Mp2, and is also connected to the power supply terminal VDD_CORE of the bandgap reference core module 1. The drain of the second P-type field effect transistor Mp2 is electrically connected to the ground terminal VSS via the first constant current source, and its gate is electrically connected to the bias voltage point.

[0053] It should be noted that in the embodiment of the present invention, when the first P-type field effect transistor Mp1 is fully turned on, the working state of the pre-regulator module 2 is called the first state. When the first P-type field effect transistor Mp1 is not fully turned on, the working state of the pre-regulator module 2 is called the second state.

[0054] On the basis of the above hardware connection mode, when the bandgap reference circuit is powered on and started, the first P-type field effect transistor Mp1 can be controlled to work in the variable resistance area, so that the first P-type field effect transistor Mp1 is in a fully conductive state. At this time, the impedance of the first P-type field effect transistor Mp1 is the smallest, and the pre-regulator module 2 works in the first state, and the power supply voltage VDD can be output to the power supply terminal VDD_CORE of the bandgap reference core module 1 via the first P-type field effect transistor Mp1, so that the bandgap reference core module 1 is started under the drive of the power supply voltage, and then the first reference voltage is generated. In addition, the bandgap reference circuit can also control the first constant current source to stop outputting current to reduce the power consumption generated by the pre-regulator module 2 in the first time stage.

[0055] In the second time stage, after the bandgap reference core module 1 generates the first reference voltage, the bandgap reference circuit can control the first constant current source to output current, and control the first P-type field effect transistor Mp1 to operate in the saturation region, so that the first P-type field effect transistor Mp1 is in an incompletely turned-on state. At this time, the pre-stabilization module 2 operates in the second state, and can generate a first pre-stabilization voltage based on the first reference voltage, and then output the first pre-stabilization voltage to the power supply terminal VDD_CORE of the bandgap reference core module 1 via the first P-type field effect transistor Mp1, so that the bandgap reference core module 1 generates a bandgap reference voltage under the drive of the first pre-stabilization voltage.

[0056] It should be noted that the working principle of the field effect tube is to generate a conductive channel between the drain and the source by applying a suitable gate-source voltage Vgs, so that the field effect tube can be turned on. The volt-ampere characteristic curve of the field effect tube can be divided into three regions: the cut-off region, the saturation region and the variable resistance region. Among them, the saturation region is also called the incomplete conduction region, the linear region or the amplification region, and the variable resistance region is also called the full conduction region. When working in the saturation region, the field effect tube is in an incomplete conduction state, the impedance value is large, and it has a signal amplification function. When working in the variable resistance region, the field effect tube is in a fully conductive state, the impedance value is the smallest, generally at the milliohm level. For ease of understanding, it can be compared with the triode. The volt-ampere characteristic curve of the triode can be divided into three regions: the cut-off region, the amplification region and the saturation region. The variable resistance region of the field effect tube corresponds to the saturation region of the triode, and the saturation region of the field effect tube corresponds to the amplification region of the triode.

[0057] In some embodiments of the present invention, Figure 2 As shown, the pre-stabilization module 2 may also include a first switch tube MQ1, a fourth switch tube MQ4, a first N-type field effect tube Mn1 and a second constant current source. The gate of the first P-type field effect tube Mp1 is electrically connected to the ground terminal VSS through the first switch tube MQ1. The first N-type field effect tube Mn1, the second constant current source and the fourth switch tube MQ4 are connected in series. The gate of the first N-type field effect tube Mn1 is electrically connected to the bias voltage point, and its source is electrically connected to the ground terminal VSS through the first constant current source.

[0058] Based on the above hardware connection mode, in the first time stage, when the bandgap reference circuit is powered on and started, the first switch tube MQ1 can be controlled to be turned on, so that the gate of the first P-type field effect tube Mp1 is electrically connected to the ground terminal VSS, so that the first P-type field effect tube Mp1 can work in the variable resistance area. The power supply voltage VDD can be output to the power supply terminal VDD_CORE of the bandgap reference core module 1 via the first P-type field effect tube Mp1 in a fully turned-on state. In addition, the bandgap reference circuit can also control the fourth switch tube MQ4 to be turned off, so that the second constant current source stops outputting current, thereby reducing the power consumption of the pre-regulator module 2 in the first time stage.

[0059] In the second time period, after the bandgap reference core module 1 generates the first reference voltage, the bandgap reference circuit can control the first switch tube MQ1 to turn off, so that the first P-type field effect tube Mp1 works in the saturation region and is in an incompletely turned-on state, and controls the fourth switch tube MQ4 to turn on so that the second constant current source outputs current. Thus, the pre-regulator module 2 can work in the second state, and thus can generate the first pre-regulated voltage based on the first reference voltage.

[0060] The following uses a small signal model analysis method to analyze the principle of voltage stabilization achieved by the pre-stabilization module 2. When the power supply voltage VDD increases, the source voltage of the first P-type field effect transistor Mp1 will also increase, which will lead to an increase in the source voltage of the first N-type field effect transistor Mn1, and the gate voltage of the first P-type field effect transistor Mp1 will also increase, which makes the change in the gate-source voltage Vgs of the first P-type field effect transistor Mp1 less than the change in the power supply voltage VDD, which belongs to closed-loop negative feedback. Therefore, when the power supply voltage VDD increases, the gate-source voltage of the second P-type field effect transistor Mp2 changes very little, so it has the ability to suppress power supply interference.

[0061] In addition, the voltage generated by the bias voltage point Vb can be used as the first reference voltage. Since the equivalent impedance of the Vb point to the ground terminal VSS is very small, when the first pre-stabilized voltage increases, although the current in the bandgap core module will fluctuate to a certain extent, the voltage generated by the Vb point fluctuates very little, so it has the ability to suppress power supply interference.

[0062] In the second time period, from Figure 1 It can be seen that the first pre-stabilized voltage supplied by the pre-stabilization module 2 to the bandgap reference core module 1 is equal to the sum of the first reference voltage generated by the bias voltage point Vb and the gate-source voltage of the second P-type field effect transistor Mp2. Since both have the ability to suppress power supply interference, the first pre-stabilized voltage generated by the pre-stabilization module 2 also has the ability to suppress power supply interference.

[0063] Similarly, when the power supply voltage VDD decreases, the source voltage and the gate voltage of the first P-type field effect transistor Mp1 will decrease simultaneously, which will not be described in detail here.

[0064] In some embodiments of the present invention, Figure 2 As shown, the pre-regulator module 2 may further include a third switch tube MQ3, and the first constant current source may include a third N-type field effect tube Mn3. The drain of the third N-type field effect tube Mn3 is connected to the drain of the second P-type field effect tube Mp2, and the source of the third N-type field effect tube Mn3 is grounded.

[0065] On the basis of the above hardware connection mode, when the bandgap reference circuit is powered on and started, the third switch tube MQ3 can be controlled to be turned on, so that the gate of the third N-type field effect tube Mn3 is grounded, and the third N-type field effect tube Mn3 is turned off. In this way, the electrical connection between the first constant current source and the ground terminal VSS can be cut off, so that the first constant current source stops outputting current, and thus the power consumption of the pre-regulator module 2 in the first time stage can be reduced.

[0066] In the second time period, after the bandgap reference core module 1 generates the first reference voltage, the bandgap reference circuit can control the third switch tube MQ3 to turn off, so that the third N-type field effect tube Mn3 is turned on, so that the first constant current source outputs current. In this way, the pre-stabilization module 2 can work in the second state, so that the first pre-stabilization voltage can be generated based on the first reference voltage.

[0067] In some embodiments of the present invention, Figure 3 As shown, the bandgap reference circuit may further include a control module 4. The first bandgap reference voltage is the bandgap reference voltage generated by the bandgap reference core module 1 under the drive of the power supply voltage VDD. It should be noted that after the pre-regulator module 2 enters the second state, the bandgap reference voltage needs to undergo continuous changes during the transition period to reach the final stable value, and the specific reasons will be described in detail below. The first bandgap reference voltage is the initial value of the bandgap reference voltage during the transition period.

[0068] The bandgap reference core module 1 is provided with a reference voltage output terminal VBG, and the reference voltage output terminal VBG can output a bandgap reference voltage for use by other modules inside the chip, for example, the bandgap reference voltage can be used as a reference voltage for the input terminal of a comparator, or as a reference voltage for the input terminal of an analog-to-digital converter. The control module 4 can be provided with a first input terminal 41, and the first input terminal 41 is electrically connected to the reference voltage output terminal VBG, and is used to detect whether the voltage value currently output by the reference voltage output terminal VBG reaches a preset threshold.

[0069] The user can set a preset threshold value in advance according to the value of the bandgap reference voltage. For example, if the bandgap reference voltage is 1.25V, the user can set the preset threshold value to 1V. When the control module 4 detects through the first input terminal 41 that the first bandgap reference voltage is less than the preset threshold value, it indicates that the current bandgap reference core module 1 has not established the bandgap reference voltage and has not generated the first reference voltage.

[0070] The control module 4 may also be provided with a first output terminal 42. At this time, the first output terminal 42 may output a high-level signal so that the gate of the first switch tube MQ1 is at a high level, and the first switch tube MQ1 switches to the on state. This makes the first P-type field effect tube Mp1 work in the variable resistance area, and the first P-type field effect tube Mp1 enters a fully on state. At this time, the resistance value of the first P-type field effect tube Mp1 is relatively small, and the typical value is tens of milliohms. The power supply voltage VDD can supply power to the bandgap reference core module 1 through the first P-type field effect tube Mp1, so that the bandgap reference core module 1 starts working, and after a period of time, usually in microseconds, it enters a working steady state, and then in the working steady state, a first reference voltage is generated at the bias voltage point Vb, and a first bandgap reference voltage is generated at the reference voltage output terminal VBG.

[0071] Similarly, if the control module 4 detects through the first input terminal 41 that the voltage value currently output by the reference voltage output terminal VBG is greater than the preset threshold, it indicates that the current bandgap reference core module 1 has established the first bandgap reference voltage and the first reference voltage. In order to enable the pre-stabilization module 2 to generate a pre-stabilized voltage based on the first reference voltage, the first output terminal 42 can output a low-level signal to turn off the first switch tube MQ1 and the first P-type field effect tube Mp1 is not fully turned on, so that the pre-stabilization module 2 works in the second state. Therefore, the pre-stabilization module 2 can generate a first pre-stabilized voltage based on the first reference voltage.

[0072] In some embodiments of the present invention, in a first time period, the bandgap reference core module 1 operates under the drive of the power supply voltage VDD, and in a second time period, the bandgap reference core module 1 operates under the drive of the first pre-stabilized voltage.

[0073] In the second time period, the first P-type field effect transistor Mp1 is in an incompletely turned-on state, and there is a voltage difference between the source and the drain of the first P-type field effect transistor Mp1, so the value of the first pre-stabilized voltage is less than the value of the power supply voltage VDD. It can be seen that in the above two time periods, the voltage value of the power supply terminal VDD_CORE of the bandgap reference core module 1 changes, which makes the voltage generated by the bias voltage point Vb of the bandgap reference core module 1 and the bandgap reference voltage output at the reference voltage output terminal VBG also change accordingly.

[0074] Specifically, in the second time period, after the pre-stabilization module 2 outputs the first pre-stabilization voltage to the power supply terminal VDD_CORE of the bandgap reference core module 1 via the first P-type field effect transistor Mp1, the bandgap reference core module 1 can generate a second reference voltage at the bias voltage point Vb based on the first pre-stabilization voltage, and output a second bandgap reference voltage at the reference voltage output terminal VBG. The second reference voltage has a certain change compared to the first reference voltage, and the second bandgap reference voltage also has a certain change compared to the first bandgap reference voltage.

[0075] In some embodiments of the present invention, since the second reference voltage varies to a certain extent compared to the first reference voltage, the pre-stabilization module 2 can generate a second pre-stabilization voltage at the voltage output terminal VDD_CORE of the pre-stabilization module 2 based on the second reference voltage provided by the bandgap reference core module 1, and output the second pre-stabilization voltage to the power supply terminal VDD_CORE of the bandgap reference core module 1. Then, the second pre-stabilization voltage varies to a certain extent compared to the first pre-stabilization voltage, so when the voltage at the power supply terminal VDD_CORE of the bandgap reference core module changes, the voltage generated by the bias voltage point Vb will continue to change. Through the above cycle process in the transition period, the bandgap reference core module 1 can finally reach a steady state of operation and output a stable bandgap reference voltage in the steady state of operation.

[0076] In some embodiments of the present invention, the first constant current source may be a mirror image constant current source; the first constant current source may also include a second N-type field effect transistor Mn2, and the second N-type field effect transistor Mn2 and the third N-type field effect transistor Mn3 form the first constant current source. The ratio of the current flowing through the two depends on the width-to-length ratio parameters of the two. When the width-to-length ratio parameters of the two are equal, the current values ​​flowing through the two are equal. Specifically, the width-to-length ratio parameter of the field effect tube is the ratio of the width value to the length value of the field effect tube.

[0077] like Figure 2 As shown, the second N-type field effect transistor Mn2 is electrically connected to the drain of the first P-type field effect transistor Mp1 through the third P-type field effect transistor Mp3. In the second time stage, when the first P-type field effect transistor Mp1 is not fully turned on, a current flows through the third P-type field effect transistor Mp3. Since the second N-type field effect transistor Mn2 is connected in series with the third P-type field effect transistor Mp3, a current of the same magnitude flows through the second N-type field effect transistor Mn2. Since the second N-type field effect transistor Mn2 and the third N-type field effect transistor Mn3 form a mirror constant current source, a current will also flow through the third N-type field effect transistor Mn3. Similarly, since the first P-type field effect transistor Mp1, the second P-type field effect transistor Mp2 and the third N-type field effect transistor Mn3 are connected in series, a current will also flow through the first P-type field effect transistor Mp1 and the second P-type field effect transistor Mp2. The current flowing through the above field effect transistor is the static bias current, which creates a prerequisite for the normal operation of the pre-voltage stabilization module 2 in the second state.

[0078] It is understandable that the quiescent bias current is an important parameter in electronic circuits, which can ensure the stability and reliability of the circuit. In a circuit, if the quiescent bias current is not set correctly, then the performance of the circuit will be affected. If the quiescent bias current is too small, then the possibility of signal distortion in the circuit will increase. If the quiescent bias current is too large, then the power consumption of the circuit will increase and the life of the transistor will be shortened.

[0079] In some embodiments of the present invention, Figure 2 As shown, a second switch tube MQ2 may be provided between the third P-type field effect tube Mp3 and the second N-type field effect tube Mn2, and the second switch tube MQ2 may specifically be a P-type field effect tube. In the first time stage, when the bandgap reference circuit is powered on and started, the second switch tube MQ2 may be controlled to be turned off, so that the current stops flowing through the third P-type field effect tube Mp3 and the second N-type field effect tube Mn2, and further the current stops flowing through the third N-type field effect tube Mn3, thereby reducing the power consumption of the pre-stabilization module 2 in the first time stage.

[0080] In some embodiments of the present invention, Figure 2 As shown, the second constant current source is a mirror image constant current source. The second constant current source may include a fourth P-type field effect transistor Mp4 and a fifth P-type field effect transistor Mp5, and the drain of the fourth P-type field effect transistor Mp4 is electrically connected to the drain of the fifth P-type field effect transistor Mp5. The fourth P-type field effect transistor Mp4 is electrically connected to the ground terminal VSS via the fourth N-type field effect transistor Mn4. The gate and drain of the fourth P-type field effect transistor Mp4 are electrically connected. The fourth N-type field effect transistor Mn4, the second N-type field effect transistor Mn2 and the third N-type field effect transistor Mn3 form a mirror image constant current source (referred to as the third constant current source).

[0081] On the basis of the above hardware connection mode, in the second time stage, when the first P-type field effect transistor Mp1 is not fully turned on, a current flows through the third P-type field effect transistor Mp3. Since the third P-type field effect transistor Mp3 is connected in series with the second N-type field effect transistor Mn2, a current of the same magnitude also flows through the second N-type field effect transistor Mn2. Since the second N-type field effect transistor Mn2, the third N-type field effect transistor Mn3 and the fourth N-type field effect transistor Mn4 form a mirror constant current source, a current will also flow through the fourth N-type field effect transistor Mn4. Similarly, the fourth N-type field effect transistor Mn4 is connected in series with the fourth P-type field effect transistor Mp4, so a current will also flow through the fourth P-type field effect transistor Mp4. The fourth P-type field effect transistor Mp4 and the fifth P-type field effect transistor Mp5 form a mirror current source, i.e., a second constant current source, so a current will also flow through the fifth P-type field effect transistor Mp5. The current flowing through the above field effect transistor is the static bias current, which creates a prerequisite for the normal operation of the pre-voltage stabilization module 2 in the second state.

[0082] In addition, since the source-drain current flowing through the fifth P-type field effect transistor Mp5 is equal to the source-drain current flowing through the first N-type field effect transistor Mn1, and the change in the source-drain current flowing through the first N-type field effect transistor Mn1 will affect the gate voltage of the first P-type field effect transistor Mp1, the small signal model analysis method is used below to analyze the influence of the fifth P-type field effect transistor Mp5 on the gate voltage of the first P-type field effect transistor Mp1 when the power supply voltage VDD fluctuates.

[0083] The power supply voltage interference amount of the gate voltage of the fourth P-type field effect transistor Mp4 can be simply equivalent to gm4*ron4 / (gm4*ron4+1) multiplied by the change of the power supply voltage VDD, where gm4 is the transconductance of the fourth P-type field effect transistor Mp4, and the specific physical meaning is the ratio of the change of the drain current of the fourth P-type field effect transistor Mp4 to the change of the gate-source voltage of the fourth P-type field effect transistor Mp4. ron4 refers to the output impedance of the pre-regulator module 2 after the fourth N-type field effect transistor Mn4 is disconnected.

[0084] The specific calculation method of the above formula is introduced below. 1 / gm4 refers to the output impedance of the pre-regulator module 2 after the drain of the fourth P-type field effect transistor Mp4 is disconnected. 1 / gm4 and ron4 are connected in series for voltage division. Therefore, the gate voltage change of the fourth P-type field effect transistor Mp4 is ron4 / (ron4+(1 / gm4)) multiplied by the change in the power supply voltage VDD, that is, gm4*ron4 / (gm4*ron4+1) multiplied by the change in the power supply voltage VDD.

[0085] Since the value of gm4*ron4 is much larger than 1, the change in the gate voltage of the fourth P-type field effect transistor Mp4 is almost equal to the change in the power supply voltage VDD, which makes the gate-source voltage of the fifth P-type field effect transistor Mp5 almost unchanged, the source-drain current flowing through the fifth P-type field effect transistor Mp5 almost unchanged, the source-drain current flowing through the first N-type field effect transistor Mn1 almost unchanged, and the gate voltage of the first P-type field effect transistor Mp1 almost unchanged. Therefore, when the power supply voltage VDD fluctuates, the influence of the fifth P-type field effect transistor Mp5 on the gate voltage of the first P-type field effect transistor Mp1 is negligible and can be ignored.

[0086] In some embodiments of the present invention, a fifth switch tube MQ5 is connected between the source and the drain of the fourth P-type field effect transistor Mp4, and the fifth switch tube MQ5 may be a P-type field effect transistor.

[0087] In the first time stage, when the bandgap reference circuit is powered on, the bandgap reference circuit can control the fifth switch tube MQ5 to be turned on, so that the source of the fourth P-type field effect transistor Mp4 is electrically connected to the drain of the fourth P-type field effect transistor Mp4 through the fifth switch tube MQ5 in the on state. Since the gate and drain of the fourth P-type field effect transistor Mp4 are electrically connected, the source of the fourth P-type field effect transistor Mp4 will be connected to the gate of the fourth P-type field effect transistor Mp4 through the fifth switch tube MQ5 in the on state, and the gate-source voltage Vgs of the fourth P-type field effect transistor Mp4 is nearly 0, which will cause the fourth P-type field effect transistor to be in the off state. Therefore, the current will stop flowing through the fourth P-type field effect transistor Mp4, the fifth P-type field effect transistor Mp5 and the fourth N-type field effect transistor Mn4 to reduce the power consumption of the pre-stabilization module 2 in the first time stage.

[0088] In the second time period, when the first P-type field effect transistor Mp1 is not fully turned on, the bandgap reference circuit can control the fifth switch tube MQ5 to turn off, so that the fourth P-type field effect transistor Mp4 is in the on state, and then the fourth P-type field effect transistor Mp4, the fifth P-type field effect transistor Mp5 and the fourth N-type field effect transistor Mn4 can flow current, and the pre-regulator module 2 can work in the second state. The current flowing through the above field effect transistors is the static bias current, which creates the prerequisite for the normal operation of the pre-regulator module 2 in the second state.

[0089] In a specific implementation, Figure 4 An inverter 5 is shown, and a second input terminal 51 and a second output terminal 52 are provided on the inverter 5. The first input terminal 41 of the control module 4 can be electrically connected to the reference voltage output terminal VBG, the first output terminal 42 of the control module 4 can be electrically connected to the second input terminal 51 on the inverter 5, and the second output terminal 52 can be electrically connected to the gate of the fifth switch tube MQ5. In the first time stage, when the bandgap reference core module 1 has not yet established the first bandgap reference voltage, the voltage value of the first input terminal 41 is less than the preset threshold value, so the first output terminal 42 outputs a high level signal, and the second output terminal 52 outputs a low level signal, so that the fifth switch tube MQ5 can be in a conducting state.

[0090] Similarly, in the second time period, after the bandgap reference core module 1 establishes the first bandgap reference voltage, the voltage value of the first input terminal 41 is greater than the preset threshold value, so the first output terminal 42 outputs a low-level signal and the second output terminal 52 outputs a high-level signal, thereby enabling the fifth switch tube MQ5 to be in the off state.

[0091] In some embodiments of the present invention, Figure 2 As shown, the bandgap reference circuit may further include a startup circuit module 3, and the startup circuit module 3 may include a sixth switch tube MQ6.

[0092] In the first time stage, when the bandgap reference circuit is powered on and started, the bandgap reference circuit can control the first P-type field effect transistor Mp1 to be fully turned on, and control the sixth switch tube MQ6 to be turned on. At this time, the pre-regulator module 2 can output the power supply voltage VDD to the power supply terminal VDD_CORE of the bandgap reference core module 1 via the first P-type field effect transistor Mp1 in the fully turned-on state. The power supply voltage VDD injects an initial current into the bandgap reference core module 1 through the sixth switch tube MQ6 to help the bandgap reference core module 1 get rid of the zero state. Thereby, the bandgap reference core module 1 can generate a first reference voltage at the bias voltage point Vb, and output the first bandgap reference voltage at the reference voltage output terminal VBG.

[0093] In some embodiments of the present invention, in the first time stage, when the voltage value output by the reference voltage output terminal VBG is less than the preset threshold value, the bandgap reference circuit can control the sixth switch tube MQ6 to switch to the on state, so that the power supply voltage VDD can be injected into the bandgap reference core module 1 through the sixth switch tube MQ6 to help the bandgap reference core module 1 quickly get rid of the zero state. In the second time stage, when the voltage value output by the reference voltage output terminal VBG is greater than the preset threshold value, the bandgap reference circuit can control the sixth switch tube MQ6 to switch to the off state, so that the startup circuit module 3 no longer works and no longer consumes any static power consumption, thereby reducing the power consumption of the startup circuit module 3.

[0094] In a specific implementation, Figure 2 As shown, the bandgap reference core module 11 includes a sixth P-type field effect transistor Mp6, a seventh P-type field effect transistor Mp7 and an eighth P-type field effect transistor Mp8. The three together with the third P-type field effect transistor Mp3 in the pre-voltage regulator module 2 form a mirror constant current source. The startup circuit module 3 may include a ninth P-type field effect transistor Mp9, a tenth P-type field effect transistor Mp10 and an eleventh P-type field effect transistor Mp11, and the gates of the three are electrically connected to their drains. The three are connected in series, and the function is equivalent to three series-connected diodes, and the three can produce a relatively stable voltage drop. And the source of the ninth P-type field effect transistor Mp9 is electrically connected to the power supply terminal VDD_CORE of the bandgap reference core module 1. The drain of the eleventh P-type field effect transistor Mp11 is electrically connected to the ground terminal VSS through the twelfth P-type field effect transistor Mp12. The gate of the twelfth P-type field effect transistor Mp12 is electrically connected to the reference voltage output terminal VBG of the bandgap reference core module 11.

[0095] On the basis of the above hardware connection mode, in the first time stage, when the bandgap reference circuit is powered on and started, when the reference voltage output terminal VBG has not yet established the first bandgap reference voltage, the gate of the twelfth P-type field effect transistor Mp12 is at a low level, and is therefore in an off state. Therefore, the gate of the sixth switch tube MQ6 is pulled up to a high level by the power supply voltage, and the sixth switch tube MQ6 is in an on state. The gate level values ​​of the four field effect transistors, the sixth P-type field effect transistor Mp6, the seventh P-type field effect transistor Mp7, the eighth P-type field effect transistor Mp8, and the third P-type field effect transistor Mp3, are almost equal to the level value of the ground terminal VSS, so all four are in an on state.

[0096] As described above, at this time, the first P-type field effect transistor Mp1 is in a fully conductive state, and the pre-regulator module 2 outputs the power supply voltage VDD to the power supply terminal VDD_CORE of the bandgap reference core module 1 via the first P-type field effect transistor Mp1. In this way, the power supply voltage VDD is electrically connected to the ground terminal VSS through the fourth field effect transistors, namely, the sixth P-type field effect transistor Mp6, the seventh P-type field effect transistor Mp7, the eighth P-type field effect transistor Mp8, and the third P-type field effect transistor Mp3, and the sixth switch tube MQ6. In this way, the power supply voltage VDD can generate an initial current in the path formed by the above five field effect transistors, thereby helping the bandgap reference core module 1 to get rid of the zero state and generate a bandgap reference voltage.

[0097] After the bandgap reference core module 1 establishes the first bandgap reference voltage, the gate of the twelfth P-type field effect transistor Mp12 is at a low level, and is therefore in an off state. The gate of the sixth switch tube MQ6 is pulled down to a low level, and the sixth switch tube MQ6 is in an off state, so that the startup circuit module 3 no longer functions and no longer consumes any static power, thereby reducing the power consumption of the startup circuit module 3 in the second time period.

[0098] It is understood that the structure of the bandgap reference circuit illustrated in the embodiment of the present invention does not constitute a specific limitation on the bandgap reference circuit. In other embodiments of the present invention, the bandgap reference circuit may include more or fewer components than shown in the figure, or combine some components, or split some components, or arrange the components differently.

[0099] The above is an introduction to the bandgap reference circuit provided by the embodiment of the present invention. Next, based on the above content, the embodiment of the present invention further provides a power management circuit. The power management circuit may include any of the bandgap reference circuits described in the above embodiments.

[0100] An embodiment of the present invention further provides a chip, which may include any of the above-mentioned power management circuits.

[0101] An embodiment of the present invention further provides an electronic device, which may include any of the aforementioned chips.

[0102] Those skilled in the art will appreciate that, without conflict, the above-mentioned preferred solutions can be freely combined and superimposed.

[0103] It should be understood that the above-mentioned embodiments are merely illustrative and not restrictive. Without departing from the basic principles of the present invention, various obvious or equivalent modifications or substitutions that can be made by those skilled in the art to the above-mentioned details will all be included in the scope of the claims of the present invention.

Claims

1. A bandgap reference circuit, comprising: Bandgap reference core module and pre-regulator module; characterized in that, When the bandgap reference circuit is started, the pre-voltage regulator module operates in a first state and outputs a power supply voltage (VDD) to the bandgap reference core module. The bandgap reference core module starts working under the drive of the power supply voltage (VDD) and generates a first reference voltage and a first bandgap reference voltage after entering a steady state of operation. The first bandgap reference voltage controls the pre-stabilization module to operate in a second state, and generates a first pre-stabilization voltage based on the first reference voltage; The bandgap reference core module generates a bandgap reference voltage under the drive of the first pre-stabilized voltage; The bandgap reference core module includes a bias voltage point, and the bias voltage point is used to generate the first reference voltage; The pre-voltage stabilization module includes a first constant current source, a first P-type field effect transistor (Mp1) and a second P-type field effect transistor (Mp2); The source of the first P-type field effect transistor (Mp1) is electrically connected to the power supply terminal, the drain of the first P-type field effect transistor (Mp1) is electrically connected to the source of the second P-type field effect transistor (Mp2), and is connected to the power supply terminal of the bandgap reference core module; the drain of the second P-type field effect transistor (Mp2) is electrically connected to the ground terminal (VSS) via the first constant current source, and the gate is electrically connected to the bias voltage point; When the bandgap reference circuit is started, the first constant current source is controlled to stop outputting current, and the first P-type field effect transistor (Mp1) is controlled to be fully turned on, and the pre-regulator module outputs the power supply voltage (VDD) to the power supply terminal of the bandgap reference core module via the first P-type field effect transistor (Mp1); After the bandgap reference core module generates the first reference voltage, it controls the first constant current source to output current and controls the first P-type field effect transistor (Mp1) to be incompletely turned on. The pre-regulator module outputs the first pre-regulated voltage to the power supply terminal of the bandgap reference core module via the first P-type field effect transistor (Mp1).

2. The bandgap reference circuit according to claim 1, characterized in that: The pre-voltage stabilization module further includes a first switch tube (MQ1), a fourth switch tube (MQ4), a first N-type field effect tube (Mn1), and a second constant current source; The gate of the first P-type field effect transistor (Mp1) is electrically connected to the ground terminal (VSS)(VSS) through the first switch tube (MQ1); the first N-type field effect transistor (Mn1), the second constant current source and the fourth switch tube (MQ4) are connected in series; The gate of the first N-type field effect transistor (Mn1) is electrically connected to the bias voltage point, and the source is electrically connected to the ground terminal (VSS) via the first constant current source; When the bandgap reference circuit is started, the first switch tube (MQ1) is controlled to be turned on, and the fourth switch tube (MQ4) is controlled to be turned off so that the second constant current source stops outputting current; After the bandgap reference core module generates the first reference voltage, it controls the first switch tube (MQ1) to be turned off, and controls the fourth switch tube (MQ4) to be turned on so that the second constant current source outputs current.

3. The bandgap reference circuit according to claim 2, characterized in that: The pre-stabilization module further includes a third switch tube (MQ3), and the first constant current source includes a third N-type field effect tube (Mn3); the drain of the third N-type field effect tube (Mn3) is connected to the drain of the second P-type field effect tube (Mp2), and the source is grounded; When the bandgap reference circuit is started, the third switch tube (MQ3) is controlled to be turned on, so that the third N-type field effect tube (Mn3) is turned off, thereby causing the first constant current source to stop outputting current; After the bandgap reference core module generates the first reference voltage, the third switch tube (MQ3) is controlled to be turned off, so that the third N-type field effect tube (Mn3) is turned on, thereby causing the first constant current source to output current.

4. The bandgap reference circuit according to claim 3, characterized in that: It also includes a control module; the bandgap reference voltage includes a first bandgap reference voltage; the bandgap reference core module is provided with a reference voltage output terminal (VBG) to output the bandgap reference voltage; the first input terminal of the control module is electrically connected to the reference voltage output terminal (VBG), and the first output terminal of the control module is electrically connected to the gate of the first switch tube (MQ1); the first switch tube (MQ1) is an N-type field effect tube; When the control module detects that the voltage value generated by the reference voltage output terminal (VBG) is less than a preset threshold value, a high level signal is output at the first output terminal, the first switch tube (MQ1) is turned on, the first P-type field effect tube (Mp1) is fully turned on, and the power supply voltage (VDD) supplies power to the bandgap reference core module through the first P-type field effect tube (Mp1) to generate a first reference voltage at the bias voltage point (Vb), and generate the first bandgap reference voltage at the reference voltage output terminal (VBG); When the control module detects that the voltage value generated by the reference voltage output terminal (VBG) is greater than a preset threshold, a low-level signal is output at the first output terminal, so that the first switch tube (MQ1) is turned off, the first P-type field effect tube (Mp1) is not fully turned on, and the pre-stabilization module generates a first pre-stabilized voltage at the voltage output terminal (VDD_CORE) of the pre-stabilization module based on the first reference voltage.

5. The bandgap reference circuit according to claim 4, characterized in that: The bandgap reference core module generates a second reference voltage at the bias voltage point (Vb) based on the first pre-stabilized voltage, and outputs a second bandgap reference voltage at the reference voltage output terminal (VBG).

6. The bandgap reference circuit according to claim 5, characterized in that: The pre-regulator module generates a second pre-regulated voltage at a voltage output terminal (VDD_CORE) of the pre-regulator module based on the second reference voltage, and outputs the second pre-regulated voltage to a power supply terminal of the bandgap reference core module.

7. The bandgap reference circuit according to claim 3, characterized in that: The first constant current source is a mirror image constant current source; the first constant current source also includes a second N-type field effect transistor (Mn2); the second N-type field effect transistor (Mn2) is electrically connected to the drain of the first P-type field effect transistor (Mp1) via a third P-type field effect transistor (Mp3); When the first P-type field effect transistor (Mp1) is not fully turned on, current flows through the third P-type field effect transistor (Mp3), thereby causing current to flow through the second N-type field effect transistor (Mn2) and the third N-type field effect transistor (Mn3).

8. The bandgap reference circuit according to claim 7, characterized in that: A second switch tube (MQ2) is arranged between the third P-type field effect tube (Mp3) and the second N-type field effect tube (Mn2); the second switch tube (MQ2) is a P-type field effect tube; when the bandgap reference circuit is started, the second switch tube (MQ2) is controlled to be turned off, so that current stops flowing through the third P-type field effect tube (Mp3), the second N-type field effect tube (Mn2) and the third N-type field effect tube (Mn3).

9. The bandgap reference circuit according to claim 7, characterized in that: The second constant current source is a mirror image constant current source; the second constant current source comprises a fourth P-type field effect transistor (Mp4) and a fifth P-type field effect transistor (Mp5), the drain of the fourth P-type field effect transistor (Mp4) is electrically connected to the drain of the fifth P-type field effect transistor (Mp5); the fourth P-type field effect transistor (Mp4) is electrically connected to the ground terminal (VSS) via a fourth N-type field effect transistor (Mn4); the gate and drain of the fourth P-type field effect transistor (Mp4) are electrically connected; the fourth N-type field effect transistor (Mn4), the second N-type field effect transistor (Mn2) and the third N-type field effect transistor (Mn3) form a third constant current source; the third constant current source is a mirror image current source; When the first P-type field effect transistor (Mp1) is not fully turned on, current flows through the third P-type field effect transistor (Mp3), thereby causing current to flow through the fourth N-type field effect transistor (Mn4), the fourth P-type field effect transistor (Mp4) and the fifth P-type field effect transistor (Mp5).

10. The bandgap reference circuit according to claim 9, characterized in that: A fifth switch tube (MQ5) is connected between the source and drain of the fourth P-type field effect tube (Mp4); the fifth switch tube (MQ5) is a P-type field effect tube; When the bandgap reference circuit is started, the fifth switch tube (MQ5) is controlled to be turned on, so that the current stops flowing through the fourth P-type field effect tube (Mp4), the fifth P-type field effect tube (Mp5) and the fourth N-type field effect tube (Mn4); When the first P-type field effect transistor (Mp1) is not fully turned on, the bandgap reference circuit controls the fifth switch tube (MQ5) to turn off, so that current flows through the fourth P-type field effect transistor (Mp4), the fifth P-type field effect transistor (Mp5) and the fourth N-type field effect transistor (Mn4).

11. The bandgap reference circuit according to claim 4, characterized in that: It also includes a startup circuit module; the startup circuit module includes a sixth switch tube; When the bandgap reference circuit is started, the first P-type field effect transistor (Mp1) is controlled to be fully turned on, and the sixth switch tube (MQ6) is controlled to be turned on, and the pre-regulator module outputs the power supply voltage (VDD) to the power supply end of the bandgap reference core module via the first P-type field effect transistor (Mp1); the power supply voltage (VDD) is injected into the bandgap reference core module via the sixth switch tube (MQ6), thereby generating a first reference voltage at the bias voltage point (Vb), and outputting the first bandgap reference voltage at the reference voltage output end (VBG).

12. The bandgap reference circuit according to claim 11, characterized in that: When the voltage value output by the reference voltage output terminal (VBG) is less than the preset threshold, the sixth switch tube is turned on; when the voltage value output by the reference voltage output terminal (VBG) is greater than or equal to the preset threshold, the sixth switch tube is turned off.

13. A power management circuit, characterized in that: The invention comprises the bandgap reference circuit according to any one of claims 1 to 12.

14. A chip, characterized in that: Includes the power management circuit as claimed in claim 13.

15. An electronic device, characterized in that: Comprising the chip as claimed in claim 14.

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