Method for manufacturing semiconductor device capable of independently controlling doping concentration of active region and termination region and method for manufacturing semiconductor device
By forming a hard mask layer in the active region and termination region of the semiconductor substrate and performing high-temperature thermal diffusion, the doping concentration can be independently controlled, solving the problem of uneven doping concentration in the prior art and improving the breakdown clamping accuracy and robustness of the device.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- SHANGHAI YIDU POWER SEMICON TECH CO LTD
- Filing Date
- 2024-04-02
- Publication Date
- 2026-05-22
AI Technical Summary
Existing technologies make it difficult to independently control the doping concentration of the active and termination regions of superjunction MOSFETs, TMBSs, and IGBTs, leading to uneven breakdown voltages and affecting the robustness of the devices.
By forming a hard mask layer on the surface of the active region and the termination region of the semiconductor substrate, a vertical channel is formed after patterning. The doping concentration is independently controlled by using a high-temperature thermal diffusion process to make the doped layer and the covered vertical channel have the same doping concentration.
The design achieves charge balance in the active and termination regions, improving the breakdown clamping accuracy and robustness of the devices and enhancing the performance of high-voltage trench MOSFETs, TMBS, and IGBT devices.
Smart Images
Figure CN118231229B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of semiconductor technology, and more particularly to a method for fabricating the active region and termination region of a semiconductor device that allows for independent control of doping concentration, as well as a method for fabricating the semiconductor device. Background Technology
[0002] In the fabrication of superjunction trench MOSFETs, TMBS, and IGBT devices, the breakdown voltage of the termination region is one of the key design factors. In conventional superjunction device designs, the active region has a significant impact on the breakdown voltage of the termination region. Therefore, existing technologies control the balance charge of the active region through different doping methods to reduce its influence on the breakdown voltage of the termination region. Summary of the Invention
[0003] The technical problem to be solved by the present invention is to provide a method for fabricating the active region and the termination region of a semiconductor device that can independently control the doping concentration, and a method for fabricating the semiconductor device, which can independently realize the avalanche voltage of the active region and the termination region by controlling the balance charge of the active region.
[0004] To address the aforementioned problems, this invention provides a method for fabricating an active region and a termination region of a semiconductor device capable of independently controlling the doping concentration. The method includes: providing a semiconductor substrate, the semiconductor substrate including an active region and a termination region, the active region including at least one vertical channel; covering the vertical channel with a doped layer, the doped layer and the covered vertical channel being made of the same material, and the doping concentration of the doped layer being greater than the doping concentration of the covered vertical channel; and using a high-temperature thermal diffusion process to ensure that the doped layer and the vertical channel covered by the doped layer have the same doping concentration.
[0005] Optionally, a hard mask layer is included on the surface of the termination region, the hard mask layer being used to block the doped layer formed in the termination region. The method for forming the vertical channel includes: forming a hard mask layer on both the surface of the active region and the termination region; patterning the hard mask layer; and using the patterned hard mask layer as a blocking structure to form a vertical channel in the active region. The method further includes a step of removing the hard mask layer from the surface of the active region.
[0006] Optionally, an epitaxial process can be used to cover the vertical channel with a doped layer.
[0007] Optionally, the doping concentration of the doped layer is from 1×10⁻⁶. 10 cm -3 Up to 5×10 18 cm -3 .
[0008] To address the aforementioned problems, this invention provides a method for fabricating a semiconductor device, which uses the method described above to control the doping concentration of the active region and the termination region of the device.
[0009] Optionally, the semiconductor device is selected from any one of MOSFET, TMBS, and IGBT.
[0010] The aforementioned technical solution independently controls the dopant concentration in the active and termination regions through selective epitaxial growth and thermal diffusion processes. This method provides precise charge balance design and breakdown clamping in the active region, thereby ensuring the robustness of devices such as high-voltage trench MOSFETs, TMBS, and IGBTs. Attached Figure Description
[0011] Appendix Figure 1 The diagram shows the implementation steps of a specific embodiment of the manufacturing method described in this invention.
[0012] Appendix Figure 2A To be continued Figure 2G The diagram shown is a process flow chart of a specific embodiment of the manufacturing method described in this invention.
[0013] Appendix Figure 3 The diagram shows the implementation steps of a specific embodiment of the manufacturing method described in this invention.
[0014] Appendix Figure 4A To be continued Figure 4F The diagram shown is a process flow chart of a specific embodiment of the manufacturing method described in this invention. Detailed Implementation
[0015] The following detailed description, with reference to the accompanying drawings, describes the method for fabricating the active region and termination region of a semiconductor device capable of independently controlling doping concentration, as well as specific embodiments of the semiconductor device fabrication method.
[0016] Appendix Figure 1 The diagram illustrates the implementation steps of a specific embodiment of the method for fabricating the active region and termination region of a semiconductor device capable of independently controlling doping concentration according to the present invention, including: Step S10, providing a semiconductor substrate, the semiconductor substrate including an active region and a termination region; Step S11, forming a hard mask layer on the surface of both the active region and the termination region; Step S12, patterning the hard mask layer; Step S13, using the patterned hard mask layer as a barrier structure to form at least one vertical channel in the active region; Step S14, removing the hard mask layer from the surface of the active region; Step S15, covering the vertical channel with a doped layer; Step S16, high-temperature thermal diffusion, so that the doped layer and the vertical channel covered by the doped layer have the same doping concentration.
[0017] Appendix Figure 2A To be continued Figure 2G The diagram shown is a process flow chart of the above method.
[0018] Appendix Figure 2A As shown, referring to step S10, a semiconductor substrate 20 is provided, the semiconductor substrate 20 including an active region 21 and a termination region 22. The material of the semiconductor substrate 20 can be single-crystal silicon, or any common substrate material such as germanium silicon, silicon carbide, gallium arsenide, or gallium nitride.
[0019] Appendix Figure 2B As shown, referring to step S11, a hard mask layer 24 is formed on the surfaces of both the active region 21 and the termination region 22. The hard mask layer 24 can be formed on the surface by methods such as vapor deposition or epitaxy, and its material can be any material that can be used to block subsequent etching and epitaxial growth, such as silicon oxide or silicon nitride.
[0020] Appendix Figure 2C As shown, referring to step S12, the hard mask layer 24 is patterned. The hard mask layer 24 is patterned using photolithography and dry or wet etching to form a pattern for subsequent channel formation.
[0021] Appendix Figure 2D As shown, referring to step S13, a patterned hard mask layer 24 is used as a blocking structure to form a vertical channel in the active region 21. The active region 21 includes at least one vertical channel, which in this specific embodiment is a plurality of channels 23.
[0022] Appendix Figure 2E As shown, referring to step S14, the hard mask layer 24 on the surface of the active region 21 is removed. Photoresist can be used to selectively block the hard mask layer 24 of the termination region 22, and the hard mask layer 24 on the surface of the active region 21 can be removed using dry or wet etching methods.
[0023] Appendix Figure 2F As shown, referring to step S15, a doped layer 25 is covered within the vertical channel 23. In this step, the doped layer 25 and the covered vertical channel 23 are made of the same material, and the doping concentration of the doped layer 25 is greater than the doping concentration of the covered vertical channel 23. In this specific embodiment, the doping concentration of the doped layer is from 1×10⁻⁶. 10 cm -3 Up to 5×10 18 cm -3 The doping type can be N-type or P-type. Since the hard mask layer 24 on the surface of the active region 21 is removed, the doped layer 25 in this step simultaneously covers the surface of the semiconductor substrate 20 between adjacent vertical channels 23.
[0024] Appendix Figure 2GAs shown, referring to step S16, high-temperature thermal diffusion ensures that the doped layer 25 and the vertical channel 23 covered by the doped layer 25 have the same doping concentration. High-temperature thermal diffusion allows dopant ions in the doped layer 25 to diffuse into the vertical channel 23 covered by the doped layer 25, increasing the overall doping concentration of the active region 21, making its doping concentration higher than that of the termination region 22. This method allows for independent control of the doping concentration of the active region 21 and the termination region 22, providing precise charge balance design and accurate control of breakdown clamping, thus providing robustness for high-voltage trench MOSFETs, TMBS, and IGBT devices.
[0025] Appendix Figure 3 The diagram illustrates the implementation steps of a specific embodiment of the method for fabricating the active region and termination region of a semiconductor device capable of independently controlling doping concentration according to the present invention, including: Step S20, providing a semiconductor substrate, the semiconductor substrate including an active region and a termination region; Step S21, forming a hard mask layer on the surface of both the active region and the termination region; Step S22, patterning the hard mask layer; Step S23, using the patterned hard mask layer as a barrier structure to form at least one vertical channel in the active region; Step S24, covering the vertical channel with a doped layer; Step S25, high-temperature thermal diffusion, so that the doped layer and the vertical channel covered by the doped layer have the same doping concentration.
[0026] Appendix Figure 4A To be continued Figure 4F The diagram shown is a process flow chart of the above method.
[0027] Appendix Figure 4A As shown, referring to step S20, a semiconductor substrate 40 is provided, the semiconductor substrate 40 including an active region 41 and a termination region 42. The material of the semiconductor substrate 40 can be single-crystal silicon, or any common substrate material such as germanium silicon, silicon carbide, gallium arsenide, or gallium nitride.
[0028] Appendix Figure 4B As shown, referring to step S21, a hard mask layer 44 is formed on the surfaces of both the active region 41 and the termination region 42. The hard mask layer 44 can be formed on the surface by methods such as vapor deposition or epitaxy, and its material can be any material that can be used to block subsequent etching and epitaxial growth, such as silicon oxide or silicon nitride.
[0029] Appendix Figure 4C As shown, referring to step S22, the hard mask layer 44 is patterned. The hard mask layer 44 is patterned using photolithography and dry or wet etching to form a pattern for subsequent trench formation.
[0030] Appendix Figure 4DAs shown, referring to step S23, at least one vertical channel is formed in the active region 41 using a patterned hard mask layer 44 as a blocking structure. The active region 41 includes at least one vertical channel, which in this specific embodiment is a plurality of channels 43.
[0031] Appendix Figure 4E As shown, referring to step S24, a doped layer 45 is covered within the vertical channel 43. In this step, the doped layer 45 and the covered vertical channel 43 are made of the same material, or they can be made of different materials, and the doping concentration of the doped layer 45 is greater than the doping concentration of the covered vertical channel 43. In this specific embodiment, the doping concentration of the doped layer is from 1×10⁻⁶. 10 cm -3 Up to 5×10 18 cm -3 The doping type can be N-type or P-type. Since the surface of the active region 41 is also covered by a hard mask layer 44, the doped layer 45 in this step only covers the inner wall of the vertical channel 43.
[0032] Appendix Figure 4F As shown, referring to step S25, high-temperature thermal diffusion ensures that the doped layer 45 and the vertical channel 43 covered by the doped layer 45 have the same doping concentration. High-temperature thermal diffusion allows dopant ions in the doped layer 45 to diffuse into the vertical channel 43 covered by the doped layer 45, increasing the overall doping concentration of the active region 41, making its doping concentration higher than that of the termination region 42. This method allows for independent control of the doping concentration of the active region 41 and the termination region 42, providing precise charge balance design and accurate control of breakdown clamping, thus providing robustness for high-voltage trench MOSFETs, TMBS, and IGBT devices.
[0033] The following provides a specific implementation of a method for fabricating a semiconductor device, wherein the semiconductor device is selected from any one of MOSFET, TMBS, and IGBT. Using the above method to independently control the doping concentration of the active and termination regions of the device can provide precise charge balance design and achieve precise control of breakdown clamping, thereby providing robustness for high-voltage trench MOSFET, TMBS, and IGBT devices.
[0034] The above description is only a preferred embodiment of the present invention. It should be noted that those skilled in the art can make several improvements and modifications without departing from the principle of the present invention, and these improvements and modifications should also be considered within the scope of protection of the present invention.
Claims
1. A method for fabricating the active region and termination region of a semiconductor device capable of independently controlling the doping concentration, characterized in that, include: A semiconductor substrate is provided, the semiconductor substrate including an active region and a termination region, the active region including at least one vertical channel; A doped layer is covered within the vertical channel, wherein the doped layer and the covered vertical channel are made of the same material, and the doping concentration of the doped layer is greater than the doping concentration of the covered vertical channel. A high-temperature thermal diffusion process is used to ensure that the doped layer and the vertical channel covered by the doped layer have the same doping concentration.
2. The method according to claim 1, characterized in that, The termination region surface includes a hard mask layer, which is used to prevent the formation of a doped layer in the termination region.
3. The method according to claim 2, characterized in that, The method for forming the vertical channel includes: forming a hard mask layer on the surfaces of both the active region and the termination region; Graphicalize the hard mask layer; By using a patterned hard mask layer as a blocking structure, at least one vertical channel is formed in the active region.
4. The method according to claim 3, characterized in that, This includes the step of removing the hard mask layer from the surface of the active region.
5. The method according to claim 1, characterized in that, An epitaxial process is used to cover the vertical channel with a doped layer.
6. The method according to claim 1, characterized in that, The doping concentration of the doped layer is from 1×10 10 cm -3 Up to 5×10 18 cm -3 .
7. A method for fabricating a semiconductor device, characterized in that, The active region and the termination region are fabricated using the method described in any one of claims 1-6.
8. The method according to claim 7, characterized in that, The semiconductor device is selected from any one of MOSFET, TMBS, and IGBT.