Semiconductor device, method of manufacturing the same, and method of removing residual polysilicon

Abstract

The present application relates to a semiconductor device, a manufacturing method thereof and a method for removing residual polysilicon. An example of the method for removing residual polysilicon in a manufacturing process of a semiconductor device comprises: forming a trench on a substrate, the bottom of the trench being a silicon layer and the side of the trench having a residual polysilicon layer; cyclically performing an oxidation step and an etching step until the residual polysilicon layer on the side of the trench is removed, the oxidation step comprising forming a silicon dioxide layer on the bottom of the trench by a thermal oxidation process, and the etching step comprising etching the residual polysilicon layer and the silicon dioxide layer in the trench, wherein the etching rate of the polysilicon layer is greater than the etching rate of the third silicon dioxide layer; and removing the residual silicon dioxide layer on the bottom of the trench. Thus, the flatness of the bottom of the trench can be ensured while ensuring that there is no residual polysilicon on the two sides of the trench.

Description

Technical Field

[0001] This invention relates to semiconductor manufacturing processes, and more specifically, to semiconductor devices and methods for manufacturing the same, and methods for removing residual polysilicon. Background Technology

[0002] Photonic integration technology is one of the more popular engineering technologies in recent years. It is an application technology for manufacturing optical components developed on the basis of modern integrated optics. As one of the key devices in high-speed optoelectronics, photodetectors have long been extensively studied. Among them, waveguide-type germanium PIN photodetectors based on heteroepitaxial growth have received widespread attention and application due to their compatibility with CMOS processes.

[0003] To improve the light absorption efficiency of germanium PIN photodetectors, a gradually narrowing polysilicon structure is typically incorporated into the design to enhance evanescent wave coupling efficiency. Therefore, the polysilicon layer at the corresponding locations needs to be removed during the formation of the germanium (Ge) epitaxial trench. However, since the size of the germanium trench is usually smaller than the size of the polysilicon, polysilicon residue is easily formed on both sides of the trench. This residue increases the defect density in Ge growth. Furthermore, the polysilicon introduces numerous interface states, leading to leakage current. Typically, isotropic etching can remove the polysilicon on both sides of the trench; however, this process also etches the bottom silicon, causing it to be etched into a "bowl" shape (e.g., ...). Figure 1 As shown in the figure, the bottom of the trench formed by this method is uneven and the morphology is uncontrollable, which will result in the final germanium morphology not meeting the design requirements. Summary of the Invention

[0004] In view of the deficiencies of the prior art, the present invention proposes a method for manufacturing a semiconductor device and a method for removing residual polysilicon, which ensures that the bottom of the trench is flat while ensuring that there is no polysilicon residue on both sides of the trench.

[0005] In one aspect, embodiments of the present invention provide a method for manufacturing a semiconductor device, comprising:

[0006] A substrate is provided, the substrate including a silicon layer on its top layer;

[0007] A first silicon dioxide layer is formed on the surface of the silicon layer;

[0008] A polycrystalline silicon layer is deposited and etched on the first silicon dioxide layer to form a polycrystalline silicon layer.

[0009] The polycrystalline silicon layer is covered by a second silicon dioxide layer on top of the first silicon dioxide layer;

[0010] Remove the second silicon dioxide layer, polysilicon layer, first silicon dioxide layer, and a portion of the top silicon layer in the predetermined area to form a trench;

[0011] Repeat the following oxidation and etching steps until the residual polysilicon layer on the side of the trench is removed.

[0012] The oxidation step includes: forming a third silicon dioxide layer at the bottom of the trench using a thermal oxidation process.

[0013] The etching step includes: etching the residual polysilicon layer and the third silicon dioxide layer in the trench, wherein the etching rate of the polysilicon layer is greater than the etching rate of the third silicon dioxide layer;

[0014] After removing the polysilicon layer remaining on the side of the trench, remove the third silicon dioxide layer remaining at the bottom of the trench.

[0015] In some embodiments of the present invention, forming a third silicon dioxide layer at the bottom of the trench by a thermal oxidation process includes: irradiating the trench with oxygen plasma, wherein the oxygen plasma reacts with the silicon layer at the bottom of the trench to generate the third silicon dioxide layer.

[0016] In some embodiments of the present invention, the oxygen plasma reacts with the residual polysilicon layer on the side of the trench to form an additional silicon dioxide layer. By adjusting the bias voltage applied to the oxygen plasma, the oxidation reaction is concentrated at the bottom of the trench, such that the thickness of the third silicon dioxide layer formed at the bottom of the trench is greater than the thickness of the silicon dioxide layer at the residual polysilicon layer on the side of the trench.

[0017] In some embodiments of the present invention, the ratio of the etching rate of the polysilicon layer to the etching rate of the third silicon dioxide layer is greater than 3:1.

[0018] In some embodiments of the present invention, the manufacturing method further includes: after removing the third silicon dioxide layer remaining at the bottom of the trench, further removing a portion of the silicon layer at the bottom of the trench.

[0019] In some embodiments of the present invention, the manufacturing method further includes: epitaxially growing germanium material in the formed trench to fill the trench.

[0020] In some embodiments of the present invention, the semiconductor device includes a waveguide-type germanium photodetector, wherein the predetermined region is a region where a process window for selective epitaxial growth of germanium is to be formed. In some embodiments of the present invention, after forming a first silicon dioxide layer on the surface of the silicon layer and before depositing a polycrystalline silicon layer on the first silicon dioxide layer, the method further includes: etching the silicon layer and forming a silicon waveguide from the first silicon dioxide layer.

[0021] On the other hand, embodiments of the present invention provide a method for removing residual polysilicon in a process for manufacturing a semiconductor device, comprising:

[0022] A trench is formed on a substrate, the bottom of the trench being a silicon layer and the sides having residual polycrystalline silicon layers;

[0023] Repeat the following oxidation and etching steps until the residual polysilicon layer on the side of the trench is removed.

[0024] The oxidation step includes: forming a silicon dioxide layer at the bottom of the trench using a thermal oxidation process.

[0025] The etching step includes: etching the residual polysilicon layer and silicon dioxide layer in the trench, wherein the etching rate of the polysilicon layer is greater than the etching rate of the third silicon dioxide layer;

[0026] Remove the residual silica layer at the bottom of the trench.

[0027] In some embodiments of the present invention, forming a silicon dioxide layer at the bottom of the trench by a thermal oxidation process includes: irradiating the trench with oxygen plasma, wherein the oxygen plasma reacts with the silicon layer at the bottom of the trench to generate the silicon dioxide layer.

[0028] In some embodiments of the present invention, the oxygen plasma reacts with the residual polysilicon layer on the side of the trench to form an additional silicon dioxide layer. By adjusting the bias voltage applied to the oxygen plasma, the oxidation reaction is concentrated at the bottom of the trench, such that the thickness of the silicon dioxide layer formed at the bottom of the trench is greater than the thickness of the silicon dioxide layer at the residual polysilicon layer on the side of the trench.

[0029] In some embodiments of the present invention, the ratio of the etching rate of the polysilicon layer to the etching rate of the silicon dioxide layer is greater than 3:1.

[0030] Furthermore, embodiments of the present invention also provide a semiconductor device manufactured using the above method, wherein the bottom of the trench in a predetermined region is flat and there is no polysilicon residue on both sides of the trench.

[0031] According to an embodiment of the present invention, in the fabrication process of a semiconductor device, no polysilicon residue is left on both sides of the germanium epitaxial trench, while ensuring the flatness and controllable morphology of the bottom of the germanium epitaxial trench.

[0032] The various aspects, features, and advantages of the embodiments of the present invention will be described in detail below with reference to the accompanying drawings. Attached Figure Description

[0033] Figure 1 This is a schematic diagram showing the cross-sectional structure of an existing semiconductor device with germanium epitaxial trenches.

[0034] Figures 2 to 7This is a schematic diagram showing the cross-sectional structure of a semiconductor device according to an embodiment of the present invention at different stages of its manufacturing process.

[0035] Figure 8 This is a schematic diagram showing a cross-sectional structure of an example of a semiconductor device according to an embodiment of the present invention. Detailed Implementation

[0036] In the following description, exemplary embodiments of the invention will be described in more detail with reference to the accompanying drawings. It should be understood that the invention may be embodied in various different forms and should not be construed as being limited to the embodiments shown herein.

[0037] The terminology used herein is for the purpose of describing particular embodiments and is not intended to limit the invention. For example, terms such as “top,” “bottom,” “upper,” “lower,” “above,” and “below” may be used to refer to directions in the accompanying drawings, which are referenced. Unless the context clearly indicates otherwise, the terms “first,” “second,” and other similar numerical terms indicating reference do not imply order or sequence. As used herein, the term “a” is intended to include plural forms unless the context clearly indicates that the term refers only to quantity. It should also be understood that the terms “comprising,” “including,” and “having” as used herein specify the presence of stated features, integrals, steps, operations, elements, and / or components, but do not exclude the presence or addition of one or more other features, integrals, steps, operations, elements, components, and / or collections thereof. As used herein, the term “and / or” includes any and all combinations of one or more of the associated listed items. Expressions such as “at least one of” modify the entire list of elements when preceding a list of elements, rather than modifying individual elements of that list.

[0038] As used herein, the terms “substantially,” “about,” and similar terms are used as approximate terms rather than as terms of degree, and are intended to take into account the inherent variations in measured or calculated values ​​that would be recognized by one of ordinary skill in the art.

[0039] It should be understood that when an element or feature is referred to as "on another element or layer," "connected to," or "attached to" another element or layer, it may be directly on, connected to, or attached to the other element or feature, or there may be one or more intermediate elements or features. Furthermore, it should be understood that when an element or feature is referred to as "between" two elements or features, it may be the only element or feature between the two elements or features, or there may be one or more intermediate elements or features.

[0040] Unless expressly stated to the contrary, all terms used herein (including technical and scientific terms) have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains. It should also be understood that the terms (such as those defined in common dictionaries) should be interpreted as having the same or similar meaning as they have in the relevant field and / or the context of this specification, and should not be interpreted rigidly or in a rigid manner.

[0041] Figures 2 to 7 This is a schematic diagram showing the cross-sectional structure of a semiconductor device according to an embodiment of the present invention at different stages of its manufacturing process.

[0042] In an exemplary embodiment, a method for manufacturing a semiconductor device according to an embodiment of the present invention includes the following steps.

[0043] Step 1: Provide a substrate, the substrate including a silicon layer 102 on its top layer. In some embodiments, such as Figure 2 As shown, the substrate includes a buried oxide layer 101 at the bottom and a silicon layer 102 on the buried oxide layer 101. In some embodiments, the buried oxide layer 101 is about 2 μm thick and the top silicon layer 102 is about 220 nm thick.

[0044] Step 2: A silicon dioxide layer 200 is formed on the surface of the silicon layer 102. In some embodiments, the silicon dioxide layer 200 is formed by thermal oxidation of the top silicon layer 102. In some embodiments, after the silicon dioxide layer 200 is formed, the silicon dioxide layer 200 and the top silicon layer 102 are etched by photolithography and etching methods to form a silicon waveguide structure.

[0045] Step 3: A polycrystalline silicon layer 300 is deposited and etched on the silicon dioxide layer 200. In some embodiments, a specific polycrystalline silicon structure is formed on this layer through processes such as thin film deposition, photolithography, and etching.

[0046] Step 4: Cover the polysilicon layer 300 with another silicon dioxide layer 400 on top of the silicon dioxide layer 200.

[0047] Step 5: Remove the silicon dioxide layer 400, polysilicon layer 300, silicon dioxide layer 200, and top silicon layer 102 of a certain thickness from the predetermined area to form a trench, such as... Figure 3 As shown. In some embodiments, the predetermined region includes a process window for selective germanium epitaxial growth. Specifically, through a series of processes such as thin film deposition, photolithography, and etching, a silicon dioxide layer 400, a polysilicon layer 300, a silicon dioxide layer 200, and a top silicon layer 102 of a certain thickness are removed from this window region, thereby forming a trench suitable for germanium epitaxial growth. Figure 3As shown, a polycrystalline silicon layer 300 remains on the side of the trench.

[0048] Step Six: Perform the method for removing residual polysilicon in the process of manufacturing a semiconductor device according to the embodiments of the present invention to remove the residual polysilicon layer 300. The method for removing residual polysilicon includes cyclically performing the following oxidation and etching steps until the residual polysilicon layer 300 on the trench side is removed.

[0049] The oxidation step includes forming a silicon dioxide layer as an etch barrier layer at the bottom of the trench using a thermal oxidation process. In some embodiments, such as Figure 5 As shown, oxygen plasma (dots in the figure represent oxygen plasma) is irradiated into the trench. The oxygen plasma reacts with the silicon layer at the bottom of the trench to form the silicon dioxide layer that serves as an etch barrier. The oxygen plasma also reacts with the residual polysilicon layer on the side of the trench to form another silicon dioxide layer. By adjusting the bias voltage applied to the oxygen plasma (arrows in the figure represent bias voltage), the oxidation reaction is concentrated at the bottom of the trench, resulting in a silicon dioxide layer at the bottom of the trench with a thickness greater than the thickness of the silicon dioxide layer at the residual polysilicon layer on the side of the trench. In some embodiments, the thickness difference between the two is approximately equal to the lateral width of the residual polysilicon layer 300 on the side of the trench.

[0050] The etching step includes: as follows Figure 5 As shown, the residual polysilicon layer 300 in the trench and the silicon dioxide layer 500 at the bottom of the trench are etched, wherein the etching rate for the polysilicon layer is greater than the etching rate for the silicon dioxide layer 500. In some embodiments, the ratio of the etching rate for the polysilicon layer 300 to the etching rate for the silicon dioxide layer 500 (also referred to as "high etch selectivity") is greater than 3:1, preferably greater than 5:1. By controlling the etching amount, excessive loss of the bottom silicon oxide layer 500 is avoided while removing a certain amount of lateral polysilicon.

[0051] By precisely controlling the "oxidation step" and the "etching step", the bottom silicon oxide layer 500 is used as a barrier layer, and the high etch selectivity ratio of polysilicon / silicon dioxide is used to remove the lateral polysilicon, reducing the additional loss of bottom silicon and controlling the loss to less than 10nm, preferably less than 5nm.

[0052] The polysilicon on the trench side is removed by a "oxidation-etching-oxidation-etching" cycle, such as... Figure 6 As shown.

[0053] Step 7: After removing the residual polysilicon layer on the sides of the trench, remove 500g of the residual silicon dioxide layer at the bottom of the trench. Figure 6 and Figure 7As shown, a trench structure with no polysilicon residue and a flat bottom is ultimately formed. In some embodiments, anisotropic etching is performed on the silicon dioxide layer 500 to remove the bottom silicon dioxide layer.

[0054] In other embodiments, the manufacturing method further includes removing a portion of the silicon layer 102 at the bottom of the trench after removing the residual silicon dioxide layer 500 at the bottom of the trench, in order to further improve the morphology of the bottom. For example, after completing the above steps, anisotropic etching can be performed on the bottom of the trench to remove part of the silicon layer at the bottom of the trench, making the bottom of the trench smoother.

[0055] like Figure 8 As shown, germanium 600 is epitaxially grown in a trench where a semiconductor structure is obtained through the above steps to obtain a semiconductor device. In some embodiments, the manufacturing method further includes epitaxially growing germanium material in the formed trench to fill the trench. The resulting semiconductor device includes a waveguide-type germanium photodetector. In the semiconductor device, the bottom of the germanium 600 epitaxial trench is flat, and there is no polysilicon residue on the sides.

[0056] Based on the semiconductor device manufacturing method described in the above embodiments, it can be seen that the present invention provides a method for removing residual polysilicon during the fabrication process of a semiconductor device. In an exemplary embodiment, the method includes:

[0057] Step 1: Form a trench on a substrate, wherein the bottom of the trench is a silicon layer and the sides have residual polycrystalline silicon layers, such as... Figure 3 As shown;

[0058] Step 2: Repeat the following oxidation and etching steps until the residual polysilicon layer on the side of the trench is removed, wherein the oxidation step includes: Figure 4 As shown, a silicon dioxide layer is formed at the bottom of the trench using a thermal oxidation process; the etching step includes: as shown in the figure. Figure 5 and Figure 6 As shown, the residual polysilicon layer and silicon dioxide layer in the trench are etched, wherein the etching rate of the polysilicon layer is greater than the etching rate of the third silicon dioxide layer;

[0059] Step 3: Remove the residual silica layer at the bottom of the trench, such as... Figure 7 As shown.

[0060] In some embodiments, during the oxidation step, forming a silicon dioxide layer at the bottom of the trench via a thermal oxidation process includes: as follows Figure 4As shown, oxygen plasma is irradiated into the trench, and the oxygen plasma reacts with the silicon layer at the bottom of the trench to form the silicon dioxide layer. In some embodiments, the oxygen plasma reacts with the residual polycrystalline silicon layer on the side of the trench to form another silicon dioxide layer. By adjusting the bias voltage applied to the oxygen plasma, the oxidation reaction is concentrated at the bottom of the trench, so that the thickness of the silicon dioxide layer formed at the bottom of the trench is greater than the thickness of the silicon dioxide layer at the residual polycrystalline silicon layer on the side of the trench.

[0061] In some embodiments of the present invention, during the etching step, the ratio of the etching rate of the polysilicon layer to the etching rate of the silicon dioxide layer is greater than 3:1, preferably greater than 5:1.

[0062] Furthermore, embodiments of the present invention also provide a semiconductor device manufactured using the above method, wherein the bottom of the trench in a predetermined region is flat and there is no polysilicon residue on both sides of the trench.

[0063] According to an embodiment of the present invention, in the fabrication process of a semiconductor device, no polysilicon residue is left on both sides of the germanium epitaxial trench, while ensuring the flatness and controllable morphology of the bottom of the germanium epitaxial trench.

[0064] Although this article describes the manufacturing method of the semiconductor device and the method for removing residual polysilicon of the present invention using germanium epitaxial trenches as an example, it should be understood that the present invention is also applicable to the removal of residual polysilicon in other trenches.

[0065] Therefore, those skilled in the art should understand that the above-disclosed embodiments are merely implementations of the present invention, and should not be construed as limiting the scope of the patent protection claimed by the present invention. Equivalent variations made according to the embodiments of the present invention are still within the scope of the claims of the present invention.

Claims

1. A method for manufacturing a semiconductor device, comprising: A substrate is provided, the substrate including a silicon layer on its top layer; A first silicon dioxide layer is formed on the surface of the silicon layer; A polycrystalline silicon layer is deposited and etched on the first silicon dioxide layer to form a polycrystalline silicon layer. The polycrystalline silicon layer is covered by a second silicon dioxide layer on top of the first silicon dioxide layer; Remove the second silicon dioxide layer, polysilicon layer, first silicon dioxide layer, and a portion of the top silicon layer in the predetermined area to form a trench; Repeat the following oxidation and etching steps until the residual polysilicon layer on the side of the trench is removed. The oxidation step includes: forming a third silicon dioxide layer at the bottom of the trench by a thermal oxidation process, wherein the thickness of the third silicon dioxide layer formed at the bottom of the trench is greater than the thickness of the silicon dioxide layer at the residual polycrystalline silicon layer on the side of the trench. The etching step includes: etching the residual polysilicon layer and the third silicon dioxide layer in the trench, wherein the etching rate of the polysilicon layer is greater than the etching rate of the third silicon dioxide layer; After removing the polysilicon layer remaining on the side of the trench, remove the third silicon dioxide layer remaining at the bottom of the trench. Germanium material is epitaxially grown in the formed trench to fill the trench.

2. The manufacturing method as described in claim 1, characterized in that, Forming a third silicon dioxide layer at the bottom of the trench via a thermal oxidation process includes: The trench is irradiated with oxygen plasma, which reacts with the silicon layer at the bottom of the trench to form the third silicon dioxide layer.

3. The manufacturing method as described in claim 2, characterized in that, The oxygen plasma reacts with the residual polycrystalline silicon layer on the side of the trench to form an additional silicon dioxide layer. By adjusting the bias voltage applied to the oxygen plasma, the oxidation reaction is concentrated at the bottom of the trench, resulting in a third silicon dioxide layer at the bottom of the trench with a thickness greater than the silicon dioxide layer at the polycrystalline silicon layer remaining on the side of the trench.

4. The manufacturing method as described in claim 1, characterized in that, The ratio of the etching rate of the polysilicon layer to the etching rate of the third silicon dioxide layer is greater than 3:

1.

5. The manufacturing method as described in claim 1, characterized in that, Also includes: After removing the third silicon dioxide layer remaining at the bottom of the trench, a portion of the silicon layer at the bottom of the trench is further removed.

6. The manufacturing method as described in claim 1, characterized in that, The semiconductor device includes a waveguide-type germanium photodetector. The predetermined region is the area of ​​the process window for selective epitaxial growth of germanium.

7. The manufacturing method as described in claim 6, characterized in that, After forming a first silicon dioxide layer on the surface of the silicon layer, and before depositing a polycrystalline silicon layer on the first silicon dioxide layer, the method further includes: etching the silicon layer and forming a silicon waveguide from the first silicon dioxide layer.

8. A semiconductor device manufactured using the manufacturing method according to any one of claims 1 to 7.

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