A high-speed LDPC decoder and interleaved decoding method suitable for near-earth satellite communications

Abstract

The invention relates to the field of communication technology, and discloses a high-speed LDPC decoder suitable for near-earth satellite communication and an interleaved decoding method, comprising: a variable node operation module, which is used for performing variable node update operation according to a data frame transmitted by an input buffer module and confidence information transmitted from a check node to a variable node in a mutual information storage module, obtaining confidence information and decision information transmitted from the variable node to the check node, transmitting the confidence information transmitted from the variable node to the check node to the mutual information storage module, and transmitting the decision information to an output buffer module at the same time; the invention designs the conversion between the original code and the complement code of the variable node and the check node in the LDPC decoder and the operation of multiplying a correction factor originally belonging to the check node operation module into the variable node operation module, balances the complexity of the variable node and the check node, makes it more suitable for the interleaved decoding method, improves the decoding throughput and the throughput rate, and saves the cost.

Description

Technical Field

[0001] The present invention relates to the field of communication technology, and in particular to a high-speed LDPC decoder and an interleaved decoding method suitable for near-earth satellite communication. Background Art

[0002] At present, the space exploration range is getting wider and wider, the image resolution is getting higher and higher, and the amount of data transmitted by the satellite-to-ground link has increased significantly. The data transmission capacity of the satellite-to-ground link is facing challenges. How to achieve reliable and effective high-speed data transmission has become a research focus. In the applications of earth observation and low-orbit mobile satellite systems, LDPC codes have been widely studied due to their excellent performance close to the Shannon limit and low implementation complexity. In view of the characteristics of high-throughput data transmission and relatively long frame length in aerospace data transmission applications in low-Earth orbit, LDPC (8176, 7154) codes with longer code length and higher code rate are recommended.

[0003] The existing LDPC (8176, 7154) code is mostly used for satellite-to-ground high-throughput data transmission. The LDPC (8176, 7154) code has the following characteristics: due to the long length of the LDPC code, its iterative decoding algorithm has high computational and storage complexity and consumes a lot of time; FPGA can be programmed multiple times, has a short development cycle, can realize pipeline parallelism and data parallelism, has high real-time and flexibility, and is increasingly becoming the preferred hardware implementation platform for LDPC code encoders and decoders; the existing methods for improving the LDPC (8176, 7154) decoding throughput mainly include high single-core parallelism, multi-core parallelism, reducing the number of pipeline stages of variable node update units (VNU) and check node update units (CNU), and splitting the check matrix.

[0004] The premise of increasing the single-core parallelism is that the check matrix needs to meet certain conditions. The optional parallelism is limited. Since a check matrix of LDPC (8176, 7154) code is generated by 2*16 circulant matrices, and the dimension of each circulant matrix is ​​511*511, the variable node parallelism can be selected as 16, 112 or 1168, and the check node parallelism can be selected as 14, 28 or 146. The higher the parallelism, the more variable nodes and check node update modules are required, so more logic resources are required. The multi-core parallel method is to have multiple decoding modules with the same function on the hardware. Although this method does not increase the implementation complexity, the improvement of throughput is proportional to the consumption of hardware resources. The method of reducing the number of pipeline stages of variable nodes and check nodes can save resources and improve the decoding speed, but there is limited room for improvement in the number of pipeline stages of variable nodes and check nodes. Summary of the invention

[0005] In view of the above-mentioned deficiencies in the prior art, the present invention provides a high-speed LDPC decoder and an interleaved decoding method suitable for near-earth satellite communications, which improve the decoding throughput while only increasing information storage resources without increasing computing resources. At the same time, the conversion between the original code and the complement code of the variable nodes and the check nodes in the LDPC decoder and the operation of multiplying the correction factor originally belonging to the check node operation module are designed into the variable node operation module to balance the complexity of the variable nodes and the check nodes.

[0006] In order to achieve the above-mentioned object of the invention, the technical solution adopted by the present invention is:

[0007] A high-speed LDPC decoder suitable for near-earth satellite communications, comprising:

[0008] An input buffer module, used for receiving data frames;

[0009] A mutual information storage module, used to store the confidence information transmitted from the variable node to the check node and the confidence information transmitted from the check node to the variable node;

[0010] The variable node operation module is used to perform variable node update operation according to the data frame transmitted by the input cache module and the confidence information transmitted by the check node to the variable node in the mutual information storage module, obtain the confidence information and decision information transmitted by the variable node to the check node, transmit the confidence information transmitted by the variable node to the mutual information storage module, and transmit the decision information to the output cache module;

[0011] A check node operation module, used to perform check node update operation according to the confidence information transmitted from the variable node to the check node in the mutual information storage module, obtain the confidence information transmitted from the check node to the variable node, and transmit the confidence information transmitted from the check node to the variable node to the mutual information storage module;

[0012] The output cache module is used to output the decision information obtained by the variable node operation module.

[0013] Further, the input cache module includes a first initialization module and a second initialization module;

[0014] A first initialization module, configured to receive an odd-numbered data frame including a first data frame and a third data frame;

[0015] The second initialization module is used to receive an even-numbered data frame including a second data frame and a fourth data frame.

[0016] Further, the mutual information storage module includes a first mutual information storage module and a second mutual information storage module;

[0017] A first mutual information storage module is used to store the odd data frames taken out from the first initialization module in the odd time slots and the confidence information of the check nodes taken out from the first mutual information storage module and passed to the variable nodes, the confidence information of the variable nodes passed to the check nodes obtained after the variable node operation module performs the variable node update operation, and the confidence information of the check nodes passed to the variable nodes obtained after the check node operation module performs the check node update operation on the confidence information of the variable nodes taken out from the first mutual information storage module and passed to the check nodes in the even time slots;

[0018] The second mutual information storage module is used to store the even data frames taken out from the second initialization module in the even time slots and the confidence information of the check nodes taken out from the second mutual information storage module and passed to the variable nodes, the confidence information of the variable nodes passed to the check nodes obtained after the variable node operation module performs the variable node update operation, and the confidence information of the check nodes passed to the variable nodes taken out from the second mutual information storage module in the odd time slots and passed to the check nodes after the check node operation module performs the check node update operation.

[0019] Further, the output cache module includes a first output cache module and a second output cache module;

[0020] A first output buffer module, used for outputting the decision information obtained after the variable node operation module performs the variable node update operation on the odd-numbered data frames including the first data frame and the third data frame;

[0021] The second output buffer module is used to output the decision information obtained after the variable node operation module performs the variable node update operation on the even-numbered data frames including the second data frame and the fourth data frame.

[0022] Further, the check node operation module includes a minimum value and a second minimum value module;

[0023] The minimum value and second minimum value module is used to compare the confidence information transmitted to the verification node by multiple variable nodes input by the mutual information storage module and output the minimum value and the second minimum value.

[0024] Further, the minimum value and second minimum value module includes a three-input and two-output comparator, a two-input and two-output comparator, and a two-input and one-output comparator;

[0025] A three-input two-output comparator is used to compare the confidence information transmitted from the three sets of input variable nodes to the check node and output the second minimum value and the minimum value to the two-input two-output comparator;

[0026] A two-input two-output comparator is used to compare the two groups of sub-minimum values ​​and minimum values ​​output by the three-input two-output comparator and output the sub-minimum value and the minimum value to the two-input one-output comparator;

[0027] The two-input one-output comparator is used for comparing two groups of sub-minimum values ​​and a minimum value output by the two-input two-output comparator and outputting the minimum value.

[0028] Further, the variable node operation module includes a multiplication correction factor module and an original code complement code conversion module;

[0029] The multiplication correction factor module is used to correct the confidence information transmitted from the check node to the variable node by the mutual information storage module when the variable node operation module performs the variable node update operation, so as to obtain the corrected confidence information transmitted from the check node to the variable node;

[0030] The original code complement code conversion module converts the confidence information transmitted to the variable node by the check node corrected in the multiplication correction factor module between the original code and the complement code to obtain the converted complement code.

[0031] Furthermore, the specific process of variable node update operation is as follows:

[0032] The confidence information transmitted by the check node to the variable node transmitted by the mutual information storage module is multiplied by the correction factor to obtain the corrected confidence information transmitted by the check node to the variable node;

[0033] The confidence information passed by the modified check node to the variable node is converted into the original code and the complement code to obtain the converted complement code, and the confidence information passed by the variable node to the check node at the initial moment is summed to obtain the posterior probability of the variable node. The sign bit of the posterior probability of the variable node is taken as the highest bit as the decision information;

[0034] The confidence information passed from the check node to the variable node is subtracted from the posterior probability of the variable node to obtain the difference, and the difference is converted into the original code to obtain the confidence information passed from the variable node to the check node.

[0035] Furthermore, the judgment information is:

[0036]

[0037] Among them, L(Q i ) represents the posterior probability of the i-th variable node, L(P i ) represents the initial information of the ith channel, that is, the confidence information transmitted by the ith variable node to the check node at the initial moment, C i represents the set of check nodes connected to the i-th variable node, α represents the correction factor, L(r ji) represents the confidence information passed from the j-th check node to the i-th variable node, Represents the decision information of the i-th variable node.

[0038] An interleaved decoding method of a high-speed LDPC decoder suitable for near-earth satellite communication comprises the following steps:

[0039] S101, inputting an odd-numbered data frame including a first data frame and a third data frame into a first initialization module, and inputting an even-numbered data frame including a second data frame and a fourth data frame into a second initialization module;

[0040] S102, using the first data frame in the first initialization module to initialize the first mutual information storage module, obtain initialization data of the first mutual information storage module, and preset the number of iterations and the current number of iterations is 0;

[0041] S103, inputting the initialization data of the first mutual information storage module obtained in step S102 into the check node operation module to perform check node update operation, obtaining the confidence information transmitted by the check node to the variable node and transmitting it to the first mutual information storage module, and at the same time initializing the second mutual information storage module using the second data frame in the second initialization module to obtain the initialization data of the second mutual information storage module;

[0042] S104, input the first data frame in the first initialization module and the confidence information of the check node passed to the variable node taken out by the first mutual information storage module in step S103 into the variable node operation module to perform variable node update operation, obtain the confidence information and decision information passed by the variable node to the check node, and transmit the confidence information passed by the variable node to the first mutual information storage module, that is:

[0043]

[0044] Among them, L(q ij ) represents the confidence information passed from the i-th variable node to the j-th check node, L(P i ) represents the initial information of the i-th channel, α represents the correction factor, L(r j′i ) represents the confidence information passed from the j′th check node to the i-th variable node, C i\j represents the set of variable nodes connected to the i-th variable node except the j-th check node;

[0045] At the same time, the initialization data of the second mutual information storage module is input into the check node operation module to perform check node update operation, obtain the confidence information transmitted by the check node to the variable node and transmit it to the second mutual information storage module, and increase the current iteration number by 1;

[0046] S105, input the confidence information of the variable node passed to the check node taken out by the first mutual information storage module in step S104 into the check node operation module to perform check node update operation, obtain the confidence information passed to the variable node by the check node and transmit it to the first mutual information storage module, that is:

[0047]

[0048] Among them, L(r ji ) represents the confidence information passed from the jth check node to the ith variable node, R j\i represents the set of variable nodes connected to the jth check node except the i-th variable node, sgn(·) represents the sign function, L(q i′j ) represents the confidence information passed from the i′th variable node to the jth check node, Indicates finding the minimum value;

[0049] At the same time, the second data frame in the second initialization module and the confidence information of the check node passed to the variable node taken out by the second mutual information storage module in step S104 are input into the variable node operation module to perform variable node update operation, so as to obtain the confidence information and decision information of the variable node passed to the check node, and transmit the confidence information of the variable node passed to the check node to the second mutual information storage module, and increase the current iteration number by 1;

[0050] S106, inputting the first data frame in the first initialization module and the confidence information of the check node transmitted to the variable node taken out by the first mutual information storage module in step S105 into the variable node operation module to perform variable node update operation, obtaining the confidence information and decision information transmitted by the variable node to the check node, and transmitting the confidence information transmitted by the variable node to the check node to the first mutual information storage module;

[0051] At the same time, the confidence information of the variable node passed to the check node taken out by the second mutual information storage module in step S105 is input into the check node operation module to perform check node update operation, so as to obtain the confidence information passed to the variable node by the check node and transmit it to the second mutual information storage module, and the current iteration number is increased by 1;

[0052] S107, determining whether the current number of iterations is less than the preset number of iterations, if so, executing step S105, otherwise, executing step S108;

[0053] S108, inputting the decision information obtained in step S106 into the first output buffer module, and at the same time inputting the confidence information of the check node passed to the variable node taken out by the second data frame in the second initialization module and the second mutual information storage module in step S106 into the variable node operation module to perform variable node update operation, so as to obtain the confidence information and decision information passed by the variable node to the check node;

[0054] S109, inputting the decision information obtained in step S108 into the second output buffer module;

[0055] S110, the first output module and the second output module respectively output the obtained decision information, and the decoding ends.

[0056] The present invention has the following beneficial effects:

[0057] 1. The high-speed LDPC decoder and interleaved decoding method for near-earth satellite communication proposed in the present invention improve the decoding throughput and save costs compared with the decoder without interleaving method, while only increasing the information storage resources without increasing the computing resources;

[0058] 2. The present invention designs the conversion between the original code and the complement code of the variable node and the check node in the LDPC decoder and the operation of multiplying the correction factor originally belonging to the check node operation module into the variable node operation module, thereby balancing the complexity of the variable node and the check node;

[0059] 3. Compared with the dual-core decoder, the LDPC decoder proposed by the present invention can consume less computing resources and save resources when performing the same decoding amount;

[0060] 4. Compared with an ordinary single-core decoder, the LDPC decoder circuit proposed by the present invention consumes less time when performing the same decoding amount, thereby improving the decoding speed. BRIEF DESCRIPTION OF THE DRAWINGS

[0061] Figure 1 A schematic diagram of the structure of a high-speed LDPC decoder suitable for near-Earth satellite communications proposed by the present invention;

[0062] Figure 2 The working conditions of variable nodes and check nodes in the unbalanced decoder over time;

[0063] Figure 3 A schematic diagram of the working status of variable nodes and check nodes in the LDPC decoder over time;

[0064] Figure 4 A schematic diagram for extracting the minimum value and the second minimum value of the minimum value and the second minimum value module in the verification node operation module;

[0065] Figure 5 It is a schematic diagram of the iterative process of variable nodes and check nodes of LDPC decoder;

[0066] Figure 6 Schematic diagram of the variable node update operation process of the variable node processing module. DETAILED DESCRIPTION

[0067] The specific implementation modes of the present invention are described below so that those skilled in the art can understand the present invention. However, it should be clear that the present invention is not limited to the scope of the specific implementation modes. For those of ordinary skill in the art, as long as various changes are within the spirit and scope of the present invention as defined and determined by the attached claims, these changes are obvious, and all inventions and creations utilizing the concept of the present invention are protected.

[0068] like Figure 1 As shown, a high-speed LDPC decoder suitable for near-earth satellite communication comprises:

[0069] The input buffer module is used to receive data frames.

[0070] The mutual information storage module is used to store the confidence information transmitted from the variable node to the verification node and the confidence information transmitted from the verification node to the variable node.

[0071] The variable node operation module is used to perform variable node update operation according to the data frame transmitted by the input cache module and the confidence information transmitted by the check node to the variable node in the mutual information storage module, obtain the confidence information and judgment information transmitted by the variable node to the check node, transmit the confidence information transmitted by the variable node to the check node to the mutual information storage module, and transmit the judgment information to the output cache module.

[0072] The check node operation module is used to perform check node update operation according to the confidence information transmitted from the variable node to the check node in the mutual information storage module, obtain the confidence information transmitted from the check node to the variable node, and transmit the confidence information transmitted from the check node to the variable node to the mutual information storage module.

[0073] The output cache module is used to output the decision information obtained by the variable node operation module.

[0074] In this embodiment, the structure of the LDPC decoder is improved to achieve a higher throughput using relatively fewer logical resources when the LDPC decoder has a limited number of optional parallelism and does not increase the number of decoding cores. The LDPC decoder uses the LDPC (8176, 7154) code, and uses the LDPC (8176, 7154) code to balance the number of pipeline stages of variable nodes and check nodes, so that the code is suitable for variable nodes and check nodes to perform interleaved decoding on two frames of data at the same time. When only information storage resources are increased without increasing logical resources, the throughput is nearly twice that of the non-interleaved decoding method. In this embodiment, Figure 1 A schematic diagram of the structure of a high-speed LDPC decoder suitable for near-Earth satellite communications; Figure 1 The LDPC decoder shown in the figure balances the number of pipeline stages of variable nodes and check nodes, and adopts a method of interleaving decoding of two data frames by the variable nodes and the check nodes at the same time. Figure 1 The LDPC decoder includes an input cache module, a mutual information storage module, a variable node operation module, a check node operation module and an output cache module. The input cache module includes a first initialization module and a second initialization module. The mutual information storage module includes a first mutual information storage module and a second mutual information storage module. The output cache module includes a first output cache module and a second output cache module. The first initialization module is connected to the variable node operation module, the second initialization module is connected to the variable node operation module, the variable node operation module is respectively connected to the first mutual information storage module, the second information mutual storage module, the first output cache module and the second output cache module, and the check node operation module is respectively connected to the first mutual information storage module and the second information mutual storage module; Figure 1 The method also includes a control module, which is used to control each module; wherein the control module is respectively connected to the check node operation module, the first mutual information storage module, the second mutual information storage module, the variable node operation module, the first initialization module, the second initialization module, the first output cache module and the second output cache module. Figure 1 The solid arrows in the middle represent control signal transmission, and the hollow arrows represent data signal transmission.

[0075] Specifically, the input buffer module includes a first initialization module and a second initialization module; the first initialization module is used to receive odd data frames including first data frames and third data frames; the second initialization module is used to receive even data frames including second data frames and fourth data frames.

[0076] like Figure 2 As shown, Figure 2The working conditions of the variable nodes and check nodes in the unbalanced decoder over time; in interleaved decoding, the variable nodes and check nodes decode two frames of data at the same time. If the number of calculation clocks required for a variable node is less than the number of calculation clocks required for a check node and the difference is large, then the following will occur: Figure 2 In the described situation, the number of clocks required for a check node operation on the time axis is much larger than the number of clocks run by the variable node, and the variable node needs to wait for the check node, resulting in a waste of resources. Since the update of LDPC (8176, 7154) code variable nodes generally requires a 5-stage pipeline, it involves 4 clock addition and subtraction operations and 1 clock original code complement code conversion; and its check node update generally requires 10 levels of operations, mainly involving 7 clocks of minimum value and sub-minimum value operations, 1 clock of minimum value and sub-minimum value selection and sign calculation, 1 clock of multiplication correction factor operation and 1 clock of original code complement code conversion operation. Therefore, the present invention transfers the correction factor operation in the check node to the variable node and puts the conversion work between the original code and the complement code in the variable node, thereby reducing the complexity of the check node and balancing the complexity of the variable node and the check node. The effect is as follows. Figure 3 As shown, decoding time is saved.

[0077] like Figure 3 As shown, Figure 3It is a schematic diagram of the working status of variable nodes and check nodes in the LDPC decoder over time; in this embodiment, the first initialization module and the second initialization module respectively represent the input cache of two frames of data frames. When the variable node group obtains data from the input cache module and the mutual information storage module to perform variable node update operation, the confidence information passed by the variable node to the check node is obtained, and the confidence information passed by the variable node to the check node is written back to the mutual information storage module; when the check node group obtains data from the mutual information storage module to perform check node update operation, the confidence information passed by the check node to the variable node is obtained, and the confidence information passed by the check node to the variable node is written back to the mutual information storage module. The specific process is as follows: in the first time slot, the variable node group obtains data from the first initialization module and the first mutual information storage module for calculation, and returns the result of the calculation to the first mutual information storage module; in the second time slot, the variable node group obtains data from the second initialization module and the second mutual information storage module for calculation, and returns the result of the calculation to the second mutual information storage module, and at the same time, the check node group obtains data from the first mutual information storage module for calculation, and writes the result of the calculation back to the first mutual information storage module; in the third time slot, the variable node obtains data from the first initialization module and the first mutual information storage module for calculation, and returns the result of the calculation to the first mutual information storage module, and at the same time, the check node group obtains data from the second mutual information storage module for calculation, and writes the result of the calculation back to the second mutual information storage module; and so on, the variable nodes and the check nodes simultaneously complete the interleaved decoding of two frames of data.

[0078] Specifically, the mutual information storage module includes a first mutual information storage module and a second mutual information storage module; the first mutual information storage module is used to store the odd data frames taken out from the first initialization module in the odd time slots and the confidence information of the check node passed to the variable node taken out from the first mutual information storage module, the confidence information of the variable node passed to the check node obtained after the variable node operation module performs the variable node update operation, and the confidence information of the check node passed to the variable node taken out from the first mutual information storage module in the even time slots; the second mutual information storage module is used to store the even data frames taken out from the second initialization module in the even time slots and the confidence information of the check node passed to the variable node taken out from the second mutual information storage module, the confidence information of the variable node passed to the check node obtained after the variable node operation module performs the variable node update operation, and the confidence information of the check node passed to the variable node taken out from the second mutual information storage module in the odd time slots.

[0079] Specifically, the output cache module includes a first output cache module and a second output cache module; the first output cache module is used to output the decision information obtained after the variable node operation module performs a variable node update operation on the odd data frame including the first data frame and the third data frame; the second output cache module is used to output the decision information obtained after the variable node operation module performs a variable node update operation on the even data frame including the second data frame and the fourth data frame.

[0080] like Figure 4 As shown, Figure 4 A schematic diagram for extracting the minimum value and the second minimum value of the minimum value and the second minimum value module in the verification node operation module; Figure 4 The solid lines in the middle indicate that the output is the minimum value, and the dotted lines indicate that the output is the second minimum value. In this embodiment, the minimum value and second minimum value module is composed of a three-input two-output comparator, a two-input two-output comparator, and a two-input one-output comparator. Among them, 11 three-input two-output comparators compare the input v1, v2, ..., v32, a total of 32 data, that is, the confidence information transmitted by the variable node to the check node, and output the minimum value and the second minimum value therein. Each three-input two-output comparator inputs the minimum value and the second minimum value into the two-input two-output comparator of the next stage for comparison and obtains the minimum value and the second minimum value of the two input data, until the minimum value and the second minimum value of all data are finally compared. Among them, the three-input two-output comparator requires 2 clocks from data input to data output, the two-input two-output comparator requires 1 clock from data input to data output, and the entire minimum value and second minimum value module requires 8 clocks from data input to data output. In addition, four registers, reg1, reg2, reg3 and reg4, are also set in the minimum value and second minimum value module. reg1 represents the minimum value and the second minimum value in the next stage. Figure 4 Add a register level to the path of the two comparators shown in the figure, reg2 means Figure 3 A secondary register is added to the path of the two comparators shown in the figure. reg3 indicates that Figure 3 Add three registers to the path of the two comparators shown in the figure. reg4 indicates that Figure 4 Four register stages are added to the path of the two comparators shown.

[0081] Specifically, the check node operation module includes a minimum value and a second minimum value module; the minimum value and the second minimum value module is used to compare the confidence information transmitted to the check node by multiple variable nodes input by the mutual information storage module and output the minimum value and the second minimum value.

[0082] Specifically, the minimum value and sub-minimum value module includes a three-input and two-output comparator, a two-input and two-output comparator, and a two-input and one-output comparator; the three-input and two-output comparator is used to compare the confidence information of the three sets of input variable nodes passed to the verification node and output the sub-minimum value and the minimum value to the two-input and two-output comparator; the two-input and two-output comparator is used to compare the two sets of sub-minimum values ​​output by the three-input and two-output comparator with the minimum value and output the sub-minimum value and the minimum value to the two-input and one-output comparator; the two-input and one-output comparator is used to compare the two sets of sub-minimum values ​​output by the two-input and two-output comparator with the minimum value and output the minimum value.

[0083] Specifically, the variable node operation module includes a multiplication correction factor module and an original code complement code conversion module; the multiplication correction factor module is used to correct the confidence information transmitted by the check node transmitted by the mutual information storage module to the variable node when the variable node operation module performs variable node update operation, so as to obtain the confidence information transmitted by the check node to the variable node; the original code complement code conversion module converts the confidence information transmitted by the check node to the variable node in the multiplication correction factor module between the original code and the complement code, so as to obtain the converted complement code.

[0084] In this embodiment, the conversion between the original code and the complement code of the variable node and the check node in the LDPC decoder is designed into the variable node operation module. Since the variable nodes in the decoder perform addition and subtraction operations and the complement code is suitable for addition and subtraction operations, the variable nodes generally use the complement code for operation; and the check node performs sign finding and comparison operations and the original code is suitable for comparison and sign finding operations, so the check node generally uses the original code for operation. Therefore, when the variable node and the check node exchange information, the complement code needs to be converted from the variable node to the check node to the original code, and the original code needs to be converted from the check node to the variable node. However, the existing LDPC decoders all place the complement code to the original code conversion in the variable node, and the original code to the complement code conversion in the check node, which causes the variable node pipeline level to be less than the check node pipeline level, thereby making the water flow level between the variable node and the check node unbalanced. Therefore, in order to balance the water flow levels between the variable nodes and the check nodes, the present invention places the conversion between the original code and the complement code in the variable node, that is, the original code is stored in the mutual information storage module, and the data is taken out from the mutual information storage module before the variable node update operation starts, and the complement code is converted into the original code and written into the mutual information storage module after the variable node update operation is completed.

[0085] In addition, the present invention also converts the operation of multiplying the correction factor that originally belongs to the check node update into the variable node operation module in the LDPC decoder, thereby balancing the complexity of the variable node update and the check node update.

[0086] like Figure 5As shown, Figure 5 Schematic diagram of the iterative process of variable nodes and check nodes of the LDPC decoder; in this embodiment, the number of clocks required for updating the variable node operation module once is changed from 5 clocks, including four clock addition and subtraction operations and one clock of complement code conversion operation, to 7 clocks, that is, one clock of correction factor operation is added and one clock of original code conversion operation is performed in the original code complement code conversion module.

[0087] In this embodiment, the number of one-iteration clocks and throughput of three decoders are compared to verify that the decoder proposed in the present invention has a higher throughput, and the results are shown in Table 1:

[0088] Table 1 Comparison of the number of clocks per iteration and throughput of three decoders

[0089]

[0090] It can be found from Table 1 that for the common LDPC code with a code length of (8176, 7154), when the rows and columns of the 511*511 small matrix of the check matrix are divided into 73*7, the variable nodes are 112 parallel and the check nodes are 14 parallel. The specific number of clocks required is 250MHz for the working clock frequency and 10 decoding iterations, and the final throughput reaches 800Mbps. When the variable node operation module of the unbalanced decoder is used, 5 clocks are required for one operation and one update, that is, 72+5=77 clocks are required for 73 consecutive operations, and 14 check nodes are required for one operation and one update, that is, 10+72=82 clocks are required for 73 consecutive operations, so 77+82=159 clocks are required for one iteration. Under the condition of 250MHz clock and 10 iterations, the unbalanced throughput is 250M / 159*8160=1.28Gbps. However, the balanced decoder proposed in the present invention uses an interleaving method in decoding, and uses a check node operation module and a variable node operation module to handle the balance, that is, the conversion between the original code and the complement code of the variable node and the check node in the LDPC decoder is designed into the variable node operation module. At this time, the variable node is newly added with a multiplication correction factor module and an original code complement conversion module, so 5+2=7 clocks are required for one operation, and 10-2=8 clocks are required for one check node operation. Therefore, a total of 8+72=80 clocks are required for one iteration, which is 0.503 times the original 161 clocks. When the clock is 250MHz and the number of iterations is 10, the throughput after interleaved decoding and balancing is 250M / 80*8160=2.55Gbps.

[0091] Specifically, the specific process of the variable node update operation is as follows: multiply the confidence information transmitted by the mutual information storage module from the check node to the variable node by a correction factor to obtain the confidence information transmitted by the corrected check node to the variable node; perform original code and complement code conversion on the confidence information transmitted by the corrected check node to the variable node to obtain the converted complement code, and sum it with the confidence information transmitted by the variable node to the check node at the initial moment to obtain the posterior probability of the variable node, and take the sign bit of the posterior probability of the variable node as the highest bit as the decision information; use the posterior probability of the variable node to subtract the confidence information transmitted by the check node to the variable node to obtain the difference, and convert the difference into the original code to obtain the confidence information transmitted by the variable node to the check node.

[0092] Specifically, the judgment information is:

[0093]

[0094] Among them, L(Q i ) represents the posterior probability of the i-th variable node, L(P i ) represents the initial information of the ith channel, that is, the confidence information transmitted by the ith variable node to the check node at the initial moment, C i represents the set of check nodes connected to the i-th variable node, α represents the correction factor, L(r ji ) represents the confidence information passed from the j-th check node to the i-th variable node, Represents the decision information of the i-th variable node.

[0095] like Figure 6 As shown, Figure 6 The variable node update operation process diagram of the variable node processing module; in this embodiment, the input of the variable node processing module is the four check node confidence information 1, check node confidence information 2, check node confidence information 3, check node confidence information 4 obtained by the mutual information storage module and the channel reception information, that is, the confidence information transmitted to the check node by the variable node at the initial moment. First, the four check node confidence information are multiplied by the correction factor to obtain the correction result; then the correction result is converted from the original code to the complement code, and then the four check node confidence information and the confidence information transmitted to the check node by the variable node at the initial moment are added through three-stage pipelines to obtain the posterior probability of the variable node, and then the four check node confidence information are respectively subtracted from the posterior probability of the variable node to obtain four differences, and finally the four differences are converted from the complement code to the original code to complete the variable node update operation. Therefore, after completing the variable node update operation, the check node operation module reduces the multiplication correction factor operation of one clock and the original code conversion operation of one clock, that is, 10 clocks are reduced to 8 clocks.

[0096] An interleaved decoding method of a high-speed LDPC decoder suitable for near-earth satellite communication comprises the following steps S101-S110:

[0097] S101 . Inputting an odd-numbered data frame including a first data frame and a third data frame into a first initialization module, and inputting an even-numbered data frame including a second data frame and a fourth data frame into a second initialization module.

[0098] S102: Initialize the first mutual information storage module using the first data frame in the first initialization module to obtain initialization data of the first mutual information storage module, and preset the number of iterations and set the current number of iterations to 0.

[0099] S103. Input the initialization data of the first mutual information storage module obtained in step S102 into the verification node operation module to perform verification node update operation, obtain the confidence information passed by the verification node to the variable node and transmit it to the first mutual information storage module, and at the same time use the second data frame in the second initialization module to initialize the second mutual information storage module to obtain the initialization data of the second mutual information storage module.

[0100] S104, input the first data frame in the first initialization module and the confidence information of the check node passed to the variable node taken out by the first mutual information storage module in step S103 into the variable node operation module to perform variable node update operation, obtain the confidence information and decision information passed by the variable node to the check node, and transmit the confidence information passed by the variable node to the first mutual information storage module, that is:

[0101]

[0102] Among them, L(q ij ) represents the confidence information passed from the i-th variable node to the j-th check node, L(P i ) represents the initial information of the i-th channel, α represents the correction factor, L(r j′i ) represents the confidence information passed from the j′th check node to the i-th variable node, C i\j Represents the set of variable nodes connected to the i-th variable node except the j-th check node.

[0103] At the same time, the initialization data of the second mutual information storage module is input into the check node operation module to perform check node update operation, the confidence information transmitted by the check node to the variable node is obtained and transmitted to the second mutual information storage module, and the current iteration number is increased by 1.

[0104] S105, input the confidence information of the variable node passed to the check node taken out by the first mutual information storage module in step S104 into the check node operation module to perform check node update operation, obtain the confidence information passed to the variable node by the check node and transmit it to the first mutual information storage module, that is:

[0105]

[0106] Among them, L(r ji ) represents the confidence information passed from the jth check node to the ith variable node, R j\i represents the set of variable nodes connected to the jth check node except the i-th variable node, sgn(·) represents the sign function, L(q i′j ) represents the confidence information passed from the i′th variable node to the jth check node, Indicates finding the minimum value.

[0107] At the same time, the confidence information of the check node passed to the variable node by the second data frame in the second initialization module and the second mutual information storage module in step S104 is input into the variable node operation module to perform variable node update operation, so as to obtain the confidence information and judgment information passed by the variable node to the check node, and transmit the confidence information passed by the variable node to the check node to the second mutual information storage module, and increase the current number of iterations by 1.

[0108] S106. Input the first data frame in the first initialization module and the confidence information passed by the check node to the variable node taken out by the first mutual information storage module in step S105 into the variable node operation module to perform variable node update operation, obtain the confidence information and judgment information passed by the variable node to the check node, and transmit the confidence information passed by the variable node to the check node to the first mutual information storage module.

[0109] At the same time, the confidence information of the variable node passed to the check node taken out by the second mutual information storage module in step S105 is input into the check node operation module to perform check node update operation, the confidence information passed to the variable node by the check node is obtained and transmitted to the second mutual information storage module, and the current number of iterations is increased by 1.

[0110] S107, determine whether the current number of iterations is less than the preset number of iterations, if so, execute step S105, otherwise, execute step S108.

[0111] S108. Input the judgment information obtained in step S106 into the first output cache module, and at the same time input the confidence information of the second data frame in the second initialization module and the check node taken out by the second mutual information storage module in step S106 and passed to the variable node into the variable node operation module to perform variable node update operation, so as to obtain the confidence information and judgment information passed by the variable node to the check node.

[0112] S109: Input the decision information obtained in step S108 into the second output buffer module.

[0113] S110, the first output module and the second output module respectively output the obtained decision information, and the decoding ends.

[0114] In this embodiment, an interleaved decoding method for a high-speed LDPC decoder suitable for near-earth satellite communication is proposed. The normalized minimum sum decoding algorithm is improved to adapt to the interleaved decoding of the LDPC decoder proposed in the present invention. The specific process is as follows: let the codeword c with a code length of n = [c1c2…c n ] is the encoded sequence, where c1 represents the first encoded sequence, c2 represents the second encoded sequence, and c n represents the nth coded sequence; the coded sequence is modulated into a bipolar signal x=[x1x2…x n ], x i ∈{-1,+1} and the channel model adopts the additive white Gaussian noise (AWGN) channel, where x1 represents the first modulated sequence, x2 represents the second modulated sequence, and x n represents the nth modulated sequence; the received information after passing through the channel is y = [y1y2…y n ], where y1 represents the first received information, y2 represents the second received information, and y n Indicates the nth received information, and y i =x i +n i ,y i Indicates the i-th received information, n i It means that the mean is 0 and the variance is σ 2 The i-th Gaussian white noise sequence is decoded by a high-speed LDPC decoder. The codeword obtained after decoding is In addition, the initial information calculation formula of the channel is: Among them, L (0) )q ij) represents the confidence information passed from the i-th variable node to the j-th check node at the 0th iteration, L(P i ) represents the initial information of the ith channel, that is, the confidence information transmitted by the ith variable node to the check node at the initial moment, y i represents the i-th information received after passing through the channel, σ represents the standard deviation of the Gaussian white noise sequence, P i (0) represents the posterior probability of judging the variable node to be 0 based on the initial information received from the i-th channel, P i (1) represents the posterior probability of judging the variable node to be 1 based on the initial information received from the i-th channel, P i (x i =1|y i ) represents the i-th information y received from the initial information of the i-th channel i Determine the i-th variable node x i The posterior probability of 1, P i (x i =-1|y i ) represents the i-th information y received from the initial information of the i-th channel i Determine the i-th variable node x i is the posterior probability of -1, and ln(·) represents the logarithmic function.

[0115] The high-speed LDPC decoder and interleaved decoding method suitable for near-earth satellite communication proposed in the present invention achieve nearly twice the decoding throughput compared with a decoder without an interleaved method, while only increasing information storage resources without increasing computing resources, thereby saving costs. At the same time, the present invention designs the conversion between the original code and the complement code of the variable nodes and the check nodes in the LDPC decoder and the operation of multiplying the correction factor into the variable node operation module, thereby balancing the complexity of the variable nodes and the check nodes. In addition, compared with a dual-core decoder, when the LDPC decoder circuit proposed in the present invention is used to perform the same decoding amount, less computing resources can be consumed, i.e., resources are saved. Finally, compared with an ordinary single-core decoder, when the LDPC decoder circuit proposed in the present invention is used to perform the same decoding amount, less time is consumed, thereby improving the decoding speed.

[0116] The present invention is applicable to the hardware structure optimization of a high-rate LDPC code decoder, because high-rate LDPC codes are usually accompanied by a problem of a high ratio of row weight to column weight. The method transfers part of the logic that should belong to the check node to the variable node for processing, optimizes the commonly used partial parallel decoding structure, thereby reducing the complexity imbalance between the check node operation unit and the variable node operation unit when decoding the high-rate LDPC code, and improves the clock performance of the decoder, making the high-rate LDPC code more suitable for the interleaved decoding method.

[0117] The present invention uses specific embodiments to illustrate the principles and implementation methods of the present invention. The description of the above embodiments is only used to help understand the method of the present invention and its core idea. At the same time, for those skilled in the art, according to the idea of ​​the present invention, there will be changes in the specific implementation methods and application scope. In summary, the content of this specification should not be understood as a limitation on the present invention.

[0118] Those skilled in the art will appreciate that the embodiments described herein are intended to help readers understand the principles of the present invention, and should be understood that the protection scope of the present invention is not limited to such specific statements and embodiments. Those skilled in the art can make various other specific variations and combinations that do not deviate from the essence of the present invention based on the technical revelations disclosed by the present invention, and these variations and combinations are still within the protection scope of the present invention.

Claims

1. An interleaved decoding method of a high-speed LDPC decoder suitable for near-earth satellite communication, the high-speed LDPC decoder comprising: An input buffer module, used for receiving data frames; A mutual information storage module, used to store the confidence information transmitted from the variable node to the check node and the confidence information transmitted from the check node to the variable node; The variable node operation module is used to perform variable node update operation according to the data frame transmitted by the input cache module and the confidence information transmitted by the check node to the variable node in the mutual information storage module, obtain the confidence information and decision information transmitted by the variable node to the check node, transmit the confidence information transmitted by the variable node to the mutual information storage module, and transmit the decision information to the output cache module; A check node operation module, used to perform check node update operation according to the confidence information transmitted from the variable node to the check node in the mutual information storage module, obtain the confidence information transmitted from the check node to the variable node, and transmit the confidence information transmitted from the check node to the variable node to the mutual information storage module; An output cache module is used to output the decision information obtained by the variable node operation module; The input cache module includes a first initialization module and a second initialization module; A first initialization module, configured to receive an odd-numbered data frame including a first data frame and a third data frame; A second initialization module, used for receiving an even-numbered data frame including a second data frame and a fourth data frame; The mutual information storage module includes a first mutual information storage module and a second mutual information storage module; A first mutual information storage module is used to store the odd data frames taken out from the first initialization module in the odd time slots and the confidence information of the check nodes taken out from the first mutual information storage module and passed to the variable nodes, the confidence information of the variable nodes passed to the check nodes obtained after the variable node operation module performs the variable node update operation, and store the confidence information of the variable nodes taken out from the first mutual information storage module and passed to the check nodes in the even time slots, the confidence information of the check nodes passed to the variable nodes obtained after the check node operation module performs the check node update operation; A second mutual information storage module is used to store the even data frames taken out from the second initialization module in the even time slots and the confidence information of the check nodes taken out from the second mutual information storage module and passed to the variable nodes, the confidence information of the variable nodes passed to the check nodes obtained after the variable node operation module performs the variable node update operation, and store the confidence information of the variable nodes taken out from the second mutual information storage module and passed to the check nodes in the odd time slots, the confidence information of the check nodes passed to the variable nodes obtained after the check node operation module performs the check node update operation; The output cache module includes a first output cache module and a second output cache module; A first output buffer module, used for outputting the decision information obtained after the variable node operation module performs the variable node update operation on the odd-numbered data frames including the first data frame and the third data frame; A second output buffer module, used for outputting the decision information obtained after the variable node operation module performs the variable node update operation on the even-numbered data frames including the second data frame and the fourth data frame; The check node operation module includes a minimum value and a second minimum value module; A minimum value and a second minimum value module is used to compare the confidence information transmitted to the verification node by multiple variable nodes input by the mutual information storage module and output the minimum value and the second minimum value; The minimum value and second minimum value module includes a three-input and two-output comparator, a two-input and two-output comparator, and a two-input and one-output comparator; A three-input two-output comparator is used to compare the confidence information transmitted from the three sets of input variable nodes to the check node and output the second minimum value and the minimum value to the two-input two-output comparator; A two-input two-output comparator is used to compare the two groups of sub-minimum values ​​and minimum values ​​output by the three-input two-output comparator and output the sub-minimum value and the minimum value to the two-input one-output comparator; A two-input one-output comparator, used for comparing two groups of sub-minimum values ​​and a minimum value output by the two-input two-output comparator and outputting the minimum value; The variable node operation module includes a multiplication correction factor module and an original code complement code conversion module; The multiplication correction factor module is used to correct the confidence information transmitted from the check node to the variable node by the mutual information storage module when the variable node operation module performs the variable node update operation, so as to obtain the corrected confidence information transmitted from the check node to the variable node; The original code complement code conversion module converts the confidence information transmitted from the check node corrected in the multiplication correction factor module to the variable node between the original code and the complement code to obtain the converted complement code; The specific process of the variable node update operation is as follows: Multiply the confidence information transmitted by the check node to the variable node by the correction factor to obtain the corrected confidence information transmitted by the check node to the variable node; The confidence information passed by the modified check node to the variable node is converted into the original code and the complement code to obtain the converted complement code, and the confidence information passed by the variable node to the check node at the initial moment is summed to obtain the posterior probability of the variable node. The sign bit of the posterior probability of the variable node is taken as the highest bit as the decision information; The confidence information passed from the check node to the variable node is subtracted from the posterior probability of the variable node to obtain the difference, and the difference is converted into the original code to obtain the confidence information passed from the variable node to the check node; The judgment information is: Among them, L(Q i ) represents the posterior probability of the i-th variable node, L(P i ) represents the initial information of the ith channel, that is, the confidence information transmitted by the ith variable node to the check node at the initial moment, C i represents the set of check nodes connected to the i-th variable node, α represents the correction factor, L(r ji ) represents the confidence information passed from the j-th check node to the i-th variable node, Represents the decision information of the i-th variable node, characterized by comprising the following steps: S101, inputting an odd-numbered data frame including a first data frame and a third data frame into a first initialization module, and inputting an even-numbered data frame including a second data frame and a fourth data frame into a second initialization module; S102, using the first data frame in the first initialization module to initialize the first mutual information storage module, obtain initialization data of the first mutual information storage module, and preset the number of iterations and the current number of iterations is 0; S103, inputting the initialization data of the first mutual information storage module obtained in step S102 into the check node operation module to perform check node update operation, obtaining the confidence information transmitted by the check node to the variable node and transmitting it to the first mutual information storage module, and at the same time initializing the second mutual information storage module using the second data frame in the second initialization module to obtain the initialization data of the second mutual information storage module; S104, input the first data frame in the first initialization module and the confidence information of the check node passed to the variable node taken out by the first mutual information storage module in step S103 into the variable node operation module to perform variable node update operation, obtain the confidence information and decision information passed by the variable node to the check node, and transmit the confidence information passed by the variable node to the first mutual information storage module, that is: Among them, L(q ij ) represents the confidence information passed from the i-th variable node to the j-th check node, L(P i ) represents the initial information of the i-th channel, α represents the correction factor, L(r j′i ) represents the confidence information passed from the j′th check node to the i-th variable node, C i\j represents the set of variable nodes connected to the i-th variable node except the j-th check node; At the same time, the initialization data of the second mutual information storage module is input into the check node operation module to perform check node update operation, obtain the confidence information transmitted by the check node to the variable node and transmit it to the second mutual information storage module, and increase the current iteration number by 1; S105, input the confidence information of the variable node passed to the check node taken out by the first mutual information storage module in step S104 into the check node operation module to perform check node update operation, obtain the confidence information passed to the variable node by the check node and transmit it to the first mutual information storage module, that is: Among them, L(r ji ) represents the confidence information passed from the jth check node to the ith variable node, R j\i represents the set of variable nodes connected to the jth check node except the i-th variable node, sgn(·) represents the sign function, L(q i′j ) represents the confidence information passed from the i′th variable node to the jth check node, Indicates finding the minimum value; At the same time, the second data frame in the second initialization module and the confidence information of the check node passed to the variable node taken out by the second mutual information storage module in step S104 are input into the variable node operation module to perform variable node update operation, so as to obtain the confidence information and decision information of the variable node passed to the check node, and transmit the confidence information of the variable node passed to the check node to the second mutual information storage module, and increase the current iteration number by 1; S106, inputting the first data frame in the first initialization module and the confidence information of the check node transmitted to the variable node taken out by the first mutual information storage module in step S105 into the variable node operation module to perform variable node update operation, obtaining the confidence information and decision information transmitted by the variable node to the check node, and transmitting the confidence information transmitted by the variable node to the check node to the first mutual information storage module; At the same time, the confidence information of the variable node passed to the check node taken out by the second mutual information storage module in step S105 is input into the check node operation module to perform check node update operation, so as to obtain the confidence information passed to the variable node by the check node and transmit it to the second mutual information storage module, and the current iteration number is increased by 1; S107, determining whether the current number of iterations is less than the preset number of iterations, if so, executing step S105, otherwise, executing step S108; S108, inputting the decision information obtained in step S106 into the first output buffer module, and at the same time inputting the confidence information of the check node passed to the variable node taken out by the second data frame in the second initialization module and the second mutual information storage module in step S106 into the variable node operation module to perform variable node update operation, so as to obtain the confidence information and decision information passed by the variable node to the check node; S109, inputting the decision information obtained in step S108 into the second output buffer module; S110, the first output module and the second output module respectively output the obtained decision information, and the decoding ends.

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