A method for preparing a piezoelectric MEMS transducer based on three photolithography plates to solve the problem of electrode short circuit
By using three photolithography plates in the preparation of piezoelectric MEMS transducers, the electrode exposure step is simplified, the electrode short circuit problem is solved, the yield and production efficiency are improved, and the process complexity is reduced.
Patent Information
- Application Number
- CN202410440861.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2024-04-12
- Publication Date
- 2024-12-24
- Estimated Expiration
- 2044-04-12
AI Technical Summary
During the micro-machining process of existing piezoelectric MEMS transducers often have problems with upper and lower electrode short circuits, resulting in high waste rate, complex process steps and high error rate. The existing technology uses 6 photolithography plates, which increases the accuracy requirements and complexity. sex.
Using the preparation method of three photolithography plates, the lower electrode layer, the piezoelectric thin film layer and the upper electrode layer are prepared in sequence on the silicon wafer, and the insulating layer and gold plating are grown on the upper and lower surfaces respectively, and two rounds of lithography steps are exposed. Electrodes reduce short circuit risk and simplify process flow.
It effectively avoids electrode short circuit problems, improves yield, simplifies process flow, reduces time cost and process difficulty, and improves production efficiency and yield.
Smart Images
Figure CN118317681B_ABST
Abstract
Description
Technical Field
[0001] This patent belongs to the field of semiconductor MEMS chip manufacturing, and specifically involves a method for preparing a piezoelectric MEMS transducer based on three photolithography plates to solve the electrode short circuit problem. Background Art
[0002] MEMS (Micro Electro Mechanical Systems) is a micro-electromechanical system with a shell size of centimeters or even millimeters and an internal structure size of micrometers or even nanometers. It has the outstanding advantages of small size, light weight, low energy consumption, high performance, and easy integration. It is an irreplaceable key core component of various smart sensor chips in the world today. Piezoelectric MEMS chips have been widely used in medical imaging PMUT (color Doppler ultrasound head) in the field of modern medical detection, piezoelectric MEMS underwater acoustic sensors (sonar) in the military field, and piezoelectric ultrasonic stress sensors (acoustic emission sensors) in the field of building health monitoring.
[0003] Existing piezoelectric MEMS transducers generally have the following prominent problems: (1) Short circuit between upper and lower electrodes. The upper and lower electrodes are generally designed on the same side of the wafer. During the MEMS micromachining process, the upper and lower electrodes are only micrometers apart, and they also need to be wired in the same direction. In actual operation, the risk of short circuit cannot be avoided, and the scrap rate is relatively high; (2) The process steps are complicated. The existing technology often uses 6 photolithography plates. The more photolithography steps there are, the higher the precision requirements for micromachining. The steps are complicated and the error rate is high. Three-quarters of the total scrap is caused by electrode short circuit problems. Summary of the invention
[0004] In order to solve the above problems, the present invention discloses a method for preparing a piezoelectric MEMS transducer based on three photolithography plates to solve the problem of electrode short circuit.
[0005] The present invention is achieved through the following technical solutions:
[0006] A method for preparing a piezoelectric MEMS transducer based on three photolithography plates to solve the problem of electrode short circuit, comprising the following steps:
[0007] (1) On the upper surface of the silicon wafer, a lower electrode layer, a piezoelectric film layer and an upper electrode layer are prepared in sequence from bottom to top;
[0008] (2) growing an insulating layer on the lower surface of the silicon wafer;
[0009] (3) Using a photomask to perform the first round of photolithography on the upper and lower surfaces of the silicon wafer to expose the upper and lower electrodes;
[0010] (4) growing Au on the upper and lower surfaces of the silicon wafer, respectively, plating them on the upper electrode surface and the lower electrode surface, and leading the patterned upper and lower electrodes out of the Au on the upper and lower surfaces of the silicon wafer, respectively;
[0011] (5) A second round of photolithography is performed on the upper and lower surfaces of the silicon wafer using a photoresist. The upper surface is etched to the piezoelectric film layer, and the lower surface is etched to the lower electrode layer.
[0012] Furthermore, in step (1), a piezoelectric thin film layer is prepared on the upper surface of a silicon wafer by magnetron sputtering or evaporation growth.
[0013] Furthermore, step (2) also includes growing an insulating layer on the upper surface of the upper electrode layer.
[0014] Furthermore, the method of the first round of photolithography in step (3) is: using the ICP process to etch the insulating layer on the upper surface of the silicon wafer to expose the upper electrode; then using the Rapier process to etch the lower surface of the silicon wafer to form a back cavity at a position corresponding to the upper surface pattern to expose the lower electrode.
[0015] Furthermore, in step (4), Au is grown by magnetron sputtering or evaporation growth.
[0016] Furthermore, in step (5), the second round of photolithography is performed by using a photolithography plate to perform photolithography on the upper surface of the silicon wafer, etching Au with chloride ions and etching Pt with argon ions by IBE process, etching to the piezoelectric film layer, and the patterned upper electrode is located in the central area of the piezoelectric film to collect the central charge of the piezoelectric film; using another photolithography plate to perform photolithography on the lower surface of the silicon wafer, etching Au with chloride ions, and etching to the lower electrode layer, and the etched Au is located at the edge of the lower electrode to collect the charge at the edge of the piezoelectric film.
[0017] Beneficial Effects
[0018] The present invention arranges the leads of the upper and lower electrodes on the upper and lower surfaces of the silicon wafer respectively, thereby fundamentally avoiding the problem of device short circuit and greatly improving the yield rate.
[0019] The present invention uses only three photolithography plates to perform the photolithography process, and the entire process flow is simple and efficient, which reduces time cost and process difficulty and improves production efficiency and yield rate. BRIEF DESCRIPTION OF THE DRAWINGS
[0020] In order to more clearly illustrate the specific implementation methods of the present invention or the technical solutions in the prior art, the drawings required for use in the specific implementation methods or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are some implementation methods of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.
[0021] Figure 1 It is a schematic diagram of the piezoelectric film layer, the upper and lower electrode layers, and the insulating layer;
[0022] Figure 2 This is a schematic diagram of the first round of photolithography;
[0023] Figure 3 Schematic diagram of Au growth by magnetron sputtering or evaporation;
[0024] Figure 4 This is a schematic diagram of the second round of photolithography;
[0025] Figure 5 This is a schematic diagram after the entire process is completed. DETAILED DESCRIPTION
[0026] The following is a detailed description of an embodiment of the present invention. This embodiment is implemented on the premise of the technical solution of the present invention, and a detailed implementation method and a specific operation process are given, but the protection scope of the present invention is not limited to the following embodiment.
[0027] A method for preparing a piezoelectric MEMS transducer based on three photolithography plates to solve the problem of electrode short circuit, comprising the following steps:
[0028] (1) Preparing a lower electrode layer, a piezoelectric film layer and an upper electrode layer in sequence from bottom to top on the upper surface of a silicon wafer;
[0029] (2) growing an insulating layer on the lower surface of the silicon wafer;
[0030] (3) Using a photomask to perform the first round of photolithography on the upper and lower surfaces of the silicon wafer to expose the upper and lower electrodes;
[0031] (4) Growing Au on the upper and lower surfaces of the silicon wafer respectively, and plating it on the upper electrode surface and the lower electrode surface;
[0032] (5) A second round of photolithography is performed on the upper and lower surfaces of the silicon wafer using a photoresist. The upper surface is etched to the piezoelectric film layer, and the lower surface is etched to the lower electrode layer.
[0033] In some embodiments, the thickness of the silicon wafer is 150-350 μm.
[0034] In some embodiments, step (1) prepares a piezoelectric film layer on the upper surface of a silicon wafer by magnetron sputtering or evaporation growth. The piezoelectric film is AlN (aluminum nitride), AlScN (aluminum scandium nitride), BFO (bismuth ferrite) or KNN (potassium sodium niobate), etc., with a thickness of 100-1000nm. Both the upper electrode and the lower electrode can be selected from high conductivity metals such as Ti or Pt, with a layer thickness of 50-500nm.
[0035] In some embodiments, the insulating layer is aluminum oxide or silicon dioxide, and the layer thickness is 50-500 nm. Step (2) also includes growing an insulating layer on the upper surface of the upper electrode layer. When growing the insulating layer, the upper surface can be made first, or the lower surface can be made first, or the insulating layer on the upper surface of the upper electrode layer can be omitted.
[0036] In some embodiments, in the first round of photolithography in step (3), the photoresist 1 is used to etch the upper and lower surfaces of the silicon wafer respectively, and the insulating layer on the upper surface of the silicon wafer is etched using the ICP process to expose the upper electrode; then the lower surface of the silicon wafer is etched using the Rapier process to form a back cavity at a position corresponding to the upper surface pattern, exposing the lower electrode. The Rapier process is a deep silicon etching process that performs high aspect ratio etching of silicon.
[0037] In some embodiments, the Au is grown in step (4) by magnetron sputtering or evaporation growth, and the layer thickness is 50-500 nm.
[0038] In some embodiments, in step (5), the second round of photolithography is as follows: using photolithography plate 2, photolithography is performed on the upper surface of the silicon wafer, Au is etched by chloride ions, and Pt is etched by argon ion IBE process, and the etching is performed to the piezoelectric film layer, which is used for subsequent use to collect the central charge of the piezoelectric film; using photolithography plate 3, photolithography is performed on the lower surface of the silicon wafer, Au is etched by chloride ions, and the etching is performed to the lower electrode layer, which is used for subsequent use to collect the edge charge of the piezoelectric film.
[0039] The shape of the film and back cavity: generally circular, but can also be square, polygonal, etc.
[0040] The following is combined with Figure 1-Figure 5 The present invention is further described in detail by specific examples and comparative examples.
[0041] Example 1
[0042] A method for preparing a piezoelectric MEMS transducer based on three photolithography plates to solve the problem of electrode short circuit, comprising the following steps:
[0043] (1) Process preparation
[0044] 1. Equipment preparation: photolithography machine, magnetron sputtering machine, glue coating machine, glue developing machine, laser marking machine, RCA cleaning machine, oxidation diffusion furnace, Denton sputtering table, wire bonding machine, four-probe table, semiconductor analyzer, etc.
[0045] 2. Raw materials preparation:
[0046] 6-inch silicon wafer, thickness Si (350μm);
[0047] 3. Testing equipment: MX61 microscope, step meter, film thickness meter, etc.
[0048] (2) Process steps
[0049] A method for preparing a piezoelectric MEMS transducer based on three photolithography plates to solve the problem of electrode short circuit, comprising the following steps:
[0050] 1. On a silicon (350 μm thick) substrate, prepare the lower electrode layer (Ti / Pt thickness 100 nm / 400 nm respectively), the magnetron sputtering piezoelectric film layer (BFO thickness 750 nm) and the upper electrode layer (Ti / Pt thickness 100 nm / 400 nm respectively) from bottom to top;
[0051] 2. Use the common thermal oxidation method or chemical vapor deposition method or physical vapor deposition method to grow an insulating layer (Al2O3 thickness 100nm) on the upper and lower surfaces of the silicon wafer respectively;
[0052] 3. Using photolithography plate 1, perform the first round of photolithography on the upper surface and lower surface of the silicon wafer respectively, use ICP process to etch the insulating layer on the upper surface of the silicon wafer to expose the upper electrode, and then use Rapier process to etch the silicon on the lower surface of the silicon wafer to form a back cavity at the position corresponding to the upper surface pattern to expose the lower electrode;
[0053] 4. Magnetron sputtering Au on the upper and lower surfaces of the silicon wafer respectively, so that Au grows completely on the upper and lower electrodes and achieves a coverage thickness of 50nm on the wafer surface;
[0054] 5. Using photomask 2, perform a second round of photolithography on the upper and lower surfaces of the silicon wafer respectively. Perform chloride ion etching of Au on the upper surface and argon ion IBE process to etch Pt until the piezoelectric film layer is reached. The purpose is that in subsequent use, the upper electrode collects the central charge of the piezoelectric film. Using photomask 3, perform photolithography on the lower surface and perform chloride ion etching of Au until the lower electrode layer is reached. The purpose is that in subsequent use, the lower electrode collects the edge charge of the piezoelectric film.
[0055] Figure 5 The dotted line in the middle indicates the "dicing road", and completely identical MEMS chips will be manufactured simultaneously on a wafer on a large scale.
[0056] Comparative Example 1
[0057] The difference from Example 1 is that the upper electrode and the lower electrode are located on the same side of the wafer, and the other steps are the same.
[0058] The scrap rates during the preparation of Example 1 and Comparative Example 1 were statistically analyzed, as shown in Table 1.
[0059] Table 1 is the scrap rate statistics
[0060]
[0061] A four-probe station is used in conjunction with a semiconductor analyzer. Under a microscope, two probes are operated to touch the upper and lower electrodes of each device respectively. The resistance value displayed by the semiconductor analyzer is observed. If it is ≤1Ω, it means that it is short-circuited (the resistance of the piezoelectric MEMS device is at least ≥1×10 3 Ω), the device is considered scrap and cannot be repaired.
[0062] Obviously, those skilled in the art can make various changes and modifications to the present invention without departing from the spirit and scope of the invention.
Claims
1. A method for preparing a piezoelectric MEMS transducer based on three photolithography plates to solve the problem of electrode short circuit, characterized in that: The following steps are involved: (1) On the upper surface of the silicon wafer, a lower electrode layer, a piezoelectric film layer and an upper electrode layer are prepared in sequence from bottom to top; (2) growing an insulating layer on the lower surface of the silicon wafer; and growing an insulating layer on the surface of the upper electrode layer; (3) Using a photomask to perform the first round of photolithography on the upper and lower surfaces of the silicon wafer to expose the upper and lower electrodes; (4) Growing Au on the upper and lower surfaces of the silicon wafer respectively, and plating it on the upper electrode surface and the lower electrode surface; (5) Using a photoresist plate, a second round of photolithography is performed on the upper and lower surfaces of the silicon wafer, respectively, wherein the upper surface is etched to the piezoelectric film layer, and the lower surface is etched to the lower electrode layer; The method of the first round of photolithography in step (3) is: using the ICP process to etch the insulating layer on the upper surface of the silicon wafer to expose the upper electrode; then using the Rapier process to etch the lower surface of the silicon wafer to form a back cavity at a position corresponding to the upper surface pattern to expose the lower electrode; the Rapier process is a deep silicon etching process for etching silicon with a high aspect ratio; In step (5), the second round of photolithography is performed by using a photolithography plate to perform photolithography on the upper surface of the silicon wafer, etching Au with chloride ions until the piezoelectric film layer is reached, and the patterned upper electrode is located in the central region of the piezoelectric film, and the etched Au collects the central charge of the piezoelectric film through the patterned upper electrode; Another photomask is used to perform photolithography on the lower surface of the silicon wafer, and Au is etched by chloride ions until it reaches the lower electrode layer. The etched Au is located at the edge of the lower electrode, collecting the charge at the edge of the piezoelectric film.
2. According to claim 1, a method for preparing a piezoelectric MEMS transducer based on three photolithography plates to solve the electrode short circuit problem is characterized in that: Step (1) prepares a piezoelectric thin film layer on the upper surface of a silicon wafer by magnetron sputtering or evaporation growth.
3. The method for preparing a piezoelectric MEMS transducer based on three photolithography plates to solve the electrode short circuit problem according to claim 1, characterized in that: In step (4), Au is grown by magnetron sputtering or evaporation growth.