Chip thermal analysis method and system based on Fourier series expansion

Abstract

This invention provides a chip thermal analysis method and system based on Fourier series expansion. The method includes: obtaining a chip region distribution dataset, a power consumption distribution dataset, and a verification dataset; calculating the temperature of each region of the chip; using a pre-built implementation tool, deriving a theoretical calculation formula based on the power consumption and temperature governing equation, boundary conditions, and the power consumption distribution and module coordinate relationship function f(x,y); comparing the theoretical calculation formula with the finite element simulation results to determine the accuracy of the theoretical calculation formula, comparing numerical integration methods and analytical methods, and obtaining the algorithm's running accuracy and speed judgment results. This invention solves the technical problems of low chip thermal analysis speed and accuracy, and slow temperature solution speed.

Description

Technical Field

[0001] This invention relates to the field of chip analysis technology, and more specifically to a chip thermal analysis method and system based on Fourier series expansion. Background Technology

[0002] As chip manufacturing continues to miniaturize, temperature has become one of the main limiting factors in designing high-performance processors. Due to the increasing integration density of chips, different functional units generate different amounts of heat, potentially leading to high-temperature hotspots within the chip. These hotspots can induce changes in carrier mobility, accelerate electrical breakdown, and cause secondary effects in transistors, such as alterations in MOSFET threshold voltage and parasitic parameters.

[0003] In chip thermal analysis, speed and accuracy are two crucial metrics. Chip thermal analysis requires solving thermal equations, which can be achieved through three methods: numerical methods, analytical methods, and machine methods. Numerical methods are further divided into the finite element method (FEM) and the finite difference method (FDM). The FDM creates a set of recursive equations on a given line segment, then applies appropriate boundary conditions and solves the equations using standard techniques from linear algebra. The FEM divides a given model into many small elements, approximating the original equations for each element using an approximation function. Boundary conditions are then applied to derive the equations, which are then solved to obtain the temperature values ​​for all elements. For example, the existing invention patent application document CN115541053A, entitled "A Thermal Field Reconstruction Method for a 2.5D Chiplet Heterogeneous Integrated Chip," includes the following steps: analyzing the structure of the 2.5D Chiplet heterogeneous integrated chip to obtain information such as size, material, and location distribution; secondly, establishing a local finite element model of the high-power bare die to obtain the simulated temperature distribution of the high-power bare die; thirdly, arranging temperature sensors and obtaining temperature monitoring values; next, processing the obtained simulated temperature values ​​and temperature monitoring values; then establishing a thermal field data matrix; and finally, obtaining the reconstructed thermal field distribution of the 2.5D Chiplet heterogeneous integrated chip according to the matrix filling algorithm. Machine learning methods train a model using a set of power curves and corresponding temperature curves, and then use this model to predict other temperature distribution curves. For example, the existing invention patent application CN114896920A, titled "A Method for Establishing a Three-Dimensional Stacked Chip Thermal Simulation Model and Predicting Hot Spot Temperatures," inputs the relevant geometric configuration information and thermal property parameters of the 3D chip into finite element software to draw the 3D chip model; sets the effective thermal conductivity of each part of the 3D chip model; places the 3D chip model in a cooling fluid environment; and sets relevant simulation parameters. Simulation calculations are then performed using finite element software to obtain the temperature distribution and hot spot temperature information of the 3D chip model under ambient temperature and convective heat transfer cooling conditions. The analytical method based on Green's function obtains the temperature curve by calculating the impulse response of a unit power source, and then integrates the temperature curve with the power distribution function to obtain the final temperature curve. However, the aforementioned prior art has the following drawbacks:

[0004] First, although the finite element method offers high accuracy, it requires several minutes or even hours of computation time, so it is generally only used to verify newly proposed technologies.

[0005] Second, the Green function method has a significantly improved computation speed, but the Green function is difficult to obtain in practical applications. If the computation efficiency of the Green function is improved by relaxing the boundary conditions, it will also lead to a large deviation in the temperature estimation of the chip boundary.

[0006] Third, machine learning methods can only solve a limited number of problems so far, and their application scope is not wide.

[0007] In summary, existing technologies suffer from low chip thermal analysis rate and accuracy, and slow temperature calculation speed. Summary of the Invention

[0008] The technical problem to be solved by this invention is: how to solve the technical problems of low chip thermal analysis rate and accuracy and slow temperature solution speed in the prior art.

[0009] This invention solves the above-mentioned technical problems by employing the following technical solution: a chip thermal analysis method based on Fourier series expansion, comprising:

[0010] S1. Obtain the chip region distribution dataset, power consumption distribution dataset, and verification dataset;

[0011] S2. Divide the chip region distribution dataset into no less than two module regions. Determine the power consumption and temperature governing equations and boundary conditions accordingly. Based on the boundary conditions and temperature function T(x,y), process to obtain the final temperature distribution result T(x,y). Using the separation of variables method, expand the power consumption distribution and module coordinate relationship function f(x,y) to obtain the analytical expression. Import the module region and power consumption data. Based on the analytical expression, set the parameter cutoff value, perform filtering and sorting operations on the module regions, process to obtain the differential equation, and solve to obtain the general solution and particular solution. Determine and determine the coefficients c1 and c2 according to the boundary conditions, obtain the final solution of the power consumption and temperature governing equations, and calculate the temperature of each region of the chip.

[0012] S3. Using the preset implementation tools, the theoretical calculation formula is derived based on the power consumption and temperature generalized equation, boundary conditions, power consumption distribution and module coordinate relationship function f(x,y).

[0013] S4. Substitute the general solution and the particular solution into the preset temperature function to compare with the finite element simulation results, determine the calculation accuracy of the theoretical calculation formula, compare the numerical integration method and the analytical method, and obtain the algorithm running accuracy and speed judgment results.

[0014] This invention uses analytical methods to derive the theoretical general solution and particular solution of the partial differential heat transfer equation, thereby accelerating the rate of thermal analysis.

[0015] In a more specific technical solution, step S2 includes:

[0016] S21. Based on the chip region dataset, divide the chip under test into several different module regions and name each module region.

[0017] S22. List the governing equations for power consumption and temperature, and the boundary conditions;

[0018] S23. Based on the boundary conditions, perform a separation of variables operation on the temperature function T(x,y), and separate u...n (y) is substituted into the power consumption and temperature governing equation and iterated to obtain and accumulate the function values, thereby obtaining the final temperature distribution result T(x, y);

[0019] S24. Using the method of separation of variables, expand the function f(x, y) relating power consumption distribution and module coordinates, and substitute the expansion result into the power consumption and temperature governing equations to convert the power consumption and temperature governing equations into differential equations, and then solve them to obtain the general solution and particular solution.

[0020] S25. Determine and determine the general solution coefficients c1 and c2 based on the boundary conditions, and obtain the final solution of the power consumption and temperature governing equation.

[0021] S26. Determine particular solutions v1(y) and v2(y); for different function values ​​n, obtain f n Substituting the (y) value into the particular solution expression, integrating on the y-axis and accumulating, we obtain the final values ​​v1(y) and v2(y) to obtain the temperature of each region of the chip.

[0022] In a more specific technical solution, step S22 uses the following logic to list the power consumption and temperature generalized equations and boundary conditions:

[0023]

[0024]

[0025]

[0026] In the formula, T(x, y) represents the final temperature distribution of the chip, m is the equivalent coefficient of thermal conduction in the vertical direction of the chip, a represents the width of the chip in the horizontal direction, b represents the length of the chip in the horizontal direction, and f(x, y) is the function relating power distribution and module coordinates determined by the power distribution dataset and module coordinates.

[0027] In a more specific technical solution, in step S23, the temperature function T(x, y) is separated into variables using the following logic and expanded to obtain:

[0028]

[0029] In the formula, n represents the module region.

[0030] In a more specific technical solution, step S24 uses the following logic to solve for the general solution and the particular solution:

[0031]

[0032]

[0033] In a more specific technical solution, step S24 also includes:

[0034] S241. Obtain and truncate the processing function value n;

[0035] S242. For different function values ​​n, integrate with respect to x, fix the y-values ​​for each segment of the y-axis, substitute each y-value into the power consumption distribution and module coordinate relationship function f(x, y), integrate with respect to the x-axis and sum them up to obtain f. n (y) value;

[0036] S243. For different function values ​​n, f n Substitute the (y) value into the general solution coefficient function expression, integrate on the y-axis and accumulate to obtain the boundary condition determination coefficients c1 and c2, and then solve for the general solution and particular solution.

[0037] In a more specific technical solution, in step S243, the boundary condition determination coefficients c1, c2, and v1(y), v2(y) under different function values ​​n are substituted into the function expression u. n (y).

[0038] This invention uses analytical methods to derive the theoretical general solution and particular solution of the partial differential heat transfer equation, and then implements this solution using coded formulas, which greatly accelerates the speed of thermal analysis.

[0039] In a more specific technical solution, in step S25, the final solution of the generalized equations for power consumption and temperature is obtained using the following logic:

[0040]

[0041] In a more specific technical solution, in step S26, the final values ​​v1(y) and v2(y) are determined using the following logic:

[0042]

[0043]

[0044] in:

[0045]

[0046] In more specific technical solutions, chip thermal analysis systems based on Fourier series expansion include:

[0047] The chip dataset acquisition module is used to obtain chip region distribution datasets, power consumption distribution datasets, and verification datasets.

[0048] The chip temperature processing module is used to divide the chip into at least two module regions based on the chip region distribution dataset. It determines the power consumption and temperature governing equations and boundary conditions. Based on the boundary conditions and the temperature function T(x, y), it processes the data to obtain the final temperature distribution result T(x, y). Using the separation of variables method, it expands the power consumption distribution and module coordinate relationship function f(x, y) to obtain an analytical expression. It imports the module region and power consumption data, sets parameter cutoff values ​​based on the analytical expression, and performs filtering and sorting operations on the module regions to obtain differential equations. It then solves these equations to obtain the general solution and particular solution, and determines the general solution coefficients c1, c2, and v1(y), v2(y) based on the boundary conditions. Finally, it obtains the final solution of the power consumption and temperature governing equations to calculate the temperature of each chip region. The chip temperature processing module is connected to the chip dataset acquisition module.

[0049] The derivation and implementation module is used to derive the theoretical calculation formula by using the pre-built implementation tools based on the power consumption and temperature generalized equation, boundary conditions, power consumption distribution and module coordinate relationship function f(x,y). The derivation and implementation module is connected to the temperature processing modules of each region of the chip.

[0050] The chip thermal analysis algorithm judgment module is used to input the general solution and the particular solution into a preset temperature function for comparison with the finite element simulation results, to judge the calculation accuracy of the theoretical calculation formula, to compare the numerical integration method and the analytical method, and to obtain the algorithm running accuracy and speed judgment results. The chip thermal analysis algorithm judgment module is connected to the derivation implementation module.

[0051] The present invention has the following advantages over the prior art:

[0052] This invention uses analytical methods to derive the theoretical general solution and particular solution of the partial differential heat transfer equation, thereby accelerating the rate of thermal analysis.

[0053] This invention solves the technical problems of low chip thermal analysis rate and accuracy, and slow temperature calculation speed in the prior art. Attached Figure Description

[0054] Figure 1 This is a schematic diagram of the basic steps of the chip thermal analysis method based on Fourier series expansion according to Embodiment 1 of the present invention.

[0055] Figure 2 This is a schematic diagram illustrating the specific steps involved in calculating the temperature of each region of the chip in Embodiment 1 of the present invention;

[0056] Figure 3 This is a schematic diagram illustrating the specific steps of solving differential equations to obtain general and particular solutions in Embodiment 1 of the present invention;

[0057] Figure 4This is a schematic diagram illustrating the specific implementation steps of the chip thermal analysis method based on Fourier series expansion in Embodiment 2 of the present invention. Detailed Implementation

[0058] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below in conjunction with the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0059] Example 1

[0060] like Figure 1 As shown, the chip thermal analysis method based on Fourier series expansion provided by this invention includes the following basic steps:

[0061] Step S1: Obtain the chip region distribution dataset, power consumption distribution dataset, and verification dataset;

[0062] Step S2: Calculate the temperature of each region of the chip;

[0063] like Figure 2 As shown, in this embodiment, step S2, which calculates the temperature of each region of the chip, further includes the following specific steps:

[0064] Step S21: Divide a rectangular chip with an area of ​​a*b into several different regions and name them according to the chip region dataset;

[0065] In this embodiment, based on the experimental dataset, the chip modules are named: Icache_0, Dcache_0, Bpred_0_0, Bpred_1_0. In this embodiment, each region represents a different module inside the chip, and each different module has a different circuit design, thus producing different power consumption. The power consumption of each module is given by the power consumption distribution dataset.

[0066] In this embodiment, the `genfromtxt` function is used to import the chip module distribution diagram and the power consumption of each module. The starting positions of each module are then selected and sorted to obtain the coordinates of each module and its corresponding power consumption. In the experiment, the y-axis is divided into `num_seg_y` segments, and the x-axis is divided into `num_seg_x` segments.

[0067] Step S22: List the governing equations for power consumption and temperature, and the corresponding boundary conditions:

[0068]

[0069]

[0070]

[0071] Where T(x, y) represents the temperature distribution at different locations within the chip, m is the equivalent coefficient of thermal conduction in the vertical direction of the chip, a represents the width of the chip in the horizontal direction, b represents the length of the chip in the horizontal direction, and f(x, y) is a function determined by the power consumption distribution dataset and the module coordinates.

[0072] Step S23: Separate the temperature function T(x, y) according to the boundary conditions and expand it to obtain:

[0073]

[0074] In this embodiment, u n (y) is substituted into the expression and looped through each obtained value of n. The obtained function values ​​are accumulated to obtain the final temperature distribution result T(x, y).

[0075] Step S24: Expand f(x, y) using the method of separation of variables and substitute it into the original equation. This will transform the partial differential equation into a differential equation. Solving the differential equation will yield the general solution and the particular solution.

[0076]

[0077]

[0078] like Figure 3 As shown, in this embodiment, step S24, which involves solving the differential equation to obtain the general solution and the particular solution, further includes the following specific steps:

[0079] Step S241: Different n values ​​correspond to different coefficients c1, c2, v1(y), v2(y). The n values ​​in the previous step S23 are truncated to n=13.

[0080] Step S242: First determine f n (y), for different n values, first integrate with respect to x, fix the values ​​of each segment of the y-axis yl, y2...yn for a total of num_seg_y, then substitute each y value into the function expression and integrate with respect to the x-axis and accumulate; in this embodiment, the x-axis has a total of num_seg_x segments;

[0081] Step S243: For different values ​​of n, calculate the obtained f. n Substitute the (y) value into the function expression, integrate along the y-axis, and sum the results to obtain the final coefficients c1 and c2.

[0082] In this embodiment, c1, c2, v1(y), and v2(y) for different n values ​​are substituted into the expression to obtain u. n (y);

[0083] Step S25: Determine the coefficients c1 and c2 based on the boundary conditions, and the final solution to the equation can be obtained.

[0084]

[0085] In this embodiment, 0-y is divided into num_seg_y segments. For different n values, the resulting f... n Substitute the value of (y) into the function expression, integrate along the y-axis, and sum them up to obtain the final v1(y) and v2(y);

[0086] Step S26: Determine v1(y) and v2(y);

[0087]

[0088]

[0089] in:

[0090]

[0091] Step S3: Implement the theoretical calculation formula derived above using code;

[0092] Step S4: Compare the results obtained from running the code with the finite element simulation results to determine whether the results are accurate. Also, compare the numerical integration method and the analytical method to determine the accuracy and speed of the algorithm.

[0093] Example 2

[0094] like Figure 4 As shown, in this embodiment, the chip thermal analysis method based on Fourier series expansion further includes the following specific implementation steps:

[0095] S101. Separate the variables from the temperature function and calculate its analytical expression;

[0096] S102. Import the distributed module and power consumption, and set the parameter cutoff value;

[0097] S103. Filter and sort the imported module coordinates;

[0098] S104. Fix the y-values ​​on the coordinate axis and integrate over the x-axis;

[0099] S105. Integrate the function obtained after integration with respect to the x-axis;

[0100] S106. Find the general solution and particular solution of the differential equation and substitute them into the temperature function T(x,y);

[0101] S107. Determine whether the result matches the simulation result. If yes, end the temperature calculation. If no, repeat steps S102 to S106.

[0102] In this embodiment, to verify the performance of the present invention, experiments were conducted on three publicly available datasets (ev6_3D, Chiplet_Core0, and Chiplet_Core0_7), and the analytical method and the algorithm using ordinary numerical integration were analyzed and compared. All experiments were conducted according to the experimental specifications of the respective datasets. As can be seen from the comparisons in Tables 1, 2, and 3 below, the analytical method outperforms the algorithm using ordinary numerical integration in both analysis speed and accuracy. This fully demonstrates the important role of analytical algorithms in chip thermal analysis. In the three datasets mentioned above, the parameter calculation times of the present invention were 1.02s, 0.95s, and 1.36s, respectively. Compared with currently published mainstream algorithms, the experimental results show higher computational efficiency and accuracy.

[0103] Table 1 Experimental data for the ev6_3D dataset

[0104] Integration methods Result calculation time (s) Numerical methods 1.61 Parsing method 1.02

[0105] Table 2 Experimental data for the Chiplet0_Core0_1 dataset

[0106]

[0107]

[0108] Table 3 Experimental data for the Chiplet0_Core0_7 dataset

[0109] Integration methods Result calculation time (s) Numerical methods 1.70 Parsing method 1.36

[0110] The analysis speed of this invention is superior to the COMSOL simulation results of the ev6_3D, Chiplet_Core0, and Chiplet_Core0_7 datasets.

[0111] In summary, this invention uses analytical methods to derive the theoretical general solution and particular solution of the partial differential heat transfer equation, thereby accelerating the rate of thermal analysis.

[0112] This invention solves the technical problems of low chip thermal analysis rate and accuracy, and slow temperature calculation speed in the prior art.

[0113] The above embodiments are only used to illustrate the technical solutions of the present invention, and are not intended to limit it. Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A chip thermal analysis method based on Fourier series expansion, characterized in that, The method includes: S1. Obtain the chip region distribution dataset, power consumption distribution dataset, and verification dataset; S2. Divide the chip region distribution dataset into at least two module regions, and determine the power consumption and temperature governing equations and boundary conditions accordingly. Based on the boundary conditions and temperature function T(x,y), process to obtain the final temperature distribution result T(x,y). Using the separation of variables method, expand the power consumption distribution and module coordinate relationship function f(x,y) to obtain an analytical expression. Import the module region and power consumption data, and use the analytical expression to set parameter cutoff values. Perform filtering and sorting operations on the module regions to obtain differential equations. Solve to obtain the general solution and particular solution, determine and determine the coefficients c1 and c2 according to the boundary conditions, obtain the final solution of the power consumption and temperature governing equations, and calculate the temperature of each region of the chip. S3. Using a preset implementation tool, based on the power consumption and temperature generalized equation, the boundary conditions, and the power consumption distribution and module coordinate relationship function f(x,y), the theoretical calculation formula is derived. S4. Substitute the general solution and the particular solution into the preset temperature function to compare with the finite element simulation results, determine the accuracy of the theoretical calculation formula, compare the numerical integration method and the analytical method, and obtain the algorithm running accuracy and speed judgment results.

2. The chip thermal analysis method based on Fourier series expansion according to claim 1, characterized in that, Step S2 includes: S21. Based on the chip region dataset, divide the chip under test into several different module regions and name each module region. S22. List the governing equations for power consumption and temperature, and the boundary conditions; S23. Based on the boundary conditions, perform a separation of variables operation on the temperature function T(x,y), and separate u... n (y) is substituted into the power consumption and temperature generalized equation and iterated to obtain and accumulate the function values, thereby obtaining the final temperature distribution result T(x,y); S24. Using the separation of variables method, expand the power consumption distribution and module coordinate relationship function f(x,y), and substitute the expansion result into the power consumption and temperature governing equation to convert the power consumption and temperature governing equation into the differential equation, and solve it to obtain the general solution and the particular solution. S25. Determine and determine the coefficients c1 and c2 according to the boundary conditions, and obtain the final solution of the power consumption and temperature generalizing equation. S26. Determine v1(y) and v2(y); for different function values ​​n, obtain the f n Substituting the (y) value into the power consumption distribution and module coordinate relationship function f(x,y), integrating on the y-axis and accumulating, we obtain the final values ​​v1(y) and v2(y) to obtain the temperature of each region of the chip.

3. The chip thermal analysis method based on Fourier series expansion according to claim 2, characterized in that, In step S22, the power consumption and temperature generalized equations and boundary conditions are listed using the following logic: In the formula, T(x,y) represents the final temperature distribution of the chip, m is the equivalent coefficient of thermal conduction in the vertical direction of the chip, a represents the width of the chip in the horizontal direction, b represents the length of the chip in the horizontal direction, and f(x,y) is the function relating power distribution and module coordinates determined by the power distribution dataset and module coordinates.

4. The chip thermal analysis method based on Fourier series expansion according to claim 2, characterized in that, In step S23, the temperature function T(x,y) is separated into variables using the following logic and expanded to obtain:

5. The chip thermal analysis method based on Fourier series expansion according to claim 2, characterized in that, In step S24, the general solution and the particular solution are solved using the following logic:

6. The chip thermal analysis method based on Fourier series expansion according to claim 2, characterized in that, Step S24 further includes: S241. Obtain and truncate the function value n; S242. For different function values ​​n, integrate with respect to x, fix the y-values ​​for each segment of the y-axis, substitute each y-value into the power consumption distribution and module coordinate relationship function f(x,y), integrate with respect to the x-axis and sum them up to obtain f. n (y) value; S243. For different function values ​​n, the f n Substituting the (y) value into the power consumption distribution and module coordinate relationship function f(x,y), the function is integrated and accumulated along the y-axis to obtain the boundary condition determination coefficients c1 and c2, which are then used to solve for the general solution and the particular solution.

7. The chip thermal analysis method based on Fourier series expansion according to claim 6, characterized in that, In step S243, the boundary condition determination coefficients c1, c2, and v1(y) under different function values ​​n are substituted into the power consumption distribution and module coordinate relationship function f(x,y) to obtain the general solution and the particular solution u. n (y).

8. The chip thermal analysis method based on Fourier series expansion according to claim 2, characterized in that, In step S25, the final solution of the power consumption and temperature generalized equation is obtained using the following logic:

9. The chip thermal analysis method based on Fourier series expansion according to claim 1, characterized in that, In step S26, the final values ​​v1(y) and v2(y) are determined using the following logic: in:

10. A chip thermal analysis system based on Fourier series expansion, characterized in that, The system includes: The chip dataset acquisition module is used to obtain chip region distribution datasets, power consumption distribution datasets, and verification datasets. The chip temperature processing module is used to divide the chip into at least two module regions based on the chip region distribution dataset. It determines the power consumption and temperature governing equations and boundary conditions. Based on the boundary conditions and the temperature function T(x,y), it processes the data to obtain the final temperature distribution result T(x,y). Using the separation of variables method, it expands the power consumption distribution and module coordinate relationship function f(x,y) to obtain an analytical expression. It imports the module region and power consumption data, sets parameter cutoff values ​​based on the analytical expression, performs filtering and sorting operations on the module regions, and processes them to obtain differential equations. It then solves these equations to obtain the general solution and particular solution, determines the coefficients c1 and c2 based on the boundary conditions, obtains the final solution of the power consumption and temperature governing equation, and calculates the temperature of each chip region. The chip temperature processing module is connected to the chip dataset acquisition module. The derivation and implementation module is used to derive the theoretical calculation formula by using a preset implementation tool based on the power consumption and temperature generalized equation, the boundary conditions, and the power consumption distribution and module coordinate relationship function f(x,y). The derivation and implementation module is connected to the temperature processing module of each region of the chip. The chip thermal analysis algorithm judgment module is used to input the general solution and the particular solution into a preset temperature function to compare with the finite element simulation results, judge the calculation accuracy of the theoretical calculation formula, compare the numerical integration method and the analytical method, and obtain the algorithm running accuracy and speed judgment result. The chip thermal analysis algorithm judgment module is connected to the derivation implementation module.

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