A high-efficient and convenient electric vehicle handlebar speed reduction circuit
Patent Information
- Application Number
- CN202410609397.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2024-05-15
- Publication Date
- 2026-11-03
- Estimated Expiration
- 2044-05-15
AI Technical Summary
Existing electric vehicle speed control panels cannot achieve real-time and effective speed regulation, leading to increased safety hazards and economic losses.
Design an efficient and convenient electric vehicle throttle speed reduction circuit, including a speed signal input terminal, a voltage divider speed regulation circuit, a voltage stabilization and isolation module, and a speed signal output terminal. The speed reduction function of the electric vehicle is realized through voltage divider regulation and voltage stabilization and isolation.
It enables real-time speed control of electric vehicles, improving safety and convenience, and meeting market demands and safety and environmental protection requirements.
Smart Images

Figure CN118372917B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of electric vehicle technology, and in particular to an efficient and convenient electric vehicle throttle speed reduction circuit. Background Technology
[0002] With the development of the national economy, the safety of electric vehicles is receiving increasing attention. The safety hazards and economic losses caused by electric vehicle accidents are also growing, making the future development prospects of electric vehicle speed control boards very optimistic. With expanding market demand, continuous technological innovation, and increasingly stringent safety and environmental protection requirements, electric vehicle speed control boards will achieve significant progress in performance, convenience, safety, and environmental protection, providing strong support for the development of the electric vehicle industry. Many factories produce electric vehicles that cannot effectively control speed in real time; therefore, efficient and convenient electric vehicle speed reduction circuits have emerged and played a crucial role.
[0003] In related technologies, the speed adjustment function for electric vehicles is mainly configured through manual operation or external modules. In one example, a speed control unit is added to a conventional design; when needed, adjusting the values of relevant components achieves the speed reduction function.
[0004] In conclusion, the future development prospects of electric vehicle speed controllers are very optimistic. With the expansion of market demand, the introduction of new national standards by regulatory authorities, continuous technological innovation, and increasing safety requirements, electric vehicle speed controllers will achieve significant progress in performance, convenience, safety, and environmental protection, providing strong support for the development of the electric vehicle industry. Summary of the Invention
[0005] The purpose of this invention is to provide an efficient and convenient electric vehicle throttle speed reduction circuit, aiming to solve the problems mentioned in the background art.
[0006] To achieve the above objectives, the present invention provides the following technical solution: An efficient and convenient electric vehicle throttle speed reduction circuit includes a speed signal input terminal, a voltage divider speed regulation circuit, a voltage stabilizing and isolation module, and a speed signal output terminal. The speed signal input terminal is connected to the input terminal of the voltage divider speed regulation circuit, the output terminal of the voltage divider speed regulation circuit is connected to the input terminal of the voltage stabilizing and isolation module, and the output terminal of the voltage stabilizing and isolation module is connected to the speed signal output terminal. The speed signal input terminal is used to receive the speed voltage signal, the voltage divider speed regulation circuit is used to divide and regulate the received speed voltage signal and output it, the voltage regulation and isolation module is used to receive the speed voltage signal after voltage division and regulation and perform voltage regulation and isolation, and the speed signal output terminal is used to output the speed voltage signal after voltage regulation and isolation.
[0007] As a further technical solution of the present invention: the speed signal input terminal includes a speed signal input interface X1 and a first capacitor C1. The first port of the signal input terminal is connected to digital ground, the second port of the signal input terminal X1 is connected to the input terminal of the voltage divider speed regulation circuit, one end of the first capacitor C1 is connected to the third port of the signal input terminal X1, and the other end of the first capacitor C1 is connected to digital ground.
[0008] As a further technical solution of the present invention: the voltage divider speed control circuit includes a first voltage divider resistor R1 and a second voltage divider adjustable resistor R2. One end of the first voltage divider resistor R1 is connected to the second port of the speed signal input interface X1. The other end of the first voltage divider resistor R1 and one fixed pin of the second voltage divider adjustable resistor R2 are connected together to the input terminal of the voltage regulation isolation module. The other fixed pin of the second voltage divider adjustable resistor R2 is connected to digital ground. The middle sliding pin of the second voltage divider adjustable resistor R2 is connected to digital ground. The other end of the first voltage divider resistor R1 outputs the speed voltage signal after voltage division.
[0009] As a further technical solution of the present invention: the voltage regulation and isolation module includes a third resistor R3, a second capacitor C2, a fourth resistor R4, and an operational amplifier U1. One end of the fourth resistor R4 is connected to the output terminal of the voltage divider speed regulation circuit, and the other end of the fourth resistor R4 is connected to the first port of the operational amplifier U1. One end of the second capacitor C2 is connected to the first port of the operational amplifier U1, and the other end of the second capacitor C2 is connected to digital ground. The second port of the operational amplifier U1 is connected to digital ground. The third port of the operational amplifier U1 is connected to one end of the third resistor R3. The fifth port of the operational amplifier U1 is connected to the third port of the speed signal input interface X1. The other end of the third resistor R3 and the fourth port of the operational amplifier U1 are connected to the output terminal of the speed signal output terminal 4. The fourth port of the operational amplifier U1 outputs the speed voltage signal that has been regulated and isolated.
[0010] As a further technical solution of the present invention: the speed signal output terminal includes a speed signal output interface X2, the first port of the speed signal output interface X2 is connected to digital ground, the second port of the speed signal output interface X2 is connected to the fourth port of the operational amplifier U1, and the third port of the speed signal output interface X2 is connected to the third port of the speed signal input interface X1.
[0011] As a further technical solution of the present invention: the ratio of the first voltage divider resistor R1 to the second voltage divider adjustable resistor R2 is 1:50.
[0012] As a further technical solution of the present invention: the resistance of the first voltage divider resistor R1 is 1KΩ, the default initial resistance of the second voltage divider adjustable resistor R2 is 50KΩ, and the speed voltage signal output value can be adjusted by adjusting the sliding end of the second voltage divider adjustable resistor R2.
[0013] As a further technical solution of the present invention: the operational amplifier U1 is model LM321.
[0014] As a further technical solution of the present invention: both the first capacitor C1 and the second capacitor C2 are implemented as non-polarized capacitors.
[0015] As a further technical solution of the present invention: the third port of the input interface X1, the fifth port of the operational amplifier U1, and the third port of the speed signal output interface X2 are all VCC working power supply 5V.
[0016] Compared with the prior art, the beneficial effects of the present invention are: This invention reduces the speed signal value proportionally by passing the input initial voltage speed signal through a voltage divider speed control circuit, and then outputs the voltage speed signal adjusted by the voltage divider through a voltage regulation and isolation module, thereby achieving the target speed value. Attached Figure Description
[0017] Figure 1 A schematic diagram of the framework structure of an efficient and convenient electric vehicle throttle speed reduction circuit provided in an exemplary embodiment of this application is shown.
[0018] Figure 2 The diagram shows a specific circuit diagram of an efficient and convenient electric vehicle throttle speed reduction circuit provided in an exemplary embodiment of this application. Detailed Implementation
[0019] The technical solutions in the embodiments of the present invention will be clearly and completely described below. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of the present invention.
[0020] like Figure 1 As shown, an efficient and convenient electric vehicle throttle speed reduction circuit includes a speed signal input terminal, a voltage divider speed regulation circuit, a voltage regulator isolation module, and a speed signal output terminal. The speed signal input terminal is connected to the input terminal of the voltage divider speed regulation circuit, the output terminal of the voltage divider speed regulation circuit is connected to the input terminal of the voltage regulator isolation module, and the output terminal of the voltage regulator isolation module is connected to the speed signal output terminal.
[0021] The speed signal input terminal is used to receive the speed voltage signal, the voltage divider speed regulation circuit is used to divide and regulate the received speed voltage signal and output it, the voltage regulation and isolation module is used to receive the speed voltage signal after voltage division and regulation and perform voltage regulation and isolation, and the speed signal output terminal is used to output the speed voltage signal after voltage regulation and isolation.
[0022] In the speed reduction circuit of an electric vehicle, when the speed signal input terminal transmits the received speed voltage signal to the voltage divider speed control circuit, the two voltage divider resistors in the voltage divider speed control circuit will divide and regulate the speed voltage signal. The speed voltage signal after passing through the voltage divider speed control circuit is then regulated and isolated by the voltage stabilization and isolation module and outputs the speed voltage signal to the speed signal output terminal, thereby realizing the speed reduction of the electric vehicle.
[0023] In one embodiment of the present invention, such as Figure 2 As shown, the speed signal input terminal includes a speed signal input interface X1 and a first capacitor C1. The first port of the signal input terminal is connected to digital ground, the second port is connected to the input of the voltage divider speed control circuit, one end of the first capacitor C1 is connected to the third port of the signal input terminal, and the other end of the first capacitor C1 is connected to digital ground. The value of the first capacitor C1 is 100nF.
[0024] In one embodiment of the present invention, such as Figure 2 As shown, the voltage divider speed control circuit includes a first voltage divider resistor R1 and a second voltage divider adjustable resistor R2. One end of the first voltage divider resistor R1 is connected to the second port of the speed signal input interface X1. The other end of the first voltage divider resistor R1 and one fixed pin of the second voltage divider adjustable resistor R2 are connected together to the input terminal of the voltage regulation isolation module. The other fixed pin of the second voltage divider adjustable resistor R2 is connected to digital ground. The middle sliding pin of the second voltage divider adjustable resistor R2 is connected to digital ground. The other end of the first voltage divider resistor R1 outputs the speed voltage signal after voltage division. The resistance of the first voltage divider resistor R1 is 1KΩ, and the resistance of the second voltage divider adjustable resistor R2 is 50KΩ. In one embodiment of the present invention, such as Figure 2As shown, the voltage regulation and isolation module includes a third resistor R3, a second capacitor C2, a fourth resistor R4, and an operational amplifier U1. One end of the fourth resistor R4 is connected to the output terminal of the voltage divider speed control circuit, and the other end of the fourth resistor R4 is connected to the first port of the operational amplifier U1. One end of the second capacitor C2 is connected to the first port of the operational amplifier U1, and the other end of the second capacitor C2 is connected to digital ground. The second port of the operational amplifier U1 is connected to digital ground. The third port of the operational amplifier U1 is connected to one end of the third resistor R3. The fifth port of the operational amplifier U1 is connected to the third port of the speed signal input interface X1. The other end of the third resistor R3 and the fourth port of the operational amplifier U1 are connected to the output terminal of the speed signal output terminal. The fourth port of the operational amplifier U1 outputs the regulated and isolated speed voltage signal. The resistance of the third resistor R3 is 20KΩ, the resistance of the fourth resistor R4 is 100Ω, the operational amplifier U1 is an LMV321, and the capacitance of the second capacitor C2 is 100nF.
[0025] In one embodiment of the present invention, such as Figure 2 As shown, the speed signal output terminal includes a speed signal output interface X2. The first port of the speed signal output interface X2 is connected to digital ground, the second port of the speed signal output interface X2 is connected to the fourth port of the operational amplifier U1, and the third port of the speed signal output interface X2 is connected to the third port of the speed signal input interface X1.
[0026] In this embodiment, taking an input voltage speed of 5V as an example, the 5V voltage is converted into a lower voltage through voltage division by the first resistor and the second adjustable resistor. The voltage speed signal after voltage division is then input to the positive input terminal of the operational amplifier after passing through the current-limiting resistor R4. After voltage regulation and isolation by the operational amplifier, the final voltage speed signal is output. The electric vehicle's throttle detects the voltage speed based on the final output voltage speed signal for speed adjustment.
[0027] It should be understood that although the steps in the flowcharts of the various embodiments of the present invention are shown sequentially according to the arrows, these steps are not necessarily executed in the order indicated by the arrows. Unless explicitly stated herein, there is no strict order restriction on the execution of these steps, and they can be executed in other orders. Moreover, at least some steps in the various embodiments may include multiple sub-steps or multiple stages. These sub-steps or stages are not necessarily completed at the same time, but can be executed at different times. The execution order of these sub-steps or stages is not necessarily sequential, but can be performed alternately or in turn with other steps or at least a portion of the sub-steps or stages of other steps. Those skilled in the art will understand that all or part of the processes in the methods of the above embodiments can be implemented by a computer program instructing related hardware. The program can be stored in a non-volatile computer-readable storage medium, and when executed, it can include the processes of the embodiments of the above methods. Any references to memory, storage, databases, or other media used in the embodiments provided in this application can include non-volatile and / or volatile memory. Non-volatile memory can include read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM), or flash memory. Volatile memory can include random access memory (RAM) or external cache memory. By way of illustration and not limitation, RAM is available in various forms, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), dual data rate SDRAM (DDRSDRAM), enhanced SDRAM (ESDRAM), synchronous link DRAM (SLDRAM), Rambus direct RAM (RDRAM), direct memory bus dynamic RAM (DRDRAM), and memory bus dynamic RAM (RDRAM), etc.
[0028] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.
[0029] The embodiments described above are merely illustrative of several implementations of the present invention, and while the descriptions are specific and detailed, they should not be construed as limiting the scope of the present invention. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of the present invention, and these modifications and improvements all fall within the scope of protection of the present invention. Therefore, the scope of protection of this patent should be determined by the appended claims.
[0030] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of the present invention should be included within the protection scope of the present invention.
Claims
1. A high-efficiency and convenient electric vehicle throttle speed reduction circuit, comprising a speed signal input terminal, a voltage divider speed regulation circuit, a voltage stabilizing and isolation module, and a speed signal output terminal, characterized in that... The speed signal input terminal is connected to the input terminal of the voltage divider speed regulation circuit, the output terminal of the voltage divider speed regulation circuit is connected to the input terminal of the voltage regulation isolation module, and the output terminal of the voltage regulation isolation module is connected to the speed signal output terminal. The speed signal input terminal is used to receive the speed voltage signal, the voltage divider speed regulation circuit is used to divide and regulate the received speed voltage signal and output it, the voltage regulation and isolation module is used to receive the speed voltage signal after voltage division and regulation and perform voltage regulation and isolation, and the speed signal output terminal is used to output the speed voltage signal after voltage regulation and isolation. The speed signal input terminal includes a speed signal input interface X1 and a first capacitor C1. The first port of the speed signal input terminal is connected to digital ground, the second port of the speed signal input terminal is connected to the input terminal of the voltage divider speed control circuit, one end of the first capacitor C1 is connected to the third port of the speed signal input terminal, and the other end of the first capacitor C1 is connected to digital ground. The voltage divider speed control circuit includes a first voltage divider resistor R1 and a second voltage divider adjustable resistor R2. One end of the first voltage divider resistor R1 is connected to the second port of the speed signal input interface X1. The other end of the first voltage divider resistor R1 and one fixed pin of the second voltage divider adjustable resistor R2 are connected together to the input terminal of the voltage regulation isolation module. The other fixed pin of the second voltage divider adjustable resistor R2 is connected to digital ground. The middle sliding pin of the second voltage divider adjustable resistor R2 is connected to digital ground. The other end of the first voltage divider resistor R1 outputs the speed voltage signal after voltage division. The voltage regulation and isolation module includes a third resistor R3, a second capacitor C2, a fourth resistor R4, and an operational amplifier U1. One end of the fourth resistor R4 is connected to the output terminal of the voltage divider speed control circuit, and the other end of the fourth resistor R4 is connected to the first port of the operational amplifier U1. One end of the second capacitor C2 is connected to the first port of the operational amplifier U1, and the other end of the second capacitor C2 is connected to digital ground. The second port of the operational amplifier U1 is connected to digital ground. The third port of the operational amplifier U1 is connected to one end of the third resistor R3. The fifth port of the operational amplifier U1 is connected to the third port of the speed signal input interface X1. The other end of the third resistor R3 and the fourth port of the operational amplifier U1 are connected to the output terminal of the speed signal output terminal. The fourth port of the operational amplifier U1 outputs the speed voltage signal after voltage regulation and isolation.
2. The efficient and convenient electric vehicle throttle speed reduction circuit according to claim 1, characterized in that... The speed signal output terminal includes a speed signal output interface X2. The first port of the speed signal output interface X2 is connected to digital ground, the second port of the speed signal output interface X2 is connected to the fourth port of the operational amplifier U1, and the third port of the speed signal output interface X2 is connected to the third port of the speed signal input interface X1.
3. The efficient and convenient electric vehicle throttle speed reduction circuit according to claim 1, characterized in that... The ratio of the first voltage divider resistor R1 to the second voltage divider adjustable resistor R2 is 1:
50.
4. The efficient and convenient electric vehicle throttle speed reduction circuit according to claim 1, characterized in that... The first voltage divider resistor R1 has a resistance of 1KΩ, and the second voltage divider adjustable resistor R2 has a default initial resistance of 50KΩ. Adjusting the sliding end of the second voltage divider adjustable resistor R2 can adjust the speed voltage signal output value.
5. The efficient and convenient electric vehicle throttle speed reduction circuit according to claim 1, characterized in that... The operational amplifier U1 is model LM321.
6. The efficient and convenient electric vehicle throttle speed reduction circuit according to claim 1, characterized in that... Both the first capacitor C1 and the second capacitor C2 are non-polarized capacitors.
7. The efficient and convenient electric vehicle throttle speed reduction circuit according to claim 2, characterized in that... The third port of the speed signal input interface X1, the fifth port of the operational amplifier U1, and the third port of the speed signal output interface X2 are all connected to the VCC power supply at 5V.
Citation Information
Patent Citations
Brake voltage control system for locomotive driver controller
CN203793335U
