A gate-regulated light emitting device structure

Abstract

A kind of grid control light emitting device structure, it is related to the field of optoelectronic display, and device structure includes: light emitting unit, grid insulation layer, grid control electrode;Light emitting unit includes in turn: first electrode, hole transport layer, light emitting material layer, electron transport layer, second electrode;Grid insulation layer is arranged between light emitting unit and grid control electrode, grid control electrode is located the side of first electrode or second electrode;When device works, first electrode and second electrode apply first power supply, first power supply is used to power light emitting unit and emit light, grid control electrode applies bias power supply relative to first electrode and / or second electrode, bias power supply is used to build electric field and adjust the luminous brightness or luminous efficiency of light emitting unit to control the mobility of carrier in light emitting unit.This application realizes the promotion of luminous efficiency or luminous brightness by grid control.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of photoelectric display, in particular to a gate regulated light emitting device structure. BACKGROUND

[0002] Quantum dots as light emitting materials have the advantages of narrow half-peak width, high color purity, extremely high quantum yield and full spectrum adjustable, and quantum dot light emitting diode (QLED) also has great possibility to become a dominant in the field of new display devices. However, the light emitting efficiency or brightness of QLED device is greatly affected by the carrier recombination process, and different functional layers and quantum dots are usually used to obtain the optimal device efficiency. This experimental process requires a large amount of time, materials and labor cost. Similarly, organic light emitting diode (OLED) also has similar problems. SUMMARY

[0003] In view of the shortcomings of the prior art, the technical problem to be solved by the present application is to provide a gate regulated light emitting device structure, which aims to improve the light emitting efficiency or brightness through gate regulation.

[0004] To achieve the above-mentioned purpose, the present application provides a gate regulated light emitting device structure, which comprises: a light emitting unit, a gate insulating layer and a gate regulated electrode; the light emitting unit comprises in sequence: a first electrode, a hole transport layer, a light emitting material layer, an electron transport layer and a second electrode; the gate insulating layer is arranged between the light emitting unit and the gate regulated electrode, and the gate regulated electrode is located on the side of the first electrode or the second electrode; during the operation of the device, the first electrode and the second electrode are applied with a first power supply, the first power supply is used to power the light emitting unit to emit light, and the gate regulated electrode is applied with a bias power supply relative to the first electrode and / or the second electrode, the bias power supply is used to build an electric field to regulate the mobility of the carriers in the light emitting unit and adjust the light emitting brightness or efficiency of the light emitting unit.

[0005] In a specific embodiment, the light emitting material of the light emitting material layer is quantum dot light emitting material or organic light emitting material; when the light emitting material of the light emitting material layer is organic light emitting material, the light emitting unit further comprises: a hole injection layer and an electron injection layer; the hole injection layer is located between the first electrode and the hole transport layer, and the electron injection layer is located between the second electrode and the electron transport layer.

[0006] In a specific embodiment, the gate regulated electrode is located on the side of the second electrode, and the majority carriers of the light emitting unit are electron type carriers.

[0007] The applied potential of the gate regulated electrode is configured as:

[0008] The gate regulating electrode applies a suitable positive potential to the second electrode relative to the actual device to reduce the injection of the electron-type carriers from the second electrode to the light-emitting material layer, so as to improve the light-emitting efficiency of the light-emitting unit.

[0009] Or the gate regulating electrode applies a suitable negative potential to the second electrode relative to the actual device to increase the injection of the electron-type carriers from the second electrode to the light-emitting material layer, so as to improve the luminous brightness of the light-emitting unit.

[0010] In an embodiment, the gate regulating electrode is located on the side of the first electrode, and the majority carriers of the light-emitting unit are hole-type carriers.

[0011] The gate regulating electrode applies a suitable positive potential to the second electrode relative to the actual device to reduce the injection of the electron-type carriers from the second electrode to the light-emitting material layer, so as to improve the light-emitting efficiency of the light-emitting unit.

[0012] The gate regulating electrode applies a suitable negative potential to the second electrode relative to the actual device to increase the injection of the electron-type carriers from the second electrode to the light-emitting material layer, so as to improve the luminous brightness of the light-emitting unit.

[0013] Or the gate regulating electrode applies a suitable positive potential to the second electrode relative to the actual device to increase the injection of the electron-type carriers from the second electrode to the light-emitting material layer, so as to improve the luminous brightness of the light-emitting unit.

[0014] In an embodiment, the gate regulating electrode is located on the side of the first electrode, and the majority carriers of the light-emitting unit are hole-type carriers.

[0015] The gate regulating electrode applies a suitable positive potential to the second electrode relative to the actual device to reduce the injection of the electron-type carriers from the second electrode to the light-emitting material layer, so as to improve the light-emitting efficiency of the light-emitting unit.

[0016] The gate regulating electrode applies a suitable negative potential to the second electrode relative to the actual device to increase the injection of the electron-type carriers from the second electrode to the light-emitting material layer, so as to improve the luminous brightness of the light-emitting unit.

[0017] In an embodiment, the gate regulating electrode is located on the side of the first electrode, and the majority carriers of the light-emitting unit are hole-type carriers.

[0018] The gate regulating electrode applies a suitable positive potential to the second electrode relative to the actual device to reduce the injection of the electron-type carriers from the second electrode to the light-emitting material layer, so as to improve the light-emitting efficiency of the light-emitting unit.

[0019] The gate regulating electrode applies a suitable negative potential to the second electrode relative to the actual device to increase the injection of the electron-type carriers from the second electrode to the light-emitting material layer, so as to improve the luminous brightness of the light-emitting unit.

[0020] In one embodiment, the potential of the first electrode corresponding to the hole transport layer is higher than the potential of the second electrode corresponding to the electron transport layer.

[0021] In one embodiment, the bias power supply is an adjustable voltage power supply, which is adjusted according to the requirements of the luminous brightness or the luminous efficiency.

[0022] In one embodiment, a current-limiting resistor is further connected in series in the bias power supply loop and the gate control electrode.

[0023] In one embodiment, the gate control electrode is arranged on the back side of the device structure opposite to the light-emitting side.

[0024] The present application has the following advantages: the present application can build an internal electric field in the light-emitting device by the gate control, realize the control of the carrier mobility, and realize the control of the luminous efficiency or the luminous brightness, which is helpful to improve the luminous efficiency or the luminous brightness. BRIEF DESCRIPTION OF DRAWINGS

[0025] Figure 1 is a schematic diagram of a gate-controlled light-emitting device structure in one embodiment of the present application;

[0026] Figure 2 is a schematic diagram of a gate-controlled light-emitting device structure based on OLED in one embodiment of the present application;

[0027] Figure 3 is a diagram of the test results of the gate voltage control of a gate-controlled light-emitting device structure in one embodiment of the present application;

[0028] Figure 4 is a schematic diagram of a gate-controlled light-emitting device structure in which the majority carriers are holes in one embodiment of the present application;

[0029] Figure 5 is a schematic diagram of a gate-controlled light-emitting device structure in which the majority carriers are holes in another embodiment of the present application;

[0030] Figure 6 is a schematic diagram of a gate-controlled light-emitting device structure in which the majority carriers are electrons in another embodiment of the present application. DETAILED DESCRIPTION

[0031] The embodiments of the present application are described in detail below, and examples of the embodiments are shown in the accompanying drawings, in which the same or similar reference numerals represent the same or similar elements or elements having the same or similar functions throughout. The embodiments described below by referring to the accompanying drawings are exemplary and are only used to explain the present application, and cannot be understood as a limitation of the present application.

[0032] In the description of the present patent, it needs to be understood that the terms "center", "upper", "lower", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer" and the like indicate the orientation or positional relationship based on the orientation or positional relationship shown in the drawings, and are only for the convenience of describing the present patent and simplifying the description, and do not indicate or imply that the device or element referred to must have a particular orientation, be constructed and operated in a particular orientation, and therefore cannot be understood as a limitation of the present patent.

[0033] In the description of the present patent, it needs to be understood that unless otherwise explicitly specified and limited, the terms "mounting", "connecting", "connecting", "setting" should be understood broadly, for example, it can be fixedly connected, set, or it can be detachably connected, set, or integrally connected, set. For those skilled in the art, the specific meaning of the above terms in the present patent can be understood according to the specific circumstances.

[0034] The embodiment of the present application provides a gate-regulated light-emitting device structure, as shown in the figure. Figures 1-6 In the present application, by arranging the gate-regulated electrode on the side of the majority carrier transport layer, and constructing the built-in electric field under the condition of applying electric potential, the injection of majority carriers is reduced, and the decrease of light-emitting efficiency caused by excessive recombination of majority carriers is avoided; at the same time, on the other hand, the gate-regulated electrode can also be applied with opposite potential to construct the built-in electric field to increase the injection of majority carriers and improve the brightness of the device.

[0035] In addition, when the gate-regulated electrode is arranged on the side of the minority carrier transport layer, the recombination rate can also be improved by increasing the minority carriers, and the brightness and light-emitting efficiency of the device can also be improved.

[0036] The majority carriers of the device are electrons, the gate-regulated electrode is arranged on the side of the electron transport layer, and the built-in electric field is formed when the positive gate voltage is applied, so that the injection of electrons from the electron transport layer to the light-emitting material layer is reduced, and the injection of holes from the hole transport layer has little effect, so that the decrease of light-emitting efficiency caused by the uncombined excess electrons is avoided. On the contrary, the built-in electric field formed by applying negative gate voltage enhances the injection of electron carriers, improves the recombination speed and improves the brightness.

[0037] Embodiment 1

[0038] As shown in the figure. Figures 1-6As shown, in one embodiment of the present invention, a gate-controlled light-emitting device structure is provided. The device structure includes: a light-emitting unit, a gate insulating layer, and a gate control electrode. The light-emitting unit sequentially includes: a first electrode, a hole transport layer, a light-emitting material layer, an electron transport layer, and a second electrode. The gate insulating layer is disposed between the light-emitting unit and the gate control electrode, and the gate control electrode is located on the side where the first electrode or the second electrode is located. When the device is working, a first power supply is applied to the first electrode and the second electrode. The first power supply is used to power the light-emitting unit to emit light. The gate control electrode applies a bias power supply relative to the first electrode and / or the second electrode. The bias power supply is used to construct an electric field to control the mobility of charge carriers in the light-emitting unit and adjust the luminous brightness or luminous efficiency of the light-emitting unit.

[0039] This invention primarily protects the structure. Structures implemented using other processes based on the structure of this invention also fall within the scope of protection. In this invention, quantum dot light-emitting diodes are mainly used for explanation and illustration. However, other typical sandwich-structure light-emitting devices based on the structure of this invention, where the inventive concept is the same or similar, should also fall within the scope of protection. This invention does not limit the light-emitting material of the light-emitting layer to quantum dot light-emitting materials or organic light-emitting materials. The light-emitting material layer can be selected according to actual conditions. This invention does not limit the specific material of the light-emitting material layer; typically, quantum dot light-emitting materials, OLED organic light-emitting materials, and light-emitting materials with PN junction composites can all be used as the light-emitting material layer of this invention.

[0040] Optionally, the luminescent material of the luminescent material layer is a quantum dot luminescent material or an organic luminescent material; such as Figure 1 As shown, the luminescent material is a quantum dot luminescent material.

[0041] like Figure 2 As shown, the light-emitting material of the light-emitting material layer is an organic light-emitting material; the light-emitting unit further includes: a hole injection layer and an electron injection layer; the hole injection layer is located between the first electrode and the hole transport layer, and the electron injection layer is located between the second electrode and the electron transport layer.

[0042] Example 2

[0043] like Figure 1 As shown, based on the first embodiment of the present invention, in the second embodiment of the present invention, the gate control electrode is located on the side where the second electrode is located, and the majority carriers of the light-emitting unit are electronic carriers;

[0044] The applied potential of the gate control electrode is configured as follows:

[0045] The gate regulating electrode applies a positive potential to the second electrode to reduce the injection of the electron type carrier from the second electrode to the light emitting material layer, so as to improve the light emitting efficiency of the light emitting unit.

[0046] Or the gate regulating electrode applies a negative potential to the second electrode to increase the injection of the electron type carrier from the second electrode to the light emitting material layer, so as to improve the light emitting brightness of the light emitting unit.

[0047] Preparation and testing

[0048] In this embodiment, the first electrode can be selected as the side close to the glass substrate, or the gate regulating electrode can be selected as the side close to the glass substrate. The following illustrates the device preparation process with the first electrode side as the first layer of the glass substrate. It is worth mentioning that the preparation process is only a supplementary description and cannot limit the protection scope of the invention patent. The same or similar device structure as this application should be within the protection scope of the invention patent.

[0049] Illustratively, the preparation process corresponding to the second embodiment device structure can refer to the following steps:

[0050] Step S11, light emitting unit

[0051] Step S111, prepare ITO conductive glass, wherein the ITO film layer is the layer where the first electrode is located. The size of the customized glass substrate is 3 cm x 3 cm x 0.11 cm, the ITO electrode width is 0.6 cm, and the ITO electrode forms 4 light emitting areas with a light emitting area of 2 mm x 2 mm together with the rear electrode. The work function of the ITO electrode is -4.7 eV to -5.1 eV, and the resistivity is 15 Ω·m.

[0052] Step S112, clean and activate the glass electrode. The conductive glass prepared in step S111 is cleaned, and the specific steps are ultrasonic cleaning in surfactant, deionized water, acetone and isopropanol for 30 minutes each, for a total of 2 hours. The conductive glass after thorough cleaning is blown dry with a nitrogen gun. The conductive glass cleaned and dried is surface activated to better infiltrate and coat the functional layer material. The activation method includes ultraviolet activation, ozone activation or heating, and the preferred activation method in this embodiment is to place in an ultraviolet oven for 10 minutes.

[0053] Step S113, spin coating to prepare a hole transport layer of polyethylenedioxythiophene-polyphenyl sulfonic acid (PEDOT:PSS). The PEDOT:PSS is a uniform film layer with a thickness of about 25 nanometers, and the coating method selected in this embodiment is spin coating and annealing, the annealing temperature is 125°C, and the time is 20 minutes. The coating raw material is a water solution with a concentration of 1.5%.

[0054] Step S114, spin-coating to prepare a hole transport layer and an electron blocking layer of poly[(9,9-dioctylfluorene-2,7-diyl)-co-(4,4'-(N-(4-sec-butylphenyl)diphenylamine)] (TFB). The TFB layer is a uniform film layer with a thickness of about 15 nanometers. In this embodiment, the coating method is spin-coating followed by annealing, the annealing temperature is 125°C, and the annealing time is 20 minutes. The coating raw material is a chlorobenzene solution with a concentration of 8 mg / ml.

[0055] Step S115, preparing an electron-rich quantum dot layer. The quantum dot layer is a uniform film layer with a thickness of about 30 nanometers. In this embodiment, the coating method is spin-coating followed by annealing, the annealing temperature is 75°C, and the annealing time is 10 minutes. The coating raw material is a n-octane dispersion liquid with a concentration of 20 mg / ml.

[0056] Step S116, preparing an electron transport layer of magnesium zinc oxide (Zn1-xMgxO). The Zn1-xMgxO layer is a uniform film layer with a thickness of about 90 nanometers. In this embodiment, the coating method is spin-coating followed by annealing, the annealing temperature is 75°C, and the annealing time is 10 minutes. The coating raw material is an ethanol solution with a concentration of 25 mg / ml.

[0057] Step S117, preparing a second electrode. The conductive glass treated in steps S112 to S116 is placed in a vacuum evaporation instrument, and a silver electrode is evaporated onto the surface of the electron transport layer using a custom mask. The electrode has a thickness of about 100 nanometers.

[0058] Step S12, preparing an insulating layer

[0059] The material of the insulating layer includes, but is not limited to, aluminum oxide, lithium fluoride, or P(VDF-TrFE), etc. In this embodiment, an aluminum oxide film is preferred as the insulating layer.

[0060] In this embodiment, aluminum oxide is used as the insulating layer. The glass electrode treated in step S11 is placed in an atomic layer deposition system, and aluminum oxide is deposited onto the surface of the second electrode prepared in step S117 as an insulating layer using atomic layer deposition technology. The thickness of the aluminum oxide layer is about 50 nanometers.

[0061] In addition, in the embodiment in which lithium fluoride is used as the insulating layer, the following scheme can be used: the glass electrode treated in step S11 is placed in a vacuum evaporation instrument, and lithium fluoride powder is evaporated onto the surface of the second electrode using vacuum evaporation technology. The thickness of the lithium fluoride layer is about 120 nanometers.

[0062] In addition, in the embodiment in which P(VDF-TrFE) is used as the insulating layer, the following scheme can be used: P(VDF-TrFE) powder is dissolved in DMF at a concentration of 100 mg / ml, and a spin coating process is used to coat the second electrode surface. The spin coating speed is 1000 rpm / min, the time is 30 seconds, the annealing temperature is selected to be 90 degrees Celsius, and the annealing time is 1-3 hours.

[0063] Step S13: preparing the gate control electrode.

[0064] A silver electrode is evaporated onto the surface of the insulating layer using a custom mask. The thickness of the electrode is about 100 nanometers.

[0065] Step S14: building a test circuit

[0066] The starting voltage of the double-terminal QLED is obtained through the test circuit, and the insulating property of the insulating layer is verified to ensure the accuracy of the third electrode control.

[0067] Step S141: obtaining the starting voltage (Vturn-on) of the double-terminal QLED. The first electrode and the second electrode of the QLED device prepared through S11 to S13 are connected through a direct current loop, and the starting voltage of the double-terminal QLED is determined through a semiconductor device test system, and the luminous efficiency without control is also obtained.

[0068] Step S142: verifying the insulating property of the insulating layer. The first electrode and the gate control electrode of the QLED device prepared through S11 to S13 are connected through a direct current loop, and the performance of the insulating layer is determined through a semiconductor test system.

[0069] Step S15: building a control circuit

[0070] The three-terminal QLED device prepared through S11 to S13 and tested and verified through S14 is placed in the control circuit.

[0071] The main carrier type of the above device is electron. The first electrode and the second electrode are connected in a direct current loop, the first electrode is positive, and the second electrode is grounded; the second electrode and the gate control electrode are connected in an adjustable direct current loop, and a protection resistor is connected in series. The voltage of the gate control electrode is adjusted to control the QLED to achieve maximum luminous efficiency or increase the luminous brightness. Among them, the gate control electrode applies a positive voltage to the second electrode, and the device tends to improve the luminous efficiency; while the gate control electrode applies a negative voltage to the second electrode, and the device tends to improve the luminous brightness.

[0072] Step S16: testing

[0073] As Figure 3As shown, for the same device current, different gate voltages exhibit different EQE (external quantum luminous efficiency). In the second embodiment, a positive gate voltage is used, which effectively reduces the number of electronic carriers injected into the light-emitting material layer by the second electrode, thus effectively improving the luminous efficiency of the light-emitting unit. Furthermore, applying a negative gate voltage effectively increases the luminous brightness. Specifically, in the second embodiment, with a positive gate voltage of 5V applied, compared to no gate voltage applied, the EQE (external quantum luminous efficiency) increases from 3.60% to 3.85%, and the brightness decreases from 17812.64 cd / m² to 12133.36 cd / m². This device effectively reduces the number of electronic carriers injected into the light-emitting material layer by the second electrode, effectively improving the luminous efficiency of the light-emitting unit while reducing the brightness. After removing the applied gate voltage, the EQE and brightness of the device return to their original levels (3.64%, 18834.95 cd / m²). When a 5V negative gate voltage is applied to the device in this embodiment, the EQE decreases from 3.64% to 3.56%, and the brightness increases from 18834.95 cd / m2 to 24797.62 cd / m2. Figure 3 shows the overall changes in the maximum brightness and EQE of the device corresponding to the second embodiment when a positive or negative 5V gate voltage is applied.

[0074] It is worth noting that due to differences in device structure, fabrication conditions, and other parameters, the appropriate gate voltage for the relevant EQE (external quantum luminescence efficiency) varies. Furthermore, in the low-brightness region, both majority and minority carriers are inactive. Intentionally reducing majority carrier injection in this region by adjusting the gate voltage may actually decrease luminous efficiency. Therefore, in practical applications, a suitable application scenario and gate voltage can be set according to the specific device to suppress majority carriers and improve luminous efficiency. Additionally, the decrease in luminous efficiency caused by low-brightness regions can be mitigated by using a lower gate voltage to match the power supply voltage in the low-brightness region, thereby improving luminous efficiency.

[0075] The principle behind this embodiment is as follows: The majority carriers of this device are electrons. The gate control electrode is located on the electron transport layer side. When a positive gate voltage is applied, a built-in electric field is formed, reducing electron injection from the electron transport layer to the light-emitting material layer. Hole injection into the hole transport layer has a smaller impact, thus preventing excess electrons from failing to recombine and causing a decrease in luminous efficiency. Conversely, the built-in electric field formed by applying a negative gate voltage enhances electron carrier injection, increasing the recombination rate and thus improving brightness.

[0076] Example 3

[0077] like Figure 4 As shown, in the third embodiment of the present invention, a gate-controlled light-emitting device structure is provided, wherein the gate-controlled electrode is located on the side where the first electrode is located, and the majority carriers of the light-emitting unit are hole-type carriers.

[0078] The applied potential of the gate control electrode is configured as follows:

[0079] The gate control electrode applies an appropriate negative potential relative to the first electrode according to the actual device to reduce the hole carriers injected by the first electrode into the light-emitting material layer, thereby improving the luminous efficiency of the light-emitting unit.

[0080] Alternatively, the gate control electrode may apply a suitable positive potential relative to the first electrode according to the actual device to increase the number of hole carriers injected by the first electrode into the light-emitting material layer, thereby increasing the luminous brightness of the light-emitting unit.

[0081] In terms of fabrication process, the third embodiment can adjust the process of the second embodiment by referring to the different actual structures. Meanwhile, it should be noted that since the majority carriers of the light-emitting unit in this embodiment are hole carriers, step S115 in the second embodiment needs to be modified to prepare a hole-rich quantum dot layer. Furthermore, the driving voltage also needs to be adaptively adjusted in this embodiment. Moreover, this invention patent primarily protects the structure; structures implemented using other processes based on the structure of this invention also fall within the protection scope of this invention.

[0082] The principle behind this embodiment is as follows: The majority carriers in this device are holes. The gate control electrode is located on the hole transport layer side. When a negative gate voltage is applied, a built-in electric field is formed, reducing hole injection from the hole transport layer to the light-emitting material layer. Electron injection from the electron transport layer has a smaller impact, thus preventing excess unrecombined holes from causing a decrease in luminous efficiency. Conversely, the built-in electric field formed by applying a positive gate voltage enhances hole carrier injection, increasing the recombination rate and thus improving brightness.

[0083] Example 4

[0084] like Figure 5 As shown, in the fourth embodiment of the present invention, a gate-controlled light-emitting device structure is provided, wherein the gate-controlled electrode is located on the side where the second electrode is located, and the majority carriers of the light-emitting unit are hole-type carriers;

[0085] The applied potential of the gate control electrode is configured as follows:

[0086] The gate control electrode applies an appropriate negative potential to the second electrode according to the actual device to increase the number of electronic carriers injected by the second electrode into the light-emitting material layer, thereby improving the luminous efficiency and / or luminous brightness of the light-emitting unit.

[0087] The principle of the embodiment is that the majority carriers of the device are holes, the gate control electrode is arranged on the side of the electron transport layer, and a built-in electric field is formed when a negative gate voltage is applied to improve the injection of electrons from the electron transport layer to the light-emitting material layer, while the injection of holes from the hole transport layer has little effect, the total amount of minority carriers electrons is increased, and the light-emitting brightness is increased under the condition of improving the recombination rate (improving the light-emitting efficiency).

[0088] Embodiment 5

[0089] As shown in the first embodiment, in the fifth embodiment of the present application, a gate control light-emitting device structure is provided, and the gate control electrode is located on the side of the first electrode, and the majority carriers of the light-emitting unit are electron-type carriers. Figure 6

[0090] The applied potential of the gate control electrode is configured as:

[0091] The gate control electrode applies a positive potential to the actual device relative to the first electrode to increase the injection of the hole-type carriers from the first electrode to the light-emitting material layer, so as to improve the light-emitting efficiency and / or the light-emitting brightness of the light-emitting unit.

[0092] The principle of the embodiment is that the majority carriers of the device are electrons, the gate control electrode is arranged on the side of the hole transport layer, and a built-in electric field is formed when a positive gate voltage is applied to improve the injection of holes from the hole transport layer to the light-emitting material layer, while the injection of electrons from the electron transport layer has little effect, the total amount of minority carriers holes is increased, and the light-emitting brightness is increased under the condition of improving the recombination rate (improving the light-emitting efficiency).

[0093] In addition, it is worth mentioning that in the above five embodiments, due to the characteristics of quantum dot QLED and organic light-emitting OLED, the potential of the first electrode corresponding to the hole transport layer is higher than the potential of the second electrode corresponding to the electron transport layer, so that the electrons and holes in the light-emitting material layer are combined to emit light;

[0094] The bias power supply is an adjustable voltage power supply, and the voltage value of the bias power supply can be adjusted according to the actual application of each device. The bias power supply is adjusted according to the light-emitting brightness or the light-emitting efficiency requirement, so as to obtain a better light-emitting efficiency or a higher light-emitting brightness.

[0095] In addition, a current-limiting resistor can be connected in series between the gate control electrode and the bias power supply loop to avoid excessive current in the loop and burn out the device.

[0096] ​It is worth mentioning that the gate control electrode can be arranged on the light emitting side or the back light side of the device structure, typically, the gate control electrode is arranged on the back light side of the device structure to reduce the loss of the gate control electrode on the light transmittance and improve the light brightness. In addition, the actual light emitting angle can also be perpendicular to the side edge of the radial direction where the first electrode, the second electrode and the gate control electrode are located, and the application does not actually limit the light emitting direction of the device.

[0097] The preferred embodiments of the application are described in detail above. It should be understood that those of ordinary skill in the art can make many modifications and changes without creative work based on the concept of the present application. Therefore, any technical solutions obtained by logical analysis, reasoning or limited experiments based on the prior art within the concept of the present application should be within the protection scope determined by the claims.

Claims

1. A gate-controlled light-emitting device structure, characterized in that, The device structure includes: a light-emitting unit, a gate insulating layer, and a gate control electrode; the light-emitting unit sequentially includes: a first electrode, a hole transport layer, a light-emitting material layer, an electron transport layer, and a second electrode; the gate insulating layer is disposed between the light-emitting unit and the gate control electrode, and the gate control electrode is located on the side where the first electrode or the second electrode is located; when the device is working, a first power supply is applied to the first electrode and the second electrode, the first power supply is used to power the light-emitting unit to emit light, and the gate control electrode applies a bias power supply relative to the first electrode and / or the second electrode, the bias power supply is used to construct an electric field to regulate the mobility of charge carriers in the light-emitting unit and adjust the luminous brightness or luminous efficiency of the light-emitting unit.

2. The gate-controlled light-emitting device structure as described in claim 1, characterized in that, The luminescent material of the luminescent material layer is a quantum dot luminescent material or an organic luminescent material; when the luminescent material of the luminescent material layer is an organic luminescent material, the luminescent unit further includes: a hole injection layer and an electron injection layer; the hole injection layer is located between the first electrode and the hole transport layer, and the electron injection layer is located between the second electrode and the electron transport layer.

3. The gate-controlled light-emitting device structure as described in claim 1, characterized in that, The gate control electrode is located on the side where the second electrode is located, and the majority carriers of the light-emitting unit are electronic carriers; The applied potential of the gate control electrode is configured as follows: The gate control electrode applies an appropriate positive potential relative to the second electrode according to the actual device to reduce the electronic carriers injected by the second electrode into the light-emitting material layer, thereby improving the luminous efficiency of the light-emitting unit; Alternatively, the gate control electrode may apply an appropriate negative potential relative to the second electrode according to the actual device to increase the number of electronic carriers injected by the second electrode into the light-emitting material layer, thereby increasing the luminous brightness of the light-emitting unit.

4. The gate-controlled light-emitting device structure as described in claim 1, characterized in that, The gate control electrode is located on the side where the first electrode is located, and the majority carriers of the light-emitting unit are hole carriers; The applied potential of the gate control electrode is configured as follows: The gate control electrode applies an appropriate negative potential relative to the first electrode according to the actual device to reduce the hole carriers injected by the first electrode into the light-emitting material layer, thereby improving the luminous efficiency of the light-emitting unit. Alternatively, the gate control electrode may apply a suitable positive potential relative to the first electrode according to the actual device to increase the number of hole carriers injected by the first electrode into the light-emitting material layer, thereby increasing the luminous brightness of the light-emitting unit.

5. The gate-controlled light-emitting device structure as described in claim 1, characterized in that, The gate control electrode is located on the side where the second electrode is located, and the majority carriers of the light-emitting unit are hole carriers; The applied potential of the gate control electrode is configured as follows: The gate control electrode applies an appropriate negative potential to the second electrode according to the actual device to increase the number of electronic carriers injected by the second electrode into the light-emitting material layer, thereby improving the luminous efficiency and / or luminous brightness of the light-emitting unit.

6. The gate-controlled light-emitting device structure as described in claim 1, characterized in that, The gate control electrode is located on the side where the first electrode is located, and the majority carriers of the light-emitting unit are electronic carriers; The applied potential of the gate control electrode is configured as follows: The gate control electrode applies an appropriate positive potential relative to the first electrode according to the actual device to increase the number of hole carriers injected by the first electrode into the light-emitting material layer, thereby improving the luminous efficiency and / or luminous brightness of the light-emitting unit.

7. The gate-controlled light-emitting device structure as described in claim 1, characterized in that, The potential of the first electrode corresponding to the hole transport layer is higher than the potential of the second electrode corresponding to the electron transport layer.

8. The gate-controlled light-emitting device structure as described in claim 1, characterized in that, The bias power supply is an adjustable voltage power supply, which is adjusted according to the required luminous brightness or luminous efficiency.

9. The gate-controlled light-emitting device structure as described in claim 1, characterized in that, A current-limiting resistor is also connected in series between the gate control electrode and the bias power supply circuit.

10. The gate-controlled light-emitting device structure as described in claim 1, characterized in that, The gate control electrode is located on the backlight side of the device structure, opposite to the light-emitting side.

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