Network interface indicator light synchronous blinking circuit and control method

Abstract

The network port indicating lamp synchronous flashing circuit and control method provided by the embodiment of the present disclosure comprises a control module and a switch module, the first port of the control module is electrically connected with a data chip, the second port of the control module is electrically connected with the first end of the switch module, the third port of the control module is electrically connected with the control end of the switch module, the second end of the switch module is electrically connected with a data chip indicating lamp, and the data chip comprises at least a first type data chip and a second type data chip; the control module outputs a preset frequency pulse signal to the switch module, receives data signals sent by different types of data chips, and outputs a first control signal to the switch module corresponding to a target data chip when receiving a data signal sent by the target data chip, so as to realize the conduction of the switch module corresponding to the target data chip based on the first control signal, and make the data chip indicating lamp corresponding to the target data chip flash at a preset frequency.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of control and related technical fields, in particular, to a network interface indicator light synchronous flashing circuit and control method. BACKGROUND

[0002] The network interface of a network device generally has two indicator lights, one of which indicates the network communication rate (10 / 100 / 1000M), and is generally in a constant light state, commonly known as a link light or a speed light. The other indicator light indicates the communication state, and generally flashes when there is data communication, commonly known as an ACT light.

[0003] The ACT indicator light of a network device has many sources, some of which come from network interface chips, and some of which come from PHY chips. Generally, a network device will use network chips and PHYs from different manufacturers according to design needs. The frequencies of the ACT indicator lights output by chips from different manufacturers are not the same. In the prior art, the frequency of the ACT indicator light is adjusted by using a register inside the chip, which requires a large amount of adjustment work and cannot guarantee that the frequencies of all indicator lights are completely uniform. SUMMARY

[0004] The embodiments described herein provide a network interface indicator light synchronous flashing circuit and control method to solve the problems existing in the prior art.

[0005] In a first aspect, according to the content of the present disclosure, a network interface indicator light synchronous flashing circuit is provided, comprising: a control module and a switching module, a first port of the control module is electrically connected with a data chip, a second port of the control module is electrically connected with a first end of the switching module, a third port of the control module is electrically connected with a control end of the switching module, and a second end of the switching module is electrically connected with a data chip indicator light, the data chip at least comprising a first type data chip and a second type data chip.

[0006] The control module is configured to output a pulse signal of a preset frequency to the switching module, receive data signals sent by different types of data chips, and output a first control signal to the switching module corresponding to a target data chip when receiving a data signal sent by the target data chip, so as to control the switching module corresponding to the target data chip to be turned on based on the first control signal, so that the data chip indicator light corresponding to the target data chip flashes at the preset frequency.

[0007] In some embodiments of the present disclosure, the switch module comprises a plurality of switch units arranged in parallel, the first end of each of the switch units is electrically connected to the second port of the control module, the second end of one of the switch units is electrically connected to one of the data chip indicator lights, and the control end of each of the switch units is electrically connected to the third port of the control module, wherein the number of the switch units is the same as the number of the data chips connected to the first port of the control module, and the number of the data chip indicator lights is the same as the number of the data chips connected to the first port of the control module.

[0008] In some embodiments of the present disclosure, the switch unit comprises a transistor.

[0009] In some embodiments of the present disclosure, the method further comprises a driving current conversion module.

[0010] The driving current conversion module is configured to convert the driving current output by the control module to each branch corresponding to the data chip indicator light and then output the driving current to each data chip indicator light.

[0011] In some embodiments of the present disclosure, the driving current conversion module comprises a plurality of driving current conversion units arranged in parallel, the first end of one of the driving current conversion units is electrically connected to the second end of one of the switch units, and the second end of one of the driving current conversion units is electrically connected to one of the data chip indicator lights, wherein the number of the driving current conversion units is the same as the number of the data chips connected to the first port of the control module.

[0012] In some embodiments of the present disclosure, the driving current conversion unit comprises a NOT gate.

[0013] In some embodiments of the present disclosure, the first port of the control module comprises a plurality of first sub-ports, and one of the first sub-ports is connected to one of the data chips.

[0014] In some embodiments of the present disclosure, the control module is further configured to output a second control signal to the switch module corresponding to the target data chip when the duration of the data signal of the target data chip is greater than a preset duration, and to control the switch module corresponding to the target data chip to be turned off based on the second control signal, so that the data chip indicator light corresponding to the target data chip stops flashing.

[0015] In a second aspect, according to the present disclosure, a network port indicator light synchronous flashing control method is provided for controlling the network port indicator light synchronous flashing circuit of any one of the first aspect, comprising:

[0016] outputting a pulse signal of a preset frequency to the switch module;

[0017] The data signal transmitted by different types of data chips is received, and when the data signal transmitted by a target data chip is received, a first control signal is output to a switch module corresponding to the target data chip, so as to control the switch module corresponding to the target data chip to be turned on based on the first control signal, so that the data chip indicator light corresponding to the target data chip flashes at the preset frequency.

[0018] In some embodiments of the present disclosure, the method further comprises:

[0019] When the duration of the data signal of the target data chip is greater than the preset duration, a second control signal is output to the switch module corresponding to the target data chip, so as to control the switch module corresponding to the target data chip to be turned off based on the second control signal, so that the data chip indicator light corresponding to the target data chip stops flashing.

[0020] The network port indicator light synchronous flashing circuit and the control method provided by the embodiments of the present disclosure, the network port indicator light synchronous flashing circuit comprises a control module and a switch module, the first end of the switch module is electrically connected with the second port of the control module, the second end of the switch module is electrically connected with a data chip indicator light, the control end of the switch module is electrically connected with the third port of the control module, the first end of the control module receives data signals transmitted by different types of data chips, after the control module receives the data signals transmitted by the data chips, the control module determines the target data chip corresponding to the received data signals by analyzing the received data signals, and then outputs a first control signal to the switch module to control the switch module corresponding to the target data chip to be turned on according to the determined target data chip, when the control module outputs the first control signal to control the switch module corresponding to the target data chip to be turned on, the pulse signal output by the second port of the control module can pass through the switch module corresponding to the target data chip, so that the data chip indicator light corresponding to the target data chip flashes at a preset frequency.

[0021] The above description is only a summary of the technical solutions of the embodiments of the present application, in order to more clearly understand the technical means of the embodiments of the present application, and can be implemented according to the content of the specification, and in order to make the above and other purposes, features and advantages of the embodiments of the present application more obvious and easy to understand, the following specific embodiments of the present application are described. BRIEF DESCRIPTION OF DRAWINGS

[0022] In order to more clearly illustrate the technical solutions of the embodiments of the present disclosure, the drawings of the embodiments will be briefly described below, it should be known that the drawings described below only relate to some embodiments of the present disclosure, not to the limitation of the present disclosure, wherein:

[0023] Figure 1is a structural schematic diagram of a network port indicator light synchronous flashing circuit provided by an embodiment of the present disclosure;

[0024] Figure 2 is a structural schematic diagram of another network port indicator light synchronous flashing circuit provided by an embodiment of the present disclosure;

[0025] Figure 3 is a structural schematic diagram of still another network port indicator light synchronous flashing circuit provided by an embodiment of the present disclosure;

[0026] Figure 4 is a flow schematic diagram of a network port indicator light synchronous flashing control method provided by an embodiment of the present disclosure;

[0027] Figure 5 is a structural schematic diagram of a computer device provided by an embodiment of the present disclosure.

[0028] In the drawings, reference numbers of the last two digits that are the same, correspond to elements that are the same. It is to be noted that the elements in the drawings are schematic and not drawn to scale. DETAILED DESCRIPTION

[0029] In order to make the objects, technical solutions and advantages of the embodiments of the present disclosure clearer, the technical solutions of the embodiments of the present disclosure will be described clearly and completely below with reference to the drawings. Obviously, the described embodiments are part of the embodiments of the present disclosure, rather than all the embodiments. Based on the described embodiments of the present disclosure, all other embodiments obtained by a person of ordinary skill in the art without any inventive effort also belong to the scope of protection of the present disclosure.

[0030] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this present subject matter belongs. It will be further understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of the specification and relevant art and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein. As used herein, the statement that two or more parts are "connected" or "coupled" together refer to an indirect or direct connection or coupling.

[0031] Reference herein to "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment can be included in at least one embodiment of the application. The appearances of the phrase "in an embodiment" in various places in the specification are not necessarily all referring to the same embodiment, nor are they necessarily all directed to the same embodiment, or to a single alternative embodiment. It is explicitly contemplated that embodiments described herein can be combined with each other.

[0032] The term "and / or", used herein, merely describes an association relationship of associated objects, which means that there can be three relationships, for example, A and / or B, which can represent the three cases of existence of A, existence of A and B, and existence of B. In addition, the character " / " herein generally represents that the front and rear associated objects are in an "or" relationship.

[0033] In addition, in all embodiments of the present disclosure, terms such as "first" and "second" are only used to distinguish one component (or part of the component) from another component (or another part of the component).

[0034] In the description of the present application, unless otherwise specified, the meaning of "a plurality of" is more than two (including two), and similarly, "a plurality of groups" means more than two groups (including two groups).

[0035] In order to enable those skilled in the art to better understand the scheme of the present application, the technical solutions in the embodiments of the present application will be clearly and completely described below in combination with the drawings.

[0036] Based on the problems existing in the prior art, the present disclosure provides a network port indicator light synchronous flashing circuit, Figure 1 is a structural schematic diagram of the network port indicator light synchronous flashing circuit provided by the present disclosure, as Figure 1 shown, the network port indicator light synchronous flashing circuit comprises a control module 10 and a switch module 20, a first port of the control module 10 is electrically connected with a data chip 30, a second port of the control module 10 is electrically connected with a first end of the switch module 20, a third port of the control module 10 is electrically connected with a control end of the switch module 20, a second end of the switch module 20 is electrically connected with a data chip indicator light 40, the data chip 30 at least comprises a first type data chip and a second type data chip; the control module 10 is configured to output a pulse signal of a preset frequency to the switch module 20, and receive a data signal sent by different types of data chips 30, and when receiving a data signal sent by a target data chip, output a first control signal to the switch module 20 corresponding to the target data chip, so as to realize the conduction of the switch module 20 corresponding to the target data chip based on the first control signal, so that the data chip indicator light 40 corresponding to the target data chip flashes at a preset frequency.

[0037] Specifically, the first port of the control module 10 is electrically connected with the data chip 30, and the data chip 10 at least includes a first type data chip and a second type data chip. The first type data chip is exemplarily a PHY (Physical) chip, which is a common abbreviation for the physical layer of the OSI model. The Ethernet is a device operating the physical layer of the OSI model, and an Ethernet PHY is a chip that can send and receive Ethernet data frames. The second type data chip is exemplarily a networking processor, which is a microprocessor providing logic for sending and receiving data in a communication network. When the first port of the control module 10 is connected with the data chip 30 of different types, the data chips 30 of different types have different data transmission frequencies, and therefore, the data chip indicator light 40 has different flashing frequencies.

[0038] In order to realize that the control module 10 receives the data signal sent by the data chip 30, the flashing frequency of the data chip indicator light 40 corresponding to the data chip 30 is the same, the network port indicator light synchronous flashing circuit provided by the embodiment of the present disclosure is provided. First, the control module 10 outputs a pulse signal of a preset frequency to the switch module 20 based on the second port, that is, when the switch module 20 is in the on state, the data chip indicator light 40 electrically connected with the second end of the switch module 20 will flash at a preset frequency. Therefore, only the target data chip corresponding to the data signal received by the first port of the control module 10 needs to be determined, and then the pass of the target data chip is turned on by outputting the first control signal, so that the data chip indicator light corresponding to the target data chip can flash at a preset frequency.

[0039] In a specific embodiment, by setting the first port of the control module 10 in electrical connection with the data chip 30, the second port of the control module 10 in electrical connection with the first end of the switch module 20, the third port of the control module 10 in electrical connection with the control end of the switch module 20, and the second end of the switch module 20 in electrical connection with the data chip indicator light 40, the control module 10 outputs a preset frequency pulse signal to the switch module 20 through the second port, and the control module 10 receives the data signal sent by the data chip 30 through the first port. After the control module 10 receives the data signal sent by the data chip 30 through the first port, the received data signal is parsed to determine the target data chip corresponding to the received data signal, and then a first control signal is output to the switch module 20 according to the determined target data chip to control the switch module 20 corresponding to the target data chip to be turned on. After the switch module 20 corresponding to the target data chip is turned on, the data chip indicator light 40 corresponding to the target data chip is in electrical connection with the second port of the control module 10 through the switch module 20, the data chip indicator light 40 corresponding to the target data chip receives the preset frequency pulse signal output by the second port of the control module 10, and flashes at the preset frequency corresponding to the pulse signal.

[0040] The network port indicator light synchronous flashing circuit provided by the embodiments of the present disclosure includes a control module and a switch module. The first end of the switch module is in electrical connection with the second port of the control module, the second end of the switch module is in electrical connection with a data chip indicator light, the control end of the switch module is in electrical connection with the third port of the control module, the first end of the control module receives a data signal sent by a data chip of different types, the control module determines a target data chip corresponding to the received data signal by parsing the received data signal after receiving the data signal sent by the data chip, and then outputs a first control signal to the switch module according to the determined target data chip to control the switch module corresponding to the target data chip to be turned on. After the control module outputs the first control signal to control the switch module corresponding to the target data chip to be turned on, the pulse signal output by the second port of the control module can pass through the switch module corresponding to the target data chip, so that the data chip indicator light corresponding to the target data chip flashes at a preset frequency.

[0041] On the basis of the above embodiments, Figure 2 is another structure schematic diagram of the network port indicator light synchronous flashing circuit provided by the embodiments of the present disclosure, like Figure 2As shown, the switch module 20 in the network port indicator light synchronous flashing circuit includes a plurality of switch units connected in parallel, the first end of each switch unit is electrically connected to the second port of the control module 10, the second end of a switch unit is electrically connected to a data chip indicator light 40, and the control end of each switch unit is electrically connected to the third port of the control module 10. Among them, the number of switch units 21 is the same as the number of data chips 30 connected to the first port of the control module 10, and the number of data chip indicator lights 40 is the same as the number of data chips 30 connected to the first port of the control module 10.

[0042] Specifically, in combination with Figure 2 , the switch module 20 includes a plurality of switch units connected in parallel, and the number of switch units included in the switch module 20 is the same as the number of data chips 30 connected to the first port of the control module 10. When the data chips 30 connected to the first port of the control module 10 include first type data chips and second type data chips, the first type data chips include data chip A1 and data chip A2, and the second type data chips include data chip B1 and data chip B2. Therefore, the switch module 20 includes four switch units, and the data chip indicator light 40 includes four data chip indicator lights. Each switch unit is connected in parallel, that is, the first end of each switch unit is electrically connected to the second port of the control module, and the second end of a switch unit is connected to a data chip indicator light.

[0043] By electrically connecting the first end of each switch unit to the second port of the control module 10 and connecting the second end of a switch unit to a data chip indicator light 40, the pulse signal received by each switch unit is a pulse signal of a predetermined frequency. When each switch unit is in a conductive state, the pulse signal of a predetermined frequency output by the control module is output to the data chip indicator light connected to the second end of each switch unit through each switch unit, and the flashing frequency of each data chip indicator light is the same.

[0044] Further, by electrically connecting the control end of each switch unit with the third port of the control module 10, each switch unit receives the first control signal output by the third port of the control module 10 to turn on or turn off. For example, if the switch module 20 includes a first switch unit, a second switch unit, a third switch unit and a fourth switch unit, the second end of the first switch unit is electrically connected with the first data chip indicator light, the second end of the second switch unit is electrically connected with the second data chip indicator light, the second end of the third switch unit is electrically connected with the third data chip indicator light, and the second end of the fourth switch unit is electrically connected with the fourth data chip indicator light. If the first control signal output by the control module 10 is 1000, the first switch unit is turned on, and the second switch unit, the third switch unit and the fourth switch unit are turned off, and the first data chip indicator light flashes at a preset frequency. If the first control signal output by the control module 10 is 0100, the second switch unit is turned on, and the first switch unit, the third switch unit and the fourth switch unit are turned off, and the second data chip indicator light flashes at a preset frequency. If the first control signal output by the control module 10 is 0010, the third switch unit is turned on, and the first switch unit, the second switch unit and the fourth switch unit are turned off, and the third data chip indicator light flashes at a preset frequency. If the first control signal output by the control module 10 is 0001, the fourth switch unit is turned on, and the first switch unit, the second switch unit and the third switch unit are turned off, and the fourth data chip indicator light flashes at a preset frequency. If the first control signal output by the control module 10 is 1111, the first switch unit, the second switch unit, the third switch unit and the fourth switch unit are all turned on, and the first data chip indicator light, the second data chip indicator light, the third data chip indicator light and the fourth data chip indicator light all flash at a preset frequency.

[0045] In specific embodiments, the switch unit includes a transistor, which can be a PMOS transistor or an NMOS transistor. When the switch unit is a PMOS transistor, the switch unit is turned on when the first control signal corresponding to the path output by the third port of the control module is at a low level. When the switch unit is an NMOS transistor, the switch unit is turned on when the first control signal corresponding to the path output by the third port of the control module is at a high level. The switch unit can also be other types of switching devices, which are not specifically limited in the embodiments of the present disclosure.

[0046] In specific embodiments, the first port of the control module 10 includes a plurality of first sub-ports, and a first sub-port corresponds to a data chip.

[0047] Specifically, the data chips 30 of the access control module 10 at least include a first type of data chip and a second type of data chip, by respectively connecting the data chips 30 with one of the first sub-ports in the first ports of the control module 10, whether the data chip connected with the first sub-port sends a data signal is obtained based on the first sub-port.

[0048] For example, when the data chips include first type data chips and second type data chips, the first type data chips include data chip A1 and data chip A2, and the second type data chips include data chip B1 and data chip B2, the data chip A1 is electrically connected with the first first sub-port in the first port, the data chip A2 is electrically connected with the second first sub-port in the first port, the data chip B1 is electrically connected with the third first sub-port in the first port, and the data chip B2 is electrically connected with the fourth first sub-port in the first port. In addition, the first data chip indicator connected with the first switch unit is the indicator of the data chip A1, the second data chip indicator connected with the second switch unit is the indicator of the data chip A2, the third data chip indicator connected with the third switch unit is the indicator of the data chip B1, and the fourth data chip indicator connected with the fourth switch unit is the indicator of the data chip B2. At this time, the control module receives the data signal sent by the data chip A1 through the first first sub-port, receives the data signal sent by the data chip A2 through the second first sub-port, receives the data signal sent by the data chip B1 through the third first sub-port, and receives the data signal sent by the data chip B2 through the fourth first sub-port. When the first first sub-port receives the data signal, the second first sub-port, the third first sub-port and the fourth first sub-port do not receive the data signal, the control module outputs the first control signal to the switch module as 1000, controls the first switch unit to be turned on, and controls the second switch unit, the third switch unit and the fourth switch unit to be turned off. The pulse signal is output to the first data chip indicator through the first switch unit, so that the first data chip indicator flashes at a preset frequency. That is, when the control module receives the data signal sent by the data chip A1, the first control signal is output to control the first switch unit to be turned on, and the pulse signal is output to the first data chip indicator through the first switch unit, so that the first data chip indicator corresponding to the data chip A1 flashes at a preset frequency. Alternatively, when the first first sub-port and the third first sub-port receive the data signal, the second first sub-port and the fourth first sub-port do not receive the data signal, the control module outputs the first control signal to the switch module as 1010, controls the first switch unit and the third switch unit to be turned on, and controls the second switch unit and the fourth switch unit to be turned off. The pulse signal is output to the first data chip indicator through the first switch unit, so that the first data chip indicator corresponding to the data chip A1 flashes at a preset frequency. The pulse signal is output to the third data chip indicator through the third switch unit, so that the first data chip indicator corresponding to the data chip B1 flashes at a preset frequency, and the indicators of different types of data chips flash at the same frequency.

[0049] On the basis of the above embodiment, Figure 3is a structure diagram of another network interface indicator light synchronous flashing circuit provided by the embodiment of the present disclosure, as shown in Figure 3 The network interface indicator light synchronous flashing circuit further comprises a driving current conversion module. The driving current conversion module 50 is configured to convert the driving current output by the control module 10 to each data chip indicator light and output to each data chip indicator light.

[0050] In a specific embodiment, the network interface indicator light synchronous flashing circuit further comprises a driving current conversion module 50. Based on the driving current conversion module, the current output to each data chip indicator light meets the working current of the data chip indicator light, ensuring that the data chip indicator light can work normally.

[0051] Specifically, the driving current conversion module comprises a plurality of driving current conversion units connected in parallel. A first end of a driving current conversion unit is electrically connected to a second end of a switch unit, and a second end of the driving current conversion unit is electrically connected to a data chip indicator light. The number of driving current conversion units is the same as the number of data chips connected to the first port of the control module.

[0052] For example, the switch module comprises a first switch unit, a second switch unit, a third switch unit and a fourth switch unit. The data chip indicator light comprises a first data chip indicator light, a second data chip indicator light, a third data chip indicator light and a fourth data chip indicator light. The driving current conversion module comprises a first driving current conversion unit, a second driving current conversion unit, a third driving current conversion unit and a fourth driving current conversion unit. The first driving current conversion unit is connected in series between the first switch unit and the first data chip indicator light. The second driving current conversion unit is connected in series between the second switch unit and the second data chip indicator light. The third driving current conversion unit is connected in series between the third switch unit and the third data chip indicator light. The fourth driving current conversion unit is connected in series between the fourth switch unit and the fourth data chip indicator light.

[0053] Specifically, if the current output by the second port of the control module is 10mA, and the working current of one data chip indicator light is 2mA, then the second port of the control module can only be connected in parallel with five switch units to ensure the normal working of the data chip indicator light connected to each switch unit. By providing a driving current conversion unit between the switch unit and the data chip indicator light, and combining the feature that the input impedance of the driving current conversion unit is infinite, the driving current conversion unit can ensure the normal working of the data chip indicator light when the number of switch units connected in parallel to the second port of the control module is large and the current allocated to each switch unit is small.

[0054] The driving current conversion unit is exemplarily a NOT gate, and can also be other active devices, and the embodiments of the present disclosure do not make a specific limitation in this regard.

[0055] It should be noted that in the above embodiments, the control module includes a GD32 single-chip microcomputer, the first port of the control module is a GPIO interrupt input port, the second port of the control module is a GPIO PWM output port, and the third port of the control module is a GPIO analog signal output port.

[0056] In addition, the control module is further configured to output a second control signal to the switch module corresponding to the target data chip when the duration of the data signal of the target data chip received is greater than the preset duration, so as to control the switch module corresponding to the target data chip to be turned off based on the second control signal, so that the data chip indicator light corresponding to the target data chip stops flickering.

[0057] If the control module receives the data signal of the target data chip, the control module receives a high-level signal, and when the data chip is actively or passively turned off, the control module will always receive a high-level signal, and the data chip indicator light corresponding to the target data chip will always flicker at a preset frequency. At this time, the control module judges the relationship between the duration of the data signal of the target data chip received and the preset duration, and when the duration of the data signal of the target data chip received is greater than the preset duration, the control module outputs a second control signal to the switch module corresponding to the target data chip at this time, so as to control the switch module corresponding to the target data chip to be turned off based on the second control signal, so that the data chip indicator light corresponding to the target data chip stops flickering, thereby avoiding the data chip indicator light corresponding to the target data chip from flickering all the time when the target data chip is actively or passively turned off, and the user cannot confirm the state of the target data chip.

[0058] On the basis of the above embodiments, the present disclosure further provides a network port indicator light synchronous flickering control method, Figure 4 is a flowchart of the network port indicator light synchronous flickering control method provided by the embodiments of the present disclosure, as Figure 4 shown, the network port indicator light synchronous flickering control method comprises:

[0059] S110, output a pulse signal of a preset frequency to the switch module.

[0060] S120, receive the data signal sent by different types of data chips, and when the data signal sent by the target data chip is received, output a first control signal to the switch module corresponding to the target data chip, so as to control the switch module corresponding to the target data chip to be turned on based on the first control signal, so that the data chip indicator light corresponding to the target data chip flickers at a preset frequency.

[0061] In the embodiment of the present disclosure, first, the control module outputs a pulse signal of a preset frequency to the switch module based on the second port, that is, when the switch module is in a conduction state, the data chip indicator light electrically connected with the second end of the switch module will flicker at a preset frequency. Therefore, only the target data chip corresponding to the data signal received by the first port of the control module needs to be determined, and then the pass of the target data chip is turned on by outputting the first control signal, so as to realize that the data chip indicator light corresponding to the target data chip flickers at a preset frequency. When the control module receives the data signal sent by the data chip through the first port, the target data chip corresponding to the received data signal is determined by analyzing the received data signal, and then the first control signal is output to the switch module according to the determined target data chip, so as to control the switch module corresponding to the target data chip to be turned on. When the switch module corresponding to the target data chip is turned on, the data chip indicator light corresponding to the target data chip is electrically connected with the second port of the control module through the switch module, the data chip indicator light corresponding to the target data chip receives the pulse signal of the preset frequency output by the second port of the control module, and flickers at the preset frequency corresponding to the pulse signal.

[0062] In addition, when the duration of the data signal of the target data chip is greater than the preset duration, the second control signal is output to the switch module corresponding to the target data chip, so as to control the switch module corresponding to the target data chip to be turned off based on the second control signal, so that the data chip indicator light corresponding to the target data chip stops flickering.

[0063] The network port indicator light synchronization flickering control method provided by the embodiment of the present disclosure determines the target data chip corresponding to the received data signal by analyzing the received data signal, and then outputs the first control signal to the switch module according to the determined target data chip to control the switch module corresponding to the target data chip to be turned on. When the control module outputs the first control signal to control the switch module corresponding to the target data chip to be turned on, the pulse signal output by the second port of the control module can pass through the pass of the switch module corresponding to the target data chip, so that the data chip indicator light corresponding to the target data chip flickers at a preset frequency.

[0064] The embodiment of the present application also provides a computer device, please refer to Figure 5 , Figure 5 The basic structure block diagram of the computer device of the embodiment is shown in the figure.

[0065] The computer device includes a memory 510 and a processor 520 which are communicatively connected through a system bus. It is noted that only the computer device with components 510-520 is shown in the figure, but it is understood that not all of the shown components are required to be implemented, and more or less components can be alternatively implemented. Among them, those skilled in the art can understand that the computer device herein is a device capable of automatically performing numerical calculation and / or information processing according to pre-set or stored instructions, and its hardware includes but is not limited to microprocessors, application specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), digital signal processors (DSPs), embedded devices, etc.

[0066] The computer device can be a desktop computer, a notebook computer, a palm computer, a cloud server, and the like. The computer device can interact with the user through a keyboard, a mouse, a remote controller, a touchpad, a voice control device, and the like.

[0067] The memory 510 includes at least one type of readable storage medium, including nonvolatile memory or volatile memory, for example, flash memory, a hard disk, a multimedia card, a card-type memory (e.g., SD or DX memory, etc.), random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), programmable read-only memory (PROM), a magnetic memory, a magnetic disk, an optical disk, etc. The RAM can include static RAM or dynamic RAM. In some embodiments, the memory 510 can be an internal memory unit of the computer device, for example, a hard disk or a memory of the computer device. In other embodiments, the memory 510 can also be an external storage device of the computer device, for example, a plug-in hard disk, a Smart Media Card (SMC), a Secure Digital (SD) card, or a flash card, etc. equipped on the computer device. Of course, the memory 510 can include both an internal memory unit and an external storage device of the computer device. In this embodiment, the memory 510 is generally used to store an operating system and various application software installed on the computer device, for example, program codes of the above-described method, etc. In addition, the memory 510 can also be used to temporarily store various data that has been output or will be output.

[0068] The processor 520 is generally used to perform the overall operation of the computer device. In this embodiment, the memory 510 is used to store program codes or instructions, which include computer operation instructions, and the processor 520 is used to execute the program codes or instructions stored in the memory 510 or process data, for example, run the program codes of the above-described method.

[0069] In this document, the bus can be an Industry Standard Architecture (ISA) bus, a Peripheral Component Interconnect (PCI) bus, an Extended Industry Standard Architecture (EISA) bus, or the like. The bus system can be divided into an address bus, a data bus, a control bus, etc. For ease of representation, only one thick line is shown in the figure, but this does not mean that there is only one bus or only one type of bus.

[0070] Another embodiment of the present application also provides a computer readable medium, which can be a computer readable signal medium or a computer readable medium. The processor in the computer reads the computer readable program code stored in the computer readable medium, so that the processor can perform the function actions specified in each step or combination of steps in the above method; and generates a device that implements the function actions specified in each block or combination of blocks in the block diagram.

[0071] The computer readable medium includes, but is not limited to, electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, device or apparatus, or any appropriate combination of the foregoing, for storing program codes or instructions, which include computer operation instructions, and processors for executing the program codes or instructions of the above method stored in the memory.

[0072] The definition of the memory and the processor can refer to the description of the foregoing computer device embodiment, which will not be repeated here.

[0073] In several embodiments provided in the present application, it should be understood that the disclosed system, device and method can be implemented in other ways. For example, the device embodiment described above is only schematic, for example, the division of the module or unit is only a logical function division, and actual implementation can have another division manner, for example, a plurality of units or components can be combined or integrated into another system, or some features can be ignored or not executed. In addition, the coupling or direct coupling or communication connection between the displayed or discussed each other can be through some interface, indirect coupling or communication connection between the devices or units, which can be electrical, mechanical or other forms.

[0074] The function units or modules in each embodiment of the present application can be integrated in one processing unit, or each unit can exist physically, or two or more units can be integrated in one unit. The integrated unit can be realized in the form of hardware or in the form of software function unit.

[0075] If the integrated unit is implemented in the form of a software function unit and sold or used as an independent product, it can be stored in a computer readable storage medium. Based on such understanding, the technical solutions of the present application essentially or the part that contributes to the prior art or the whole or part of the technical solutions can be embodied in the form of a software product. The computer software product is stored in a storage medium and includes a number of instructions for causing a computer device (which can be a personal computer, a server, or a network device, etc.) or a processor to execute all or part of the steps of the embodiments of the method of the present application. The aforementioned storage medium includes: a U disk, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk, and various media that can store program codes.

[0076] Unless the context clearly indicates otherwise, as used herein and in the appended claims, the singular form "a," "an," and "the" include plural references unless the context clearly dictates otherwise. Accordingly, the use of "a" or "an" herein and in the following claims is intended to be interpreted to include the plural, unless the context clearly indicates otherwise. Similarly, the words "comprise," "comprises," and "comprising" are to be interpreted inclusively rather than exclusively. Likewise, the terms "include," "including," and "or" should be construed as inclusive, unless the context clearly indicates otherwise. Where the term "example" is used in the following disclosure, particularly after the phrases "such as" or "including," the term "example" is merely an example of a specific embodiment and does not necessarily exclude others.

[0077] Further aspects and scope of adaptation become apparent from the description provided herein. It should be appreciated that individual aspects of the present application can be implemented alone or in combination with one or more other aspects. It should also be appreciated that the description and specific examples herein are intended to be illustrative only and are not intended to limit the scope of the present application.

[0078] The above detailed description of several embodiments of the present disclosure has been described, but it is obvious that those skilled in the art can make various modifications and variations to the embodiments of the present disclosure without departing from the spirit and scope of the present disclosure. The protection scope of the present disclosure is defined by the appended claims.

Claims

1. A circuit for synchronous flashing of network port indicator lights, characterized in that, include: The control module and the switch module are provided. The first port of the control module is electrically connected to the data chip, the second port of the control module is electrically connected to the first terminal of the switch module, the third port of the control module is electrically connected to the control terminal of the switch module, and the second terminal of the switch module is electrically connected to the indicator light of the data chip. The data chip includes at least a first type of data chip and a second type of data chip. The control module is configured to output a pulse signal of a preset frequency to the switch module, and to receive data signals sent by different types of data chips. When a data signal sent by a target data chip is received, the control module outputs a first control signal to the switch module corresponding to the target data chip, so as to control the switch module corresponding to the target data chip to be turned on based on the first control signal, so that the indicator light of the data chip corresponding to the target data chip flashes at the preset frequency.

2. The circuit according to claim 1, characterized in that, The switching module includes multiple switching units arranged in parallel. The first end of each switching unit is electrically connected to the second port of the control module, the second end of each switching unit is electrically connected to a data chip indicator light, and the control end of each switching unit is electrically connected to the third port of the control module. The number of switching units is the same as the number of data chips connected to the first port of the control module, and the number of data chip indicator lights is the same as the number of data chips connected to the first port of the control module.

3. The circuit according to claim 2, characterized in that, The switching unit includes a transistor.

4. The circuit according to claim 2, characterized in that, Also includes: Drive current conversion module; The drive current conversion module is configured to convert the drive current output by the control module to the corresponding branch of each data chip indicator and then output it to each data chip indicator.

5. The circuit according to claim 4, characterized in that, The drive current conversion module includes multiple drive current conversion units arranged in parallel. The first end of one drive current conversion unit is electrically connected to the second end of one of the switching units, and the second end of one drive current conversion unit is electrically connected to one of the data chip indicator lights. The number of drive current conversion units is the same as the number of data chips connected to the first port of the control module.

6. The circuit according to claim 5, characterized in that, The drive current conversion unit includes NOT gates.

7. The circuit according to claim 1, characterized in that, The first port of the control module includes multiple first sub-ports, and each first sub-port is connected to a data chip.

8. The circuit according to claim 1, characterized in that, The control module is further configured to output a second control signal to the switch module corresponding to the target data chip when the duration of the received data signal from the target data chip is greater than a preset duration, thereby controlling the switch module corresponding to the target data chip to turn off based on the second control signal, so that the indicator light of the data chip corresponding to the target data chip stops flashing.

9. A method for controlling the synchronous flashing of a network port indicator light, used to control the synchronous flashing circuit of the network port indicator light according to any one of claims 1-8, characterized in that, include: Output a pulse signal of a preset frequency to the switching module; It receives data signals sent by different types of data chips, and when it receives a data signal sent by a target data chip, it outputs a first control signal to the switch module corresponding to the target data chip, thereby controlling the switch module corresponding to the target data chip to be turned on based on the first control signal, so that the indicator light of the data chip corresponding to the target data chip flashes at the preset frequency.

10. The control method according to claim 9, characterized in that, The method further includes: When the duration of the data signal received from the target data chip exceeds a preset duration, a second control signal is output to the switch module corresponding to the target data chip, thereby controlling the switch module corresponding to the target data chip to turn off based on the second control signal, so that the indicator light of the data chip corresponding to the target data chip stops flashing.

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