Voltage controlled oscillator and phase locked loop system based on a parallel 8-shaped inductor circuit

Abstract

The application relates to a voltage-controlled oscillator and a phase-locked loop system based on a parallel 8-shaped inductor circuit. The voltage-controlled oscillator comprises a parallel 8-shaped inductor circuit and two identical VCO core circuits; wherein the two identical VCO core circuits are connected with output ports on both sides of the parallel 8-shaped inductor circuit respectively; the parallel 8-shaped inductor circuit comprises a plurality of switch tubes, each switch tube is used for being turned on or turned off under the control of a first external signal, so that the parallel 8-shaped inductor circuit works in a first inductance mode or a second inductance mode, and different inductance values are provided in different inductance modes; each VCO core circuit is used for providing a variable capacitance value in the process of working of the voltage-controlled oscillator and in the process of switching of the parallel 8-shaped inductor circuit between the first inductance mode and the second inductance mode. The voltage-controlled oscillator has a large frequency coverage range.

Description

Technical Field

[0001] This application relates to the field of microelectronic circuit technology, and in particular to a voltage-controlled oscillator and phase-locked loop system based on a parallel figure-eight inductor circuit. Background Technology

[0002] The voltage-controlled oscillator (VCO) is the core module of the entire phase-locked loop (PLL), directly determining the operating frequency and out-of-band phase noise performance of the PLL.

[0003] The voltage-controlled oscillators provided in related technologies mainly use a large array of switched capacitors to cover a wide frequency range. However, since each switched capacitor branch introduces parasitic resistance and parasitic capacitance, a trade-off must be made between phase noise performance and frequency coverage, resulting in a relatively small frequency coverage. Summary of the Invention

[0004] Therefore, it is necessary to provide a voltage-controlled oscillator and phase-locked loop system based on a parallel figure-eight inductor circuit with a wide frequency coverage to address the above-mentioned technical problems.

[0005] In a first aspect, this application provides a voltage-controlled oscillator (VCO). The VCO includes a parallel figure-eight inductor circuit and two identical VCO core circuits; wherein the two identical VCO core circuits are respectively connected to the output ports on both sides of the parallel figure-eight inductor circuit; the parallel figure-eight inductor circuit includes multiple switching transistors, each switching transistor being turned on or off under the control of a first external signal, so that the parallel figure-eight inductor circuit operates in a first inductor mode or a second inductor mode, and provides different inductance values ​​in different inductance modes; each VCO core circuit is used to provide a variable capacitance value during the operation of the VCO and during the switching of the parallel figure-eight inductor circuit between the first inductor mode and the second inductor mode.

[0006] In one embodiment, when the parallel figure-eight inductor circuit operates in the first inductor mode, the currents transmitted from the two VCO core circuits to the parallel figure-eight inductor circuit are in opposite directions and superimposed at the target conductor of the parallel figure-eight inductor circuit; when the parallel figure-eight inductor circuit operates in the second inductor mode, the currents transmitted from the two VCO core circuits to the parallel figure-eight inductor circuit are in the same direction and cancel each other out at the target conductor of the parallel figure-eight inductor circuit.

[0007] In one embodiment, the two VCO core circuits include a first VCO core circuit and a second VCO core circuit; when the parallel figure-eight inductor circuit operates in the first inductor mode, the direction of the current transmitted from the first VCO core circuit to the parallel figure-eight inductor circuit is clockwise, and the direction of the current transmitted from the second VCO core circuit to the parallel figure-eight inductor circuit is counterclockwise; when the parallel figure-eight inductor circuit operates in the second inductor mode, the direction of the current transmitted from both the first VCO core circuit and the second VCO core circuit to the parallel figure-eight inductor circuit is either counterclockwise or both are clockwise.

[0008] In one embodiment, the parallel figure-eight inductor circuit provides an inductance value greater in the first inductor mode than the inductance value provided in the second inductor mode.

[0009] In one embodiment, the first external signal includes a first switch signal and a second switch signal that is inversely phase to the first switch signal; the plurality of switches include a first switch, a second switch, a third switch, a fourth switch, a fifth switch, and a sixth switch; when the first switch signal is high and the second switch signal is low, the first, second, third, and fourth switches are turned off under the control of the first switch signal, and the fifth and sixth switches are turned on under the control of the second switch signal, so that the parallel figure-eight inductor circuit operates in the first inductor mode; when the first switch signal is low and the second switch signal is high, the first, second, third, and fourth switches are turned on under the control of the first switch signal, and the fifth and sixth switches are turned off under the control of the second switch signal, so that the parallel figure-eight inductor circuit operates in the second inductor mode.

[0010] In one embodiment, all of the multiple switching transistors are PMOS transistors.

[0011] In one embodiment, the parallel figure-eight inductor circuit includes a first output port and a second output port on a first side, and a third output port and a fourth output port on a second side. The first, second, third, and fourth output ports are connected in a figure-eight configuration via metal wires. The gates of the first, second, third, and fourth switching transistors are connected to the first switching signal, and the gates of the fifth and sixth switching transistors are connected to the second switching signal. The drain of the first switching transistor is connected to the first output port. The output ports are connected as follows: the source of the first switching transistor is connected to the source of the third switching transistor; the drain of the third switching transistor is connected to the fourth output port; the drain of the second switching transistor is connected to the second output port, and the source of the second switching transistor is connected to the source of the fourth switching transistor; the drain of the fourth switching transistor is connected to the third output port; the source of the fifth switching transistor is connected to the third output port, and the drain of the fifth switching transistor is connected to the first output port; the source of the sixth switching transistor is connected to the fourth output port, and the drain of the sixth switching transistor is connected to the second output port.

[0012] In one embodiment, the VCO core circuit includes a reference capacitor circuit, a variable capacitor circuit, a core negative resistance circuit, and a positive body bias circuit. The reference capacitor circuit, connected to the output port and the core negative resistance circuit, provides a fixed reference capacitance value for the resonant cavity of the voltage-controlled oscillator. The variable capacitor circuit, connected to the output port, provides a variable capacitance value for the resonant cavity of the voltage-controlled oscillator. The core negative resistance circuit acts as a negative resistor to offset the losses caused by the resistance in the resonant cavity of the voltage-controlled oscillator. The positive body bias circuit, connected to the core negative resistance circuit, provides a positive current waveform for the voltage-controlled oscillator.

[0013] In one embodiment, the variable capacitor circuit includes a switched variable capacitor unit, a switched capacitor array, and an adjustable capacitor unit. The switched variable capacitor unit is used to provide a variable first capacitance value to the resonant cavity when the parallel figure-eight inductor circuit is in the first inductor mode, and to provide a fixed second capacitance value to the resonant cavity when the parallel figure-eight inductor circuit is in the second inductor mode. The switched capacitor array includes multiple switched capacitor units connected in parallel, and is used to provide a fixed third capacitance value to the resonant cavity when each switched capacitor unit is turned on. The adjustable capacitor unit includes multiple variable capacitors, and is used to provide a variable fourth capacitance value to the resonant cavity under the control of an external control voltage signal.

[0014] In one embodiment, the first external signal includes a first switching signal and a second switching signal that is inversely related to the first switching signal; the variable capacitor unit includes a first NMOS transistor, a second NMOS transistor, a first PMOS transistor, a first variable capacitor, and a second variable capacitor; wherein the gate of the first NMOS transistor is connected to the second switching signal, the drain of the first NMOS transistor is connected to the first terminal of the first variable capacitor and the first terminal of the second variable capacitor, and the source of the first NMOS transistor is grounded; the source of the second NMOS transistor is connected to an external control voltage signal, the drain of the second NMOS transistor is connected to the drain of the first NMOS transistor, and the gate of the second NMOS transistor is connected to the first switching signal; the source of the first PMOS transistor is connected to the external control voltage signal, the drain of the first PMOS transistor is connected to the drain of the second NMOS transistor, and the gate of the first PMOS transistor is connected to the second switching signal; the second terminal of the first variable capacitor and the second terminal of the second variable capacitor are connected to two different output ports on the same side.

[0015] In one embodiment, the reference capacitor circuit includes a first reference capacitor and a second reference capacitor; the core negative resistance circuit includes a cross-coupled first negative resistance transistor and a second negative resistance transistor; the positive body bias circuit includes a cross-coupled first positive body bias transistor and a second positive body bias transistor; wherein, the first terminal of the first reference capacitor is connected to the drain of the first negative resistance transistor and connected to one of the two output ports on the same side; the first terminal of the second reference capacitor is connected to the drain of the second negative resistance transistor and connected to the other of the two output ports on the same side; the second terminal of the first reference capacitor is connected to the source of the first negative resistance transistor, and the second terminal of the second reference capacitor is connected to the source of the second negative resistance transistor. The source is connected; the body of the first negative resistor is connected to the body of the first positive body biased transistor, and the gate of the first negative resistor is connected to the drain of the second negative resistor; the body of the second negative resistor is connected to the body of the second positive body biased transistor, and the gate of the second negative resistor is connected to the drain of the first negative resistor; the drain of the first positive body biased transistor is connected to the source of the first negative resistor, the gate of the second positive body biased transistor, and the body of the second positive body biased transistor; the source of the first positive body biased transistor is grounded; the gate of the first positive body biased transistor is connected to the source of the second negative resistor, the body of the first negative resistor, and the drain of the second positive body biased transistor; the source of the second positive body biased transistor is grounded.

[0016] Secondly, this application also provides a phase-locked loop system, which includes a voltage-controlled oscillator as described in any of the first aspects above.

[0017] In the aforementioned voltage-controlled oscillator and phase-locked loop system based on a parallel figure-eight inductor circuit, the voltage-controlled oscillator includes a parallel figure-eight inductor circuit and two identical VCO core circuits. The two identical VCO core circuits are respectively connected to the output ports on both sides of the parallel figure-eight inductor circuit. The parallel figure-eight inductor circuit includes multiple switching transistors, each of which is turned on or off under the control of a first external signal, so that the parallel figure-eight inductor circuit operates in a first inductor mode or a second inductor mode, and provides different inductance values ​​in different inductance modes. Each VCO core circuit provides a variable capacitance value during the operation of the voltage-controlled oscillator and during the switching of the parallel figure-eight inductor circuit between the first and second inductance modes. Since the parallel figure-eight inductor circuit can operate in different modes and provide a variable inductance value, and the VCO core circuit can provide a variable capacitance value, and the frequency range of the voltage-controlled oscillator is determined by the inductance and capacitance values, a larger frequency range can be provided when the inductance and capacitance values ​​are variable, which means increasing the frequency coverage of the voltage-controlled oscillator. Attached Figure Description

[0018] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0019] Figure 1 This is a schematic diagram of the structure of a voltage-controlled oscillator in one embodiment;

[0020] Figure 2 This is a schematic diagram of the current flow in a parallel figure-eight inductor circuit in one embodiment;

[0021] Figure 3 This is a schematic diagram of the current flow in a parallel figure-eight inductor circuit under another second inductor mode in one embodiment;

[0022] Figure 4 This is a schematic diagram of a parallel figure-eight inductor circuit in one embodiment;

[0023] Figure 5 This is a schematic diagram of a parallel figure-eight inductor circuit in one embodiment;

[0024] Figure 6 This is a schematic diagram of the layout of a parallel figure-eight inductor circuit in one embodiment;

[0025] Figure 7 This is a schematic diagram of the structure of a variable capacitor circuit in one embodiment;

[0026] Figure 8 This is a schematic diagram of the structure of a switched capacitor unit in one embodiment;

[0027] Figure 9 This is a schematic diagram of the structure of a switchable variable capacitor unit in one embodiment;

[0028] Figure 10 This is a schematic diagram of another voltage-controlled oscillator in one embodiment;

[0029] Figure 11 This is a schematic diagram of the simulation results comparing drain current in one embodiment;

[0030] Figure 12 This is a schematic diagram of the noise sensitivity function of a voltage-controlled oscillator in one embodiment;

[0031] Figure 13 This is a schematic diagram of the frequency coverage range of a voltage-controlled oscillator in one embodiment;

[0032] Figure 14 This is a schematic diagram comparing phase noise curves in one embodiment. Detailed Implementation

[0033] To make the above-mentioned objectives, features, and advantages of this application more apparent and understandable, the specific embodiments of this application will be described in detail below with reference to the accompanying drawings. It should be understood that many specific details are set forth in the following description in order to provide a full understanding of this application, but this application can be implemented in many other ways different from those described herein, and those skilled in the art can make similar modifications without departing from the spirit of this application. Therefore, this application is not limited to the specific embodiments disclosed below.

[0034] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the application.

[0035] It is understood that the terms "first," "second," etc., used herein may be used to describe various elements, but these elements are not limited by these terms. These terms are only used to distinguish one element from another. For example, without departing from the scope of this application, a first resistor may be referred to as a second resistor, and similarly, a second resistor may be referred to as a first resistor. Both the first resistor and the second resistor are resistors, but they are not the same resistor.

[0036] It is understood that the term "connection" in the following embodiments should be understood as "electrical connection," "communication connection," etc., if the connected circuits, modules, units, etc., have electrical signal or data transmission with each other.

[0037] It is understandable that "at least one" refers to one or more, and "multiple" refers to two or more. "At least a part of an element" refers to part or all of an element.

[0038] When used herein, the singular forms of “a,” “an,” and “the” may also include the plural forms unless the context clearly indicates otherwise. It should also be understood that the terms “comprising / including” or “having,” etc., specify the presence of the stated features, wholes, steps, operations, components, parts, or combinations thereof, but do not preclude the possibility of the presence or addition of one or more other features, wholes, steps, operations, components, parts, or combinations thereof. Meanwhile, the term “and / or” as used in this specification includes any and all combinations of the associated listed items.

[0039] The voltage-controlled oscillator (VCO) is the core module of the entire phase-locked loop (PLL) circuit, directly determining the PLL's operating frequency range and out-of-band phase noise performance. With the continuous development of communication technology, the channel bandwidth specified by protocols is constantly expanding, placing more stringent demands on the out-of-band performance of the PLL. Excessive phase noise can severely affect signal demodulation, thus interfering with the normal operation of the transceiver. Therefore, designing a wideband, low-phase-noise VCO is of great significance in today's society where various new communication protocols are constantly emerging. Simultaneously, ensuring maximum loop stability when applied to a PLL also necessitates linearizing the VCO's gain.

[0040] Traditional voltage-controlled oscillators (VCOs) mainly use a large array of switched capacitors to cover a wide frequency range. However, since each switched capacitor branch introduces parasitic resistance and capacitance, a trade-off must be made between phase noise performance and frequency coverage, resulting in a small frequency range and relatively high power consumption.

[0041] In view of this, embodiments of this application provide a broadband, low-phase-noise, constant-gain differential Colpitts voltage-controlled oscillator based on a parallel figure-eight inductor. It controls the effective inductance value connected to the resonant cavity through mode switching, expanding the frequency coverage of the voltage-controlled oscillator without increasing the number of switched capacitors excessively. Furthermore, by employing positive body biasing technology to shape the oscillator's current waveform, the phase noise performance of the voltage-controlled oscillator is improved with lower power consumption. Additionally, by using a switched variable capacitor unit to offset the gain changes caused by factor band switching of the voltage-controlled oscillator, constant gain is achieved, realizing the coexistence of wide frequency coverage, low phase noise, and constant gain.

[0042] Please refer to Figure 1This document illustrates a schematic diagram of a voltage-controlled oscillator (VCO) according to an embodiment of this application. The VCO 100 includes a parallel figure-eight inductor circuit 101 and two identical VCO core circuits 102. The two identical VCO core circuits 102 are respectively connected to the output ports on both sides of the parallel figure-eight inductor circuit 101. The parallel figure-eight inductor circuit 101 includes multiple switching transistors, each transistor being turned on or off under the control of a first external signal, so that the parallel figure-eight inductor circuit 101 operates in a first inductor mode or a second inductor mode, providing different inductance values ​​in different inductance modes. Each VCO core circuit 102 provides a variable capacitance value during the operation of the VCO and during the switching between the first and second inductance modes of the parallel figure-eight inductor circuit 101. It should be noted that, for ease of explanation, the above-mentioned parallel figure-eight inductor circuit will be referred to as an inductor circuit in the following text.

[0043] The inductor circuit 101 has output ports on both sides. One of the two VCO core circuits 102 is connected to one of the output ports, and the other of the two VCO core circuits 102 is connected to the output port on the other side. During the operation of the voltage-controlled oscillator, each VCO core circuit 102 provides a corresponding capacitance value, and the inductor circuit 101 provides a corresponding inductance value, depending on the frequency required by the voltage-controlled oscillator, thus enabling the resonant cavity of the voltage-controlled oscillator to have a corresponding frequency.

[0044] Optionally, the variable capacitance value provided by each VCO core circuit 102 can be a capacitance range. In different inductor modes, the inductance value provided by the inductor circuit 101 can also be an inductance value range. In this way, the resonant cavity of the voltage-controlled oscillator can be located in a certain frequency range under a certain state.

[0045] Here, the inductor circuit 101 essentially functions as a transformer, and each VCO core circuit 102 acts as a transconductance unit, transmitting current to the inductor circuit 101. When a transconductance unit is connected to each side of the inductor circuit 101, the alternating currents of the two transconductance units simultaneously flow through the metal wire in the middle of the figure-eight inductor, causing the inductor circuit 101 to operate in the corresponding mode according to the direction of the two alternating currents.

[0046] Optionally, each VCO core circuit 102 can be controlled by an external signal to provide a variable capacitance value during the operation of the voltage-controlled oscillator, and to provide a variable capacitance value during the switching between the first inductor mode and the second inductor mode under the control of an external signal, thereby improving the flexibility of the frequency range switching of the voltage-controlled oscillator.

[0047] In the aforementioned voltage-controlled oscillator and phase-locked loop system based on a parallel figure-eight inductor circuit 101, the voltage-controlled oscillator includes a parallel figure-eight inductor circuit 101 and two identical VCO core circuits 102. The two identical VCO core circuits 102 are respectively connected to the output ports on both sides of the parallel figure-eight inductor circuit 101. The parallel figure-eight inductor circuit 101 includes multiple switching transistors, each transistor being turned on or off under the control of a first external signal, so that the parallel figure-eight inductor circuit 101 operates in a first inductor mode or a second inductor mode, providing different inductance values ​​in different inductance modes. Each VCO core circuit 102 provides a variable capacitance value during the operation of the voltage-controlled oscillator and during the switching of the parallel figure-eight inductor circuit 101 between the first inductor mode and the second inductor mode. Since the parallel figure-eight inductor circuit 101 can operate in different modes and provide a variable inductance value, and the VCO core circuit 102 can provide a variable capacitance value, and the frequency range of the voltage-controlled oscillator is determined by the inductance and capacitance values, a larger frequency range can be provided when the inductance and capacitance values ​​are variable, which means that the frequency coverage range of the voltage-controlled oscillator is increased.

[0048] In one embodiment, the parallel figure-eight inductor circuit 101 provides an inductance value greater than that provided in the second inductance mode.

[0049] That is, the first inductor mode is a large inductor mode, in which the inductor circuit 101 provides a larger inductance value; the second inductor mode is a small inductor mode, in which the inductor circuit 101 provides a smaller inductance value.

[0050] Furthermore, in the first inductor mode, the Q value of the inductor circuit 101 is higher, i.e., it is in a high-Q mode. In the second inductor mode, the Q value of the inductor circuit 101 is lower, i.e., it is in a low-Q mode. The Q value of the inductor, also known as the quality factor of the inductor, is a key parameter for measuring inductor devices.

[0051] In one embodiment, when the parallel figure-eight inductor circuit 101 operates in the first inductor mode, the currents transmitted from the two VCO core circuits 102 to the parallel figure-eight inductor circuit 101 are in opposite directions and superimposed at the target wire of the parallel figure-eight inductor circuit 101; when the parallel figure-eight inductor circuit 101 operates in the second inductor mode, the currents transmitted from the two VCO core circuits 102 to the parallel figure-eight inductor circuit 101 are in the same direction and cancel each other out at the target wire of the parallel figure-eight inductor circuit 101.

[0052] In the inductor circuit 101, each switch and the output port are connected by a metal wire. After all the metal wires are connected, they form an "8" shape, thus obtaining the parallel figure-8 shaped inductor circuit 101.

[0053] Here, the target conductor can refer to the metal wire in the middle part of the parallel figure-eight inductor circuit 101. Optionally, taking the connection line of the inductor circuit 101 as an example, which is divided into a middle line (the metal wire in the middle part), a first connection line, and a second connection line, the current transmitted from the two VCO core circuits 102 to the parallel figure-eight inductor circuit 101 is transmitted to the middle part line through the first connection line and the second connection line, respectively, and then superimposed or canceled out.

[0054] In one optional embodiment, when the parallel figure-eight inductor circuit 101 operates in the first inductor mode, the direction of the current transmitted from the first VCO core circuit 102 to the parallel figure-eight inductor circuit 101 is counterclockwise, and the direction of the current transmitted from the second VCO core circuit 102 to the parallel figure-eight inductor circuit 101 is clockwise. For example, as... Figure 2 As shown, a schematic diagram of the current flow in a parallel figure-eight inductor circuit under the first inductor mode is illustrated.

[0055] As can be seen, the currents in the two VCO core circuits 102 flow clockwise and counterclockwise in the inductor, respectively. The currents superimpose at the position of the middle conductor, enhancing the magnetic field and corresponding to a larger inductance, which is called the large inductance mode. model).

[0056] Among them, when the inductor circuit 101 is in In mode, its equivalent input impedance The expression is:

[0057]

[0058] At this time, the resonant frequency of the voltage-controlled oscillator is:

[0059]

[0060] in, , This refers to the inductance value provided by the common section (intermediate circuit) of an inductor. This refers to the inductance provided by the metal wires between each output port and the common part of the inductor. The coupling coefficient of inductor circuit 101 is... This represents the loss resistance on each side of inductor circuit 101. j is the imaginary unit. It is the angular frequency. C is the total capacitance between the two output ports on the same side of the inductor circuit 101, which includes both the parasitic capacitance of the inductor and the capacitance provided in the VCO core circuit 102.

[0061] In another optional embodiment, when the parallel figure-eight inductor circuit 101 operates in the second inductor mode, the direction of the current transmitted from the first VCO core circuit 102 and the second VCO core circuit 102 to the parallel figure-eight inductor circuit 101 is either counterclockwise or both clockwise. For example, as shown... Figure 3 As shown, a schematic diagram of the current flow in a parallel figure-eight inductor circuit under the second inductor mode is illustrated.

[0062] As can be seen, the currents in the two VCO core circuits 102 flow clockwise or counterclockwise in the inductor. The currents cancel each other out at the position of the middle conductor, weakening the magnetic field and corresponding to a smaller inductance, which is called the small inductor mode. model).

[0063] When the inductor circuit 101 is in In this mode, the current in the intermediate circuit cancels out. It no longer affects the impedance; correspondingly, its input impedance is:

[0064]

[0065] At this time, the resonant frequency of the voltage-controlled oscillator is:

[0066]

[0067] In this embodiment, the switching between the first inductor mode and the second inductor mode is achieved by using multiple switching transistors. The following example uses multiple switching transistors, including a first switching transistor, a second switching transistor, a third switching transistor, a fourth switching transistor, a fifth switching transistor, and a sixth switching transistor, to illustrate the mode switching process of the inductor circuit 101.

[0068] In one embodiment, the first external signal includes a first switch signal and a second switch signal that is inverted by the first switch signal; the plurality of switching transistors include a first switch transistor, a second switch transistor, a third switch transistor, a fourth switch transistor, a fifth switch transistor, and a sixth switch transistor. When the first switch signal is high and the second switch signal is low, the first, second, third, and fourth switch transistors are turned off under the control of the first switch signal, and the fifth and sixth switch transistors are turned on under the control of the second switch signal, so that the parallel figure-eight inductor circuit 101 operates in a first inductor mode; when the first switch signal is low and the second switch signal is high, the first, second, third, and fourth switch transistors are turned on under the control of the first switch signal, and the fifth and sixth switch transistors are turned off under the control of the second switch signal, so that the parallel figure-eight inductor circuit 101 operates in a second inductor mode.

[0069] In this system, the inductor circuit 101 is connected to the first and second switching signals in the first external signal. Each switching transistor is turned on or off under the control of the first and second switching signals. In the phase-locked loop system, when the system desires the resonant frequency of the voltage-controlled oscillator to be in a lower range, i.e., with a larger inductance value, the first switching signal is output at a high level and the second switching signal is output at a low level, thereby causing the inductor circuit 101 to operate in the first inductor mode; when the system desires the resonant frequency of the voltage-controlled oscillator to be in a higher range, i.e., with a smaller inductance value, the first switching signal is output at a low level and the second switching signal is output at a high level, thereby causing the inductor circuit 101 to operate in the second inductor mode.

[0070] For example, the first, second, third, and fourth switching transistors are connected to the first switching signal and are turned on or off under the control of the first switching signal; the fifth and sixth switching transistors are connected to the second switching signal and are turned on or off under the control of the second switching signal. Please refer to [reference needed]. Figure 4 It shows a schematic diagram of a parallel figure-eight inductor circuit provided in an embodiment of this application. Corresponding to the switching transistors associated with the first inductor mode, The mode corresponds to the switching transistor associated with the second inductor mode.

[0071] For example, please refer to Figure 5 The diagram shows a schematic of the parallel figure-eight inductor circuit provided in an embodiment of this application. The parallel figure-eight inductor circuit 101 includes a first output port A and a second output port B on a first side, and a third output port C and a fourth output port D on a second side. Here, the first output port A and the third output port C are located on the same side, and the second output port B and the fourth output port D are also located on the same side.

[0072] Furthermore, the first, second, third, and fourth output ports are connected in a figure-eight configuration via metal wires; the gates of the first, second, third, and fourth switching transistors P1, P2, P3, and P4 are connected to the first switching signal SW, and the gates of the fifth and sixth switching transistors are connected to the second switching signal. The drain of the first switching transistor is connected to the first output port, and the source of the first switching transistor is connected to the source of the third switching transistor; the drain of the third switching transistor is connected to the fourth output port; the drain of the second switching transistor is connected to the second output port, and the source of the second switching transistor is connected to the source of the fourth switching transistor; the drain of the fourth switching transistor is connected to the third output port; the source of the fifth switching transistor is connected to the third output port, and the drain of the fifth switching transistor is connected to the first output port; the source of the sixth switching transistor is connected to the fourth output port, and the drain of the sixth switching transistor is connected to the second output port.

[0073] In this embodiment, for wideband design, a parallel figure-eight inductor circuit 101 is used. Since the parallel figure-eight inductors share the metal wire in the middle section, they have a smaller equivalent series resistance, resulting in lower active power and a higher Q value. Furthermore, a smaller coil can be used to achieve a smaller inductance, making it more suitable for high-frequency voltage-controlled oscillators (VCOs). This parallel figure-eight inductor circuit 101 can be considered a high-Q transformer, thus allowing its application in a wider range of VCO architectures. For mode switching, the mode switching function can be achieved using six simple switching transistors (P1 to P6), resulting in low circuit complexity and ease of implementation.

[0074] It should be noted that, although in order to ensure the symmetry of the inductance, on two... Adding a switch (P3 and P4) to each branch of the mode introduces double the parasitic resistance, but this does not significantly improve the VCO's phase noise. This is because a VCO using a parallel figure-eight inductor actually has two steady states, namely... Pattern and In this mode, once the system stabilizes, the resistance of the switching branch is much greater than the resistance of the wire, so almost no current will flow through the switch, and thus the noise from the switch will not contribute to the resonant cavity.

[0075] In one embodiment, all of the switching transistors are PMOS transistors.

[0076] In particular, the inductor circuit 101 is located on the side closest to the power supply. By selecting PMOS transistors as the switching transistors, a smaller on-resistance can be obtained.

[0077] In one embodiment, the multiple switching transistors can also be NMOS transistors.

[0078] Optionally, in inductor design, the main considerations for parallel figure-eight inductors are inductance and coupling coefficient. This ensures sufficient frequency shift for the inductor before and after mode switching, which is compensated for by changing the inductor's width. The resulting change in sensitivity.

[0079] For example, such as Figure 6 The diagram shows a layout schematic of a parallel figure-eight inductor circuit according to an embodiment of this application. This inductor structure achieves wide bandwidth coverage while maintaining excellent phase noise performance at the cost of a small area.

[0080] The structure of a single VCO core circuit 102 is described below.

[0081] In one embodiment, the VCO core circuit 102 includes a reference capacitor circuit, a variable capacitor circuit, a core negative resistance circuit, and a positive body bias circuit. The reference capacitor circuit, connected to the output port and the core negative resistance circuit, provides a fixed reference capacitance value for the resonant cavity of the voltage-controlled oscillator. The variable capacitor circuit, connected to the output port, provides a variable capacitance value for the resonant cavity of the voltage-controlled oscillator. The core negative resistance circuit acts as a negative resistor to offset the losses caused by the resistance in the resonant cavity of the voltage-controlled oscillator. The positive body bias circuit, connected to the core negative resistance circuit, is used to positively bias the current waveform of the voltage-controlled oscillator.

[0082] Optionally, the reference capacitor circuit includes a first reference capacitor and a second reference capacitor; the core negative resistance circuit includes a cross-coupled first negative resistance transistor and a second negative resistance transistor; and the positive body bias circuit includes a cross-coupled first positive body bias transistor and a second positive body bias transistor.

[0083] In other words, the core purpose of adjusting the capacitors and inductors mentioned above is to change the resonant frequency of the VCO. The reference capacitor circuit provides discrete fixed capacitance values ​​for the resonant cavity of the voltage-controlled oscillator, while the variable capacitor circuit can further adjust the capacitance value of the resonant cavity to help adjust the frequency range.

[0084] Since the resonant cavity has resistive losses, the cross-coupled core negative resistance transistor is equivalent to a negative resistor connected to the resonant cavity, thus offsetting the losses caused by the resistance. The cross-coupled positive body bias transistor increases the transconductance of the core negative resistance transistor during startup, increasing the equivalent negative resistance, thereby shaping the current waveform of the oscillator and improving the power consumption and phase noise of the voltage-controlled oscillator.

[0085] Please refer to Figure 7The illustration shows a schematic diagram of a variable capacitor circuit provided in an embodiment of this application. The variable capacitor circuit includes a switched variable capacitor unit, a switched capacitor array, and an adjustable capacitor unit. The switched variable capacitor unit is used to provide a variable first capacitance value to the resonant cavity when the parallel figure-eight inductor circuit 101 is in a first inductor mode, and to provide a fixed second capacitance value to the resonant cavity when the parallel figure-eight inductor circuit 101 is in a second inductor mode. The switched capacitor array includes multiple switched capacitor units connected in parallel, and is used to provide a fixed third capacitance value to the resonant cavity when each switched capacitor unit is turned on. The adjustable capacitor unit includes multiple variable capacitors, and is used to provide a variable fourth capacitance value to the resonant cavity under the control of an external control voltage signal.

[0086] Optionally, the switched variable capacitor unit, the switched capacitor array, and the adjustable capacitor unit are connected in parallel and respectively connected to the two output ports on the same side of the inductor circuit 101.

[0087] In this embodiment, the reference capacitor circuit provides discrete fixed capacitance values ​​for the resonant cavity, and the switched capacitor array adjusts the fixed capacitance values ​​in the resonant cavity. The adjustable capacitor unit provides continuously variable capacitance values ​​for the resonant cavity, while the switched variable capacitor unit provides additional variable capacitance to the resonant cavity during inductor switching to compensate for the change in VCO gain after the total capacitance value increases.

[0088] refer to Figure 7 The adjustable capacitor unit includes two variable capacitors Cx. The first end of each Cx is connected to an external control voltage signal Vtune, and the second end of each Cx is connected to two output ports on the same side. Under the control of the external control voltage signal, it provides a variable fourth capacitance value for the resonant cavity.

[0089] In one alternative implementation, the switched capacitor array includes four switched capacitor units connected in parallel, providing a fixed third capacitance value to the resonant cavity when all switched capacitor units are turned on. For example, such as... Figure 8 A schematic diagram of a switched capacitor unit provided in an embodiment of this application is shown. A single switched capacitor unit includes an inverter INV1, an inverter INV2, two resistors R, a switching transistor J1, and two capacitors Cr. Taking a capacitance value of C as an example, under the control of the second external control signal Ctrl, when the switched capacitor unit is turned on, it provides a capacitance value of C / 2; when the switched capacitor unit is turned off, it provides a capacitance value of 0.

[0090] In one embodiment, such as Figure 9The diagram illustrates a schematic representation of a switched variable capacitor unit according to an embodiment of this application. The switched variable capacitor unit includes a first NMOS transistor K1, a second NMOS transistor K2, a first PMOS transistor Y1, a first variable capacitor VAR1, and a second variable capacitor VAR2; wherein the gate of the first NMOS transistor is connected to a second switching signal... The connections are as follows: the drain of the first NMOS transistor is connected to the first terminal of the first variable capacitor and the first terminal of the second variable capacitor; the source of the first NMOS transistor is grounded. The source of the second NMOS transistor is connected to the external control voltage signal Vtune; the drain of the second NMOS transistor is connected to the drain of the first NMOS transistor; the gate of the second NMOS transistor is connected to the first switching signal SW. The source of the first PMOS transistor is connected to the external control voltage signal; the drain of the first PMOS transistor is connected to the drain of the second NMOS transistor; the gate of the first PMOS transistor is connected to the second switching signal SW. Connections: The second terminals of the first and second variable capacitors are connected to two different output ports (O1 and O2) on the same side. It can be seen that Y1 and K2 can form a transmission gate switch.

[0091] Where SW = 1, = 0, meaning the first switch signal is high and the second switch signal is low, inductor circuit 101 is in first inductor mode. At this time, under the control of the two signals, combined with the control voltage signal, the transmission gate switch is turned on, making Vtune = Vc. This allows an additional set of variable capacitors to be added to the resonant cavity, thereby compensating for the decrease in K due to the frequency drop. VCO When SW = 0, = 1, meaning when the first switching signal is low and the second switching signal is high, the inductor circuit 101 is in the second inductor mode. At this time, the grounded first NMOS transistor K1 turns on, pulling Vc down to ground. The two variable capacitors act as fixed capacitors, providing a fixed capacitance value, thus making the capacitance connected to the resonant cavity a fixed capacitance. In other words, when the inductor... Pattern Mode switching, i.e., SW = 1. When K = 0, the switching variable capacitor unit is adjustable; otherwise, the capacitance value is fixed, thus offsetting the K value caused by the frequency drop. VCO Decrease. Among them, K VCO This is the scaling factor between the oscillator frequency and the Vtune frequency.

[0092] In this embodiment, by employing a switched variable capacitor unit, the gain change caused by the factor band switching of the voltage-controlled oscillator is offset, thereby achieving constant gain of the voltage-controlled oscillator.

[0093] In one embodiment, such as Figure 10 A schematic diagram of another voltage-controlled oscillator is shown, in which, Figure 10 Based on the aforementioned variable capacitor circuit, this paper illustrates the connection diagram of the core negative resistance circuit and the positive body bias circuit. The reference capacitor circuit includes a first reference capacitor C1 and a second reference capacitor C2; the core negative resistance circuit includes a cross-coupled first negative resistance transistor M1 and a second negative resistance transistor M2; and the positive body bias circuit includes a cross-coupled first positive body bias transistor M3 and a second positive body bias transistor M4. The first terminal of the first reference capacitor is connected to the drain of the first negative resistance transistor and to one of the two output ports on the same side; the first terminal of the second reference capacitor is connected to the drain of the second negative resistance transistor and to the other of the two output ports on the same side; the second terminal of the first reference capacitor is connected to the source of the first negative resistance transistor; the body of the first negative resistance transistor is connected to the body of the first positive body bias transistor; and the gate of the first negative resistance transistor is connected to the drain of the second negative resistance transistor. The electrodes are connected as follows: the body electrode of the second negative resistor is connected to the body electrode of the second positive body bias transistor, and the gate electrode of the second negative resistor is connected to the drain electrode of the first negative resistor; the drain electrode of the first positive body bias transistor is connected to the source electrode of the first negative resistor, the gate electrode of the second positive body bias transistor, and the body electrode of the second positive body bias transistor; the source electrode of the first positive body bias transistor is grounded; the gate electrode of the first positive body bias transistor is connected to the source electrode of the second negative resistor, the body electrode of the first negative resistor, and the drain electrode of the second positive body bias transistor; the source electrode of the second positive body bias transistor is grounded.

[0094] Optionally, the first negative resistor, the second negative resistor, the first positive body bias transistor, and the second positive body bias transistor are NMOS transistors.

[0095] The core of the positive body bias technique used in this embodiment is to insert cross-coupled transistors M3 and M4 below the core negative resistance transistors M1 and M2. Then, the body terminals of M1 and M3 are connected to the drain terminal of M4, and the body terminals of M2 and M4 are connected to the drain terminal of M3. This shapes the current waveform of the voltage-controlled oscillator, improving power consumption and phase noise. The principle is that the threshold voltage change direction of transistors M1 and M2 is opposite to the change direction of VGS (gate voltage), which facilitates a more abrupt transition between the on and off states of the cross-coupled pair, generating a more pulse-shaped drain current. Figure 11 This is a schematic diagram showing the simulation results comparing the drain current of M1 in this application with the drain current of a traditional Class B VCO.

[0096] Traditional voltage-controlled oscillators use an LC resonant cavity where the two ends of the inductor are directly connected to the gate of the MOSFET. Figure 12 The noise sensitivity function of the Colpitts voltage-controlled oscillator is given. Note that the transistor in the Colpitts oscillator compensates for the losses in the LC resonant circuit only within a very small time window, therefore its... The transconductance remains zero for a long period, significantly reducing the noise injected into the resonant cavity by the transistor. The small-signal transconductance of the single-ended Colpitts structure is:

[0097]

[0098] The differential Colpitts structure can provide twice the transconductance of the above formula.

[0099] Among them, g m It is the transconductance of M1 and M2. C1 is the angular frequency, C2 is the capacitance value of the first reference capacitor, and C2 is the capacitance value of the second reference capacitor.

[0100] In the voltage-controlled oscillator (VCO) of this embodiment, the first and second negative resistance transistors are cross-coupled. This allows the VCO core to employ a differential Colpitts structure. Firstly, differential circuits offer better immunity to common-mode interference from power and ground, which can be eliminated through differential operation. Secondly, the differential Colpitts structure has a larger transconductance than the single-ended Colpitts structure, thus providing a larger negative resistance. Consequently, the Colpitts circuit exhibits better performance in terms of phase noise.

[0101] in addition, Figure 13 It shows Figure 10 The frequency coverage of the voltage-controlled oscillator shown is such that it can simultaneously support multiple communication protocols, including 5G communication and WIFI 6E, achieving wideband coverage. Figure 14 For Figure 10 The diagram shows a comparison of the phase noise curves of the voltage-controlled oscillator and the conventional voltage-controlled oscillator when operating at 9.94 GHz. It can be seen that the phase noise is optimized by about 12 dB compared to the conventional structure.

[0102] In one embodiment, during the design of a voltage-controlled oscillator (VCO), it is first necessary to determine the required operating frequency and the frequency tuning range of the VCO. The required inductance value is then determined based on the required tuning range. It should be noted that, before designing the VCO structure in this application, it is necessary to plan the approximate frequency range covered by two inductance modes according to the required frequency range, and then determine the inductance values ​​for the two modes to ensure that the resonance is at the desired frequency.

[0103] After determining the inductance value, the inductor needs to be designed. For inductors in an LC resonant cavity, the quality factor needs to be improved as much as possible while maintaining the given inductance value. In inductor design, the main considerations for parallel figure-eight inductors are the inductance value and the coupling coefficient. This ensures sufficient frequency shift before and after switching, which is compensated for by changing the inductor's width. This leads to changes in inductance. The placement of switches on the layout must also be considered during the design process to ensure the inductor's operation. After completing the inductor design, the body-biased transistors and the switching variable capacitor need to be designed. Optionally, since the Q value of a variable capacitor is generally much smaller than that of a fixed capacitor, only one switching variable capacitor unit is added in this design.

[0104] In terms of layout design, it is necessary to pay attention to the fact that the metal traces between the voltage-controlled oscillator and other modules will generate parasitic inductance and parasitic capacitance at high frequencies. Therefore, electromagnetic field simulation observation of these traces is also required.

[0105] Finally, based on the required performance, the power consumption of the voltage-controlled oscillator can be further optimized.

[0106] In one embodiment, a phase-locked loop system is characterized in that the phase-locked loop system includes a voltage-controlled oscillator as described in any of the above embodiments.

[0107] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0108] The embodiments described above are merely illustrative of several implementation methods of this application, and while the descriptions are specific and detailed, they should not be construed as limiting the scope of this patent application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this application should be determined by the appended claims.

Claims

1. A voltage-controlled oscillator, characterized in that, The voltage-controlled oscillator includes a parallel figure-eight inductor circuit and two identical VCO core circuits; wherein the two identical VCO core circuits are respectively connected to the output ports on both sides of the parallel figure-eight inductor circuit; The parallel figure-eight inductor circuit includes multiple switching transistors, each of which is turned on or off under the control of a first external signal, so that the parallel figure-eight inductor circuit operates in a first inductor mode or a second inductor mode, and provides different inductance values ​​in different inductor modes; Each of the VCO core circuits is used to provide a variable capacitance value during the operation of the voltage-controlled oscillator and during the switching of the parallel figure-eight inductor circuit between the first inductor mode and the second inductor mode. The VCO core circuit includes a reference capacitor circuit, a variable capacitor circuit, a core negative resistance circuit, and a positive body bias circuit. The reference capacitor circuit, connected to the output port and the core negative resistance circuit, provides a fixed reference capacitance value for the resonant cavity of the voltage-controlled oscillator. The variable capacitor circuit, connected to the output port, provides a variable capacitance value for the resonant cavity of the voltage-controlled oscillator. The core negative resistance circuit acts as a negative resistor to offset the losses caused by the resistance in the resonant cavity of the voltage-controlled oscillator. The positive body bias circuit, connected to the core negative resistance circuit, provides a positive current waveform for the voltage-controlled oscillator. The variable capacitor circuit includes a switched variable capacitor unit, a switched capacitor array, and an adjustable capacitor unit. The switched variable capacitor unit is used to provide a variable first capacitance value to the resonant cavity when the parallel figure-eight inductor circuit is in the first inductor mode, and to provide a fixed second capacitance value to the resonant cavity when the parallel figure-eight inductor circuit is in the second inductor mode. The switched capacitor array includes multiple switched capacitor units connected in parallel, and is used to provide a fixed third capacitance value to the resonant cavity when each of the switched capacitor units is turned on. The adjustable capacitor unit includes multiple variable capacitors, and is used to provide a variable fourth capacitance value to the resonant cavity under the control of an external control voltage signal.

2. The voltage-controlled oscillator according to claim 1, characterized in that, When the parallel figure-eight inductor circuit is operating in the first inductor mode, the currents transmitted from the two VCO core circuits to the parallel figure-eight inductor circuit are in opposite directions and superimposed on each other at the target wire of the parallel figure-eight inductor circuit. When the parallel figure-eight inductor circuit operates in the second inductor mode, the currents transmitted from the two VCO core circuits to the parallel figure-eight inductor circuit are in the same direction and cancel each other out at the target conductor of the parallel figure-eight inductor circuit.

3. The voltage-controlled oscillator according to claim 1, characterized in that, The two VCO core circuits include a first VCO core circuit and a second VCO core circuit; When the parallel figure-eight inductor circuit operates in the first inductor mode, the direction of the current transmitted from the first VCO core circuit to the parallel figure-eight inductor circuit is clockwise, and the direction of the current transmitted from the second VCO core circuit to the parallel figure-eight inductor circuit is counterclockwise. When the parallel figure-eight inductor circuit operates in the second inductor mode, the direction of the current transmitted from the first VCO core circuit and the second VCO core circuit to the parallel figure-eight inductor circuit is either counterclockwise or clockwise.

4. The voltage-controlled oscillator according to claim 2, characterized in that, The parallel figure-eight inductor circuit provides a greater inductance value in the first inductor mode than in the second inductor mode.

5. The voltage-controlled oscillator according to claim 2, characterized in that, The first external signal includes a first switch signal and a second switch signal that is inverted by the first switch signal; the plurality of switching transistors include a first switching transistor, a second switching transistor, a third switching transistor, a fourth switching transistor, a fifth switching transistor, and a sixth switching transistor; When the first switch signal is high and the second switch signal is low, the first switch, the second switch, the third switch and the fourth switch are turned off under the control of the first switch signal, and the fifth switch and the sixth switch are turned on under the control of the second switch signal, so that the parallel figure-eight inductor circuit operates in the first inductor mode. When the first switch signal is low and the second switch signal is high, the first switch, the second switch, the third switch and the fourth switch are turned on under the control of the first switch signal, and the fifth switch and the sixth switch are turned off under the control of the second switch signal, so that the parallel figure-eight inductor circuit operates in the second inductor mode.

6. The voltage-controlled oscillator according to claim 2, characterized in that, All of the switching transistors are PMOS transistors.

7. The voltage-controlled oscillator according to any one of claims 1 to 6, characterized in that, The parallel figure-eight inductor circuit includes a first output port and a second output port on the first side, and a third output port and a fourth output port on the second side. The first output port, the second output port, the third output port and the fourth output port are connected in a figure-eight shape by metal wires. The gates of the first switch transistor, the second switch transistor, the third switch transistor and the fourth switch transistor are connected to the first switch signal, and the gates of the fifth switch transistor and the sixth switch transistor are connected to the second switch signal. The drain of the first switching transistor is connected to the first output port, and the source of the first switching transistor is connected to the source of the third switching transistor. The drain of the third switching transistor is connected to the fourth output port; The drain of the second switching transistor is connected to the second output port, and the source of the second switching transistor is connected to the source of the fourth switching transistor. The drain of the fourth switching transistor is connected to the third output port; The source of the fifth switching transistor is connected to the third output port, and the drain of the fifth switching transistor is connected to the first output port. The source of the sixth switch is connected to the fourth output port, and the drain of the sixth switch is connected to the second output port.

8. The voltage-controlled oscillator according to claim 1, characterized in that, The first external signal includes a first switching signal and a second switching signal that is inversely related to the first switching signal; the switched variable capacitor unit includes a first NMOS transistor, a second NMOS transistor, a first PMOS transistor, a first variable capacitor, and a second variable capacitor; wherein, The gate of the first NMOS transistor is connected to the second switch signal, the drain of the first NMOS transistor is connected to the first terminal of the first variable capacitor and the first terminal of the second variable capacitor, and the source of the first NMOS transistor is grounded. The source of the second NMOS transistor is connected to an external control voltage signal, the drain of the second NMOS transistor is connected to the drain of the first NMOS transistor, and the gate of the second NMOS transistor is connected to the first switching signal. The source of the first PMOS transistor is connected to the external control voltage signal, the drain of the first PMOS transistor is connected to the drain of the second NMOS transistor, and the gate of the first PMOS transistor is connected to the second switching signal. The second terminal of the first variable capacitor and the second terminal of the second variable capacitor are connected to two different output ports on the same side.

9. The voltage-controlled oscillator according to claim 1, characterized in that, The reference capacitor circuit includes a first reference capacitor and a second reference capacitor; the core negative resistance circuit includes a cross-coupled first negative resistance transistor and a second negative resistance transistor; the positive body bias circuit includes a cross-coupled first positive body bias transistor and a second positive body bias transistor; wherein... The first terminal of the first reference capacitor is connected to the drain of the first negative resistor and to one of the two output ports on the same side; the first terminal of the second reference capacitor is connected to the drain of the second negative resistor and to the other of the two output ports on the same side; the second terminal of the first reference capacitor is connected to the source of the first negative resistor and the second terminal of the second reference capacitor is connected to the source of the second negative resistor. The body of the first negative resistor is connected to the body of the first positive body biased transistor, and the gate of the first negative resistor is connected to the drain of the second negative resistor. The body of the second negative resistor is connected to the body of the second positive body biased transistor, and the gate of the second negative resistor is connected to the drain of the first negative resistor. The drain of the first positive body bias transistor is connected to the source of the first negative resistor, the gate of the second positive body bias transistor, and the body of the second positive body bias transistor. The source of the first positive body bias transistor is grounded, and the gate of the first positive body bias transistor is connected to the source of the second negative resistor, the body of the first negative resistor, and the drain of the second positive body bias transistor. The source of the second positive body bias transistor is grounded.

10. A phase-locked loop system, characterized in that, The phase-locked loop system includes a voltage-controlled oscillator as described in any one of claims 1 to 9.

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