Silicon-based lead magnesium niobate single crystal piezoelectric wafer structure, preparation method and application

Abstract

The present invention relates to the fields of ferroelectric single crystal technology and acousto-optical device technology, particularly to a silicon-based lead magnesium niobate (PbMn) single crystal piezoelectric wafer structure, preparation method, and application. The structure comprises a silicon substrate on which a silicon dioxide layer and a single crystal piezoelectric thin film layer are sequentially disposed; the single crystal piezoelectric thin film layer is a PbMn-PT single crystal, including a binary PMN-PT single crystal thin film or a ternary PIN-PMN-PT single crystal thin film. This piezoelectric wafer structure on a silicon substrate can be used to fabricate various high-performance piezoelectric MEMS sensors, actuators, and electro-optical modulator devices. The resulting surface acoustic wave (SAW) filters and thin film bulk acoustic wave (BAW) filters exhibit a relative bandwidth increase of over 50%, and the resulting electro-optical modulators exhibit lower half-wave voltage and higher electro-optical modulation efficiency. The device volume can be reduced by 10 times, better meeting the future 6G communication requirements for higher efficiency, higher integration, and miniaturization of MEMS devices. This provides a novel multilayer piezoelectric wafer structure for the miniaturization and integration of piezoelectric MEMS and optoelectronic devices.

Description

Technical Field

[0001] The present invention relates to the fields of ferroelectric single crystal technology and the technology of acousto-optical devices, and specifically to a method for preparing a silicon-based lead magnesium niobate-based single crystal piezoelectric wafer structure and its application, in particular to a silicon-based lead magnesium niobate-lead titanate single crystal piezoelectric wafer structure, preparation method and application. Background Art

[0002] With the rapid development of wireless communication technology in recent years, society has entered a period of rapid information development. With the rise of the Internet of Things (IoT) and wearable devices, the demand for wireless communications is increasing, which means that the integration and miniaturization of optoelectronic devices is urgently needed. Optoelectronic devices based on lithium niobate and lithium tantalate piezoelectric single crystals, while still emerging, are insufficient to meet the urgent demand for wireless communications and the need for miniaturized, integrated optoelectronic devices. High-performance lead magnesium niobate-lead titanate (PMN-PT) single crystal piezoelectric materials can be widely used in optoelectronic devices. In optical devices, PMN-PT single crystal thin films can serve as substrates for electro-optic modulators, infrared detectors, and optical waveguide switches. In acoustic devices, they are an optimal substrate material for surface acoustic wave filters and thin film bulk acoustic wave filters. They also have promising application prospects in piezoelectric MEMS devices such as piezoelectric micromachined ultrasonic transducers (PMUTs) and micro hydrophones.

[0003] Piezoelectric materials are core materials for sensors, transducers, and filters, and are widely used in military underwater acoustics, medical imaging, aerospace, artificial intelligence, and other fields, playing an important role in the development of the national economy, medical health, and national defense construction. Lead magnesium niobate-lead titanate (PMN-PT) is a lead-based single crystal relaxor ferroelectric with high dielectric constant, high electrostriction coefficient, and high piezoelectric coefficient ( d 33 Can reach 3000pC / N), high electromechanical coupling coefficient ( k 33 It can reach 0.94), high permittivity, low capacitance temperature coefficient and other advantages. PMN-PT has broad application prospects in electronic processing, semiconductor integration, optical integration and other fields due to its excellent piezoelectric, ferroelectric, microacoustic and electro-optical properties. With the continuous improvement of integrated processes such as micro-electromechanical system processing technology (MEMS), integrated circuit technology and integrated optical path technology, as well as advanced nano-manufacturing processes, the market has put forward the demand for miniaturization and integration of electronic and optical devices. Most existing acousto-optic devices are prepared using bulk single crystals. Their thickness greatly limits the operating frequency of the device and cannot meet the operating frequency, miniaturization and integration requirements of the device in the 5G era. As a result, the surface acoustic wave filters and electro-optical modulators produced have problems with small bandwidth and low electro-optical modulation efficiency. Summary of the Invention

[0004] In response to the problem that the lead-based single crystal relaxor ferroelectric piezoelectric film in the prior art cannot meet the current needs of miniaturization and integration of electronic and optical devices, the present invention provides a silicon-based lead magnesium niobate single crystal piezoelectric wafer structure, preparation method and application.

[0005] In order to achieve the above object, the present invention adopts the following technical solutions:

[0006] The present invention provides a silicon-based lead magnesium niobate-based single crystal piezoelectric wafer structure, comprising a silicon substrate, on which a silicon dioxide layer and a single crystal piezoelectric film layer are sequentially arranged, wherein the single crystal piezoelectric film layer is a PMN-PT single crystal film or a PIN-PMN-PT single crystal film.

[0007] Furthermore, the PIN-PMN-PT single crystal film is a ternary solid solution with the general formula: xPb(In 1 / 2 / Nb 1 / 2 )O3-yPb(Mg 1 / 3 Nb 2 / 3 )O3-(1-xy)PbTiO3, wherein 0.15≤x≤0.3, 0.4≤y≤0.55; the PMN-PT single crystal film is a binary solid solution with the general formula zPb(In 1 / 2 / Nb 1 / 2 )O3-(1-z)PbTiO3, where 0.1≤z≤0.7.

[0008] Furthermore, the thickness of the silicon substrate is 200-1000 um, the thickness of the silicon dioxide layer is 200-1500 nm, and the thickness of the single crystal piezoelectric thin film layer is 300-5000 nm.

[0009] The present invention also provides a method for preparing the silicon-based lead magnesium niobate-based single crystal piezoelectric wafer structure as described above, comprising:

[0010] orienting, mechanically cutting, polishing, and cleaning the grown PMN-PT single crystal ingot or PIN-PMN-PT single crystal ingot to obtain a piezoelectric single crystal wafer;

[0011] implanting ions into the piezoelectric single crystal wafer;

[0012] Bonding a thermally oxidized silicon wafer to an ion-implanted piezoelectric single crystal wafer to form a bonding pair; the thermally oxidized silicon wafer comprises a silicon substrate and a silicon dioxide layer;

[0013] Annealing the bonded pair to peel the piezoelectric single crystal wafer at the ion implantation layer to obtain a silicon-based lead magnesium niobate system single crystal piezoelectric wafer structure;

[0014] or

[0015] orienting, mechanically cutting, polishing, and cleaning the grown PMN-PT single crystal ingot or PIN-PMN-PT single crystal ingot to obtain a piezoelectric single crystal wafer;

[0016] Bonding the thermal oxide silicon wafer to the piezoelectric single crystal wafer to form a bonding pair;

[0017] The piezoelectric single crystal wafers on the bonding pair are mechanically polished and surface CMP treated to control the thickness of the piezoelectric single crystal wafer to be 300-5000 nm, thereby obtaining a silicon-based lead magnesium niobate system single crystal piezoelectric wafer structure.

[0018] Furthermore, the grown PMN-PT single crystal ingot or PIN-PMN-PT single crystal ingot is oriented, mechanically cut, polished, and cleaned to obtain a piezoelectric single crystal wafer as follows:

[0019] The grown PMN-PT single crystal rod or PIN-PMN-PT single crystal rod is cut into pieces, and the crystal orientation of the cut surface is measured by XRD and the cut reference edge is oriented to obtain a PMN-PT single crystal rod or PIN-PMN-PT single crystal rod with a known lattice orientation in the cut surface calibrated by the cut reference edge;

[0020] Mechanically cutting a PMN-PT single crystal ingot or a PIN-PMN-PT single crystal ingot having a known lattice orientation within a section marked by a cutting reference edge in a direction parallel to the oriented section to obtain a PMN-PT single crystal wafer or a PIN-PMN-PT single crystal wafer, wherein the single crystal wafer has a diameter of 2 to 6 inches and a thickness of 400 to 1500 μm;

[0021] Polishing the surface of the PMN-PT single crystal wafer or the PIN-PMN-PT single crystal wafer to a roughness of less than 0.5 nm by chemical mechanical polishing;

[0022] The polished PMN-PT single crystal wafer or PIN-PMN-PT single crystal wafer is cleaned using a mixed solvent acid solution to remove organic particles on the surface, thereby obtaining a piezoelectric single crystal wafer.

[0023] Furthermore, the thermal oxide silicon wafer is bonded to the piezoelectric single crystal wafer or the piezoelectric single crystal wafer after ion implantation to form a bonding pair as follows:

[0024] Activating the surface of the silicon dioxide layer and the surface of the piezoelectric single crystal wafer respectively by using gas to obtain a surface-activated silicon dioxide layer and a surface-activated piezoelectric single crystal wafer;

[0025] The surface-activated silicon dioxide layer and the surface-activated piezoelectric single crystal wafer are spontaneously bonded to form a silicon / silicon dioxide / piezoelectric single crystal wafer multilayer structure;

[0026] The multilayer structure of silicon / silicon dioxide / piezoelectric single crystal wafer is subjected to step annealing to form a bonding pair.

[0027] Preferably, the gas used for surface activation is one or more of Ar, CF4, N2 and O2; the conditions for step annealing are: within the temperature range of 100℃ to 160℃, keep warm at 20℃ for 10 hours, and keep warm at 160℃ for 10 to 30 hours.

[0028] Furthermore, the bonded pair is subjected to annealing treatment to peel the piezoelectric single crystal wafer at the implanted ion layer to obtain a silicon-based lead magnesium niobate system single crystal piezoelectric wafer structure.

[0029] The bonded pair is annealed at 200-400° C. for 10-30 hours to peel off the piezoelectric single crystal wafer at the implanted ion layer to obtain a silicon-based lead magnesium niobate system single crystal piezoelectric wafer structure.

[0030] Preferably, the ions implanted into the piezoelectric single crystal wafer are: H and / or He, and the ion dose implanted into the piezoelectric single crystal wafer is 4*10 16 ~4*10 17 ions / cm 2 The depth of ion implantation is 600~1600nm.

[0031] For example, the above-mentioned silicon-based lead magnesium niobate single crystal piezoelectric wafer structure is used in the preparation of piezoelectric MEMS sensors, actuators, microacoustic filters and electro-optical modulation devices.

[0032] Compared with the prior art, the present invention has the following beneficial effects:

[0033] The present invention provides a silicon-based lead magnesium niobate (PbMn) single crystal piezoelectric wafer structure comprising a silicon substrate, on which a silicon dioxide layer and a single crystal piezoelectric thin film layer are sequentially disposed; the single crystal piezoelectric thin film layer is a PMN-PT single crystal thin film or a PIN-PMN-PT single crystal thin film. Thin-film surface acoustic wave (SAW) filters and bulk acoustic wave (BAW) filters fabricated using this structure have a relative bandwidth improvement of over 50% compared to existing lithium niobate (LN) filters, and their high dielectric constant can reduce the device size by a factor of 10. The primary electro-optic coefficient (r33) of the PMN-PT or PIN-PMN-PT single crystal reaches 900 pm / V, more than 30 times that of current LNO electro-optic crystals; the crystal transmittance can reach 99.6%. Electro-optic modulators based on this silicon-based PbMn-PT single crystal piezoelectric wafer structure exhibit lower half-wave voltage and higher modulation efficiency than commercial LNO modulators. This structure can better meet the future 6G communication requirements for higher efficiency, higher integration, and smaller MEMS devices, and is expected to become a key development direction in the fields of electronic and optical devices.

[0034] The present invention also provides a method for preparing the silicon-based lead magnesium niobate-based single crystal piezoelectric wafer structure as described above. The method comprises orienting, mechanically cutting, polishing and cleaning a grown PMN-PT single crystal ingot or PIN-PMN-PT single crystal ingot to obtain a piezoelectric single crystal wafer; bonding a thermally oxidized silicon wafer to the piezoelectric single crystal wafer to form a bonded pair; and finally thinning the bonded pair to obtain a silicon-based lead magnesium niobate-based single crystal piezoelectric wafer structure. The method is simple, easy to operate, and suitable for industrialization. The silicon-based lead magnesium niobate-based single crystal piezoelectric wafer structure adopts intelligent peeling technology, which is compatible with existing processing technologies such as MEMS and can transplant existing device processes and experience. The prepared silicon-based lead magnesium niobate-based single crystal piezoelectric wafer structure has higher processability and a wider range of applications, can effectively reduce the cost of thin film preparation, retain the excellent performance of PMN-PT single crystal or PIN-PMN-PT single crystal, greatly improve the quality of the single crystal piezoelectric thin film layer, and is beneficial to the subsequent research and development and preparation of a new generation of MEMS acousto-optical chips.

[0035] As mentioned above, the application of silicon-based lead magnesium niobate single crystal piezoelectric wafer structure in the preparation of piezoelectric MEMS sensors, actuators, microacoustic filters and electro-optical modulation devices. The piezoelectric MEMS sensors, actuators, microacoustic filters and electro-optical modulation devices prepared using silicon-based lead magnesium niobate single crystal piezoelectric wafer structure have the advantages of low cost, high performance, small size and high integration. BRIEF DESCRIPTION OF THE DRAWINGS

[0036] Figure 1 This is a schematic diagram of a silicon-based lead magnesium niobate single crystal piezoelectric wafer structure of the present invention.

[0037] Figure 2 This is a flow chart of a method for preparing a silicon-based lead magnesium niobate single crystal piezoelectric wafer structure of the present invention, wherein a is a flow chart for preparation using an intelligent peeling method, and b is a flow chart for preparation using a bonding thinning method.

[0038] Figure 3 Schematic diagram of the growth direction of PMN-PT single crystal or PIN-PMN-PT single crystal in an embodiment of the present invention.

[0039] Among them, 1-silicon substrate, 2-silicon dioxide layer, 3-single crystal piezoelectric film layer. DETAILED DESCRIPTION

[0040] To make the objectives, technical solutions, and advantages of the embodiments of the present invention more clear, the technical solutions of the embodiments of the present invention will be clearly and completely described below in conjunction with the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Generally, the components of the embodiments of the present invention described and shown in the drawings herein can be arranged and designed in various different configurations.

[0041] Therefore, the following detailed description of the embodiments of the present invention provided in the accompanying drawings is not intended to limit the scope of the invention as claimed, but rather merely represents selected embodiments of the present invention. All other embodiments derived by persons of ordinary skill in the art based on the embodiments of the present invention without creative effort shall fall within the scope of protection of the present invention.

[0042] It should be noted that similar reference numerals and letters denote similar items in the following drawings, and therefore, once an item is defined in one drawing, it does not need to be further defined or explained in subsequent drawings.

[0043] In the description of the embodiments of the present invention, it should be noted that if the terms "upper," "lower," "horizontal," "inner," etc. appear, the orientation or positional relationship indicated is based on the orientation or positional relationship shown in the accompanying drawings, or the orientation or positional relationship in which the inventive product is typically placed when in use. These terms are merely for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the device or component referred to must have a specific orientation, be constructed, or operate in a specific orientation. Therefore, they should not be construed as limitations on the present invention. In addition, the terms "first," "second," etc. are used only to distinguish descriptions and should not be construed as indicating or implying relative importance.

[0044] In addition, if the term "horizontal" appears, it does not mean that the component must be absolutely horizontal, but can be slightly tilted. For example, "horizontal" only means that its direction is more horizontal than "vertical", and does not mean that the structure must be completely horizontal, but can be slightly tilted.

[0045] In the description of the embodiments of the present invention, it should be noted that, unless otherwise expressly specified or limited, the terms "disposed," "installed," "connected," and "connected" should be understood in a broad sense. For example, they can refer to fixed connections, detachable connections, or integral connections; they can refer to mechanical connections or electrical connections; they can refer to direct connections or indirect connections through an intermediate medium; and they can refer to internal connections between two components. Those skilled in the art will understand the specific meanings of the above terms in the present invention based on specific circumstances.

[0046] The present invention will be further described in detail below with reference to specific embodiments, which are intended to explain the present invention rather than to limit it.

[0047] See also Figure 1The present invention discloses a silicon-based lead magnesium niobate-based single crystal piezoelectric wafer structure, comprising a silicon substrate 1, on which a silicon dioxide layer 2 and a single crystal piezoelectric film layer 3 are sequentially arranged. The single crystal piezoelectric film layer 3 is a PMN-PT single crystal film or a PIN-PMN-PT single crystal film; the PIN-PMN-PT single crystal film is a ternary solid solution with the general formula: xPb(In 1 / 2 / Nb 1 / 2 )O3-yPb(Mg 1 / 3 Nb 2 / 3 )O3-(1-xy)PbTiO3, wherein 0.15≤x≤0.3, 0.4≤y≤0.55; the PMN-PT single crystal film is a binary solid solution with the general formula zPb(In 1 / 2 / Nb 1 / 2 )O3-(1-z)PbTiO3, wherein 0.1≤z≤0.7; the thickness of the silicon substrate 1 is 200-1000um, the thickness of the silicon dioxide layer 2 is 200-1500nm, and the thickness of the single crystal piezoelectric thin film layer 3 is 300-5000nm.

[0048] See also Figure 2 The present invention discloses a method for preparing a silicon-based lead magnesium niobate-based single crystal piezoelectric wafer structure, including preparation by intelligent peeling technology and preparation by bonding and thinning;

[0049] The preparation method using intelligent peeling technology is as follows:

[0050] S1: Orienting, mechanically cutting, polishing, and cleaning the grown PMN-PT single crystal ingot or PIN-PMN-PT single crystal ingot to obtain a piezoelectric single crystal wafer, specifically:

[0051] The grown PMN-PT single crystal rod or PIN-PMN-PT single crystal rod is cut into pieces, and the crystal orientation of the cut surface is measured by XRD and the cut reference edge is oriented to obtain a PMN-PT single crystal rod or PIN-PMN-PT single crystal rod with a known lattice orientation in the cut surface calibrated by the cut reference edge;

[0052] Mechanically cutting a PMN-PT single crystal ingot or a PIN-PMN-PT single crystal ingot having a known lattice orientation within a section marked by a cutting reference edge in a direction parallel to the oriented section to obtain a PMN-PT single crystal wafer or a PIN-PMN-PT single crystal wafer, wherein the single crystal wafer has a diameter of 2 to 6 inches and a thickness of 400 to 1500 μm;

[0053] Polishing the surface of the PMN-PT single crystal wafer or the PIN-PMN-PT single crystal wafer to a roughness of less than 0.5 nm by chemical mechanical polishing;

[0054] The polished PMN-PT single crystal wafer or PIN-PMN-PT single crystal wafer is cleaned using a mixed solvent acid solution to remove surface organic particles to obtain a piezoelectric single crystal wafer; wherein the mixed solvent acid solution includes concentrated sulfuric acid, hydrogen peroxide and deionized water, and the volume ratio of the concentrated sulfuric acid, hydrogen peroxide and deionized water is 50:2:48.

[0055] S2: Ion implantation into the piezoelectric single crystal wafer, specifically:

[0056] Ion implantation equipment is used to implant ions into the single crystal wafer. The implanted ions are H and / or He. The implantation energy range is 50keV to 300keV, and the implantation ion dose is 4*10 16 ~4*10 17 ions / cm 2 The depth of ion implantation into the single crystal wafer is 400 to 1600 nm.

[0057] S3: Bonding a thermal oxide silicon wafer to the piezoelectric single crystal wafer after ion implantation to form a bonding pair; the thermal oxide silicon wafer includes a silicon substrate 1 and a silicon dioxide layer 2, specifically:

[0058] Activating the surface of the silicon dioxide layer and the surface of the piezoelectric single crystal wafer after ion implantation by using one or more gases selected from Ar, CF4, N2 and O2 to obtain a surface-activated silicon dioxide layer and a surface-activated single crystal wafer, respectively;

[0059] The surface-activated silicon dioxide layer and the surface-activated single crystal wafer are spontaneously bonded to form a silicon / silicon dioxide / piezoelectric single crystal wafer structure;

[0060] The silicon / silicon dioxide / piezoelectric single crystal wafer structure is step-annealed in a temperature range of 100°C to 160°C, with a temperature of 20°C for 10 hours and 160°C for 10 to 30 hours to form a bonded pair;

[0061] S4: Annealing the bonded pair to peel the piezoelectric single crystal wafer at the ion implantation layer to obtain a silicon-based lead magnesium niobate system single crystal piezoelectric wafer structure, specifically:

[0062] The bonded pair is annealed at 200-400° C. for 10-30 hours to peel off the piezoelectric single crystal wafer at the implanted ion layer to obtain a silicon-based lead magnesium niobate system single crystal piezoelectric wafer structure.

[0063] Or use direct bonding thinning method, including:

[0064] S1: Orienting, mechanically cutting, polishing, and cleaning the grown PMN-PT single crystal ingot or PIN-PMN-PT single crystal ingot to obtain a piezoelectric single crystal wafer, specifically:

[0065] The grown PMN-PT single crystal rod or PIN-PMN-PT single crystal rod is cut into pieces, and the crystal orientation of the cut surface is measured by XRD and the cut reference edge is oriented to obtain a PMN-PT single crystal rod or PIN-PMN-PT single crystal rod with a known lattice orientation in the cut surface calibrated by the cut reference edge;

[0066] Mechanically cutting a PMN-PT single crystal ingot or a PIN-PMN-PT single crystal ingot having a known lattice orientation within a section marked by a cutting reference edge in a direction parallel to the oriented section to obtain a PMN-PT single crystal wafer or a PIN-PMN-PT single crystal wafer, wherein the single crystal wafer has a diameter of 2 to 6 inches and a thickness of 400 to 1500 μm;

[0067] Polishing the surface of the PMN-PT single crystal wafer or the PIN-PMN-PT single crystal wafer to a roughness of less than 0.5 nm by chemical mechanical polishing;

[0068] The polished PMN-PT single crystal wafer or PIN-PMN-PT single crystal wafer is cleaned using a mixed solvent acid solution to remove surface organic particles to obtain a piezoelectric single crystal wafer; wherein the mixed solvent acid solution includes concentrated sulfuric acid, hydrogen peroxide and deionized water, and the volume ratio of the concentrated sulfuric acid, hydrogen peroxide and deionized water is 50:2:48.

[0069] S2: Bond the thermal oxide silicon wafer and the piezoelectric single crystal wafer to form a bonding pair, specifically:

[0070] Activating the surface of the silicon dioxide layer and the surface of the piezoelectric single crystal wafer using one or more gases selected from Ar, CF4, N2, and O2 to obtain a surface-activated silicon dioxide layer and a surface-activated single crystal wafer, respectively;

[0071] The surface-activated silicon dioxide layer and the surface-activated single crystal wafer are spontaneously bonded to form a silicon / silicon dioxide / piezoelectric single crystal wafer structure;

[0072] The silicon / silicon dioxide / piezoelectric single crystal wafer structure is step-annealed in a temperature range of 100°C to 160°C, with a temperature of 20°C for 10 hours and 160°C for 10 to 30 hours to form a bonded pair;

[0073] S3: Mechanically polishing and surface CMP treatment are performed on the piezoelectric single crystal wafers on the bonding pair to control the thickness of the piezoelectric single crystal wafer to be 300 to 5000 nm, thereby obtaining a silicon-based lead magnesium niobate-based single crystal piezoelectric wafer structure.

[0074] Example 1

[0075] See also Figure 3The single crystal growth direction of the original PMN-PT single crystal rod is oriented to

[001] , and a reference edge in the

[100] direction is left in the plane through structural orientation. The width of the reference edge is between 10mm and 50mm. The crystal rod is cut into pieces with a thickness of 500um and an original crystal rod size of 5.08cm to obtain PMN-PT single crystal wafers; the PMN-PT single crystal wafers are chemically mechanically polished. The roughness of the initial PMN-PT single crystal wafers after cutting is above 1um. Single-sided polishing is performed on the surface of the wafer using non-woven fabric and polishing liquid on a polishing disk. The polishing speed is 35rpm / min, the polishing pressure is 3.5kg, and the polishing time is 2-3h, so that the roughness of the polished surface of the PMN-PT single crystal wafer finally reaches Ra≤0.5nm. The surface of the polished PMN-PT single crystal wafer is cleaned with an acid solution of a mixed acid solvent of concentrated sulfuric acid, hydrogen peroxide and deionized water in a volume ratio of 50:2:8 to remove organic particles on the surface of the PMN-PT single crystal wafer; then, the surface of the PMN-PT single crystal wafer is wiped with a cleaning fluid to specifically remove fine particles adsorbed on the surface of the PMN-PT single crystal wafer, and a protective layer is formed on the surface to prevent secondary adsorption of particles; finally, the particles are removed by using a two-fluid cleaning and manual brushing method to obtain a piezoelectric single crystal wafer that can be subsequently bonded.

[0076] With an injection energy of 50 keV, the temperature was kept below 70°C during the ion injection process, the instantaneous injection beam current was selected to be below 1.1 mA, and the final injection dose was 4*10 16 ions / cm 2 , complete the ion implantation of single crystal wafer;

[0077] The surfaces of a thermal oxide silicon wafer with a surface roughness Ra < 0.5 nm, a warpage < 15 μm, and a thickness variation TTV ≤ 3 μm and a single crystal wafer after ion implantation were cleaned in the above-mentioned manner, and the silicon dioxide layer surface of the thermal oxide silicon wafer and the wafer after implantation were surface activated using Ar. The surface activation power was 450 to 550 W, and the activation time was 90 s. The activated thermal oxide silicon wafer and the piezoelectric single crystal wafer were spontaneously bonded together, and the bubbles were pushed out. They were then step-annealed in a temperature range of 100°C to 160°C with a holding time of 20°C for 10 hours to form a bonding pair.

[0078] The bonded pair was annealed at 200°C for 30 hours, and then the lifted wafer was peeled off, and lattice repair and surface CMP treatment were performed to finally obtain a high-quality silicon-based lead magnesium niobate single crystal piezoelectric wafer structure. The thickness of the single crystal piezoelectric film layer 3 was 400nm, the thickness of the silicon substrate 1 was 200um, and the thickness of the silicon dioxide layer 2 was 200nm.

[0079] Example 2

[0080] The difference from Example 1 is that the PIN-PMN-PT single crystal ingot is cut into pieces with a thickness of 600 μm and a size of 7.62 cm;

[0081] According to the thickness of the single crystal piezoelectric film layer 3, the injection energy is 100keV and the injection dose is 2*10 17 ions / cm 2 , complete the ion implantation of the piezoelectric single crystal wafer;

[0082] Ar and N2 are used to activate the surface of the silicon dioxide layer of the thermal oxide silicon wafer and the piezoelectric single crystal wafer after ion implantation; the bonding pair is formed by step annealing in a temperature range of 100℃ to 160℃ with a temperature of 20℃ for 10 hours and 160℃ for 25 hours.

[0083] The bonded pair was annealed at 300°C for 20 hours to obtain a high-quality silicon-based lead magnesium niobate single crystal piezoelectric wafer structure, the thickness of the single crystal piezoelectric film layer 3 was 900nm, the thickness of the silicon substrate 1 was 500um, and the thickness of the silicon dioxide layer 2 was 400nm.

[0084] Example 3

[0085] The difference from Example 1 is that the PIN-PMN-PT single crystal ingot is cut into pieces with a thickness of 1000 μm and a size of 10.16 cm;

[0086] According to the thickness of the single crystal piezoelectric film layer, the injection energy is 200keV and the injection dose is 3*10 17 ions / cm 2 , complete the ion implantation of single crystal wafer;

[0087] The silicon dioxide layer surface of the thermal oxide silicon wafer and the piezoelectric single crystal wafer after ion implantation are surface activated by O2; a bonding pair is formed by step-annealing in a temperature range of 100°C to 160°C with a temperature of 20°C per 10 hours and a temperature of 160°C for 30 hours.

[0088] The bonded pair was annealed at 400°C for 20 hours to obtain a high-quality silicon-based lead magnesium niobate single crystal piezoelectric wafer structure, wherein the thickness of the single crystal piezoelectric film layer 3 was 1000nm, the thickness of the silicon substrate 1 was 800um, and the thickness of the silicon dioxide layer 2 was 800nm.

[0089] Example 4

[0090] The difference from Example 1 is that the PIN-PMN-PT single crystal ingot is cut into pieces with a thickness of 1500 μm and a size of four inches;

[0091] According to the thickness of the single crystal piezoelectric film layer, the injection energy is 300keV and the injection dose is 4*10 17 ions / cm 2 , complete the ion implantation of single crystal wafer;

[0092] The silicon dioxide layer surface of the thermal oxide silicon wafer and the implanted wafer are surface activated by O2; a bonding pair is formed by step-annealing in a temperature range of 100°C to 160°C with a temperature of 20°C per 10 hours and a temperature of 160°C for 25 hours.

[0093] The bonded pair was annealed at 400°C for 25 hours to obtain a high-quality silicon-based lead magnesium niobate single crystal piezoelectric wafer structure, the thickness of the single crystal piezoelectric film layer 3 was 1500nm, the thickness of the silicon substrate 1 was 1000um, and the thickness of the silicon dioxide layer 2 was 1500nm.

[0094] Example 5

[0095] The single crystal growth direction of the original PMN-PT single crystal rod is

[001] oriented, and a reference edge in the

[100] direction is reserved in the plane through structural orientation. The width of the reference edge is between 10 mm and 50 mm. The crystal rod is cut into pieces with a thickness of 500 μm and an original crystal rod size of 5.08 cm. The cut PMN-PT single crystal is subjected to chemical mechanical polishing. The initial PMN-PT single crystal roughness after cutting is above 1 μm. Single-sided polishing is performed on the surface of the PMN-PT single crystal using non-woven fabric and polishing liquid on a polishing disk. The polishing speed is 35 rpm / min, the polishing pressure is 3.5 kg, and the polishing time is 2 to 3 hours, so that the roughness of the polished surface of the PMN-PT single crystal wafer finally reaches Ra≤0.5 nm. The polished PMN-PT single crystal wafer is cleaned with an acid solution of a mixed acid solvent of concentrated sulfuric acid, hydrogen peroxide and deionized water in a volume ratio of 50:2:8 to remove organic particles on the surface of the PMN-PT single crystal wafer; then, the surface of the PMN-PT single crystal wafer is wiped with a cleaning liquid to specifically remove fine particles adsorbed on the surface of the PMN-PT single crystal, and a protective layer is formed on the surface to prevent secondary adsorption of particles; finally, the particles are removed by using a two-fluid cleaning and manual brushing method to obtain a piezoelectric single crystal wafer that can be subsequently bonded.

[0096] The surfaces of a thermal oxide silicon wafer with a surface roughness Ra < 0.5 nm, a warp < 15 μm, and a thickness variation TTV ≤ 3 μm and a 500 μm thick single crystal wafer were cleaned in the above-mentioned manner, and the silicon dioxide layer surface of the thermal oxide silicon wafer and the piezoelectric single crystal wafer were surface activated using Ar. The surface activation power was 450 to 550 W, and the activation time was 90 seconds. The activated thermal oxide silicon wafer and the piezoelectric single crystal wafer were spontaneously bonded together, and the bubbles were pushed out. They were then step-annealed at a certain pressure and a temperature range of 100°C to 160°C with a temperature interval of 20°C for 10 hours to form a bonding pair.

[0097] The bonded pair is mechanically polished and surface CMP treated to finally obtain a high-quality silicon-based lead magnesium niobate-lead titanate multilayer single crystal piezoelectric wafer structure, the thickness of the single crystal piezoelectric film layer 3 is 5000nm, the thickness of the silicon substrate 1 is 500um, and the thickness of the silicon dioxide layer 2 is 500nm.

[0098] As mentioned above, the application of silicon-based lead magnesium niobate single crystal piezoelectric wafer structure in the preparation of piezoelectric MEMS sensors, actuators, microacoustic filters and electro-optical modulation devices. The piezoelectric MEMS sensors, actuators, microacoustic filters and electro-optical modulation devices prepared using silicon-based lead magnesium niobate single crystal piezoelectric wafer structure have the advantages of low cost, high performance, small size and high integration.

[0099] In summary, the present invention provides a silicon-based lead magnesium niobate-based single-crystal piezoelectric wafer structure, preparation method, and application. The structure comprises a silicon substrate on which a silicon dioxide layer and a single-crystal piezoelectric thin film layer are sequentially disposed; the single-crystal piezoelectric thin film layer is a PMN-PT single-crystal thin film or a PIN-PMN-PT single-crystal thin film. Acoustic filters and electro-optical modulators fabricated with this structure have operating frequencies exceeding GHz and, compared to thin-film devices made from materials such as lithium niobate and lithium tantalate, offer higher performance and smaller size, meeting the high-integration and miniaturization requirements of 5G devices.

[0100] The above description is merely a preferred embodiment of the present invention and is not intended to impose any limitation on the technical solution of the present invention. Those skilled in the art should understand that, without departing from the spirit and principles of the present invention, the technical solution can also be subjected to several simple modifications and replacements, and these modifications and replacements are also within the scope of protection covered by the claims.

Claims

1. A method for preparing a silicon-based lead magnesium niobate single crystal piezoelectric wafer structure, characterized in that: The silicon-based lead magnesium niobate system single crystal piezoelectric wafer structure comprises a silicon substrate (1), on which a silicon dioxide layer (2) and a single crystal piezoelectric film layer (3) are sequentially arranged, wherein the single crystal piezoelectric film layer (3) is a PMN-PT single crystal film or a PIN-PMN-PT single crystal film; the PIN-PMN-PT single crystal film is a ternary solid solution, and the general formula is: xPb(In 1 / 2 / Nb 1 / 2 )O3-yPb(Mg 1 / 3 Nb 2 / 3 )O3-(1-xy)PbTiO3, wherein 0.15≤x≤0.3, 0.4≤y≤0.55; the PMN-PT single crystal film is a binary solid solution with the general formula zPb(In 1 / 2 / Nb 1 / 2 )O3-(1-z)PbTiO3, wherein 0.1≤z≤0.7, and the preparation method comprises: orienting, mechanically cutting, polishing, and cleaning the grown PMN-PT single crystal ingot or PIN-PMN-PT single crystal ingot to obtain a piezoelectric single crystal wafer; implanting ions into the piezoelectric single crystal wafer; Bonding a thermal oxide silicon wafer to an ion-implanted piezoelectric single crystal wafer to form a bonding pair; the thermal oxide silicon wafer comprises a silicon substrate (1) and a silicon dioxide layer (2); Annealing the bonded pair to peel the piezoelectric single crystal wafer at the ion implantation layer to obtain a silicon-based lead magnesium niobate system single crystal piezoelectric wafer structure; or orienting, mechanically cutting, polishing, and cleaning the grown PMN-PT single crystal ingot or PIN-PMN-PT single crystal ingot to obtain a piezoelectric single crystal wafer; Bonding the thermal oxide silicon wafer to the piezoelectric single crystal wafer to form a bonding pair; The piezoelectric single crystal wafers on the bonding pair are mechanically polished and surface CMP treated to control the thickness of the piezoelectric single crystal wafer to be 300-5000 nm, thereby obtaining a silicon-based lead magnesium niobate system single crystal piezoelectric wafer structure.

2. The method for preparing a silicon-based lead magnesium niobate-based single crystal piezoelectric wafer structure according to claim 1, characterized in that: The thickness of the silicon substrate (1) is 200 to 1000 μm, the thickness of the silicon dioxide layer (2) is 200 to 1500 nm, and the thickness of the single crystal piezoelectric film layer (3) is 300 to 5000 nm.

3. The method for preparing a silicon-based lead magnesium niobate-based single crystal piezoelectric wafer structure according to claim 1, characterized in that: The method for orienting, mechanically cutting, polishing and cleaning the grown PMN-PT single crystal ingot or PIN-PMN-PT single crystal ingot to obtain a piezoelectric single crystal wafer is as follows: The grown PMN-PT single crystal rod or PIN-PMN-PT single crystal rod is cut into pieces, and the crystal orientation of the cut surface is measured by XRD and the cut reference edge is oriented to obtain a PMN-PT single crystal rod or PIN-PMN-PT single crystal rod with a known lattice orientation in the cut surface calibrated by the cut reference edge; Mechanically cutting a PMN-PT single crystal ingot or a PIN-PMN-PT single crystal ingot having a known lattice orientation within a section marked by a cutting reference edge in a direction parallel to the oriented section to obtain a PMN-PT single crystal wafer or a PIN-PMN-PT single crystal wafer, wherein the single crystal wafer has a diameter of 2 to 6 inches and a thickness of 400 to 1500 μm; Polishing the surface of the PMN-PT single crystal wafer or the PIN-PMN-PT single crystal wafer to a roughness of less than 0.5 nm by chemical mechanical polishing; The polished PMN-PT single crystal wafer or PIN-PMN-PT single crystal wafer is cleaned using a mixed solvent acid solution to remove organic particles on the surface, thereby obtaining a piezoelectric single crystal wafer.

4. The method for preparing a silicon-based lead magnesium niobate-based single crystal piezoelectric wafer structure according to claim 1, characterized in that: The method for bonding the thermal oxide silicon wafer to the piezoelectric single crystal wafer or the piezoelectric single crystal wafer after ion implantation to form a bonding pair is as follows: Activating the surface of the silicon dioxide layer and the surface of the piezoelectric single crystal wafer respectively by using gas to obtain a surface-activated silicon dioxide layer and a surface-activated piezoelectric single crystal wafer; The surface-activated silicon dioxide layer and the surface-activated piezoelectric single crystal wafer are spontaneously bonded to form a silicon / silicon dioxide / piezoelectric single crystal wafer multilayer structure; The multilayer structure of silicon / silicon dioxide / piezoelectric single crystal wafer is subjected to step annealing to form a bonding pair.

5. The method for preparing a silicon-based lead magnesium niobate-based single crystal piezoelectric wafer structure according to claim 4, characterized in that: The gas used for surface activation is one or more of Ar, CF4, N2 and O2; the conditions for step annealing are: within the temperature range of 100℃ to 160℃, keep warm at 20℃ for 10 hours, and keep warm at 160℃ for 10 to 30 hours.

6. The method for preparing a silicon-based lead magnesium niobate-based single crystal piezoelectric wafer structure according to claim 1, characterized in that: The method for annealing the bonded pair to peel the piezoelectric single crystal wafer at the ion implantation layer to obtain a silicon-based lead magnesium niobate system single crystal piezoelectric wafer structure is as follows: The bonded pair is annealed at 200-400° C. for 10-30 hours to peel off the piezoelectric single crystal wafer at the implanted ion layer to obtain a silicon-based lead magnesium niobate system single crystal piezoelectric wafer structure.

7. The method for preparing a silicon-based lead magnesium niobate-based single crystal piezoelectric wafer structure according to claim 1, characterized in that: The ions injected into the piezoelectric single crystal wafer are: H and / or He, and the ion dose injected into the piezoelectric single crystal wafer is 4*10 16 ~4*10 17 ions / cm 2 The depth of ion implantation is 600~1600nm.

8. Use of the silicon-based lead magnesium niobate-based single crystal piezoelectric wafer structure as claimed in claim 1 in the preparation of piezoelectric MEMS sensors, actuators, microacoustic filters and electro-optical modulation devices.

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