A silicon-based integrated wavelet demultiplexing device based on topology optimization with electromagnetic simulation

Abstract

The present invention discloses a silicon-based integrated wavelet decomposition and demultiplexing device based on topology optimization accompanied by electromagnetic simulation, which is characterized in that it includes a substrate and a plurality of basic units arranged in a grid shape on the substrate, the basic units are connected by connecting waveguides, the output end of the substrate unit is coupled to the output waveguide, and the input end of the basic unit is coupled to the input waveguide; the basic unit includes silicon pixels and an ambient medium filling the space, and the arrangement of the silicon pixels is controlled by topology optimization accompanied by electromagnetic simulation to achieve modulation of electromagnetic waves, thereby achieving demultiplexing of the input multiplexed light in the output waveguide.

Description

Technical Field

[0001] The present invention belongs to the field of micro-nano optoelectronic technology, and in particular relates to a silicon-based integrated wavelet decomposition and multiplexing device based on topology optimization accompanied by electromagnetic simulation. Background Art

[0002] The technology of allowing two or more optical wavelength signals to transmit information simultaneously through different optical channels in the same optical fiber is called wavelength division multiplexing technology. It combines two or more optical carrier signals of different wavelengths (carrying various information) together through a combiner at the transmitting end and couples them into the same optical fiber for transmission. At the receiving end, the optical signals of various wavelengths are separated by a demultiplexer and then further processed by the optical receiver to restore them to the original signals.

[0003] The bandwidth and resolution of a wavelength demultiplexer (WDM) are crucial for the performance of the entire optical system. Traditional WDMs, composed of linear optical components such as gratings, are large and physically limited, making them difficult to miniaturize. Furthermore, the design process is complex, requiring trade-offs to be considered for specific design requirements. Inverse design, a trending design method, opens up possibilities for the design of micron-scale WDMs.

[0004] Patent application specification CN114019604A discloses a small-scale WDM-DDM device. The device comprises a substrate, a signal input waveguide, a signal output waveguide, and a WDM-DDM region. The signal input waveguide, signal output waveguide, and WDM-DDM region are all arranged on the substrate. The signal output waveguide includes first and second output waveguides of identical structure and spaced apart. The WDM-DDM region is connected between the signal input waveguide and the signal output waveguide through topology optimization and reverse design. Two multiplexed optical signals of two wavelengths are input through the signal input waveguide and, after passing through the WDM-DDM region, are separated and outputted separately from the first and second output waveguides. The present invention utilizes a companion source method to perform topology optimization and reverse design on the device, enabling WDM-DDM with long wavelength spacing, addressing the large footprint and unstable performance issues of conventional on-chip WDM devices. The invention employs reverse design to design a dual-path WDM. However, its limited dual-path design fails to meet the requirements for wide-band multi-path optical switching.

[0005] Patent application specification CN116520486A provides a reconfigurable wavelength division multiplexer and its preparation method. The wavelength division multiplexer comprises a device layer, which is an arrayed waveguide grating. The device layer structure includes an input waveguide, an input slab waveguide, an arrayed waveguide structure, an output slab waveguide, and multiple output waveguides. The input slab waveguide is coupled to the input waveguide, the arrayed waveguide structure is coupled between the input slab waveguide and the output slab waveguide, and the output slab waveguide is coupled to the multiple output waveguides. The area between adjacent arrayed waveguides in the arrayed waveguide structure is filled with phase change material. This application can effectively solve the problem of on-chip wavelength division multiplexer devices being significantly affected by process and difficult to adjust. However, the structural asymmetry makes it impossible to effectively establish connections between the individual wavelength division multiplexers, and wide-band designs still require a large footprint. Summary of the Invention

[0006] The present invention provides a silicon-based integrated wavelet decomposition and multiplexing device based on topology optimization accompanied by electromagnetic simulation, which has higher design freedom, smaller occupied area and more integrated optical functions.

[0007] The present invention provides a silicon-based integrated wavelet demultiplexing device based on topology optimization accompanied by electromagnetic simulation, comprising a substrate and a plurality of basic units arranged in a grid pattern on the substrate, wherein the basic units are connected by connecting waveguides, the output end of the substrate unit is coupled to the output waveguide, and the input end of the basic unit is coupled to the input waveguide;

[0008] The basic unit includes silicon pixels and an ambient medium that fills the space. The arrangement of the silicon pixels is regulated by topological optimization accompanied by electromagnetic simulation to achieve modulation of electromagnetic waves, thereby achieving demultiplexing of the input multiplexed light in the output waveguide.

[0009] Preferably, the method for controlling the arrangement of silicon pixels of a basic unit by topological optimization accompanied by electromagnetic simulation includes the following steps:

[0010] The dielectric constant matrix is ​​mapped to the parameter matrix through the hyperbolic tangent function. The parameter matrix with a domain from negative infinity to positive infinity is iteratively optimized through electromagnetic simulation topology optimization until the objective function constructed by the set output power and penalty function converges. At the same time, when the dielectric constant matrix converges to the dielectric constant value of the discrete silicon pixel point and the dielectric constant value of the ambient medium, the iterative optimization is stopped to obtain the final silicon pixel arrangement of the basic unit.

[0011] Preferably, the method for making the dielectric constant matrix converge to the dielectric constant value of the discrete silicon pixel point and the dielectric constant value of the ambient medium includes:

[0012] During the iterative optimization process, the hyperbolic tangent function is controlled to approach a step function by increasing the value of the introduced external parameter beta, so that the dielectric constant matrix converges to the dielectric constant values ​​of discrete silicon pixels and the dielectric constant values ​​of the ambient medium.

[0013] Preferably, the method for obtaining the parameter matrix includes:

[0014] The initial parameter matrix is ​​convolved with a mask with a radius of R, and the structure corresponding to the convolved parameter matrix is ​​optimized through a penalty function to obtain a parameter matrix that meets the size requirements.

[0015] Preferably, the structure corresponding to the convolved parameter matrix is ​​optimized by a penalty function to obtain a parameter matrix that meets the size requirements, including:

[0016] The parameter matrix after convolution is opened and closed respectively, and the difference between the parameter matrices obtained after the opening and closing operations is normalized to construct a penalty function. The parameter matrix that meets the size requirements is obtained by minimizing the penalty function.

[0017] Preferably, the convolved parameter matrix is ​​opened, including sequentially performing morphological erosion and dilation operations on the convolved parameter matrix;

[0018] The convolution parameter matrix is ​​opened, including: performing morphological expansion and erosion operations on the convolution parameter matrix in sequence.

[0019] Preferably, the parameter matrix is ​​iteratively optimized by adjoint electromagnetic simulation topology optimization, including:

[0020] Through two finite-difference time-domain electromagnetic simulations, forward simulation and adjoint simulation, the gradient of the parameter matrix is ​​obtained based on the overlap of the two simulated electric field distributions in the basic unit area. The parameter matrix is ​​then adjusted along the gradient direction until the objective function consisting of the power at the set output end and the penalty function converges. At the same time, the dielectric constant matrix converges to the dielectric constant value of the discrete silicon pixel point and the dielectric constant value of the ambient medium.

[0021] Preferably, the gradient optimizer uses an adaptive moment estimation algorithm.

[0022] Preferably, the relative dielectric constant of the silicon material is 12.18, the ambient medium is air with a relative dielectric constant of 1, the silicon pixel is a rectangle of 20nm×20nm, the working band is 1200nm-1600nm, and the splitting network includes 3×2 basic units, 1 input waveguide, 9 output waveguides and 7 connecting waveguides. The 9 output bands are 1200-1244nm, 1245-1289nm, 1290-1333nm, 1334-1378nm, 1379-1422nm, 1423-1466nm, 1467-1511nm, 1512-1555nm, and 1556-1600nm.

[0023] Compared with the prior art, the present invention has the following beneficial effects:

[0024] The present invention modulates electromagnetic waves by controlling the arrangement of silicon pixels and the ambient medium through topological optimization accompanied by electromagnetic simulation, thereby enabling flexible multi-path demultiplexing of input multiplexed light in the output waveguide within a given area, thus solving the problem of traditional optical devices occupying a large area and being difficult to integrate. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] FIG1 is a schematic diagram of the structure of a silicon-based integrated wavelet demultiplexing device based on topology optimization with electromagnetic simulation provided by a specific embodiment of the present invention, wherein: Figure 1a The rendering of its promotion to three-dimensional; Figure 1b Its two-dimensional dielectric constant distribution diagram.

[0026] Figure 2 This is a schematic diagram of the structure of the basic unit of the silicon-based integrated wavelet decomposition and multiplexing device in the network based on topology optimization accompanied by electromagnetic simulation.

[0027] FIG3 is a performance test diagram of the silicon-based integrated wavelet decomposition and demultiplexing device based on topology optimization with electromagnetic simulation according to the present invention, wherein: Figure 3a It is the spatial distribution diagram of electric field intensity at typical incident wavelengths in the 1200-1600nm band; Figure 3b It is the transmittance curve of each output port for the entire working band. DETAILED DESCRIPTION

[0028] The following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of the present invention.

[0029] To address the problem in existing technologies of being unable to achieve flexible demultiplexing within a given area, the present invention utilizes topological optimization accompanied by electromagnetic simulation to control the silicon pixel arrangement of each basic unit. Light of a given wavelength within a set area can be flexibly output from a set output waveguide, thereby achieving demultiplexing of the input multiplexed light in the output waveguide.

[0030] A specific embodiment of the present invention provides a silicon-based integrated wavelet decomposition and demultiplexing device based on topology optimization accompanied by electromagnetic simulation, including a substrate and a plurality of basic units arranged in a grid pattern on the substrate. The basic units are connected by connecting waveguides, the output end of the substrate unit is coupled to the output waveguide, and the input end of the basic unit is coupled to the input waveguide.

[0031] The basic unit provided by the specific embodiment of the present invention includes silicon pixels and an environmental medium that fills the space. The arrangement of the silicon pixels and the environmental medium are regulated by topological optimization accompanied by electromagnetic simulation to achieve modulation of electromagnetic waves, thereby achieving demultiplexing of the input multiplexed light in the output waveguide.

[0032] In a specific embodiment, if Figure 1a and Figure 1b As shown, the silicon-based integrated wavelet decomposition and demultiplexing device based on topology optimization accompanied by electromagnetic simulation, which is extended to three dimensions, includes a silicon dioxide substrate and a "cross"-shaped splitting "network" structure composed of silicon material located on the substrate; the "cross"-shaped splitting "network" structure includes 6 "cross"-shaped splitting basic units, 1 input waveguide, 9 output waveguides and 7 connecting waveguides; the device is composed of 6 "cross"-shaped splitting basic units arranged in the form of 3 in the y-axis direction and 2 in the x-axis direction, supplemented by 1 input waveguide, 9 output waveguides and 7 connecting waveguides.

[0033] like Figure 1b As shown, the rectangular silicon-based design area is a square with a side length of 3um and consists of 150×150 pixels; the pixel size is 20nm×20nm; the input and output waveguides and connecting waveguides have the same size for regular arrangement, are 1.5um long and 0.4um wide, and are filled with silicon material with the same dielectric constant as the silicon pixels.

[0034] In one embodiment, the relative dielectric constant of the silicon material provided in the specific embodiment of the present invention is 12.18, the ambient medium is air with a relative dielectric constant of 1, the operating band is 1200nm-1600nm, and the 9 output bands are 1200-1244nm, 1245-1289nm, 1290-1333nm, 1334-1378nm, 1379-1422nm, 1423-1466nm, 1467-1511nm, 1512-1555nm, and 1556-1600nm, and the corresponding waveguides are arranged in a clockwise direction.

[0035] The specific steps of the method for controlling the silicon pixel arrangement and the environmental medium of the basic unit by topological optimization accompanied by electromagnetic simulation in a specific embodiment of the present invention are as follows:

[0036] First, translate the design problem into the following form:

[0037]

[0038] where f obj is the objective function that represents the optimization goal. The objective function is the sum of the wavelength powers of each output port obtained by forward simulation minus the penalty function. The weight coefficient can be adjusted according to the target priority. E is the spatial electric field distribution, ∈ is the dielectric constant, p is the parameter matrix / vector with a range from negative infinity to positive infinity after size constraints, and S fab It is the parameter space of the manufacturable device, i.e., the size-constrained one;

[0039] Secondly, the dielectric constant ∈ is indirectly specified by the parameter matrix / vector p from negative infinity to positive infinity after the size constraint, so that manufacturing constraints such as the material dielectric constant taking discrete values ​​and the process requirement for the minimum feature size are included in the optimization constraints. In a specific embodiment, the dielectric constant includes the dielectric constant of the silicon material and the dielectric constant of the air. The distribution of the dielectric constant is obtained by optimization to obtain the arrangement of the silicon pixel points. Specifically, a smooth and differentiable hyperbolic tangent function (tanh) is introduced to map the parameter matrix / vector from negative infinity to positive infinity to a continuous and bounded dielectric constant space; this mapping relationship is controlled by an additional parameter beta. As beta increases, the tanh function gradually approaches a step function; during the iterative optimization, the beta value is gradually increased to make the dielectric constant distribution of the design area converge to two discrete dielectric constant values, namely the dielectric constant value of the silicon pixel point and the dielectric constant value of the ambient medium, so as to obtain the dielectric constant distribution.

[0040] The initial parameter matrix corresponding to the initial pixel matrix is ​​convolved with a mask with a convolution kernel radius of R to produce a smoother parameter distribution, thereby introducing the minimum feature size required by the process into the parameter matrix after size constraint. At the same time, a penalty function is added, and the structure corresponding to the convolved parameter matrix is ​​optimized through the penalty function to produce a structure that remains unchanged under erosion and expansion. The device finally optimized satisfies the feature size constraint. The larger the parameter R is, the larger the feature size of the device will be. In one embodiment, the actual feature size is approximately 1 / 2 of the parameter R.

[0041] Specifically, the erosion and dilation provided by the embodiments of the present invention are fundamental morphological operations. For erosion, the output pixel value is the minimum value of all pixels in the neighborhood; for dilation, the output pixel value is the maximum value of all pixels in the neighborhood. Morphological dilation makes objects more visible and fills small holes in objects, making lines appear thicker and filled shapes appear larger. Morphological erosion removes isolated pixels and thin lines, leaving only the substantial object, making the remaining lines appear thinner and the shapes smaller.

[0042] The operation of first eroding and then dilating is called an opening operation. It helps remove small objects and thin lines from an image while maintaining the shape and size of larger objects. The operation of first dilating and then eroding is called a closing operation. It can be used to fill small holes in an image while preserving the shape and size of large holes and objects. When the pixel maps generated by the opening and closing operations are essentially the same, all small objects and small holes are considered to have been eliminated. Specifically, the penalty function is defined as the normalized modulus of the difference between the pixel matrices after the closing and opening operations. Minimizing the penalty function in the objective function achieves the function of eliminating small objects and small holes.

[0043] In a specific embodiment, this embodiment iteratively optimizes the parameter matrix by accompanying electromagnetic simulation topology optimization, including:

[0044] This embodiment uses the adjoint method to perform topological optimization on the dielectric constant distribution, that is, through two time-domain finite-difference electromagnetic simulations of forward simulation and adjoint simulation, the gradient of the parameter matrix from negative infinity to positive infinity is obtained based on the overlap of the two simulated electric field distributions in the design area, and then the parameter matrix from negative infinity to positive infinity is adjusted along the gradient direction, and it is iterated until the objective function consisting of the power of the set output end and the penalty function converges. At the same time, the dielectric constant matrix converges to the dielectric constant value of the discrete silicon pixel point and the dielectric constant value of the ambient medium; preferably, the gradient-based optimizer uses the Adaptive Moment Estimation (Adam) algorithm.

[0045] Specifically, the physical structure of the accompanying simulation provided by the specific embodiment of the present invention is composed of three parts, namely the source, the simulation structure and the observation point. The purpose of using the accompanying simulation is to obtain the gradient of the electric field intensity at the observation point with respect to the parameters of the simulation structure. A companion simulation includes two simulations. In the first simulation, the wave source is placed at the source, the intensity is set as needed, and the electric field intensity at the observation point is measured. The resulting planar electric field distribution is called the front field. In the second simulation, the wave source is placed at the observation point, and the intensity is given by the complex conjugate of the amplitude phase of the front field at the observation point. The electric field intensity at the source is measured, and the resulting electric field distribution is called the accompanying field. Finally, the superposition of the two simulation results is taken in the area of ​​the simulation structure, that is, the overlap of the front field and the accompanying field. The result is the gradient of the electric field intensity at the observation point with respect to the parameters of the simulation structure.

[0046] In a specific embodiment of the present invention, a new design region is added and the objective function is updated for joint optimization, and the above design process is repeated until the entire device design is completed.

[0047] like Figure 2 As shown in FIG, a new design area is added to the optimized basic unit and the objective function is updated for joint optimization. The above operation is repeated to finally obtain a "cross" shaped optical splitting "network" consisting of 3×2 basic units, as shown in FIG. Figure 1b shown.

[0048] FIG3 is a performance test diagram of a silicon-based integrated wavelet decomposition and demultiplexing device based on topology optimization accompanied by electromagnetic simulation according to the present invention. Figure 3a The spatial distribution diagram of the electric field intensity at a specific incident wavelength in the 1200-1600nm band; Figure 3b It is the transmittance curve of each output port for the entire working band.

[0049] The silicon-based integrated wavelet decomposition and demultiplexing device of the present invention, which is based on topology optimization accompanied by electromagnetic simulation, comprises: a relative dielectric constant of the silicon material is 12.18, an ambient medium is air with a relative dielectric constant of 1, a silicon pixel point is a 20nm×20nm rectangle, an operating band is 1200nm-1600nm, and a splitting network includes 3×2 basic units, 1 input waveguide, 9 output waveguides and 7 connecting waveguides, and the 9 output wavebands are 1200-1244nm, 1245-1289nm, 1290-1333nm, 1334-1378nm, 1379-1422nm, 1423-1466nm, 1467-1511nm, 1512-1555nm and 1556-1600nm.

[0050] like Figure 3a As shown in FIG, the typical wavelength light corresponding to each output port is basically emitted from the designated port. Figure 3bThe relationship between transmittance and wavelength is shown in the figure. The bandwidth of each output port is slightly smaller than the specified wavelength band, which basically meets the predetermined design goal.

[0051] The specific embodiment of the present invention is a silicon-based integrated wavelet demultiplexer device based on topology optimization with electromagnetic simulation. Compared with the macro scale of traditional prism dispersion type, fused fiber type, diffraction grating type and dielectric film type wavelet demultiplexer, the area is only 157.5um. 2 , and realizes nine-way demultiplexing, solving the problem that traditional optical devices occupy a large area and are difficult to integrate.

[0052] The silicon-based integrated wavelength division multiplexing device based on topology optimization using adjoint electromagnetic simulation expands design freedom and improves design efficiency by combining a topology optimization algorithm based on adjoint electromagnetic simulation with the concept of network joint optimization. Applying the same inverse design approach can yield a network structure with a larger area and finer wavelength separation. Extending this to 3D design, a compact optical splitting network can be realized through multi-layer structures and three-dimensional optical paths. This network structure can serve as a key component of integrated optical devices such as on-chip multidimensional optical interconnects and on-chip spectrometers.

[0053] The above are merely embodiments of the present application and are not intended to limit the present application. For those skilled in the art, the present application may have various changes and variations. Any modification, equivalent replacement, improvement, etc. within the spirit and principles of the present application should be included within the scope of the claims of the present application.

Claims

1. A silicon-based integrated wavelet demultiplexing device based on topology optimization with electromagnetic simulation, characterized in that: The invention comprises a substrate and a plurality of basic units arranged in a grid on the substrate, wherein the basic units are connected by connecting waveguides, the output end of the basic unit is coupled to the output waveguide, and the input end of the basic unit is coupled to the input waveguide; The basic unit includes silicon pixels and an ambient medium filling the space. The arrangement of the silicon pixels is regulated by topological optimization accompanied by electromagnetic simulation to achieve modulation of electromagnetic waves, thereby achieving demultiplexing of the input multiplexed light in the output waveguide. The method for controlling the arrangement of silicon pixels of the basic unit by topological optimization accompanied by electromagnetic simulation includes the following steps: The dielectric constant matrix is ​​mapped to a parameter matrix using a hyperbolic tangent function. The parameter matrix is ​​iteratively optimized through electromagnetic simulation topology optimization until the objective function constructed by the set output power and penalty function converges. At the same time, when the corresponding dielectric constant matrix converges to the dielectric constant values ​​of the discrete silicon pixels and the dielectric constant values ​​of the ambient medium, the iterative optimization is stopped to obtain the final basic unit silicon pixel arrangement. The method for making the dielectric constant matrix converge to the dielectric constant value of the discrete silicon pixel point and the dielectric constant value of the ambient medium includes: During the iterative optimization process, the value of the introduced external parameter beta is increased to control the hyperbolic tangent function to approach the step function, so that the dielectric constant matrix converges to the dielectric constant values ​​of the discrete silicon pixels and the dielectric constant values ​​of the ambient medium. Methods for obtaining parameter matrices include: Convolve the initial parameter matrix with the mask of radius R, and optimize the structure corresponding to the convolved parameter matrix through the penalty function to obtain a parameter matrix that meets the size requirements; The structure corresponding to the convolution parameter matrix is ​​optimized through the penalty function to obtain a parameter matrix that meets the size requirements, including: The convolution parameter matrix is ​​opened and closed respectively, and the difference between the obtained parameter matrices is normalized to construct a penalty function. The parameter matrix that meets the size requirements is obtained by minimizing the penalty function. Perform an opening operation on the convolution parameter matrix, including performing morphological erosion and dilation operations on the convolution parameter matrix in sequence; Performing an opening operation on the convolution parameter matrix, including: performing morphological dilation and erosion operations on the convolution parameter matrix in sequence; Iteratively optimize the parameter matrix through topology optimization accompanied by electromagnetic simulation, including: Through two finite-difference time-domain electromagnetic simulations, forward simulation and adjoint simulation, the gradient of the parameter matrix is ​​obtained based on the overlap of the two simulated electric field distributions in the basic unit area. The parameter matrix is ​​then adjusted along the gradient direction until the objective function consisting of the power at the set output end and the penalty function converges. At the same time, the dielectric constant matrix converges to the dielectric constant value of the discrete silicon pixel point and the dielectric constant value of the ambient medium.

2. The silicon-based integrated wavelet demultiplexing device based on topology optimization with electromagnetic simulation according to claim 1, characterized in that: The gradient optimizer uses the adaptive moment estimation algorithm.

3. The silicon-based integrated wavelet demultiplexing device based on topology optimization with electromagnetic simulation according to claim 1, characterized in that: The relative dielectric constant of silicon material is 12.18, the ambient medium is air with a relative dielectric constant of 1, the silicon pixel is a 20nm×20nm rectangle, the working band is 1200nm-1600nm, and the splitter network includes 3×2 basic units, 1 input waveguide, 9 output waveguides and 7 connecting waveguides. The 9 output bands are 1200-1244nm, 1245-1289nm, 1290-1333nm, 1334-1378nm, 1379-1422nm, 1423-1466nm, 1467-1511nm, 1512-1555nm, and 1556-1600nm.

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