A method for optimizing instruction scheduling of a just-in-time compiler, a storage medium and an apparatus

Abstract

The application discloses a kind of based on the instruction scheduling optimization method of Bisheng compiler of Peng platform, storage medium, equipment and computer program product, comprising: obtaining the source program to be scheduled by Bisheng compiler on Peng platform, whether source program is legal using context-independent grammar judgment;The power consumption required for scheduling illegal source program is calculated and sorted, and the sub-functions in the illegal source program are rearranged by dependency graph construction algorithm in turn to the illegal source program sorted from small to large;Illegal source program in sub-function is modified by log analysis method in turn to the illegal source program sorted from large to small;Illegal source program is handled using the above two methods from two ends to middle, and then whether the source program is legal after processing is judged;If still illegal, exchange two kinds of methods to handle illegal source program, judge whether the source program is legal again, if legal, carry out instruction scheduling by Bisheng compiler;Otherwise, mark the illegal source program, and alarm.

Description

Technical Field

[0001] This invention relates to the field of compiler instruction scheduling technology, and more specifically, to a method, storage medium, device, and computer program product for optimizing instruction scheduling of the BiSheng compiler based on the Kunpeng platform. Background Technology

[0002] Modern computers offer various forms of instruction-level parallel execution capabilities, allowing multiple instructions to be issued and executed within the same clock cycle. Therefore, the order of instructions is crucial for fully utilizing the computer's parallel execution capabilities. The compiler needs to sort the instructions according to the specific characteristics of the target machine to fully utilize the machine's computing resources and capabilities, thereby achieving instruction scheduling.

[0003] Currently, the instructions input into the Bisheng compiler on the Kunpeng platform are a list of instruction source programs from the target machine. However, the instruction source programs may become invalid due to non-standard code writing or the presence of special symbols that conflict with the compiler without the addition of escape characters, thus causing instruction scheduling to fail. Summary of the Invention

[0004] To address the problems existing in the prior art, this invention provides a method, storage medium, device, and computer program product for optimizing instruction scheduling of the BiSheng compiler based on the Kunpeng platform, which improves the optimization efficiency of invalid source programs and achieves the effect of instruction scheduling optimization.

[0005] To achieve the above technical objectives, the present invention adopts the following technical solution: a method for optimizing instruction scheduling of the BiSheng compiler based on the Kunpeng platform, specifically including the following steps:

[0006] Step 1: Obtain the source program to be scheduled by the Bi Sheng compiler on the Kunpeng platform, and use a context-free grammar to determine whether the source program is valid;

[0007] Step 2: Calculate the computing power required to schedule each invalid source program, and arrange the invalid source programs in ascending order of computing power.

[0008] Step 3: Calculate the affinity between sub-functions in the invalid source code in ascending order using a dependency graph construction algorithm, and rearrange the sub-functions in the invalid source code.

[0009] Step 4: Modify the sub-functions in the invalid source code, sorted from largest to smallest, using log analysis.

[0010] Step 5: Simultaneously use the methods of Step 3 and Step 4 until all illegal sub-functions in the source program have been processed, and then use a context-free grammar to determine whether the processed source program is legal.

[0011] Step 6: If the processed source program is invalid, the invalid source program rearranged by the dependency graph construction algorithm will be modified again using the log analysis method. The invalid source program modified by the log analysis method will be rearranged again using the dependency graph construction algorithm. The source program that has been processed again will be judged for its validity using a context-free grammar. If it is valid, instruction scheduling will be performed by the Bisheng compiler; otherwise, the invalid source program will be marked, an alarm will be issued, and manual correction will be performed.

[0012] Furthermore, the specific process of using context-free grammar to determine whether the source program is legal in step 1 is as follows: determine whether the source program is composed of a quadruple consisting of terminal symbols, non-terminal symbols, a rule describing the combination of terminal symbols and non-terminal symbols, and the start symbol of the source program being a non-terminal symbol. If so, the source program is legal; otherwise, the source program is illegal.

[0013] Furthermore, the calculation process for the computing power required to schedule each invalid source program in step 2 is as follows:

[0014]

[0015] in, This indicates the computing power required to schedule an invalid source program. n The number of logic operation chips. i for n index, f ( a i ) is a mapping function for logical operations. α i For the first i The mapping ratio coefficient of each logic operation chip. q 1 (TOPS) represents the redundant computing power for logical operations; m To increase the number of chips used for parallel computing, j for m index, f ( b j ) is a mapping function for parallel computing. β j Let be the mapping scaling factor for the j-th parallel computing chip. q 2 (FLOPS) represents the redundant computing power for parallel computing; p The number of neural network acceleration chips, k for p index, f ( c k ) is a mapping function for accelerating neural networks. γk For the first k The mapping ratio of a neural network acceleration chip. q 3 (FLOPS) represents redundant computing power for accelerating neural networks.

[0016] Furthermore, step 3 includes the following sub-steps:

[0017] Step 3.1: Construct a dependency graph for each sub-function in the invalid source code. G =( V , E ),in, V This indicates a sub-function in an invalid source program. E This represents an edge connecting any two sub-functions in an invalid source program;

[0018] Step 3.2: Identify the sub-functions in the invalid source program that are most relevant to the scheduling instruction task as the starting node of the dependency graph, and predict the affinity between the starting node and the remaining sub-functions using a Markov chain prediction model;

[0019] Step 3.3: Select the sub-function with the highest affinity as the next node, and predict the affinity between the node and the remaining sub-functions using a Markov chain prediction model;

[0020] Step 3.4: Repeat step 3.3 until all sub-functions form a dependency graph as nodes.

[0021] Furthermore, the Markov chain prediction model is specifically as follows:

[0022] V ij = W i × P ij

[0023] in, V ij Subfunction i AND sub-function j The affinity between them W i Subfunction i The relevance of the subfunction to the instruction scheduling task, P represents the degree of relevance. i Associated with sub-functions j The transition probability matrix.

[0024] Furthermore, the specific process of step 4 is as follows: for each sub-function in the invalid source program, the most relevant historical sub-function is matched from the historical log data based on three indicators: instruction scheduling task type, development language, and same data source, and then the sub-function in the invalid source program is replaced.

[0025] Furthermore, the present invention also provides a computer-readable storage medium storing a computer program, characterized in that the computer program causes a computer to execute the aforementioned instruction scheduling optimization method based on the Kunpeng platform and the Bisheng compiler.

[0026] Furthermore, the present invention also provides an electronic device, including: a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein when the processor executes the computer program, it implements the aforementioned instruction scheduling optimization method based on the Kunpeng platform and the Bisheng compiler.

[0027] Furthermore, the present invention also provides a computer program product, including a computer program, characterized in that, when the computer program is executed by a processor, it implements the aforementioned instruction scheduling optimization method based on the Kunpeng platform and the Bisheng compiler.

[0028] Compared with existing technologies, this invention has the following beneficial effects: The instruction scheduling optimization method of the BiSheng compiler based on the Kunpeng platform first uses a context-free grammar to determine the legality of the source program, rearranging and modifying sub-functions in invalid source programs, thereby avoiding instruction scheduling failure; secondly, this invention calculates the computing power required for scheduling invalid source programs and sorts them according to computing power consumption. For the sorted invalid source programs, different processing methods are used to simultaneously optimize the invalid source programs from both ends to the middle, improving the optimization efficiency of invalid source programs and achieving the effect of instruction scheduling optimization; The invention prioritizes rearranging sub-functions in invalid source programs with low computing power consumption. The lower the computing power consumption, the shorter the time for rearranging invalid source programs, which can improve the timeliness of the BiSheng compiler in processing invalid source programs. It also prioritizes modifying sub-functions in invalid source programs with high computing power consumption. This is because some invalid source programs, although having high computing power consumption, have high business weight and need to be processed first. By quantifying the computing power consumption, the BiSheng compiler can be notified in advance to allocate sufficient idle computing power for processing, thereby avoiding abnormal situations such as memory overflow caused by insufficient resources. Attached Figure Description

[0029] Figure 1 This is a flowchart of the instruction scheduling optimization method of Bi Sheng compiler based on the Kunpeng platform according to the present invention;

[0030] Figure 2 This is a flowchart illustrating the algorithm for rearranging invalid source code using a dependency graph in this invention. Detailed Implementation

[0031] The technical solution of the present invention will be further explained and described below with reference to the accompanying drawings.

[0032] like Figure 1The flowchart below shows the instruction scheduling optimization method of the BiSheng compiler based on the Kunpeng platform according to the present invention. The BiSheng compiler instruction scheduling optimization method specifically includes the following steps:

[0033] Step 1: Obtain the source program to be scheduled by the Bisheng compiler on the Kunpeng platform. Use a context-free grammar to determine whether the source program is valid, thereby avoiding instruction scheduling failure due to invalid source programs. Specifically, determine whether the source program consists of a quadruple of terminal symbols, non-terminal symbols, rules describing the combination of terminal symbols and non-terminal symbols, and the start symbol of the source program being a non-terminal symbol. If so, the source program is valid; otherwise, the source program is invalid.

[0034] Step 2: Calculate the computing power required to schedule each invalid source program, and arrange the invalid source programs in ascending order of computing power.

[0035] The calculation process for the computing power and energy consumption required for scheduling each invalid source program in this invention is as follows:

[0036]

[0037] in, This indicates the computing power required to schedule an invalid source program. n The number of logic operation chips. i for n index, f ( a i ) is a mapping function for logical operations. α i For the first i The mapping ratio coefficient of each logic operation chip. q 1 (TOPS) represents the redundant computing power for logical operations; m To increase the number of chips used for parallel computing, j for m index, f ( b j ) is a mapping function for parallel computing. β j Let be the mapping scaling factor for the j-th parallel computing chip. q 2 (FLOPS) represents the redundant computing power for parallel computing; p The number of neural network acceleration chips, k for p index, f ( c k ) is a mapping function for accelerating neural networks. γ k For the first kThe mapping ratio of a neural network acceleration chip. q 3 (FLOPS) represents redundant computing power for accelerating neural networks.

[0038] Step 3: For each invalid source program sorted from smallest to largest, the affinity between sub-functions in the invalid source program is calculated using a dependency graph construction algorithm. The sub-functions in the invalid source program are then rearranged. Lower computational power consumption results in shorter rearrangement processing time, allowing for priority processing. This improves the timeliness of the BiSheng compiler in processing invalid source programs. Furthermore, higher affinity between sub-functions indicates stronger interrelationships between them. Figure 2 Specifically, it includes the following sub-steps:

[0039] Step 3.1: Construct a dependency graph for each sub-function in the invalid source code. G =( V , E ),in, V This indicates a sub-function in an invalid source program. E This represents an edge connecting any two sub-functions in an invalid source program;

[0040] Step 3.2: Identify the sub-functions in the invalid source program that are most relevant to the scheduling instruction task as the starting node of the dependency graph, and predict the affinity between the starting node and the remaining sub-functions using a Markov chain prediction model;

[0041] Step 3.3: Select the sub-function with the highest affinity as the next node, and predict the affinity between the node and the remaining sub-functions using a Markov chain prediction model;

[0042] Step 3.4: Repeat step 3.3 until all sub-functions form a dependency graph as nodes.

[0043] The Markov chain prediction model in this invention is specifically as follows:

[0044] V ij = W i × P ij

[0045] in, V ij Subfunction i AND sub-function j The affinity between them W i Subfunction i The relevance of the subfunction to the instruction scheduling task, P represents the degree of relevance. i Associated with sub-functions j The transition probability matrix.

[0046] Step 4: Modify the sub-functions in the invalid source programs sorted from largest to smallest using log analysis. First, modify the sub-functions in invalid source programs with high computing power consumption. This is because some invalid source programs, although consuming high computing power, have high business weight and need to be processed first. The computing power consumption can be quantified to pre-notify the BiSheng compiler to allocate sufficient idle computing power for processing, thereby avoiding memory overflow and other abnormal situations caused by insufficient resources. Specifically, for each sub-function in the invalid source program, match the most relevant historical sub-function from historical log data based on three indicators: instruction scheduling task type, development language, and the same data source, and replace the sub-function in the invalid source program.

[0047] Step 5: Simultaneously use the methods of Step 3 and Step 4 until all sub-functions in the illegal source code are processed. Then, use a context-free grammar to determine whether the processed source code is legal. For the sorted illegal source code, use different processing methods to optimize the illegal source code from both ends to the middle, thereby improving the optimization efficiency of the illegal source code and achieving the effect of instruction scheduling optimization.

[0048] Step 6: If the processed source code is invalid, the invalid source code rearranged using the dependency graph construction algorithm will be modified again using log analysis. The invalid source code modified using log analysis will then be rearranged again using the dependency graph construction algorithm. The reprocessed source code will then be judged for validity using a context-free grammar. For source codes with high invalidity, both rearrangement and modification methods will be used to optimize the source code's sub-functions, thereby reducing the number and probability of manual intervention. If valid, instruction scheduling will be performed using the BiSheng compiler; otherwise, the invalid source code will be marked, an alarm will be triggered, and manual correction will be required.

[0049] In one technical solution of the present invention, a computer-readable storage medium is also provided, storing a computer program, characterized in that the computer program causes a computer to execute the instruction scheduling optimization method of the BiSheng compiler based on the Kunpeng platform.

[0050] In one technical solution of the present invention, an electronic device is also provided, characterized in that it includes: a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein when the processor executes the computer program, it implements the instruction scheduling optimization method of the Bisheng compiler based on the Kunpeng platform.

[0051] In one technical solution of the present invention, a computer program product is also provided, including a computer program, which, when executed by a processor, implements the instruction scheduling optimization method of the Bisheng compiler based on the Kunpeng platform.

[0052] In the embodiments disclosed in this application, a computer storage medium may be a tangible medium that may contain or store programs for use by or in conjunction with an instruction execution system, apparatus, or device. The computer storage medium may include, but is not limited to, electronic, magnetic, optical, electromagnetic, infrared, or semiconductor systems, apparatus, or devices, or any suitable combination of the foregoing. More specific examples of computer storage media include electrical connections based on one or more wires, portable computer disks, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fibers, and portable compact disc read-only memory (CD). ROM), optical storage devices, magnetic storage devices, or any suitable combination of the foregoing.

[0053] Those skilled in the art will recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed in this application can be implemented in electronic hardware or a combination of computer software and electronic hardware. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0054] The above are merely preferred embodiments of the present invention. The scope of protection of the present invention is not limited to the above embodiments. All technical solutions falling within the scope of the present invention's concept are within the scope of protection of the present invention. It should be noted that for those skilled in the art, any improvements and modifications made without departing from the principle of the present invention should be considered within the scope of protection of the present invention.

Claims

1. A method for optimizing instruction scheduling of the BiSheng compiler based on the Kunpeng platform, characterized in that, Specifically, the steps include the following: Step 1: Obtain the source program to be scheduled by the Bi Sheng compiler on the Kunpeng platform, and use a context-free grammar to determine whether the source program is valid; Step 2: Calculate the computing power required to schedule each invalid source program, and arrange the invalid source programs in ascending order of computing power. Step 3: For each invalid source program sorted from smallest to largest, calculate the affinity between sub-functions using a dependency graph construction algorithm, and rearrange the sub-functions in the invalid source program; this includes the following sub-steps: Step 3.1: Construct a dependency graph for each sub-function in the invalid source code. G =( V , E ),in, V This indicates a sub-function in an invalid source program. E This represents an edge connecting any two sub-functions in an invalid source program; Step 3.2: Identify the sub-functions in the invalid source program that are most relevant to the scheduling instruction task as the starting node of the dependency graph, and predict the affinity between the starting node and the remaining sub-functions using a Markov chain prediction model; Step 3.3: Select the sub-function with the highest affinity as the next node, and predict the affinity between the node and the remaining sub-functions using a Markov chain prediction model; Step 3.4: Repeat step 3.3 until all sub-functions form a dependency graph as nodes; Step 4: Modify the sub-functions in the invalid source code, sorted from largest to smallest, using log analysis. Step 5: Simultaneously use the methods of Step 3 and Step 4 until all illegal sub-functions in the source program have been processed, and then use a context-free grammar to determine whether the processed source program is legal. Step 6: If the processed source program is invalid, the invalid source program rearranged by the dependency graph construction algorithm will be modified again using the log analysis method. The invalid source program modified by the log analysis method will be rearranged again using the dependency graph construction algorithm. The source program that has been processed again will be judged for its validity using a context-free grammar. If it is valid, instruction scheduling will be performed by the Bisheng compiler; otherwise, the invalid source program will be marked, an alarm will be issued, and manual correction will be performed.

2. The instruction scheduling optimization method of BiSheng compiler based on Kunpeng platform according to claim 1, characterized in that, The specific process of determining whether the source program is legal using context-free grammar in step 1 is as follows: determine whether the source program is composed of terminal symbols, non-terminal symbols, rules describing the combination of terminal symbols and non-terminal symbols, and a quadruple consisting of non-terminal symbols as the start symbol of the source program. If so, the source program is legal; otherwise, the source program is illegal.

3. The instruction scheduling optimization method of Bi Sheng compiler based on Kunpeng platform according to claim 1, characterized in that, The calculation process for the computing power required to schedule each invalid source program in step 2 is as follows: in, This indicates the computing power required to schedule an invalid source program. n The number of logic operation chips. i for n index, f ( a i ) is a mapping function for logical operations. α i For the first i The mapping ratio of each logic operation chip. q 1 (TOPS) represents the redundant computing power for logical operations; m To increase the number of chips used for parallel computing, j for m index, f ( b j ) is a mapping function for parallel computation. β j Let be the mapping scaling factor for the j-th parallel computing chip. q 2 (FLOPS) represents the redundant computing power for parallel computing; p The number of neural network acceleration chips, k for p index, f ( c k ) is a mapping function for accelerating neural networks. γ k For the first k The mapping ratio of a neural network acceleration chip. q 3 (FLOPS) represents redundant computing power for accelerating neural networks.

4. The instruction scheduling optimization method of BiSheng compiler based on Kunpeng platform according to claim 1, characterized in that, The Markov chain prediction model is specifically as follows: V ij = W i × P ij in, V ij Subfunction i AND sub-function j The affinity between them W i Subfunction i The relevance of the subfunction to the instruction scheduling task, P represents the degree of relevance. i Associated with sub-functions j The transition probability matrix.

5. The instruction scheduling optimization method of BiSheng compiler based on Kunpeng platform according to claim 1, characterized in that, Step 4 involves matching the most relevant historical sub-function from the historical log data for each sub-function in the invalid source program based on three indicators: instruction scheduling task type, development language, and same data source, and replacing the sub-function in the invalid source program with that sub-function.

6. A computer-readable storage medium storing a computer program, characterized in that, The computer program causes the computer to execute the instruction scheduling optimization method of the Bisheng compiler based on the Kunpeng platform as described in any one of claims 1-5.

7. An electronic device, characterized in that, include: The invention includes a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein when the processor executes the computer program, it implements the instruction scheduling optimization method of the Bisheng compiler based on the Kunpeng platform as described in any one of claims 1-5.

8. A computer program product, comprising a computer program, characterized in that, When the computer program is executed by the processor, it implements the instruction scheduling optimization method of the Bisheng compiler based on the Kunpeng platform as described in any one of claims 1-5.

Images