Method, apparatus, and computer readable medium for generation of tightly world space enclosing regions

Abstract

Systems and techniques are provided for determining bounding volumes for hierarchical structures used for ray tracing. For example, a process can include obtaining an acceleration data structure that includes one or more primitives of a scene object. A graph cut can be applied to the acceleration data structure. A set of nodes of the acceleration data structure can be determined based on the graph cut, where the determined set of nodes are positioned to be adjacent to the graph cut. A world space bounding volume can be generated for the scene object using the determined set of nodes based on the graph cut.

Description

TECHNICAL FIELD

[0001] The present disclosure relates generally to graphics processing. For example, aspects of the present disclosure relate to systems and techniques for determining bounding regions (e.g., bounding boxes or other regions) of a hierarchical structure for ray tracing. BACKGROUND

[0002] Ray tracing is a computer graphics technique that can be used to generate images by tracing paths of light through a three-dimensional scene, simulating interactions with objects illuminated by light sources, and determining ray intersection points. Ray intersection points can include ray-primitive intersection points or ray-object intersection points. A primitive is a geometric shape that can be used to construct or model larger three-dimensional objects. For example, a primitive can include a triangle or a polygon.

[0003] Ray tracing can be used to generate realistic images of a three-dimensional scene, including shadows. Scene geometry can be stored in an acceleration data structure that groups scene primitives. An acceleration data structure can be used to speed up the process of ray tracing by improving the efficiency of ray intersection point testing and / or calculations. For example, a bounding volume hierarchy (BVH) is an acceleration data structure that can group scene primitives in a hierarchical tree of bounding volumes that enclose one or more of the scene primitives. Ray tracing can be performed by traversing these hierarchical structures to determine ray-primitive and / or ray-object intersection points. SUMMARY

[0004] In some examples, systems and techniques for determining bounding regions (e.g., bounding boxes or other regions) of a hierarchical structure for ray tracing, such as for ray tracing acceleration data structures, are described. According to at least one illustrative example, a method for ray tracing is provided that includes obtaining an acceleration data structure that includes one or more primitives of a scene object, applying a graph cut to the acceleration data structure, determining a set of nodes of the acceleration data structure based on the graph cut, wherein the set of nodes are positioned adjacent to the graph cut, and generating a world space bounding box for the scene object, wherein the world space bounding box is generated for the set of nodes determined based on the graph cut.

[0005] In another example, an apparatus for ray tracing is provided that includes a memory (e.g., configured to store data, such as virtual content data, one or more images, etc.) and one or more processors (e.g., implemented in circuitry) coupled to the memory. The one or more processors are configured to and capable of: obtaining an acceleration data structure including one or more primitives of a scene object; applying a graph cut to the acceleration data structure; determining a set of nodes of the acceleration data structure based on the graph cut, wherein the set of nodes are positioned adjacent to the graph cut; and generating a world space bounding box for the scene object, wherein the world space bounding box is generated for the set of nodes determined based on the graph cut.

[0006] In another example, a non-transitory computer-readable medium having instructions stored thereon that, when executed by one or more processors, cause the one or more processors to: obtain an acceleration data structure including one or more primitives of a scene object; apply a graph cut to the acceleration data structure; determine a set of nodes of the acceleration data structure based on the graph cut, wherein the set of nodes are positioned adjacent to the graph cut; and generate a world space bounding box for the scene object, wherein the world space bounding box is generated for the set of nodes determined based on the graph cut.

[0007] In another example, an apparatus for ray tracing is provided. The apparatus includes: means for obtaining an acceleration data structure including one or more primitives of a scene object; means for applying a graph cut to the acceleration data structure; means for determining a set of nodes of the acceleration data structure based on the graph cut, wherein the set of nodes are positioned adjacent to the graph cut; and means for generating a world space bounding box for the scene object, wherein the world space bounding box is generated for the set of nodes determined based on the graph cut.

[0008] According to another example, a method for ray tracing is provided. The method includes: obtaining a base level acceleration structure (BLAS) including one or more primitives of a scene object; computing proxy geometry for a plurality of vertices of the BLAS, the proxy geometry having a first number of vertices that is less than a number of vertices contained in the BLAS; transforming the first number of vertices of the proxy geometry into a plurality of proxy geometry world space vertices; and generating a world space axis-aligned bounding box (AABB) for the BLAS, wherein the world space axis-aligned bounding box encloses the plurality of proxy geometry world space vertices.

[0009] In another example, an apparatus for ray tracing is provided that includes a memory (e.g., configured to store data, such as virtual content data, one or more images, etc.) and one or more processors (e.g., implemented in circuitry) coupled to the memory. The one or more processors are configured to and capable of: obtaining a bottom level acceleration structure (BLAS) including one or more primitives of scene objects; computing a proxy geometry of a plurality of vertices of the BLAS, the proxy geometry having a first number of vertices less than a number of vertices contained in the BLAS; transforming the first number of vertices of the proxy geometry into a plurality of proxy geometry world space vertices; and generating a world space axis-aligned bounding box (AABB) for the BLAS, wherein the world space axis-aligned bounding box encloses the plurality of proxy geometry world space vertices.

[0010] In another example, a non-transitory computer-readable medium having stored thereon instructions that, when executed by one or more processors, cause the one or more processors to: obtain a bottom level acceleration structure (BLAS) including one or more primitives of scene objects; compute a proxy geometry of a plurality of vertices of the BLAS, the proxy geometry having a first number of vertices less than a number of vertices contained in the BLAS; transform the first number of vertices of the proxy geometry into a plurality of proxy geometry world space vertices; and generate a world space axis-aligned bounding box (AABB) for the BLAS, wherein the world space axis-aligned bounding box encloses the plurality of proxy geometry world space vertices.

[0011] In another example, an apparatus for ray tracing is provided. The apparatus includes means for obtaining a bottom level acceleration structure (BLAS) including one or more primitives of scene objects; means for computing a proxy geometry of a plurality of vertices of the BLAS, the proxy geometry having a first number of vertices less than a number of vertices contained in the BLAS; means for transforming the first number of vertices of the proxy geometry into a plurality of proxy geometry world space vertices; and means for generating a world space axis-aligned bounding box (AABB) for the BLAS, wherein the world space axis-aligned bounding box encloses the plurality of proxy geometry world space vertices.

[0012] According to another example, a method for ray tracing is provided. The method includes: obtaining a bottom level acceleration structure (BLAS) including a plurality of object space vertices of one or more primitives of scene objects; transforming each vertex of the plurality of object space vertices into a transformed world space vertex; and generating a world space axis-aligned bounding box (AABB) for the BLAS such that the world space AABB encloses each transformed world space vertex.

[0013] In another example, an apparatus for ray tracing is provided that includes a memory (e.g., configured to store data, such as virtual content data, one or more images, etc.) and one or more processors (e.g., implemented in circuitry) coupled to the memory. The one or more processors are configured to and capable of: obtaining a bottom level acceleration structure (BLAS) that includes a plurality of object space vertices of one or more primitives of scene objects; transforming each vertex of the plurality of object space vertices into a transformed world space vertex; and generating a world space axis-aligned bounding box (AABB) for the BLAS such that the world space AABB encloses each transformed world space vertex.

[0014] In another example, a non-transitory computer-readable medium having stored thereon instructions that, when executed by one or more processors, cause the one or more processors to: obtain a bottom level acceleration structure (BLAS) that includes a plurality of object space vertices of one or more primitives of scene objects; transform each vertex of the plurality of object space vertices into a transformed world space vertex; and generate a world space axis-aligned bounding box (AABB) for the BLAS such that the world space AABB encloses each transformed world space vertex.

[0015] In another example, an apparatus for ray tracing is provided. The apparatus includes means for obtaining a bottom level acceleration structure (BLAS) that includes a plurality of object space vertices of one or more primitives of scene objects; means for transforming each vertex of the plurality of object space vertices into a transformed world space vertex; and means for generating a world space axis-aligned bounding box (AABB) for the BLAS such that the world space AABB encloses each transformed world space vertex.

[0016] In some aspects, one or more of the apparatuses described above are part of or are part of a camera, a mobile device (e.g., a mobile telephone or so-called “smartphone” or other mobile device), a wearable device, an extended reality device (e.g., a virtual reality (VR) device, an augmented reality (AR) device, or a mixed reality (MR) device), a personal computer, a laptop computer, a server computer, or other device. In some aspects, an apparatus includes one or more cameras for capturing one or more images. In some aspects, the apparatus further includes a display for displaying one or more images, notifications, and / or other displayable data. In some aspects, the apparatus can include one or more sensors that can be used to determine a location and / or pose of the apparatus, a state of the apparatus, and / or for other purposes.

[0017] This summary is not intended to identify key or essential features of the claimed subject matter, nor is it intended to be used in determining the scope of the claimed subject matter. The subject matter should be understood from readi ng the entire specification, including the following sections, the claims, and the accompanying drawings.

[0018] The foregoing and other features and aspects will be better understood when read with reference to the following specification, claims, and a ccompanying drawings. BRIEF DESCRIPTION OF DRAWINGS

[0019] Exemplary aspects of the present application are described in detail below with reference to the following figures:

[0020] Figure 1 An example of a ray tracing process is illustrated in accordance with some examples;

[0021] Figure 2A An example of a bounding volume including one or more primitives representing portions of a surface in a scene is illustrated in accordance with some examples;

[0022] Figure 2B An example of a bounding volume hierarchy (BVH) that organizes Figure 2A bounding volumes in accordance with some examples is illustrated;

[0023] Figure 3A An example of a scene object and an object space bounding volume that encloses the scene object is illustrated in accordance with some examples;

[0024] Figure 3B An example of an object space bounding volume and a world space bounding volume that encloses Figure 3A a scene object is illustrated in accordance with some examples;

[0025] Figure 4 An example of an acceleration data structure including a top level acceleration structure (TLAS) and a bottom level acceleration structure (BLAS) is illustrated in accordance with some examples;

[0026] Figure 5A An example of a relatively loose, not tight, bounding volume that encloses a scene object is illustrated in accordance with some examples;

[0027] Figure 5B An example of a relatively tight bounding volume that encloses Figure 5A a scene object is illustrated in accordance with some examples;

[0028] Figure 6 is a simplified block diagram illustrating an exemplary ray tracing system in accordance with some examples of the present disclosure;

[0029] Figure 7AExamples of scene objects and object space bounding volumes enclosing the scene objects are illustrated in accordance with some examples of the present disclosure;

[0030] Figure 7B Examples of scene objects and proxy geometry enclosing the scene objects are illustrated in accordance with some examples of the present disclosure;

[0031] Figure 8A Examples of object space bounding volumes and world space bounding volumes enclosing Figure 7A scene objects are illustrated in accordance with some examples of the present disclosure;

[0032] Figure 8B Examples of maximum tight world space bounding volumes enclosing scene objects are illustrated in accordance with some examples of the present disclosure;

[0033] Figure 8C Examples of tight world space bounding volumes enclosing Figure 7B scene objects and proxy geometry are illustrated in accordance with some examples of the present disclosure;

[0034] Figure 9A Examples of graph cuts applied across acceleration data structures are illustrated in accordance with some examples of the present disclosure;

[0035] Figure 9B Another example of graph cuts applied across Figure 9A acceleration data structures is illustrated in accordance with some examples of the present disclosure;

[0036] Figure 9C Examples of traversal techniques for determining graph cuts applied across acceleration data structures are illustrated in accordance with some examples of the present disclosure;

[0037] Figure 9D Another example of traversal techniques for determining graph cuts applied across acceleration data structures is illustrated in accordance with some examples of the present disclosure;

[0038] Figure 9E Another example of traversal techniques for determining graph cuts applied across acceleration data structures is illustrated in accordance with some examples of the present disclosure;

[0039] Figure 10 is a flow diagram illustrating an example of a process for graphics processing in accordance with some examples of the present disclosure; and

[0040] Figure 11 is a block diagram illustrating an example of a computing system for implementing certain aspects described herein. DETAILED DESCRIPTION

[0041] Certain aspects of the disclosure are provided below. Some of these aspects can apply independently, and some of them can be applied in combination, as will be apparent to those skilled in the art. In the following description, for the purposes of explanation, specific details are set forth to provide a thorough understanding of aspects of the application. It is apparent, however, that various aspects can be practiced without using these specific details. The accompanying drawings and description are not intended to be exhaustive or to limit the application to the precise forms described.

[0042] The following description provides example aspects only and is not intended to limit the scope, applicability, or configuration of the disclosure. Rather, the following description of the example aspects will provide those skilled in the art with an enabling description of how the example aspects can be implemented. It should be understood that various changes can be made in the function and arrangement of elements without departing from the spirit and scope of the application as set forth in the appended claims.

[0043] Light ray tracing is a graphics processing and rendering technique that can be used to produce photo-realistic images by modeling light transport to simulate optical effects. Light ray tracing can realistically simulate the lighting of a three-dimensional (3D) scene and its objects by rendering physically correct reflections, refractions, shadows, and indirect illumination in a two-dimensional (2D) view of the scene.

[0044] Light ray tracing can be a computationally intensive technique. For example, the computational resources (e.g., computation time) used to ray trace a single frame can increase with the number of rays traced per frame and / or can increase with the computational resources (e.g., computation time) spent to trace each individual ray. Due to this computational complexity, light ray tracing can typically be limited to non-real-time use. Real-time light ray tracing has long been sought for uses such as rendering video games, virtual reality (VR) and augmented reality (AR) experiences. Real-time light ray tracing has recently become possible through the use of, for example, hardware acceleration units and / or graphics processing units (GPUs) that can provide parallelization of the underlying computations for each individual ray projected into a scene.

[0045] The number of rays that can be projected into a scene per frame is typically relatively small because the rendering time per frame cannot exceed a certain maximum amount without losing real-time performance. By increasing the number of rays projected into a scene per frame, the image quality when using real-time light ray tracing can be improved. This can be achieved by increasing parallelization (e.g., providing additional computational resources that allow more rays to be traced simultaneously). However, hardware upgrades come with high upfront costs and can be difficult or impossible to retrofit onto existing systems and platforms.

[0046] A scalable and efficient solution that can improve real-time performance of existing ray tracing hardware is desired. For example, the number of rays that can be projected into a scene per frame can also be increased by more efficiently tracing each ray (e.g., reducing the computation time per ray tracing operation allows more ray tracing operations to be performed within the same fixed rendering time per frame). As described in greater detail below, systems and techniques for providing accelerated ray tracing operations are described herein, such as by producing tight world space bounding regions (e.g., bounding boxes) at a controlled computation cost.

[0047] Figure 1 is a diagram illustrating an example of a ray tracing technique 100. As shown, a ray tracing system can perform ray tracing by projecting a plurality of rays (e.g., ray 152a, ray 154a, and ray 156a) from a virtual or imaginary view camera 110 (e.g., which determines a view into a 3D scene) through pixels 140 of a 2D view plane into a 3D scene. The ray tracing system can then trace the path of each ray to determine whether the ray returns to reach a light source 120 in the 3D scene.

[0048] In this technique, each ray is projected through a particular pixel of a plurality of pixels 140 located on the 2D view plane. In the case that a particular ray reaches a light source (e.g., light source 120) in the 3D scene, then information from that ray can be used to contribute to the final color and / or lighting level of the pixel (from pixels 140) through which that particular ray was projected. For example, when a ray projected into the scene intersects one or more objects (e.g., such as object 130), color and lighting information from the intersection point on the surface of the object can contribute to the final color and lighting level of the pixel associated with the ray. Similarly, different objects can have different surface properties that reflect, refract, and / or absorb light in different ways, which likewise contribute to the final pixel color and / or lighting level. A ray can also reflect from an object and hit other objects in the scene or travel through the surface of a transparent object, etc. before reaching a light source (e.g., light source 120).

[0049] For example, as Figure 1As shown, light ray 152a is cast into the scene and intersects object 130, resulting in the generation of a first reflected light ray 152b and a second reflected light ray 152c. First reflected light ray 152b reaches light source 120, and thus can contribute color or lighting information for rendering a particular one of the pixels 140 through which light ray 152 is cast. Second reflected light ray 152c does not reach light source 120, and thus cannot directly contribute color or lighting information back to the pixels 140. The same or similar scenarios are shown for light ray 154a and its first reflected light ray 154b (which reaches light source 120) and second reflected light ray 154c (which does not reach light source 120), and for light ray 156a and its first reflected light ray 156b (which reaches light source 120) and second reflected light ray 156c (which does not reach light source 120).

[0050] As previously mentioned, each interaction between a light ray and an object or surface within a 3D scene can contribute color and / or lighting information back to a particular pixel through which the light ray is cast. In some cases, tracking a greater number of interactions per light ray can provide increased visual fidelity (e.g., quality) of the rendered scene at the cost of increased computational cost (e.g., time). For example, a speed- prioritized ray tracing method can only compute or otherwise determine a first reflection per light ray, while a quality-prioritized ray tracing method can determine three or more reflections per light ray. In some cases, a light ray can stop traveling after a maximum number of reflections are observed or the light ray travels a certain distance without intersecting, and the value of a pixel can be updated. In some cases, a light ray can stop traveling and the value of a pixel can be updated based on the light ray traveling a certain distance without a reflection (e.g., a reflection is one possible result of an intersection). In some cases, the number of light rays cast through each pixel of a 2D view plane can be adjusted based on a similar tradeoff between computational cost and visual fidelity.

[0051] Accordingly, ray tracing becomes very costly in terms of time and / or computational power required to render a realistic-looking scene based on, for example, the number of light rays cast into the scene and the number of additional light rays tracked for secondary reflections and refractions. Due to this computational complexity, ray tracing is typically limited to non-real-time uses (e.g., scenes or visual effects that can be pre-rendered for movies and television). Real-time ray tracing has long been sought for use cases such as rendering video games, virtual reality (VR) and augmented reality (AR) experiences, etc.

[0052] Real-time ray tracing has recently become possible and is often performed by hardware-accelerated units and / or graphics processing units (GPUs) that can provide parallelization of the underlying computations for each individual ray that is cast into a scene. The number of rays that can be cast into a scene for each frame is typically relatively small, as the rendering time per frame cannot exceed a certain maximum amount without losing real-time performance.

[0053] Image quality when using real-time ray tracing can be improved by increasing the number of rays that are cast into a scene per frame. This can be achieved by increasing parallelization (e.g., providing additional computational resources that allow more rays to be traced simultaneously). However, hardware upgrades come with high upfront costs and can be difficult or impossible to retrofit onto existing systems and platforms. A scalable and efficient solution that can improve real-time performance of existing ray tracing hardware is desired. For example, the number of rays that are cast into a scene per frame can also be increased by tracing each ray more efficiently (e.g., reducing the computation time per ray tracing operation allows more ray tracing operations to be performed within the same fixed rendering time per frame).

[0054] One example of ray tracing acceleration techniques utilizes a tree-based acceleration structure to improve the efficiency of ray intersection tests. For example, a scene can be converted into a bounding volume hierarchy (BVH), which is a hierarchical tree structure of increasingly tighter bounding volumes (also referred to as “bounding regions,” such as bounding boxes or “axis-aligned bounding boxes” (AABBs)). For example, Figure 2A An example structure 200a is illustrated in which a scene containing multiple triangular primitives 252a-252e is arranged into a series of increasingly tighter bounding boxes 256a-256e. The scene can contain hundreds, thousands, or more primitives, but only five triangular primitives 252a-252e are depicted for clarity. The bounding boxes 256a-256e can be AABBs, which are the bounding boxes of minimum area or volume within which all points of the enclosed primitive (e.g., triangular primitives 252a-252e) can lie. The bounding boxes can be axis-aligned such that the edges of each bounding box 256a-256e are parallel to coordinate axes (e.g., the x-axis, y-axis, and z-axis). Figure 2B An example hierarchical data structure 200b is illustrated with nodes associated with the bounding boxes 256a-256e and triangular primitives 252a-252e shown in structure 200a. The hierarchical data structure 200b can be a BVH. For example, a BVH root node 262a can correspond to the bounding box 256a shown in structure 200a; similarly, an intervening BVH node 262b can correspond to the bounding box 256b shown in structure 200a; and so on. Figure 2A An example hierarchical data structure 200b is illustrated with nodes associated with the bounding boxes 256a-256e and triangular primitives 252a-252e shown in structure 200a. The hierarchical data structure 200b can be a BVH. For example, a BVH root node 262a can correspond to the bounding box 256a shown in structure 200a; similarly, an intervening BVH node 262b can correspond to the bounding box 256b shown in structure 200a; and so on. Figure 2A An example hierarchical data structure 200b is illustrated with nodes associated with the bounding boxes 256a-256e and triangular primitives 252a-252e shown in structure 200a. The hierarchical data structure 200b can be a BVH. For example, a BVH root node 262a can correspond to the bounding box 256a shown in structure 200a; similarly, an intervening BVH node 262b can correspond to the bounding box 256b shown in structure 200a; and so on. Figure 2AThe bounding box 256b; the intermediary BVH node 262c can correspond to Figure 2A The enclosure box 256c, etc.

[0055] BVH root node (e.g., Figure 2B The BVH root node 262a) contains AABB (e.g., Figure 2A The bounding box (256a) encapsulates all individual scene or object geometry contained in the BVH leaf node. Each primitive in the BVH root node is assigned to either a left or right child node. Child nodes contain AABBs containing the geometry to which they are assigned, and this geometry is similarly recursively assigned to either left or right child nodes until the BVH leaf node contains a small number of primitives, such as four or fewer. Depending on the extent of any scene changes and / or object deformations, the next frame and any subsequent frames may require one or more new BVH build operations or BVH reassemble / update operations based on the scene changes.

[0056] Testing the intersection of every ray for every primitive in a scene can be inefficient and computationally expensive. BVH (Bounding Box) can be used to accelerate ray intersection testing techniques. For example, instead of testing the intersection of every ray against the BVH bounding box for every primitive in the scene, a depth-first tree traversal process can be used. As previously mentioned, the bounding box encloses or surrounds varying amounts of scene geometry or primitives and becomes increasingly dense with the depth of the BVH tree structure.

[0057] Bounding boxes (e.g., AABB or other bounding boxes) or other bounding regions can be defined relative to world space or object space. World space can be considered a constant (e.g., the coordinate space of the entire 3D scene). Objects can exist in their own coordinate space, which is called object space (e.g., the coordinate space in which the object is modeled or created). For example, Figure 3A and Figure 3B This is a diagram depicting the object space and world space AABB (axis-aligned bounding box) for the same geometry. Here, Figure 3A An object space AABB 320 for a geometric scene object 310 is illustrated. Scene objects can include 3D or graphical objects existing in a 3D scene performing ray tracing. In some cases, a geometric scene object can be a scene object that includes geometric primitives such as triangles. In some examples, a scene object can include an AABB or other object representation. The object space AABB 320 and the scene object 310 are shown in the object space 300a of the scene object 310. Figure 3BThe same geometric scene object 310 is illustrated, but transformed into the world space 300b of the scene (e.g., the scene to which the scene object 310 belongs or is located). The world space AABB 330 (or other world space bounding volume) encloses both the object space AABB 320 and the scene object 310.

[0058] Ray tracing can utilize a two-level acceleration structure system, such as a top-level acceleration structure (TLAS) and a bottom-level acceleration structure (BLAS), as shown in Figure 4 For example, Figure 4 The TLAS 410 and the BLAS 430 are illustrated, which are described in more depth below.

[0059] The TLAS 410 is constructed in the world space. The TLAS primitives are instances of the BLAS, which are defined in the object space. The TLAS is structured as a BVH with leaf nodes that contain BLAS, including the leaf nodes 412, 414, 416, 422, 424, 426, and 428. For example, the TLAS leaf nodes 422, 424, 426, and 428 each contain or are otherwise associated with one of the two BLAS 440 and 460. A translation matrix can be encoded in the TLAS leaf nodes to perform a transformation from the world space to the object space and / or vice versa, as described in more depth below.

[0060] A BLAS can be constructed for each object in the scene, referred to as a scene object. For example, Figure 4 The BLAS 440, which can be constructed for a first unique scene object, and the BLAS 460, which can be constructed for a second unique scene object, are illustrated. The BLAS 440 includes the leaf nodes 442, 444, 446, 452, 454, 456, and 458, and the BLAS 460 includes the leaf nodes 462, 464, 466, 472, 474, 476, and 478. The BLAS primitives can be triangles or AABBs of the process primitives used to construct the scene object. A bottom-level BVH is constructed over the set of these triangles or AABBs of the scene object, where each BLAS leaf node contains a small number (e.g., up to four, five, or some other number) of triangles or AABBs. For example, in Figure 4 In the context of FIG. 4, the BLAS leaf nodes 452-458 and 472-478 can each contain some quantity of triangles, AABBs, or other primitives used to construct the scene object. In some examples, a BLAS can also be referred to as a “bottom-level BVH.” Multiple instances of the same BLAS can be included in a TLAS. For example, if the TLAS includes a car object, the BLAS for the tires can be included four times. As shown in Figure 4 The same BLAS can also be included in or referenced by multiple TLASes, as shown in FIG. 5.

[0061] In some examples, a TLAS can be created using an object-to-world matrix that transforms an input represented in object space coordinates to an output represented in world space coordinates. A world-to-object matrix can apply the transform in the opposite direction (e.g., transforming an input represented in world space coordinates to an output represented in object space coordinates). In some cases, a world space AABB for each BLAS (e.g., world space AABBs for BLAS root nodes 442 and 462) can be computed by using the object-to-world matrix, thereby building a TLAS over a set of BLAS. Then, a BVH is built over these world space AABBs for the BLAS root nodes, and this BVH can be referred to as a top-level BVH or TLAS 410. In some cases, similar or identical techniques can be used to perform TLAS and BLAS creation. For example, the same SAH (surface area heuristic) based algorithm or method can be used for both TLAS and BLAS construction.

[0062] In some cases, the performance of BVH accelerated ray tracing can depend on the tightness of the world space AABBs generated for the BLAS included in or associated with the TLAS leaf nodes. For example, a tight bounding box will generally outperform a loose bounding box because fewer rays enter the BLAS, and in addition, rays that do enter the BLAS are less likely to pass through empty space. Figure 5A FIG. 500a is an example of a diagram 500a illustrating a relatively loose bounding box 510a that encloses scene objects 530. As shown, the bounding box 510a is considered loose because there is a significant amount of empty space between the bounds of the bounding box 510a and the scene objects 530. Figure 5B FIG. 500b is an example of a diagram 500b illustrating a relatively tight bounding box 510b that encloses the same scene objects 530. As shown, in comparison to the bounding box 510a of FIG. 500a, the bounding box 510b is tighter because there is very little empty space between the bounds of the bounding box 510b and the scene objects 530. Figure 5A In comparison to the bounding box 510a of FIG. 500a, the bounding box 510b is tighter because there is very little empty space between the bounds of the bounding box 510b and the scene objects 530.

[0063] When a ray intersects a BLAS bounding box, the ray’s lower level intersection is automatically checked for each of the constituent primitives within the BLAS. Thus, a ray that hits only empty space within the bounding box that surrounds the BLAS represents wasted computational work (and increased time / reduced efficiency). In Figure 5AIn the example of FIG. 5A, two rays 522 and 524 are shown. Here, because the loosely packed bounding box 510a is used to enclose the scene object 530, both rays 522 and 524 intersect the loosely packed bounding box 510a. Thus, the intersection of the rays 522 and 524 with the loosely packed bounding box 510a will result in wasted computational effort because the rays 522 and 524, although intersecting the loosely packed bounding box 510a, actually pass through empty space.

[0064] In Figure 5B In the example of FIG. 5B, the same two rays 522 and 524 are shown. Here, because the relatively tightly packed bounding box 510b is used to enclose the scene object 530, neither ray 522 nor 524 intersects the tightly packed bounding box 510b. Thus, unlike when the loosely packed bounding box 510a was used to enclose the scene object 530, neither ray 522 nor 524 results in an intersection with the tightly packed bounding box 510b, and thus wasted computational effort is avoided.

[0065] It is desirable to reduce wasted computational resources by generating tighter world space bounding boxes. A world space bounding box can include a bounding box (e.g., an AABB) that has coordinates given in world space rather than in object space or other coordinate system. In some cases, a world space bounding box can be represented as an object space bounding box by transforming its world space coordinates to object space coordinates (e.g., using a world-to-object matrix). However, computing tighter world space bounding boxes is itself associated with computational overhead that can be incurred each time an updated volume (e.g., BVH) or new volume (e.g., BVH) is generated in response to a change in the scene between frames. In such cases, it becomes more desirable to generate tight world space bounding boxes for TLAS leaf nodes at a controlled computational cost.

[0066] The systems, apparatuses, processes (also referred to as methods), and computer- readable media (collectively referred to as “systems and techniques”) described herein can provide for accelerated ray tracing operations by producing tight world space bounding regions (e.g., bounding boxes such as AABBs) at a controlled computational cost. Bounding boxes will be used herein as an example of a bounding region. However, any type of bounding region can be used that is not necessarily a “box,” such as a polygonal, circular, elliptical, or other shaped bounding region. In some aspects, one or more ray tracing acceleration data structures can be used to determine tight world space bounding boxes. In some examples, the ray tracing acceleration data structures can include bounding volume hierarchies (BVHs) and / or hierarchical trees. Different approaches to computing world space bounding boxes can provide different tradeoffs between computational overhead and ray tracing performance, as will be described in greater depth below.

[0067] Figure 6This is a diagram illustrating an exemplary ray tracing system 600 according to some examples of this disclosure. The ray tracing system 600 can implement the systems and techniques disclosed herein, including those with… Figures 7A to 9E Related aspects. The ray tracing system 600 can perform various tasks and operations, such as ray tracing tasks and operations (e.g., ray primitive intersection, ray bounding volume intersection, ray-AABB intersection, accelerated data structure construction and / or updating, rendering, etc.).

[0068] exist Figure 6 In the example shown, the ray tracing system 600 includes a storage device 602, a computing component 610, a ray tracing engine 620, an accelerated data structure engine 622, and a graphics processing engine 624. It should be noted that... Figure 6 The components 602 to 624 shown are non-limiting examples provided for illustrative and explanatory purposes, and other examples may include those with... Figure 6 The components shown may be more, fewer, and / or different compared to other components. For example, in some cases, the ray tracing system 600 may include... Figure 6 One or more display devices, one or more other processing engines, one or more other hardware components, and / or one or more other software and / or hardware components not shown in the diagram. The following section discusses... Figure 11 The example architecture and example hardware components that can be implemented by the ray tracing system 600 are further described.

[0069] References to any component of the ray tracing system 600, whether singular or plural, should not be construed as limiting the number of such components implemented by the ray tracing system 600 to one or more. For example, a reference to a processor, whether singular or plural, should not be construed as limiting the number of processors implemented by the ray tracing system 600 to one. Those skilled in the art will recognize that, for the purposes of this reference... Figure 6 Any of the components shown, the ray tracing system 600 may include only one of such components or more than one of such components.

[0070] The ray tracing system 600 may be part of or implemented by a single computing device or multiple computing devices. In some examples, the ray tracing system 600 may be part of an electronic device (or multiple devices) such as: a desktop computer, a laptop or notebook computer, a tablet computer, a set-top box, a smart TV, a display device, a game console, a video streaming device, an IoT (Internet of Things) device, a smart wearable device (e.g., a head-mounted display (HMD), smart glasses), an extended reality (XR) device (e.g., a VR headset or head-mounted display (HMD), an AR headset, an HMD or glasses, etc.), or any other suitable electronic device.

[0071] In some implementations, the storage device 602, the computing component 610, the ray tracing engine 620, the accelerated data structure engine 622, and the graphics processing engine 624 can be part of the same computing device. For example, in some cases, the storage device 608, the computing component 610, the ray tracing engine 620, the accelerated data structure engine 622, and the graphics processing engine 624 can be integrated into a smartphone, a laptop computer, a tablet computer, a smart wearable device, a gaming system, and / or any other computing device. In other implementations, the storage device 602, the computing component 610, the ray tracing engine 620, the accelerated data structure engine 622, and the graphics processing engine 624 can be part of two or more separate computing devices. For example, in some cases, some of the components 602-624 can be part of or implemented by one computing device, and the remaining components can be part of or implemented by one or more other computing devices.

[0072] The storage device 602 can be any storage device for storing data. Moreover, the storage device 602 can store data from any of the components of the ray tracing system 600. For example, the storage device 602 can store data from the computing component 610, data from the ray tracing engine 620, data from the accelerated data structure engine 622, and / or data from the graphics processing engine 624. In some examples, the storage device 602 can include a buffer for storing data for processing by the computing component 610.

[0073] The computing component 610 can include a central processing unit (CPU) 612, a graphics processing unit (GPU) 614, a memory 616, and / or one or more hardware accelerator components 618. In some implementations, the computing component 610 can include other processors or computing components, such as one or more digital signal processors (DSPs), one or more neural processing units (NPUs), and / or other processors or computing components. The computing component 610 can perform various operations, such as ray-primitive intersection, ray-bounding volume intersection, ray-AABB intersection, accelerated data structure construction, accelerated data structure update, scene rendering, rasterization, geometry processing, pixel processing, visibility processing, etc.

[0074] Operations for the ray tracing engine 620, the acceleration data structure engine 622, and the graphics processing engine 624 (as well as any other processing engines) can be implemented by any of the computing components 610. In one illustrative example, operations of one or more of the ray tracing engine 620, the acceleration data structure engine 622, and the graphics processing engine 624 can be performed by the GPU 614. In some cases, operations of one or more of the ray tracing engine 620, the acceleration data structure engine 622, and the graphics processing engine 624 can be performed by the CPU 612.

[0075] In some cases, operations of one or more of the ray tracing engine 620, the acceleration data structure engine 622, and the graphics processing engine 624 can be performed by a combination of the CPU 612 and the GPU 614. In some cases, the computing component 110 can include other electronic circuitry or hardware, computer software, firmware, or any combination thereof to perform any of the various operations described herein.

[0076] In some examples, the ray tracing engine 620 can include one or more ray tracing application programming interfaces (APIs). In one illustrative example, the ray tracing engine 620 can include one or more ray intersection engines. For example, the ray tracing engine 620 can include one or more ray primitive intersection engines and / or can include one or more ray bounding volume intersection engines. In some cases, the ray tracing engine 620 can include one or more ray triangle intersection engines and / or can include one or more ray-AABB intersection engines. The ray tracing engine 620 can implement one or more ray intersection engines using one or more hardware-accelerated ray tracing units (RTUs) and / or arithmetic logic units (ALUs), for example.

[0077] In some examples, the acceleration data structure engine 622 can construct or generate one or more acceleration data structures. The acceleration data structures generated by the acceleration data structure engine 622 can be used by one or more of the ray tracing engine 620 and the graphics processing engine 624. In one illustrative example, the acceleration data structure engine 622 can construct or generate a bounding volume hierarchy (BVH). In some cases, the acceleration data structure engine 622 can generate a two-level acceleration structure (e.g., an acceleration data structure including a TLAS and one or more BLAS). The acceleration data structure engine 622 can be implemented using the CPU 612, the GPU 614, or a combination of both. In some examples, the acceleration data structure engine 622 can additionally or alternatively be implemented using one or more of the specialized hardware accelerator components 618.

[0078] In some examples, the graphics processing engine 624 can include a graphics processing pipeline. For example, the graphics processing engine 624 can include one or more of a geometry processing stage, a visibility stage, a rasterization stage, and a pixel processing pipeline. In some examples, the graphics processing engine 624 can be in communication with or have access to the memory 616 of the compute component 610. The memory 616 can include one or more of a system memory, a frame buffer, a graphics memory, one or more caches, and the like.

[0079] In some cases, the ray tracing system 600 (e.g., using the ray tracing engine 620, the acceleration data structure engine 622, and / or the graphics processing engine 624) can obtain an acceleration data structure that includes one or more primitives of scene objects. For example, the ray tracing system 600 can obtain the acceleration data structure from the storage 602 and / or the memory 616. In some cases, the acceleration data structure engine 622 can be used to generate or construct the acceleration data structure.

[0080] When the ray tracing system 600 obtains the acceleration data structure, the ray tracing engine 620 can apply a graph cut to the acceleration data structure. A graph cut is a division of vertices of a graph into two disjoint subsets (e.g., the graph cut divides the vertices of the graph into a first subset and a second subset, where no vertex is present in both the first subset and the second subset). In some examples, the acceleration data structure engine 622 can apply the graph cut to the acceleration data structure. In some cases, the ray tracing engine 620 and the acceleration data structure engine 622 can work in combination to apply the graph cut to the acceleration data structure.

[0081] In some aspects, the ray tracing system 600 (e.g., using the ray tracing engine 620, the acceleration data structure engine 622, and / or the graphics processing engine 624) can determine a set of nodes of the acceleration data structure based on the graph cut. The set of nodes determined by the ray tracing system 600 can be positioned adjacent to the graph cut, as described in more depth below with respect to the example graph cuts illustrated in Figure 9A and Figure 9B In some examples, the set of nodes adjacent to the graph cut can be positioned immediately above the graph cut line (e.g., the graph cut line separates the set of nodes from its child nodes). In some cases, the set of nodes adjacent to the graph cut can be positioned immediately below the graph cut line (e.g., the graph cut line separates the set of nodes from its parent nodes). In some examples, the ray tracing system 600 can determine the set of nodes based on the graph cut using the ray tracing engine 620 and / or the acceleration data structure engine 622.

[0082] In some cases, the ray tracing system 600 (e.g., using the ray tracing engine 620, the accelerated data structure engine 622, and / or the graphics processing engine 624) can generate world-space bounding boxes for scene objects. For example, the ray tracing system 600 can generate world-space bounding boxes for scene objects that are associated with or included in the previously described accelerated data structure. In some cases, the world-space bounding box can be an AABB. In an exemplary example, the ray tracing system 600 can use the accelerated data structure engine 622 (and / or the ray tracing engine 620) to generate world-space bounding boxes for a set of nodes determined based on graph cuts.

[0083] The accelerated data structure engine 622 can obtain one or more representations of scene objects or other scene geometry and generate and / or update BVH or other accelerated data structures including scene objects or scene geometry. In some examples, the accelerated data structure engine 622 can obtain representations of scene objects or other scene geometry at least partially from one or more of storage devices 602 and memory 616. In some cases, the accelerated data structure engine 622 can obtain representations of scene objects or other scene geometry from ray tracing engine 620 (and / or one or more computational components in computational component 610).

[0084] The accelerated data structure engine 622 can operate on representations of scene objects and scene geometry using both object-space and world-space representations. In some examples, the accelerated data structure engine 622 can use one or more object-to-world matrices and / or world-to-object matrices to transform scene objects / geometry from object-space representation to world-space representation, and from world-space representation to object-space representation, respectively.

[0085] The following discussion is for reference. Figure 7A and Figure 7B Example, Figure 7A and Figure 7B All depict a scene object 710 in its object space (e.g., before transforming the scene object 710 into a world space representation according to one or more aspects of the system and techniques described herein). The scene object 710 may include multiple geometric primitives, each having one or more vertices. For example, the scene object 710 may include multiple triangles, polygons, procedural primitives, etc. In some examples, the scene object 710 may be represented and / or stored in an accelerated data structure (such as BVH or hierarchical trees). For example, the scene object 710 may be represented by or stored in a BLAS, as previously discussed. The BLAS containing the scene object 710 itself may be contained in one or more TLAS leaf nodes, referenced by one or more TLAS leaf nodes, or pointed to by one or more TLAS leaf nodes. For example, as described above regarding...Figure 4 The given BLAS can include a BVH for the unique scene object and thus can be included in multiple different TLAS leaf nodes.

[0086] As shown, Figure 7A depicts a scene object 710 enclosed by an object space bounding volume 720. In some examples, the object space bounding volume 720 is an object space AABB determined for the scene object 710. In some cases, the object space bounding volume 720 can be a BLAS root node AABB (e.g., because the object space bounding volume 720 includes all of the geometry and / or primitives of the scene object 710).

[0087] Figure 7B The same scene object 710 is illustrated as being enclosed by a proxy geometry 740. In some examples, the proxy geometry 740 can be a convex hull or a convex hull approximation. In some examples, the proxy geometry 740 can be a bounding volume (e.g., an AABB). The proxy geometry 740 (whether a convex hull, a convex hull approximation, or otherwise) can be determined based on object space vertices associated with the scene object 710. For example, in cases where the scene object 710 is stored as a BLAS, the proxy geometry 740 can be determined based on object space vertices of the BLAS (e.g., the proxy geometry 740 can be a convex hull of the BLAS root node). In some cases, the proxy geometry 740 can be determined based on object space vertices of the geometry and / or primitives stored within the BLAS.

[0088] The following discussion also references Figure 8A Examples, Figure 8A The object space view 700a of Figure 7A is depicted as being transformed into a world space view 800a. For example, as Figure 8A shown, both the scene object 710 and its associated object space AABB 720 have been transformed from object space to world space (e.g., using an object-to-world matrix). The transformed scene object 710 and the transformed object space AABB 720 are further shown as being enclosed within a world space bounding volume 830.

[0089] In some examples, Figure 8A One or more of the world space view 800a, the scene object 710, the object space AABB 720, and / or the computed world space bounding volume 830 depicted in Figure 3B may be the same as or similar to the world space 300b, the scene object 310, the object space AABB 320, and / or the computed world space bounding volume 330, respectively, depicted in

[0090] In some examples, the world space bounding box 830 can be a world space AABB that is computed as the world space transformed vertices of the object space AABB 720. In cases where the world space bounding box 830 encloses all of the world space transformed vertices of the object space AABB 720, it is noted that the world space bounding box 830 will also enclose each individual vertex of the geometry and / or primitives included in the scene object 710 (e.g., because the individual vertices of the scene object 710 are themselves enclosed by the object space AABB 720).

[0091] As noted above, in some cases, the object space AABB 720 can be a BLAS root node AABB, in which case a world space AABB 830 can be generated for one or more TLAS leaf nodes that contain the BLAS / BLAS root node. In one illustrative example, the systems and techniques described herein can transform the vertices (e.g., vertices corresponding to the eight corners) of the BLAS root node AABB 720 (e.g., the AABB of the root node of the BLAS associated with the TLAS leaf node) into world space, and place the world space AABB 830 around the vertices (e.g., the eight transformed corners / vertices).

[0092] The world space AABB 830 generated from the vertices or corners of the object space AABB 720 enclosing the scene object 710 can be used to perform one or more ray tracing operations (e.g., by the ray tracing system 600). In one illustrative example, continuing the case above in which the object space AABB 720 and the scene object 710 are stored in a BLAS that is itself associated with a TLAS leaf node, the generated world space AABB 830 can be used (e.g., by the ray tracing system 600) to perform ray tracing operations such as ray intersection tests. For example, if the ray tracing system 600 determines that a ray cast into the scene intersects the world space AABB 830 generated for the TLAS leaf node, then the BLAS associated with that TLAS leaf node will be traversed, and further ray intersection tests will be performed for the child and / or leaf nodes of the BLAS; if the ray cast into the scene is determined by the ray tracing system 600 not to intersect the world space AABB 830 generated for the TLAS leaf node, then the BLAS associated with that TLAS leaf node need not be traversed.

[0093] As such, it can be desirable to generate a world space AABB (e.g., such as world space AABB 830) that is tight with respect to the actual geometry or primitives contained within the BLAS or object space AABB associated with the TLAS leaf node, as has been described above. However, the approach of generating a world space AABB for a TLAS leaf node based on merely transforming the eight corners / vertices of the object space AABB 720 into world space often results in an overly loose (e.g., not tight) bounding box. World space AABB 830 is an example of a loose or not tight bounding box, as world space AABB 830 can be viewed as including a large amount of empty space beyond the volume occupied by scene object 710 as well as beyond the volume occupied by object space AABB 720.

[0094] As described above, ray tracing system 600 can implement the systems and techniques described herein to provide accelerated ray tracing operations by producing world space bounding boxes that are tight and have controlled computational cost with respect to the underlying scene objects. In one illustrative example, ray tracing system 600 can use object space representations of scene objects and / or scene primitives to generate world space bounding boxes that have greater tightness with respect to the underlying scene objects, as will be described in greater depth below. In some examples, the generated world space bounding boxes can be world space AABBs.

[0095] In a first approach, ray tracing system 600 can obtain a tightest world space bounding box for a collection of scene objects or other scene primitives by individually transforming each vertex of the scene objects / scene primitives from the object space representation to the world space representation. The world space bounding box computed subsequently over the resulting collection of all transformed world space vertices (e.g., object space vertices of the scene objects that have been transformed into the world space representation) will have the greatest tightness with respect to the underlying scene objects.

[0096] Figure 8B An example of this first approach is illustrated. In particular, Figure 8B is a diagram 800b showing an example of scene object 710 that has been transformed into world space and is enclosed by tightest world space bounding box 850. In some cases, tightest world space bounding box 850 can be an AABB. Figure 8B The scene object 710 depicted in Figures 7A to 8A is the same scene object 710 depicted in and described above. Note that, in contrast to Figure 8A the relatively loose world space bounding box 830 of Figure 8B the tightest world space bounding box 850 of

[0097] In some examples, the ray tracing system 600 can obtain the tightest world space bounding box / AABB 850 by transforming each vertex associated with the geometry of the scene object 710 from object space to world space using, for example, the object-to-world matrix described above. In one illustrative example, the ray tracing system 600 can compute or otherwise determine the tightest world space AABB 850 for a TLAS leaf node. The TLAS leaf node can contain or otherwise be associated with a BLAS previously constructed for a given scene object, such as the scene object 710.

[0098] Because ray tracing performance can depend on bounding box or AABB tightness, this first method of individually transforming each vertex of a scene primitive from object space to world space can provide the highest ray tracing performance compared to other methods described herein. In some examples, this first method can be associated with a higher computational cost compared to other methods described below. This higher computational cost can arise due to the individual transformation of each object space vertex to a world space vertex, especially as the number of vertices per BLAS or TLAS increases. In some cases, when updating or otherwise changing the BVH associated with a TLAS and / or BLAS, this first method can compute a new AABB by recomputing the individual object-to-world vertex transformations. In some examples, the BVH associated with a TLAS or BLAS can be updated or otherwise frequently changed (e.g., in response to scene changes, object deformations, etc.).

[0099] As described above, the first method of generating a world space bounding box (e.g., at a TLAS leaf node) by transforming each vertex included in an object in a scene object from object space to world space can provide the greatest ray tracing performance, but with a higher upfront computational cost of BVH construction. For example, compared to looser or non-maximally tight world space bounding boxes (e.g., a relatively loose world space bounding box 830 such as Figure 8A Figure 8B ​The maximum tight world space bounding box of the AABB 850 can be associated with the fastest completion time or least amount of time required to perform ray tracing and / or ray intersection testing. The tightest world space bounding box, such as the AABB 850, can also be associated with the maximum completion time for BVH construction or computation, as each individual vertex is transformed from object space to world space before the tightest world space bounding box 850 can be constructed. Thus, when a relatively large time budget is available for BVH construction and a relatively small time budget is available for ray tracing operations, such as ray intersection testing, this first method of generating a world space bounding box by individually transforming each vertex of a scene object from object space to world space can be used. Additionally or alternatively, in some cases, the first method can be performed when sufficient computational resources are available to perform such techniques. In some aspects, the ray tracing system 600 can dynamically determine which method to employ based on the available time budget and / or available computational resources.

[0100] In another illustrative example, the ray tracing system 600 can perform a second method to determine a world space bounding box (e.g., a world space AABB) that is tight for the underlying scene object. The second method includes determining a proxy geometry for one or more vertices associated with the scene object. After determining the proxy geometry (or approximation thereof) for the scene object, the ray tracing system 600 can use the first method described above to compute or otherwise determine a world space bounding box or AABB on the vertices of the proxy geometry. For example, the systems and techniques described herein can transform each vertex of the proxy geometry from object space to world space and then compute a world space AABB on the transformed vertices.

[0101] In Figure 8C An example of this second method of determining a tight world space bounding box based on a proxy geometry determined for a scene object is illustrated in FIG. 8B. As shown, Figure 8C is a diagram 800c depicting an example of an object-to-world transformation of a scene object 710 and its associated proxy geometry 740 (or approximation thereof). In some examples, the proxy geometry 740 is computed or otherwise determined for the object space vertices included in the scene object 710. Subsequently, the vertices of the proxy geometry 740 can be transformed from an object space representation to a world space representation (e.g., using an object-to-world matrix). The transformed world space vertices of the proxy geometry 740 can then be used to compute or construct a tight world space bounding box 870 (e.g., an AABB) that encloses both the proxy geometry 740 and all of the geometry in the geometry of the scene object 710. Note that the tight world space bounding box 870 can be computed or constructed using the same method as the world space bounding box 850 described above with respect to FIG. 8A. Figure 8AIn contrast to the relatively loose world space bounding volume 830, the proxy geometry-based world space bounding volume 870 can be relatively tight for the same underlying scene object 710 and thus can provide improved ray tracing performance and / or speed.

[0102] In some examples, the scene object 710 can be the same as the scene objects 710 described above with respect to one or more of Figures 7A to 8B In some cases, the proxy geometry 740 can be the same as or similar to the proxy geometry 740 described previously with respect to one or more of Figure 7B For example, the proxy geometry can be a convex hull (or convex hull approximation) determined over a set of all vertices included in the scene object 710. In some cases, other bounding volumes and / or proxy geometries can be computed or approximated on the vertices of the scene object 710 without departing from the scope of the present disclosure.

[0103] In some aspects, the determination of the proxy geometry 740 can introduce additional computational overhead. However, in some examples, the additional computational overhead of determining the proxy geometry 740 can be less than the computational overhead of transforming each vertex of the scene object 710 from object space to world space. In some examples, the initial determination of the proxy geometry 740 can reduce the total number of vertices of the scene object 710 that are ultimately transformed from object space to world space and thus, can result in faster (e.g., shorter) BVH construction times than the BVH construction times associated with constructing the tightest world space AABB 850 as described above with respect to one or more of Figure 8B In some cases, the world space bounding volume or AABB 870 that can be subsequently computed on the resulting proxy geometry 740 can have greater tightness relative to the loose world space bounding volume 830 of the underlying scene object 710 and lower computational cost relative to the tightest world space bounding volume 850 of the underlying scene object 710. Figure 8A Figure 8B In some cases, the world space bounding volume or AABB 870 that can be subsequently computed on the resulting proxy geometry 740 can have greater tightness relative to the loose world space bounding volume 830 of the underlying scene object 710 and lower computational cost relative to the tightest world space bounding volume 850 of the underlying scene object 710.

[0104] In another illustrative example, the ray tracing system 600 can perform a third method to determine a world space bounding volume that is tight for an underlying scene object. The third method includes applying a graph cut across an acceleration data structure associated with primitives of the scene object. The ray tracing system 600 can transform vertices of acceleration data structure nodes (e.g., BVH and / or BLAS nodes) that are adjacent to or at a graph cut line (e.g., immediately above or immediately below the graph cut line) from object space to world space. A world space bounding volume generated or constructed for the transformed vertices at the graph cut line can be tight for the underlying scene object stored in the acceleration data structure to which the graph cut was applied.

[0105] ​In some examples, the ray tracing system 600 can apply a third method of applying a graph cut to an acceleration data structure to apply a graph cut across a BLAS associated with a TLAS leaf node, obtain object space axis-aligned bounding boxes (e.g., AABBs) for the BLAS nodes immediately above or below the graph cut line, and transform the vertices of the object space AABBs into a set of world space vertices. The ray tracing system 600 can then construct a world space AABB around the resulting set of transformed vertices and use the world space AABB as a tight world space bounding box for the TLAS leaf node.

[0106] Figure 9A and Figure 9B Examples of this third method are illustrated in FIGS. 9A and 9B, respectively, which depict two different graph cut lines 950a and 950b applied to the same acceleration data structure. In the example of FIG. 9A, the graph cut line 950a is applied to the acceleration data structure 900a, and in the example of FIG. 9B, the graph cut line 950b is applied to the acceleration data structure 900b. Figure 9A and Figure 9B In the examples of FIGS. 9A and 9B, the illustrated acceleration data structures (e.g., acceleration data structure 900a and acceleration data structure 900b, respectively) can be BVHs and / or BLASs.

[0107] In some cases, when the acceleration data structure is a TLAS and / or a BLAS, a tight world space bounding box can be obtained based on applying a graph cut 950a or 950b across an underlying BVH (e.g., BLAS) included in a given TLAS leaf node. The graph cut partitions the nodes of the underlying BVH into two disjoint subsets such that any path from the root node 902 of the underlying BVH to a leaf node (e.g., 932, 933, 934, 935, 936, 937, 928) of the underlying BVH passes exactly once through the graph cut line (e.g., 950a, 950b). Based on this observation, any graph cut across the underlying BVH will result in a set of AABBs that contains the entire geometry of the scene object or model represented by the underlying BVH or BLAS.

[0108] For example, with respect to Figure 9A The graph cut line 950a partitions the nodes of the acceleration data structure 900a (e.g., BLAS or BVH) into two disjoint subsets, with a first subset above the graph cut line 950a and a second subset below the graph cut line 950b. The first subset of nodes includes the BLAS root node 902 and the BLAS child nodes 912, 914, 924, and 926 (e.g., above the graph cut line 950a). The second subset of nodes includes the BLAS child node 922 and the BLAS leaf nodes 928, 932, 933, 934, 935, 936, and 937 (e.g., below the graph cut line 950a). The set of AABBs / bounding boxes for the nodes immediately adjacent to (e.g., directly above or below) the graph cut line 950a contains the entire geometry of the underlying scene object represented by the acceleration data structure 900a.

[0109] With respect to Figure 9B , the graph cut line 950b partitions the nodes of the acceleration data structure 900b (e.g., a BLAS or BVH) into two disjoint subsets, where a first subset is above the graph cut line 950b and a second subset is below the graph cut line 950b. Because the graph cut line 950b is different than the graph cut line 950a, the disjoint subsets associated with each graph cut line are also different from one another. For example, the first subset of nodes created by the graph cut line 950b includes the BLAS root node 902 and the BLAS child nodes 912, 914, 922, and 926 (e.g., above the graph cut line 950b). The second subset of nodes created by the graph cut line 950b includes the BLAS child nodes 924 and the BLAS leaf nodes 928, 932, 933, 934, 935, 936, and 937.

[0110] In some cases, the ray tracing system 600 can determine an optimal graph cut by applying a cost metric during traversal or inspection of an acceleration data structure associated with primitives of a scene object. For example, the acceleration data structure can include the acceleration data structures 900a, 900b (e.g., as described above) and / or an underlying BVH. In some aspects, the ray tracing system 600 can determine an optimal graph cut by applying a surface area heuristic (SAH) to small tree growths for a given computational budget. The SAH provides an estimate of ray tracing performance for different construction decisions of a BVH or other acceleration data structure. In some cases, the ray tracing system 600 can use the SAH to determine a selection of graph cuts across a BLAS using an iterative technique in which a root node (e.g., the root node 902 of the acceleration data structures 900a, 900b or a root node of an underlying BVH otherwise associated with a TLAS leaf node) is placed in a stack and its child nodes (e.g., the nodes 912-926) are selectively expanded based on their SAH until a number of nodes in the stack reaches a predetermined computational budget.

[0111] Figures 9C to 9E An illustrative example of techniques that can be performed by the ray tracing system 600 for determining a set of nodes 980 that can be used to determine an optimal graph cut across an acceleration data structure 970 (e.g., as described above) is depicted. In some cases, the acceleration data structure 970 can be a BVH or other hierarchical tree-based structure. As shown, a stack 960 can store one or more nodes of the acceleration data structure 970. In one illustrative example, the stack 960 can be a Figure 6part of memory 616. As will be explained in greater depth below, traversing the acceleration data structure 970 to determine an optimal cut can be based at least in part on the pop stack 960 (e.g., popping the top node or element from the stack 960). In some examples, when the traversal of the acceleration data structure 970 reaches a leaf node of the acceleration data structure 970, the stack 960 can be popped and the traversal can continue to the top node popped from the stack 960.

[0112] In some aspects, after the root node 902 of the acceleration data structure 970 (e.g., Figure 9A and Figure 9B has been traversed or placed in the stack 960, an iterative technique for determining an optimal cut across the acceleration data structure 970 can be performed as follows: 1) pop the stack (e.g., take the top node or element from the stack) and place the child nodes of the popped node or element on the stack; 2) sort the stack by the SAH of each element; and 3) repeat until the number of nodes on the stack reaches a computation budget.

[0113] For example, as shown in Figure 9C , the traversal can begin at the root node (e.g., node 0) of the acceleration data structure 970. Node 1 and node 4 are two child nodes of the root node 0, and the traversal will proceed from the root node 0 to either node 1 or node 4. In some embodiments, the selection between the two available child nodes can be based on the SAHs applied to node 1 and node 4. For example, the traversal can proceed from the root node 0 to the child node having the lowest SAH value.

[0114] As shown in Figure 9C , the traversal proceeds from the root node 0 to node 4 (e.g., in some examples, node 4 is determined to have a lower SAH value than node 1). Node 1, which is an unselected or unvisited child node, is pushed to the stack 960. In some cases, node 1 can be pushed to the stack 960 based at least in part on a determination that the traversal of the acceleration data structure 970 should visit node 1 at some future time. The stack 960 can serve as a queue or indication of nodes that were not selected for traversal but should be visited or traversed in the future.

[0115] After the traversal has proceeded from the root node 0 to the child node 4 (e.g., after node 4 has been visited), node 4 can be added to a current set or list of nodes (e.g., to the set of nodes 980) that includes nodes of the acceleration data structure 970 that can be used to determine an optimal cut.

[0116] After the traversal has visited or otherwise examined node 4, the traversal can proceed to one of the child nodes of node 4. As shown in Figure 9CAs shown, the child nodes of node 4 are leaf nodes 5 and 6. Similar to what has been described above, one of the two leaf nodes can be selected for traversal in the next step (e.g., based on SAH), where the unselected leaf node is pushed onto stack 960.

[0117] exist Figure 9C In the example, leaf node 5 is selected for traversal while leaf node 6 is not selected (e.g., and leaf node 6 is therefore pushed onto stack 960 for traversal in a future step). Traversal proceeds from child node 4 to leaf node 5, and leaf node 5 is added to a set of nodes 980 in the acceleration data structure 970 that can be used to determine the optimal graph cut. Figure 9C As shown, a group of nodes 980 currently contains nodes 4 and 5.

[0118] like Figure 9D As shown, node 4 can be removed from the same group of nodes 980 by adding its child node 5 to the same group of nodes 980. For example, because the accelerated data structure 970 is a BVH or other hierarchical tree structure, a group of nodes 980 can be maintained to avoid the simultaneous existence of a parent node and its child nodes.

[0119] After traversing through nodes that have already been visited or otherwise completed, node 5 can be checked against any of its child nodes that can be accessed in the next traversal step. However, because node 5 is a leaf node of the acceleration data structure 970, no child nodes are available for access in the next traversal step. In response to the absence of an accessible node in the next traversal step, the node stored at the top of stack 960 can be popped and accessed in the next traversal step.

[0120] like Figure 9D As shown, node 6 is the node stored at the top of stack 960. Therefore, traversal can proceed from leaf node 5 to leaf node 6. Popping leaf node 6 from stack 960 causes leaf node 6 to be removed from stack 960 (e.g., leaving node 1 as the new topmost node stored at the top of stack 960). Leaf node 6 can then be added to a set of nodes 980 that can be used to determine the optimal graph cut across the accelerated data structure 970. At the end of the traversal step that visits or otherwise examines leaf node 6, the set of nodes 980 contains leaf node 5 and leaf node 6, and stack 960 contains child node 1.

[0121] After traversing the visited or otherwise completed check of node 6 (e.g., after node 6 has been added to the set of nodes 980), node 6 can be checked for any child nodes that can be visited in the next traversal step. Node 6 is a leaf node of the acceleration data structure 970 and thus has no child nodes that can be visited in the next traversal step. As described above, in response to determining that node 6 does not have a child node that can be visited in the next traversal step, the node stored at the top of the stack 960 can be popped off and visited in the next traversal step.

[0122] As shown in FIG. 9B, node 1 is the node stored at the top of the stack 960. Thus, the traversal can proceed from node 6 to node 1, as also shown in FIG. 9B. In response to being popped off of the stack 960, node 1 can be removed from the stack 960. Node 1 can then be added to the set of nodes 980 that can be used to determine an optimal cut across the acceleration data structure 970. After the traversal step visits or otherwise checks node 1, the stack 960 is empty and the set of nodes 980 contains three nodes (e.g., node 5, node 6, and node 7). Figure 9E Figure 9E As shown in FIG. 9B, node 1 is the node stored at the top of the stack 960. Thus, the traversal can proceed from node 6 to node 1, as also shown in FIG. 9B. In response to being popped off of the stack 960, node 1 can be removed from the stack 960. Node 1 can then be added to the set of nodes 980 that can be used to determine an optimal cut across the acceleration data structure 970. After the traversal step visits or otherwise checks node 1, the stack 960 is empty and the set of nodes 980 contains three nodes (e.g., node 5, node 6, and node 7).

[0123] Although the most recently visited or traversed node (e.g., node 1) has two child nodes (e.g., node 2 and node 3), the iterative traversal technique described above can terminate without visiting nodes 2 or 3. In one illustrative example, the iterative traversal technique can terminate based on reaching a predetermined computational budget. For example, the predetermined computational budget can include a maximum number of nodes or entries that can be stored in the set of nodes 980 (e.g., if the predetermined computational budget indicates that the maximum number of nodes that can be stored in the set of nodes 980 is three, the iterative traversal technique can terminate after the example of FIG. 9B). Figure 9E

[0124] At the end of the iterative technique (e.g., once the predetermined computational budget is reached), the set of nodes 980 or elements can represent an optimal cut across the acceleration data structure 970 for the given computational budget. The ray tracing system 600 can then compute the world space AABBs for the vertices of the BLAS nodes adjacent to the determined optimal cut line, as described above. For example, the world space AABBs can be computed by applying the object-to-world matrix to the vertices of the object space AABBs for the BLAS nodes adjacent to the cut line, and then constructing world space AABBs on the transformed vertices.

[0125] ​​In some aspects, selecting a BLAS (e.g., underlying BVH) across TLAS leaf nodes to apply the graph cut can be used to obtain a desired degree of granularity or tightness in the world space bounding boxes subsequently constructed for the TLAS leaf nodes. For example, a graph cut applied immediately below the BLAS root node of a TLAS leaf node would result in a world space AABB with relatively low tightness (e.g., because the world space AABB generated for the TLAS leaf node is constructed around the vertices of the AABB of the BLAS root node).

[0126] In some examples, a graph cut applied immediately above the BLAS leaf node would result in a world space AABB with relatively high tightness (e.g., because the BLAS leaf node contains individual primitives of the BLAS, so the world space AABB generated for the TLAS leaf node is constructed around the vertices of each individual primitive). In some cases, applying a graph cut immediately above the BLAS leaf node can result in the same world space AABB as generated according to the first method described above (e.g., because both methods transform each vertex of the individual primitives into world space vertices that are subsequently used to generate the tightest world space AABB).

[0127] In some cases, the graph cut selection can thus provide a tunable selection in the tradeoff between world space AABB and compute time. Building a BVH with a tight AABB requires a greater amount of compute time compared to a loose AABB; however, a tighter AABB allows subsequent ray tracing to be performed in less compute time. In an illustrative example, the graph cut selection can be performed based at least in part on one or more cost metrics indicative of the amount of compute time available for BVH and / or AABB construction and the amount of compute time available for ray tracing. The graph cut selection can additionally be based on a prediction or understanding of how frequently the underlying BVH and world space AABB can be rebuilt for a given scene object, as fast BVH and AABB construction times can be needed for scene objects that deform or otherwise require frequent BVH rebuilds. In some examples, a particular method can be selected or configured based on known or determined BVH construction time metrics as described above, e.g., such that an appropriate BVH and / or tightest world space AABB can be constructed subject to the constraint of a maximum construction time given by the BVH construction time metrics.

[0128] Figure 10is a flowchart illustrating an example of a process 1000 for graphics processing. Although the example process 1000 depicts a particular order of operations, the order can be altered in

[0129] At block 1002, the process 1000 includes obtaining an acceleration data structure. In some examples, the acceleration data structure includes one or more primitives of scene objects. For example, the acceleration data structure can be obtained or obtained from an acceleration data structure engine 622 associated with the ray tracing system 600 shown in FIG. 6. In some cases, the acceleration data structure can include a bounding volume hierarchy (BVH). In some examples, the acceleration data structure can include a bottom level acceleration structure (BLAS). For example, the acceleration data structure can include one or more of the acceleration data structures 900a shown in FIG. 9A and / or 900b shown in FIG. 9B. Figure 6 Figure 9A Figure 9B Figure 9A Figure 9B

[0130] In some examples, the acceleration data structure can include a BLAS associated with a top level acceleration structure (TLAS) leaf node. In examples where the acceleration data structure includes a BLAS, the BLAS can additionally or alternatively include one or more intervening BLAS nodes. For example, the one or more intervening BLAS nodes can include one or more of the BLAS sub-nodes 912, 922, 924, and / or 926 of the acceleration data structure 900b shown in FIG. 9B. One or more of the intervening BLAS nodes can include an axis-aligned bounding box (AABB) that encloses a subset of one or more primitives of scene objects. Figure 9A Figure 9B

[0131] ​​​​​​​At block 1004, the process 1000 includes applying a graph cut to the acceleration data structure. In some examples, the graph cut can be applied directly above or directly below a plurality of leaf nodes of the acceleration data structure. In some cases, when the acceleration data structure is a TLAS and / or a BLAS, the graph cut can be applied across the underlying BVH (e.g., BLAS) included in a given TLAS leaf node. Applying the graph cut can split nodes of the acceleration data structure into two disjoint subsets such that any path from a root node of the acceleration data structure to a leaf node of the acceleration data structure crosses the graph cut line exactly once. For example, applying the graph cut to the acceleration data structure can include applying the graph cut line 950a shown in FIG. 9A or the graph cut line 950b shown in FIG. 9B. In some cases, a set of axis-aligned bounding boxes (e.g., AABBs) that enclose entire geometries (e.g., primitives included in the acceleration data structure) of scene objects associated with the acceleration data structure can be determined using any graph cut across the underlying BVH or acceleration data structure. Figure 9A Figure 9B In some cases, a set of axis-aligned bounding boxes (e.g., AABBs) that enclose entire geometries (e.g., primitives included in the acceleration data structure) of scene objects associated with the acceleration data structure can be determined using any graph cut across the underlying BVH or acceleration data structure.

[0132] At block 1006, the process 1000 includes determining a set of nodes of the acceleration data structure based on the graph cut. In some examples, the set of nodes is positioned adjacent to the graph cut. For example, the set of nodes determined based on the graph cut can include one or more nodes of the acceleration data structure that are positioned directly above the graph cut line. In some cases, the set of nodes determined based on the graph cut can include one or more nodes of the acceleration data structure that are positioned directly below the graph cut line.

[0133] In some examples, the set of nodes determined based on the graph cut can include a plurality of leaf nodes of the acceleration data structure. The plurality of leaf nodes can include each vertex of a scene object associated with the acceleration data structure. For example, the set of nodes determined based on the graph cut can include the nodes 922, 924, 925, 936, 937, and 928 shown in FIG. 9A as being positioned directly below the graph cut line 950a. In another example, the set of nodes determined based on the graph cut can include the nodes 932, 933, 924, 936, 937, and 928 shown in FIG. 9B as being positioned directly below the graph cut line 950b. Figure 9A Figure 9B

[0134] ​​​In some examples, at block 1006, the process 1000 can further include determining one or more child nodes of a root node of the acceleration data structure and determining a surface area heuristic (SAH) for each child node. A graph cut can be applied to the acceleration data structure based on the SAH determined for each child node. For example, one or more child nodes can be determined based on the graph cut and / or graph cut lines (e.g., as described above). In some cases, the SAH can be used to determine an optimal graph cut for a given computational cost budget. For example, the SAH can be applied to a small tree growth of the acceleration data structure for a given computational cost budget. In some cases, an iterative technique can be used to determine an optimal graph cut to apply to the acceleration data structure. For example, the iterative technique can include placing a root node of the acceleration data structure in a stack and selectively expanding the root node and its child nodes (e.g., by popping the stack) based on the SAH of the root node and its child nodes until a number of nodes in the stack reaches a given computational budget. In some examples, the root node of the acceleration data structure can be placed in a stack 960 shown in FIG. 11. The stack (e.g., the stack 960) can be included in the memory 616 shown in the ray tracing system 600 of FIG. 10. Figures 9C to 9E Figure 6

[0135] At block 1008, the process 1000 includes generating a world space bounding volume for a scene object (e.g., a scene object associated with the acceleration data structure). In some examples, the world space bounding volume is generated for a set of nodes determined based on the graph cut. For example, the generated world space bounding volume can include one or more of the world space bounding volumes 830, 850, and / or 870 shown in FIG. 11. In some cases, the world space bounding volume generated for the scene object can be a world space axis-aligned bounding box (AABB). Figures 8A to 8C

[0136] In some examples, at block 1008, the process 1000 can include obtaining a respective object space bounding volume for each node in the set of nodes determined based on the graph cut. Each respective object space bounding volume for each node (e.g., each node in the set of nodes determined based on the graph cut) can be transformed into a plurality of world space vertices. In some examples, the plurality of transformed world space vertices can be used to generate a world space bounding volume for the scene object.

[0137] In some examples, the processes described herein (e.g., the process 1000 and / or any other process described herein) can be performed by a computing device, apparatus, or system. In one example, the process 1000 can be performed by a computing device having Figure 11 ​​​The computing device or system of computing device architecture 1100 can be implemented by any suitable computing device, such as a mobile device (e.g., a mobile phone), a desktop computing device, a tablet computing device, a wearable device (e.g., a VR headset, an AR headset, AR glasses, an extended reality (XR) device (e.g., a VR headset or HMD, an AR headset, HMD, or glasses, etc.), a networked watch or smart watch, or other wearable device), a server computer, a vehicle (an autonomous or non-autonomous vehicle) or computing device of a vehicle, a robotic device, a laptop computer, a smart television, a camera, and / or any other computing device having the resource capability to perform the processes described herein, including process 1000 and / or other processes described herein. In some cases, the computing device or apparatus can include various components, such as one or more input devices, one or more output devices, one or more processors, one or more microprocessors, one or more microcomputers, one or more cameras, one or more sensors, and / or other components configured to perform the steps of the processes described herein. In some examples, the computing device can include a display, a network interface configured to communicate and / or receive data, any combination thereof, and / or other components. The network interface can be configured to communicate and / or receive Internet Protocol (IP) based data or other types of data.

[0138] Components of the computing device can be implemented in circuitry. For example, a component can include or be implemented using electronic circuitry or other electronic hardware, which can include one or more programmable electronic circuits (e.g., microprocessors, graphics processing units (GPUs), digital signal processors (DSPs), central processing units (CPUs), and / or other suitable electronic circuits), and / or can include or be implemented using computer software, firmware, or any combination thereof for performing the various operations described herein.

[0139] Process 1000 is illustrated as a logical flow diagram, the operations of which represent a sequence of operations that can be implemented in hardware, computer instructions, or a combination thereof. In the context of computer instructions, the operations represent computer-executable instructions stored on one or more computer-readable storage media that, when executed by one or more processors, perform the recited operations. Generally, computer-executable instructions include routines, programs, objects, components, data structures, and the like that perform particular functions or implement particular data types. The order in which the operations are described is not intended to be construed as a limitation, and any number of the described operations can be combined in any order and / or in parallel to implement the process.

[0140] Additionally, the process 1000 and / or any other processes described herein can be performed under the control of one or more computer systems configured with executable instructions and can be implemented as code (e.g., executable instructions, one or more computer programs or one or more applications) executing collectively on one or more processing units, by hardware or combinations thereof. As noted above, the code can be stored on a computer-readable or machine-readable storage medium, such as for example, in the form of a computer program comprising a plurality of instructions executable or

[0141] Figure 11 An example computing device architecture 1100 of an example computing device that can implement various techniques described herein is illustrated. In some examples, the computing device can include a mobile device, a wearable device, an extended reality device (e.g., a virtual reality (VR) device, an augmented reality (AR) device, an extended reality (XR) device, or a mixed reality (MR) device), a personal computer, a laptop computer, a video server, a vehicle (or a computing device of a vehicle), or other devices. The components of the computing device architecture 1100 are shown communicatively interconnected using a connection 1105, such as a bus. The example computing device architecture 1100 includes a processing unit (CPU or processor) 1110 and a computing device connection 1105 coupling various computing device components, including a computing device memory 1115, such as a read-only memory (ROM) 1120 and a random access memory (RAM) 1125, to the processor 1110.

[0142] The computing device architecture 1100 can include a cache of high-speed memory directly connected to, in close proximity to, or integrated as part of the processor 1110. The computing device architecture 1100 can copy data from the memory 1115 and / or the storage device 1130 to the cache 1112 for quicker access by the processor 1110. In this manner, the cache can provide a performance boost that avoids processor 1110 delays while waiting for data. These engines and other engines can control or be configured to control the processor 1110 to perform various actions. Other computing device memory 1115 can also be used. The memory 1115 can include multiple different types of memory having different performance characteristics. The processor 1110 can include any general purpose processor and hardware or software services configured to control the processor 1110, such as service 1 1132, service 2 1134, and service 3 1136 stored in the storage device 1130, as well as specialized processors in which software instructions are incorporated into the processor design. The processor 1110 can be a self-contained system, containing multiple cores or processors, a bus, memory control, cache, etc. The multi-core processor can be symmetric or asymmetric.

[0143] To enable user interaction with the computing device architecture 1100, an input device 1145 can represent any number of input mechanisms, such as a microphone for speech, a touch-sensitive screen for gesture or graphical input, keyboard, mouse, motion input, speech and the like. An output device 1135 can also be one or more of a number of output mechanisms known to those of skill in the art, such as a display, projector, television, speaker device, etc. In some instances, multi-modal computing devices can enable a user to provide multiple types of input to communicate with the computing device architecture 1100. The communications interface 1040 can generally govern and manage the user input and computing device outputs. There is no restriction on operating on any particular hardware arrangement and therefore the basic features here can easily be substituted for improved hardware or firmware arrangements as they are developed.

[0144] The storage device 1130 is a non-transitory memory and can be a hard disk or other types of computer readable media which can store data that is accessible by a computer, such as magnetic cassettes, flash memory cards, solid state memory devices, digital versatile disks, cartridges, random access memories (RAMs) 1125, read only memory (ROM) 1120, and hybrids thereof. The storage device 1130 can include services 1132, 1134, 1136 for controlling the processor 1110. Other hardware or software modules or engines are contemplated. The storage device 1130 can be connected to the computing device connection 1105. In one aspect, a hardware module that performs a particular function can include the software component stored in a computer-readable medium that, in combination with the necessary hardware components, such as the processor 1110, connection 1105, output display 1135, etc., performs the function.

[0145] Aspects of the present disclosure are applicable to any suitable electronic device that includes or is coupled to one or more active depth sensing systems, such as a security system, a smartphone, a tablet computer, a laptop computer, a vehicle, a drone, or other device. While described below with respect to a device having or coupled to one light projector, aspects of the present disclosure are applicable to devices having any number of light projectors and are therefore not limited to a particular device.

[0146] The term “device” is not limited to one or a specific number of physical objects (such as a smartphone, a controller, a processing system, etc.). As used herein, a device can be any electronic device having one or more portions that can implement at least some portions of the present disclosure. While the following description and examples use the term “device” to describe various aspects of the present disclosure, the term “device” is not limited to a specific configuration, type, or number of objects. Additionally, the term “system” is not limited to multiple components or specific aspects. For example, a system can be implemented on one or more printed circuit boards or other substrates, and can have components that are movable or static. While the following description and examples use the term “system” to describe various aspects of the present disclosure, the term “system” is not limited to a specific configuration, type, or number of objects.

[0147] In the above description, specific details are provided to provide a thorough understanding of the aspects and examples provided herein. However, one skilled in the relevant art will recognize that the aspects can be practiced without one or more of the specific details, or with other methods, components, materials, and so forth. In some instances, well-known structures have not been described in detail or at all in order to avoid obscuring the aspects. Techniques and technologies can be described without substantively distinguishing between methodological and

[0148] Aspects can be described above as a process or method. Although a process or method can be described as sequential, the process or method can be performed concurrently or in different orders than described. Further, an order that operations are described does not require a specific sequence of operations. An operation described as following another operation can be performed prior to the other operation, and vice versa. A process can have additional, fewer, or different operations. A process can correspond to a method, a function, a procedure, a subroutine, a subprogram, etc. When a process corresponds to a function, its termination can correspond to a return of the function to the calling function or the main function.

[0149] Processes and methods according to the above-described examples can be implemented using stored computer-executable instructions or computer-executable instructions that are otherwise obtained (e.g., downloaded or uploaded) from a computer-readable medium. Such instructions can comprise, for example, instructions and data which cause or otherwise configure a general purpose computer, special purpose computer, or a processing device to perform a certain function or group of functions. Portions of computer resources used by a particular computer can be accessed through a network. Computer-executable instructions can be, for example, binaries, intermediate format instructions such as assembly language, firmware, source code, etc.

[0150] The term "computer-readable medium" includes, but is not limited to portable or fixed storage devices, optical storage devices, and various other mediums capable of storing, containing or carrying instruction and / or data. Computer-readable medium can include a non-transitory medium in which data can be stored and that does not include carrier waves and / or transitory electronic signals propagating wirelessly or over wired connections. Examples of a non-transitory medium can include, but are not limited to, a magnetic disk or tape, optical storage media such as flash memory, memory or memory devices, magnetic or optical disks, flash memory, USB devices provided with non-volatile memory, network storage devices, a compact disc (CD) or digital versatile disc (DVD), their complements, or the like. Computer-readable medium can have stored thereon code and / or machine- executable instructions that can represent a procedure, a function, a subprogram, a program, a routine, a subroutine, a module, an engine, a software package, a class, or any combination of instructions, data structures, or program statements. A code segment can be coupled to another code segment or a hardware circuit by passing and / or receiving information, data, arguments, parameters, or memory contents. Information, arguments, parameters, data, etc. can be passed, forwarded, or transmitted via any suitable means including memory sharing, message passing, token passing, network transmission, etc.

[0151] In some aspects, computer-readable storage devices, media and memory can include cable or wireless signals, and the like containing bit streams etc. However, non-transitory computer-readable storage media expressly exclude media such as energy, carrier signals, electromagnetic waves, and signals per se, when mentioned.

[0152] Devices implementing processes and methods according to these disclosures can include hardware, software, firmware, middleware, microcode, hardware description languages, or any combination thereof, and can take any of a variety of form factors. When implemented in software, firmware, middleware, or microcode, the program code, or code segments, to perform the necessary tasks (e.g., computer program products) can be stored in a computer-readable or machine-readable medium. A processor(s) can perform the necessary tasks. Typical examples of form factors include laptops, smartphones, mobile phones, tablet devices or other small form factor personal computers, personal digital assistants, rack-mounted devices, and so on. Functionality described herein also can be embodied in peripherals or add-in cards. Such software can be executed as is, without being translated into microcode, or other low-level code, such as object code. Various components discussed herein can include one or more computer-readable storage devices.

[0153] Instructions, media for conveying such instructions, computing resources for executing them, and other structures for supporting such computing resources are example means for providing the functionality described in this disclosure.

[0154] In the foregoing description, various aspects of the present application have been described with reference to particular aspects only. A person of ordinary skill in the art will realize that the application is not limited to these described aspects. Thus, although the exemplary aspects of the application have been described in detail, various modifications can be made without departing from the scope of the application. Various features and aspects of the above-described applications can be used individually or jointly. Further, each aspect can be used with or without the use of other aspects. Still further, each aspect can be used without the necessity of other aspects or can be used in combination with other aspects. Thus, the description is to be considered as merely illustrative of the principles of the application and not in limitation thereof. The scope of the application is to be interpreted, accordingly, in conjunction with the appended claims.

[0155] One of ordinary skill in the art will appreciate that the less than (“<”) and greater than (“>”) symbols or terminology used herein can be replaced with less than or equal to (“≤”) and greater than or equal to (“≥”) symbols, respectively, without departing from the scope of the specification.

[0156] Where components are described as being “configured to” perform certain operations, such configuration can be accomplished, for example, by designing the electronic circuitry or other hardware of the components to perform the operation, by programming the components (e.g., microprocessors or other suitable electronic circuits) to perform the operation, or any combination thereof.

[0157] The phrase “coupled to” means that any component is directly or indirectly connected to another component, and / or that any component is directly or indirectly in communication with another component (e.g., connected to another component through a wired or wireless connection, and / or other suitable communication interface).

[0158] Claim language reciting “at least one of’ a plurality or “one or more of’ a plurality indicates that one member of the plurality or more than one member of the plurality are contemplated as satisfying the claim. For example, claim language reciting “at least one of A and B” or “at least one of A or B” means A, B, or A and B. In another example, claim language reciting “at least one of A, B, and C” or “at least one of A, B, or C” means A, B, C, or A and B, or A and C, or B and C, or A and B and C. Language reciting “at least one of’ a plurality and / or “one or more of’ a plurality does not limit the plurality to the items listed. For example, claim language reciting “at least one of A and B” or “at least one of A or B” can mean A, B, or A and B, and can additionally include items not listed in the set of A and B.

[0159] The various illustrative logical blocks, modules, engines, circuits, and algorithm steps described in connection with the aspects disclosed herein can be implemented as electronic hardware, computer software, firmware, or combinations thereof. To clearly illustrate this interchangeability of hardware and software, various illustrative components, blocks, modules, circuits, and steps have been described above generally in terms of their functionality. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the overall system. Skilled artisans can implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present application.

[0160] The techniques described herein can also be implemented in electronic hardware, computer software, firmware, or any combination thereof. Such techniques can be implemented in any of a variety of devices such as general purposes computers, wireless communication device handsets, or integrated circuit devices having multiple uses such as by incorporation into a wireless communication device handset or other such device. Any features described as modules or components can be implemented together in an integrated logic device or separately as discrete but interoperable logic devices. If implemented in software, the techniques can be realized at least in part by a computer-readable data storage medium or media having computer code thereon for performing any of the routines and / or processes as described herein. The computer-readable data storage medium or media can form part of a computer program product. The computer-readable data storage medium or media can include memory or data storage media as described above. The computer program product can include packaging materials.

[0161] The program code can be executed by a processor, which can include one or more processors, such as one or more digital signal processors (DSPs), general purpose microprocessors, application-specific integrated circuits (ASICs), field programmable logic arrays (FPGAs), or other equivalent integrated or discrete logic circuitry. Such a processor can be configured to perform any of the techniques described in this disclosure. A general-purpose processor can be a microprocessor; but in the alternative, the processor can be any conventional processor, controller, microcontroller, or state machine. A processor can also be implemented as a combination of computing devices, e.g., a combination of a DSP and a microprocessor, a plurality of microprocessors, one or more microprocessors in conjunction with a DSP core, or any other such configuration. Accordingly, the term “processor,” as used herein can refer to any of the foregoing structure, any combination of the foregoing structure, or any other structure or apparatus suitable for implementation of the techniques described herein.

[0162] Exemplary aspects of the present disclosure include:

[0163] Aspect 1 : A method of ray tracing, the method comprising: obtaining an acceleration data structure comprising one or more primitives of scene objects; applying a graph cut to the acceleration data structure; determining a set of nodes of the acceleration data structure based on the graph cut, wherein the set of nodes are positioned adjacent to the graph cut; and generating a world space bounding volume for the scene objects, wherein the world space bounding volume is generated for the set of nodes determined based on the graph cut.

[0164] Aspect 2: The method of aspect 1, further comprising: obtaining a respective object space bounding volume for each node of the set of nodes; and transforming each respective object space bounding volume of each node into a plurality of world space vertices.

[0165] Aspect 3: The method of aspect 2, wherein the world space bounding volume for the scene objects is generated based on the plurality of world space vertices.

[0166] Aspect 4: The method of any one of aspects 1-3, further comprising: determining one or more child nodes of a root node of the acceleration data structure; determining a surface area heuristic (SAH) for each child node of the one or more child nodes; and applying the graph cut to the acceleration data structure based on the SAH determined for each child node.

[0167] Aspect 5: The method of aspect 4, further comprising: determining a computational cost budget specifying a maximum number of nodes in the set of nodes based on the graph cut; and determining the SAH for each child node of the one or more child nodes based on the determined computational cost.

[0168] Aspect 6: The method of any one of aspects 1-5, wherein the graph cut is applied directly above or directly below a plurality of leaf nodes of the acceleration data structure.

[0169] Aspect 7: The method of any one of aspects 1-6, wherein the set of nodes determined based on the graph cut includes a plurality of leaf nodes of the acceleration data structure, wherein the plurality of leaf nodes includes each vertex of the scene object.

[0170] Aspect 8: The method of aspect 7, wherein the world space bounding box is generated based at least in part on transforming each vertex of the scene object from an object space representation to a world space representation.

[0171] Aspect 9: The method of any one of aspects 1-8, wherein the one or more primitives of the scene object are included in one or more leaf nodes of the acceleration data structure.

[0172] Aspect 10: The method of any one of aspects 1-9, wherein the world space bounding box generated for the scene object is a world space axis-aligned bounding box (AABB).

[0173] Aspect 11: The method of any one of aspects 1-10, wherein the acceleration data structure includes a bounding volume hierarchy (BVH).

[0174] Aspect 12: The method of any one of aspects 1-11, wherein the acceleration data structure includes a bottom-level acceleration structure (BLAS).

[0175] Aspect 13: The method of aspect 12, wherein the BLAS: is associated with a top-level acceleration structure (TLAS) leaf node; and includes one or more intervening BLAS nodes, each of which includes an axis-aligned bounding box (AABB) that encloses a subset of the one or more primitives of the scene object.

[0176] Aspect 14: The method of any one of aspects 1-13, wherein the set of nodes positioned adjacent to the graph cut are located above the graph cut or below the graph cut.

[0177] Aspect 15: A method of ray tracing, the method comprising: obtaining a bottom level acceleration structure (BLAS), the BLAS comprising one or more primitives of scene objects; computing proxy geometry for a plurality of vertices of the BLAS, the proxy geometry having a first number of vertices less than a number of vertices contained in the BLAS; transforming the first number of vertices of the proxy geometry into a plurality of proxy geometry world space vertices; and generating a world space axis-aligned bounding box (AABB) for the BLAS, wherein the world space axis-aligned bounding box encloses the plurality of proxy geometry world space vertices.

[0178] Aspect 16: The method of aspect 15, wherein the proxy geometry is a convex hull or an approximation of a convex hull.

[0179] Aspect 17: A method of ray tracing, the method comprising: obtaining a bottom level acceleration structure (BLAS), the BLAS comprising a plurality of object space vertices of one or more primitives of scene objects; transforming each vertex of the plurality of object space vertices into a transformed world space vertex; and generating a world space axis-aligned bounding box (AABB) for the BLAS such that the world space AABB encloses each transformed world space vertex.

[0180] Aspect 18: An apparatus for ray tracing, comprising: a memory; and one or more processors coupled to the memory, the one or more processors configured to: obtain an acceleration data structure, the acceleration data structure comprising one or more primitives of scene objects; apply a graph cut to the acceleration data structure; determine a set of nodes of the acceleration data structure based on the graph cut, wherein the set of nodes are positioned adjacent to the graph cut; and generate a world space bounding box for the scene objects, wherein the world space bounding box is generated for the set of nodes determined based on the graph cut.

[0181] Aspect 19: The apparatus of aspect 18, wherein the one or more processors are configured to: obtain a respective object space bounding box for each node of the set of nodes; and transform each respective object space bounding box of each node into a plurality of world space vertices.

[0182] Aspect 20: The apparatus of aspect 19, wherein the world space bounding box for the scene objects is generated based on the plurality of world space vertices.

[0183] Aspect 21 : The apparatus of any one of aspects 18-20, wherein the one or more processors are configured to: determine one or more child nodes of a root node of the acceleration data structure; determine a surface area heuristic (SAH) for each of the one or more child nodes; and apply the graph cut to the acceleration data structure based on the SAH determined for each child node.

[0184] Aspect 22: The apparatus of aspect 21, wherein the one or more processors are configured to: determine a computational cost budget that specifies a maximum number of nodes in the set of nodes based on the graph cut; and determine the SAH for each of the one or more child nodes based on the determined computational cost.

[0185] Aspect 23: The apparatus of any one of aspects 18-22, wherein the graph cut is applied directly above or directly below a plurality of leaf nodes of the acceleration data structure.

[0186] Aspect 24: The apparatus of any one of aspects 18-23, wherein the set of nodes determined based on the graph cut includes a plurality of leaf nodes of the acceleration data structure, wherein the plurality of leaf nodes includes each vertex of the scene object.

[0187] Aspect 25: The apparatus of aspect 24, wherein the world space bounding box is generated based at least in part on transforming each vertex of the scene object from an object space representation to a world space representation.

[0188] Aspect 26: The apparatus of any one of aspects 18-25, wherein the one or more primitives of the scene object are included in one or more leaf nodes of the acceleration data structure.

[0189] Aspect 27: The apparatus of any one of aspects 18-26, wherein the world space bounding box generated for the scene object is a world space axis-aligned bounding box (AABB).

[0190] Aspect 28: The apparatus of any one of aspects 18-27, wherein the acceleration data structure comprises a bounding volume hierarchy (BVH).

[0191] Aspect 29: The apparatus of any one of aspects 18-28, wherein the acceleration data structure comprises a bottom level acceleration structure (BLAS).

[0192] Aspect 30: The apparatus of aspect 29, wherein the BLAS: is associated with a top-level acceleration structure (TLAS) leaf node; and includes one or more intervening BLAS nodes, each intervening BLAS node including an axis-aligned bounding box (AABB) enclosing a subset of the one or more primitives of the scene object.

[0193] Aspect 31 : The apparatus of any of aspects 18-30, wherein the set of nodes positioned adjacent to the graph cut are positioned above the graph cut or below the graph cut.

[0194] Aspect 32: An apparatus for ray tracing, comprising: a memory; and one or more processors coupled to the memory, the one or more processors configured to: obtain a bottom-level acceleration structure (BLAS), the BLAS including one or more primitives of a scene object; compute a proxy geometry of a plurality of vertices of the BLAS, the proxy geometry having a first number of vertices less than a number of vertices included in the BLAS; transform the first number of vertices of the proxy geometry into a plurality of proxy geometry world space vertices; and generate a world space axis-aligned bounding box (AABB) for the BLAS, wherein the world space axis-aligned bounding box encloses the plurality of proxy geometry world space vertices.

[0195] Aspect 33: The apparatus of aspect 32, wherein the proxy geometry is a convex hull or an approximation of a convex hull.

[0196] Aspect 34: An apparatus for ray tracing, comprising: a memory; and one or more processors coupled to the memory, the one or more processors configured to: obtain a bottom-level acceleration structure (BLAS), the BLAS including a plurality of object space vertices of one or more primitives of a scene object; transform each vertex of the plurality of object space vertices into a transformed world space vertex; and generate a world space axis-aligned bounding box (AABB) for the BLAS such that the world space AABB encloses each transformed world space vertex.

[0197] Aspect 35: A non-transitory computer-readable storage medium having stored thereon instructions that, when executed by one or more processors, cause the one or more processors to perform any of the operations of aspects 1-14 and 18-31.

[0198] Aspect 36: An apparatus comprising means for performing any of the operations of aspects 1-14 and 18-31.

[0199] Aspect 37: A non-transitory computer-readable storage medium storing instructions thereon that, when executed by one or more processors, cause the one or more processors to perform any of the operations of Aspects 15-16 and 32-33.

[0200] Aspect 38: An apparatus comprising means for performing any of the operations of Aspects 15-16 and 32-33.

[0201] Aspect 39: A non-transitory computer-readable storage medium storing instructions thereon that, when executed by one or more processors, cause the one or more processors to perform any of the operations of Aspects 17-34.

[0202] Aspect 40: An apparatus comprising means for performing any of the operations of Aspects 17 and 34.

Claims

1. A method of ray tracing, the method comprising: obtaining an acceleration data structure, the acceleration data structure comprising one or more primitives of a scene object; determining one or more child nodes of a root node of the acceleration data structure; determining a surface area heuristic (SAH) for each of the one or more child nodes; determining a computation budget corresponding to a maximum number of nodes for a graph cut; determining the graph cut based on the determined SAH for each child node and the computation budget; applying the graph cut to the acceleration data structure; determining a set of nodes of the acceleration data structure based on the graph cut, wherein the set of nodes are positioned adjacent to the graph cut; and generating a world space bounding box for the scene object, wherein the world space bounding box is generated for the set of nodes determined based on the graph cut.

2. The method of claim 1, further comprising: obtaining a respective object space bounding box for each node of the set of nodes; and transforming each respective object space bounding box of each node into a plurality of world space vertices.

3. The method of claim 2, wherein the world space bounding box for the scene object is generated based on the plurality of world space vertices.

4. The method of claim 1, wherein the graph cut is applied directly above or directly below a plurality of leaf nodes of the acceleration data structure.

5. The method of claim 1, wherein the set of nodes determined based on the graph cut comprises a plurality of leaf nodes of the acceleration data structure, and wherein the plurality of leaf nodes comprise every vertex of the scene object.

6. The method of claim 5, wherein the world space bounding box is generated at least in part based on transforming every vertex of the scene object from an object space representation to a world space representation.

7. The method of claim 1, wherein the one or more primitives of the scene object are included in one or more leaf nodes of the acceleration data structure.

8. The method of claim 1, wherein the world space bounding box generated for the scene object is a world space axis-aligned bounding box (AABB).

9. The method of claim 1, wherein the acceleration data structure comprises a bounding volume hierarchy (BVH).

10. The method of claim 1, wherein the acceleration data structure comprises a bottom-level acceleration structure (BLAS).

11. The method of claim 10, wherein the BLAS: is associated with a top-level acceleration structure (TLAS) leaf node; and comprises one or more intervening BLAS nodes, each comprising an axis-aligned bounding box (AABB) enclosing a subset of the one or more primitives of the scene object.

12. The method of claim 1, wherein the set of nodes positioned adjacent to the graph cut are located above the graph cut or below the graph cut.

13. An apparatus for ray tracing, comprising: a memory; and one or more processors coupled to the memory, the one or more processors configured to: obtain an acceleration data structure, the acceleration data structure comprising one or more primitives of a scene object; determine one or more child nodes of a root node of the acceleration data structure; determine a surface area heuristic (SAH) for each of the one or more child nodes; determine a computation budget corresponding to a maximum number of nodes for a graph cut; determine the graph cut based on the determined SAH for each child node and the computation budget; apply the graph cut to the acceleration data structure; determine a set of nodes of the acceleration data structure based on the graph cut, wherein the set of nodes are positioned adjacent to the graph cut; and generate a world space bounding box for the scene object, wherein the world space bounding box is generated for the set of nodes determined based on the graph cut. obtaining an acceleration data structure comprising one or more primitives of a scene object; determining one or more child nodes of a root node of the acceleration data structure; determining a surface area heuristic (SAH) for each of the one or more child nodes; determining a computation budget corresponding to a maximum number of nodes for a graph cut; determining the graph cut based on the determined SAH for each child node and the computation budget; applying the graph cut to the acceleration data structure; determining a set of nodes of the acceleration data structure based on the graph cut, wherein the set of nodes are positioned adjacent to the graph cut; and generating a world space bounding volume for the scene object, wherein the world space bounding volume is generated for the set of nodes determined based on the graph cut.

14. The apparatus of claim 13, wherein the one or more processors are configured to: obtain a respective object space bounding volume for each node of the set of nodes; and transform each respective object space bounding volume of each node into a plurality of world space vertices.

15. The apparatus of claim 14, wherein the world space bounding volume for the scene object is generated based on the plurality of world space vertices.

16. The apparatus of claim 13, wherein the graph cut is applied directly above or directly below a plurality of leaf nodes of the acceleration data structure.

17. The apparatus of claim 13, wherein the set of nodes determined based on the graph cut comprises a plurality of leaf nodes of the acceleration data structure, and wherein the plurality of leaf nodes comprise each vertex of the scene object.

18. The apparatus of claim 17, wherein the world space bounding volume is generated based at least in part on transforming each vertex of the scene object from an object space representation to a world space representation.

19. The apparatus of claim 13, wherein the one or more primitives of the scene object are included in one or more leaf nodes of the acceleration data structure.

20. The apparatus of claim 13, wherein the world space bounding volume generated for the scene object is a world space axis-aligned bounding volume (AABB).

21. The apparatus of claim 13, wherein the acceleration data structure comprises a bounding volume hierarchy (BVH).

22. The apparatus of claim 13, wherein the acceleration data structure comprises a bottom-level acceleration structure (BLAS).

23. The apparatus of claim 22, wherein the BLAS: is associated with a top-level acceleration structure (TLAS) leaf node; and comprises one or more intervening BLAS nodes, each comprising an axis-aligned bounding volume (AABB) enclosing a subset of the one or more primitives of the scene object.

24. The apparatus of claim 13, wherein the set of nodes positioned adjacent to the graph cut are located above the graph cut or below the graph cut.

25. A non-transitory computer-readable medium having instructions stored thereon that, when executed by one or more processors, cause the one or more processors to: obtain an acceleration data structure comprising one or more primitives of a scene object; determine one or more child nodes of a root node of the acceleration data structure; determine a surface area heuristic (SAH) for each of the one or more child nodes; determine a computation budget corresponding to a maximum number of nodes for a graph cut; determine the graph cut based on the determined SAH for each child node and the computation budget; apply the graph cut to the acceleration data structure; determine a set of nodes of the acceleration data structure based on the graph cut, wherein the set of nodes are positioned adjacent to the graph cut; and generate a world space bounding box for the scene object, wherein the world space bounding box is generated for the set of nodes determined based on the graph cut.

26. The non-transitory computer-readable medium of claim 25, further comprising instructions that, when executed by the one or more processors, cause the one or more processors to: obtain a respective object space bounding box for each node in the set of nodes; and transform each respective object space bounding box for each node into a plurality of world space vertices.

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