Micro LED panel with photonic crystal structure and manufacturing method thereof

Abstract

This disclosure provides a microLED panel with a microLED array, as well as a system and method for manufacturing the microLED panel. The microLED array includes at least one microLED structure. The microLED structure includes at least a mesa structure and an array of photonic crystal structures formed in the mesa structure, thereby achieving higher directional light emission, a simpler structure, and lower cost. Furthermore, a regenerated layer is formed on at least a portion of the sidewalls of the mesa structure, which reduces nonradiative recombination at the sidewall surfaces of the mesa structure, improving light emission efficiency and image quality.

Description

Technical Field

[0001] This disclosure generally relates to light-emitting diode (LED) technology, and more specifically to a micro LED panel and a method of manufacturing the micro LED structure. Background Technology

[0002] Display technology is becoming increasingly important in today's commercial electronic devices. These display panels are widely used in fixed large screens, such as LCD TVs and OLED TVs, as well as portable electronic devices, such as laptops, smartphones, tablets, and wearable devices.

[0003] Inorganic micro-light-emitting diodes (LEDs) are becoming increasingly important due to their applications in a variety of fields, including self-emitting microdisplays, visible light communication, and optogenetics. Micro-LEDs exhibit higher output performance than conventional LEDs due to better strain relaxation, improved light extraction efficiency, and uniform current spread. Compared to conventional LEDs, micro-LEDs also exhibit improved thermal performance and operate with higher current density, faster response rates, wider operating temperature ranges, higher resolution, color gamut, contrast ratio, and lower power consumption.

[0004] To achieve higher pixel density, the size of micro-LEDs has been reduced to less than 200 nm. However, the efficiency and carrier lifetime of devices based on micro-LED arrays decrease dramatically with decreasing micro-LED size due to poor p-type conduction and surface recombination caused by top-down etching. The performance of micro-LEDs is also severely affected by the quantum-confined Stark effect, particularly by strain-induced polarization fields, leading to unstable operation and significant changes in emission wavelength with increasing current. Furthermore, as the diameter of micro-LEDs decreases, numerous surface states and defects are formed on the surface of the micro-LED structure via inductively coupled plasma (ICP) etching, increasing nonradiative recombination at the micro-LED structure surface.

[0005] Furthermore, the emission of conventional micro-LED structures is mainly distributed in any direction, exhibiting poor directional emission and reducing light intensity along the vertical direction. To achieve directional emission in micro-LED structures, additional reflective structures are configured around the mesa and at the bottom of the mesa to reflect the emitted light in the same direction. This leads to complex manufacturing processes and increases the cost of micro-LEDs.

[0006] Furthermore, in devices based on micro-LED arrays, a single micro-LED typically functions as a pixel, such as in a monolithic micro-LED array panel. However, micro-LED structures with smaller diameters exhibit lower external quantum efficiency (EQE), which reduces the luminous efficiency per pixel.

[0007] The above content is only for the purpose of helping to understand the technical solution of this application and does not constitute an admission that the above is prior art. Summary of the Invention

[0008] There is a need for improved display designs that address and mitigate the shortcomings of conventional display systems, such as those mentioned above. In particular, there is a need for display panels with improved efficiency and better image quality.

[0009] To overcome the above-mentioned drawbacks, the present invention provides a micro LED panel to improve luminous efficiency, avoid crosstalk, minimize surface carrier loss, and optimize the sidewall area of ​​the quantum well.

[0010] To achieve the above objectives, some exemplary embodiments of this disclosure provide a microLED panel including a microLED array, wherein the microLED array includes at least one microLED structure, wherein the microLED structure includes at least:

[0011] A mesa structure, wherein the mesa structure comprises, from bottom to top: a first type epitaxial layer, a light-emitting layer, and a second type epitaxial layer; and,

[0012] A photonic crystal structure array comprising a plurality of photonic crystal structures formed in a mesa structure, wherein there are gaps between adjacent photonic crystal structures within the photonic crystal structure array.

[0013] In some exemplary embodiments or any combination of exemplary embodiments of the micro LED panel, the photonic crystal structure array is formed as a mesa-shaped light-emitting surface above the light-emitting layer.

[0014] In some exemplary embodiments or any combination of exemplary embodiments of the micro LED panel, the mesa structure further includes a first mesa structure and a second mesa structure; the first mesa structure is formed at the bottom of the second mesa structure; and the photonic crystal array is formed in the second mesa structure and does not contact the light-emitting layer.

[0015] In some exemplary embodiments or any combination of exemplary embodiments of the micro LED panel, the bottom of the photonic crystal structure array is aligned with the bottom of the second mesa structure and with the top of the regenerated layer.

[0016] In some exemplary embodiments or any combination of exemplary embodiments of the micro LED panel, the second mesa structure is formed by at least a portion of the second type of epitaxial layer.

[0017] In some exemplary embodiments or any combination of exemplary embodiments of the micro LED panel, the first mesa structure is formed from top to bottom by a light-emitting layer and a first type of epitaxial layer.

[0018] In some exemplary embodiments or any combination of exemplary embodiments of the micro LED panel, the second type of epitaxial layer includes an upper layer and a bottom layer located at the bottom of the upper layer; the first mesa structure is formed by the bottom layer, the light-emitting layer and the second type of epitaxial layer; and the second mesa structure is formed by the upper layer.

[0019] In some exemplary embodiments or any combination of exemplary embodiments of the micro LED panel, the first mesa structure is formed by a first type of epitaxial layer and a portion of the light-emitting layer; and the second mesa structure is formed from bottom to top by a portion of the light-emitting layer and a second type of epitaxial layer.

[0020] In some exemplary embodiments or any combination of exemplary embodiments of the micro LED panel, the bottom width of the second platform structure is greater than the top width of the first platform structure.

[0021] In some exemplary embodiments or any combination of exemplary embodiments of the micro LED panel, the photonic crystal structure is a one-dimensional nanostructure.

[0022] In some exemplary embodiments or any combination of exemplary embodiments of the micro LED panel, multiple one-dimensional nanostructures are distributed in a photonic crystal structure array.

[0023] In some exemplary embodiments or any combination of exemplary embodiments of the micro LED panel, a one-dimensional nanostructure is formed above the light-emitting layer in the platform structure and along the light-emitting direction of the platform structure.

[0024] In some exemplary embodiments or any combination of exemplary embodiments of the micro LED panel, the diameter of the one-dimensional nanostructure is no greater than 1000 nm.

[0025] In some exemplary embodiments or any combination of exemplary embodiments of the micro LED panel, a one-dimensional nanostructure is formed perpendicular to the light-emitting layer.

[0026] In some exemplary embodiments or any combination of exemplary embodiments of the micro LED panel, a dielectric layer is filled in the gaps.

[0027] In some exemplary embodiments or any combination of exemplary embodiments of the micro LED panel, a dielectric layer is also formed on the sidewall of the mesa structure.

[0028] In some exemplary embodiments or any combination of exemplary embodiments of the micro LED panel, the dielectric layer is transparent and electrically insulating.

[0029] In some exemplary embodiments or any combination of exemplary embodiments of the micro LED panel, the width of the platform structure is no greater than 3 μm.

[0030] In some exemplary embodiments or any combination of exemplary embodiments of the micro LED panel, the light-emitting layer includes a plurality of stacked quantum well pairs.

[0031] In some exemplary embodiments or any combination of exemplary embodiments of the micro LED panel, the light-emitting layer has a straight shape without any curvature.

[0032] In some exemplary embodiments or any combination of exemplary embodiments of the micro LED panel, the material of the first epitaxial layer is a single crystal, and the material of the second epitaxial layer is a single crystal.

[0033] In some exemplary embodiments or any combination of exemplary embodiments of the micro-LED panel, the micro-LED structure further includes a regenerated layer formed on at least a portion of the sidewall of the mesa structure.

[0034] In some exemplary embodiments or any combination of exemplary embodiments of the micro LED panel, a regenerated layer is formed on the sidewall of the light-emitting layer.

[0035] In some exemplary embodiments or any combination of exemplary embodiments of the micro LED panel, a regenerated layer is formed on the sidewall of the first mezzanine structure.

[0036] In some exemplary embodiments or any combination of exemplary embodiments of the micro LED panel, the material of the regenerated layer with intrinsically doped ions is the same as the material of the first type epitaxial layer and / or the material of the second type epitaxial layer, but without intentionally doped ions.

[0037] In some exemplary embodiments or any combination of exemplary embodiments of the micro LED panel, the material of the regenerated layer is one or more of GaP, AlP, GaAs, InP, AlInP, GaInP, AlN, GaN and / or InN.

[0038] In some exemplary embodiments or any combination of exemplary embodiments of the micro LED panel, the material of the regenerated layer is a single crystal.

[0039] In some exemplary embodiments or any combination of exemplary embodiments of the micro LED panel, the band gap of the regenerated layer is larger than the band gap of the light-emitting layer.

[0040] In some exemplary embodiments or any combination of exemplary embodiments of the micro LED panel, the thickness of the regenerated layer is less than the thickness of the light-emitting layer.

[0041] In some exemplary embodiments or any combination of exemplary embodiments of the micro LED panel, the thickness of the regenerated layer is no greater than 100 nm.

[0042] In some exemplary embodiments or any combination of exemplary embodiments of the micro LED panel, the resistance of the regenerated layer is higher than the resistance of the light-emitting layer.

[0043] In some exemplary embodiments or any combination of exemplary embodiments of the micro LED panel, the regenerated layer is non-conductive.

[0044] In some exemplary embodiments or any combination of exemplary embodiments of the micro LED panel, a top contact is formed on the top of the mesa structure; a top conductive layer is formed on the top contact and the top of the mesa structure.

[0045] In some exemplary embodiments or any combination of exemplary embodiments of the micro LED panel, the top conductive layer fills a portion of the gap; and the bottom of the top contact fills a portion of the gap.

[0046] In some exemplary embodiments or any combination of exemplary embodiments of the micro LED panel, the top conductive layer is transparent.

[0047] In some exemplary embodiments or any combination of exemplary embodiments of the micro LED panel, a dielectric layer is formed between adjacent mesa structures.

[0048] Some exemplary embodiments of this disclosure provide a method for manufacturing a micro LED panel, the method comprising the following steps:

[0049] Step 1: Provide a semiconductor substrate with an epitaxial structure;

[0050] Step 2: A bottom contact layer and a bottom connection layer are sequentially formed on the top surface of the first type of epitaxial layer;

[0051] Step 3: Bond the bottom interconnect layer to the IC backplane by inverting the semiconductor substrate; then, remove the semiconductor substrate.

[0052] Step 4: Form a photonic crystal structure array comprising multiple photonic crystal structures by etching the second epitaxial layer;

[0053] Step 5: An isolation space is formed to define the mesa structure by etching the photonic crystal structure array, the light-emitting layer, the first type epitaxial layer, the bottom contact layer and the bottom connection layer from top to bottom.

[0054] Step 6: Form a dielectric layer on the sidewalls of the photonic crystal structure; and

[0055] Step 7: Form top contacts and a top conductive layer on top of the dielectric layer and on top of the mesa structure.

[0056] In some exemplary embodiments or any combination of exemplary embodiments of the method for manufacturing a micro LED panel, in step 4, the power used for etching is 200W to 800W, the etching time is 50S to 300S, and the bottom of the photonic crystal structure in the photonic crystal structure array is above the light-emitting layer and does not contact the light-emitting layer.

[0057] In some exemplary embodiments or any combination of exemplary embodiments of the method for manufacturing a micro LED panel, in step 6, a dielectric layer is further formed on top of the regenerated layer between adjacent second mesa structures and further completely fills the isolation space.

[0058] In some exemplary embodiments or any combination of exemplary embodiments of the method for manufacturing a micro LED panel, in step 4, the photonic crystal structure is a one-dimensional nanostructure; and the one-dimensional nanostructure is formed above the light-emitting layer in the second mesa structure and along the light-emitting direction of the mesa structure; and the one-dimensional nanostructure is formed perpendicular to the light-emitting layer.

[0059] In some exemplary embodiments or any combination of exemplary embodiments of the method for manufacturing a micro LED panel, the diameter of the one-dimensional nanostructure is no greater than 1000 nm.

[0060] In some exemplary embodiments or any combination of exemplary embodiments of the method for manufacturing a micro LED panel, in step 5, the width of the mesa structure is no greater than 3 μm.

[0061] Some exemplary embodiments of this disclosure provide a method for manufacturing a micro LED panel, the method comprising the following steps:

[0062] Step 1: Provide a semiconductor substrate with an epitaxial structure;

[0063] Step 2: The first mesa structure is formed by patterning the first type epitaxial layer, the light-emitting layer and part of the second type epitaxial layer from top to bottom;

[0064] Step 3: A regenerated layer is formed on the sidewalls and top of the first mezzanine structure and on the exposed top of the second type of epitaxial layer between adjacent first mezzanine structures;

[0065] Step 4: Form the bottom contact in the regenerated layer, form a dielectric layer on the regenerated layer, and form an opening in the dielectric layer to expose the bottom contact;

[0066] Step 5: Form the bottom connection structure in the opening;

[0067] Step 6: By inverting the semiconductor substrate, the bottom connection structure is bonded to the IC backplane; then, the semiconductor substrate is removed.

[0068] Step 7: Form a second mesa structure by etching a second type of epitaxial layer and form a photonic crystal structure array including multiple photonic crystal structures, wherein an isolation space is formed between adjacent second mesa structures;

[0069] Step 8: Form a second dielectric layer on the sidewalls of the photonic crystal structure; and

[0070] Step 9: A top contact and a top conductive layer are formed on top of the dielectric layer and on top of the second mesa structure, wherein the mesa structure is formed by the first mesa structure and the second mesa structure.

[0071] In some exemplary embodiments or any combination of exemplary embodiments of the method for manufacturing a micro LED panel, step 7 further includes: etching a second type of epitaxial layer and stopping at the top of the regenerated layer; the bottom of the photonic crystal structure in the photonic crystal structure array is above the light-emitting layer and does not contact the light-emitting layer; the bottom of the photonic crystal structure array is aligned with the bottom of the second mesa structure and with the top of the regenerated layer, wherein the etching power is 200W to 800W and the etching time is 50S to 300S.

[0072] In some exemplary embodiments or any combination of exemplary embodiments of the method for manufacturing a micro LED panel, in step 8, a second dielectric layer is further formed on top of the regenerated layer between adjacent second mesa structures and further completely fills the isolation space.

[0073] In some exemplary embodiments or any combination of exemplary embodiments of the method for manufacturing a micro LED panel, in step 7, the bottom width of the second platform structure is greater than the top width of the first platform structure.

[0074] In some exemplary embodiments or any combination of exemplary embodiments of the method for manufacturing a micro LED panel, in step 7, the photonic crystal structure is a one-dimensional nanostructure; and the one-dimensional nanostructure is formed above the light-emitting layer in the second mesa structure and along the light-emitting direction of the mesa structure; and the one-dimensional nanostructure is formed perpendicular to the light-emitting layer.

[0075] In some exemplary embodiments or any combination of exemplary embodiments of the method for manufacturing a micro LED panel, the diameter of the one-dimensional nanostructure is no greater than 1000 nm.

[0076] In some exemplary embodiments or any combination of exemplary embodiments of the method for manufacturing a micro LED panel, in step 7, the width of the second mesa structure is no greater than 3 μm.

[0077] In some exemplary embodiments or any combination of exemplary embodiments of the method for manufacturing a micro LED panel, the material of the regenerated layer having intrinsically doped ions is the same as the material of the first type epitaxial layer and / or the material of the second type epitaxial layer, but without intentionally doped ions; and the material of the regenerated layer is a single crystal.

[0078] In some exemplary embodiments or any combination of exemplary embodiments of the method for manufacturing a micro LED panel, the material of the regenerated layer is one or more of GaP, AlP, GaAs, InP, AlInP, GaInP, AlN, GaN and / or InN.

[0079] In some exemplary embodiments or any combination of exemplary embodiments of the method for manufacturing a micro LED panel, the band gap of the regenerated layer is greater than the band gap of the light-emitting layer; the thickness of the regenerated layer is less than the thickness of the light-emitting layer; and the resistance of the regenerated layer is higher than the resistance of the light-emitting layer.

[0080] The micro-LED panel disclosed herein avoids non-radiative recombination at the sidewalls of the micro-LED structure. Furthermore, compared to conventional micro-LEDs, the micro-LED structure of this disclosure exhibits high directional emission without other reflective structures, thereby simplifying the micro-LED structure and reducing costs. Additionally, this disclosure can suppress non-radiative recombination at the surface of the micro-LED structure, thereby improving image quality and increasing the EQE of pixels.

[0081] Note that the various embodiments described above can be combined with any other embodiments described herein. The features and advantages described in the specification are not exhaustive, and in particular, many additional features and advantages will be apparent to those skilled in the art from the accompanying drawings, specification, and claims. Furthermore, it should be noted that the language used in the specification has been chosen primarily for readability and instruction purposes and is not intended to define or limit the subject matter of the invention. Attached Figure Description

[0082] To gain a more detailed understanding of this disclosure, reference can be made to the features of various embodiments, some of which are illustrated in the accompanying drawings. However, the drawings only illustrate relevant features of this disclosure and should not be considered limiting, as the specification may allow for other valid features.

[0083] For convenience, "up" is used to indicate the substrate away from the light-emitting structure shown in the figure, "down" indicates the direction towards the substrate, and other directional terms such as top, bottom, above, below, under, and below are explained accordingly.

[0084] Figure 1This is a cross-sectional view of a tabletop structure according to some embodiments of the present disclosure (e.g., the first embodiment).

[0085] Figure 2 This is a cross-sectional structural diagram of a micro LED panel according to some embodiments of the present disclosure (e.g., the first embodiment).

[0086] Figures 3 to 10 The steps of a method for manufacturing a micro LED panel according to some embodiments (e.g., the first embodiment) are illustrated respectively.

[0087] Figure 11 This is a cross-sectional structural diagram of a micro LED panel according to some embodiments of the present disclosure (e.g., the second embodiment).

[0088] Figure 12 This is a cross-sectional structural diagram of another micro LED panel according to some embodiments of the present disclosure (e.g., the second embodiment).

[0089] Figures 13 to 14 This is a cross-sectional structural diagram of a tabletop structure according to some embodiments of the present disclosure (e.g., the second embodiment).

[0090] Figures 15 to 25 The steps of a method for manufacturing a micro LED panel according to some embodiments (e.g., the second embodiment) are illustrated respectively.

[0091] Figure 26 This is a cross-sectional structural diagram of another micro LED panel according to some embodiments of the present disclosure (e.g., the third embodiment).

[0092] Figure 27 It is based on some embodiments of this disclosure (e.g., the third embodiment). Figure 26 A top view of the platform structure.

[0093] Figures 28 to 37 The steps of a method for manufacturing a micro LED panel according to some embodiments (e.g., the third embodiment) are illustrated respectively.

[0094] Figure 38 The illustration shows another step 7 of depositing a dielectric layer according to some embodiments (e.g., the third embodiment).

[0095] Figure 39 This is a cross-sectional structural diagram of another micro LED panel according to some embodiments of the present disclosure (e.g., the third embodiment).

[0096] Figure 40 This is a cross-sectional structural diagram of a micro LED panel according to some embodiments of the present disclosure (e.g., the fourth embodiment).

[0097] Figures 41 to 52The steps of a method for manufacturing a micro LED panel according to some embodiments (e.g., the fourth embodiment) are illustrated respectively.

[0098] By convention, features shown in the accompanying drawings may not be drawn to scale. Therefore, for clarity, the dimensions of various features may be arbitrarily enlarged or reduced. Additionally, some drawings may not depict all components of a given system, method, or apparatus. Finally, the same reference numerals may be used to denote the same features throughout the specification and drawings. Detailed Implementation

[0099] Numerous details are described herein to provide a thorough understanding of the exemplary embodiments illustrated in the accompanying drawings. However, some embodiments may be practiced without many specific details, and the scope of the claims is limited only to those features and aspects specifically set forth in the claims. Furthermore, well-known processes, components, and materials are not described exhaustively so as not to unnecessarily obscure relevant aspects of the embodiments described herein.

[0100] As described above, to address the problems in the related art, in some embodiments, this disclosure discloses a microLED panel comprising multiple microLED structures. The size of the microLED panel is no greater than 1 cm. The microLED structures are formed in an array within the microLED panel, having resolutions such as 720*480, 640*480, 1920*1080, 1280*720, 2k, or 4k. The diameter of the microLED structures is in the nanometer range, such as 20 nm to 100 nm.

[0101] Figure 1 This is a cross-sectional view of a tabletop structure according to some embodiments of the present disclosure (e.g., the first embodiment).

[0102] Reference Figure 1The micro-LED structure includes a mesa structure. The mesa structure is formed from bottom to top by a first-type epitaxial layer 01, a light-emitting layer 03, and a second-type epitaxial layer 02. The first and second types are different conductivity types; for example, the first type is P-type, and the second type is N-type. In another example, the first type is N-type, and the second type is P-type. The material of the first type epitaxial layer 01 can be one or more of p-type GaAs, InGaAs, GaP, GaN, InGaN, AlGaN, AlInP, GaInP, AlGaInP, AlP, InP, AlN and / or InN, or any combination thereof, preferably one or more of p-type GaAs, InGaAs, GaP, GaN, InGaN, AlGaN, AlInP, GaInP and / or AlGaInP, or any combination thereof. The material of the second type epitaxial layer 02 can be one or more of n-type GaAs, InGaAs, GaP, GaN, InGaN, AlGaN, AlInP, GaInP, AlGaInP, AlP, InP, AlN and / or InN, or any combination thereof, preferably one or more of n-type GaAs, InGaAs, GaP, GaN, InGaN, AlGaN, AlInP, GaInP and / or AlGaInP, or any combination thereof.

[0103] In some embodiments, the light-emitting layer 03 is formed by stacking multiple pairs of quantum well layers. The quantum well layers can be made of GaAs, InGaAs, GaP, GaN, InGaN, AlGaN, AlInP, GaInP, AlGaInP, etc. Furthermore, the thickness of the first type epitaxial layer 01 is greater than the thickness of the second type epitaxial layer 02, and the thickness of the light-emitting layer 03 is less than the thickness of the first type epitaxial layer 01. Preferably, the thickness of the first type epitaxial layer 01 is 700 nm to 2 μm, and the thickness of the second type epitaxial layer 02 is 100 nm to 200 nm. Preferably, the thickness of a single quantum well layer is no greater than 30 nm. In some embodiments, the light-emitting layer 03 comprises no more than three pairs of quantum well layers. Additionally, the light-emitting layer has a straight, unbent shape.

[0104] In some embodiments, the first type epitaxial layer 01 may have multiple stacked first type semiconductor sublayers, and the second type epitaxial layer 02 may have multiple stacked second type semiconductor sublayers. For example, the top layer of the first type epitaxial sublayer is a P capping layer connected to the bottom of the light-emitting layer 03, and the bottom layer of the second type epitaxial sublayer is an N capping layer connected to the top of the light-emitting layer 03, for protecting the quantum well layer from damage.

[0105] Furthermore, the first type of epitaxial layer 01 includes one or more mirror layers 011 thereon. Figure 1(Not shown in the diagram). The mirror layer 011 can be formed on the bottom surface of the first type epitaxial layer 01 or inside the first type epitaxial layer 01. The material of the mirror layer is a combination of dielectric and metallic materials. Note that multiple mirror layers 011 are formed horizontally one after another in the first type epitaxial layer 01 at different horizontal height positions, thereby dividing the first type epitaxial layer 01 into multiple layers. In addition, the material of the first epitaxial layer is a single crystal and the material of the second epitaxial layer is a single crystal.

[0106] Figure 2 This is a cross-sectional structural diagram of a micro LED panel according to some embodiments of the present disclosure (e.g., the first embodiment).

[0107] Reference Figure 2 A top contact 09 and a conductive layer 08 are formed on the top surface of the second-type epitaxial layer 02. The conductivity type of the top contact 09 is the same as that of the second-type epitaxial layer 02; for example, if the second type is n-type, the top contact 09 is an n-type top contact; or, if the second type is p-type, the top contact 09 is a p-type top contact. In some embodiments, the top contact 09 is made of metal or a metal alloy, such as AuGe, AuGeNi, etc. The top contact 09 is used to form an ohmic contact between the top conductive layer 08 and the second-type epitaxial layer 02 to optimize the electrical characteristics of the micro-LED. The diameter of the top contact 09 is approximately 20 nm to 50 nm, and the thickness of the top contact 09 is approximately 10 nm to 20 nm. In some embodiments, the top conductive layer 08 is transparent and conductive, such as indium tin oxide (ITO), fluorine-doped tin oxide (FTO), etc.

[0108] In this disclosure, to achieve highly directional light emission from the micro-LED structure, a photonic crystal structure array is formed in the mesa structure. In some embodiments, the photonic crystal structure array does not contact the light-emitting layer 03. In another embodiment, the photonic crystal structure array may contact the light-emitting layer 03. Furthermore, the photonic crystal structure array can be formed in any part of the mesa structure. For example, the photonic crystal structure array is formed on the emitting surface of the mesa structure; or, the photonic crystal structure array is formed from top to bottom through the mesa structure.

[0109] Additionally, in some embodiments, the top conductive layer 08 is continuously formed over the entire micro-LED panel. Herein, "entire" means a significant portion or all of it. In another embodiment, the top conductive layer 08 is not connected to each other between adjacent mesa structures.

[0110] The details of the micro-LED panel will be further described below with reference to the accompanying drawings.

[0111] First Embodiment

[0112] To address the problems in the related technologies, a miniature LED panel is provided in the embodiments of this disclosure.

[0113] The micro-LED panel includes a micro-LED array. (See reference...) Figure 1 The micro-LED structure in the micro-LED array includes at least a mesa structure and a photonic crystal structure array. The mesa structure, from bottom to top, includes a first-type epitaxial layer 01, a light-emitting layer 03, and a second-type epitaxial layer 02. The photonic crystal structure array is formed within the mesa structure. Gaps exist between adjacent photonic crystal structures 10. Here, the second epitaxial layer includes an upper layer 021 and a lower layer 022 (e.g., as shown in the image). Figure 2 (As shown in the diagram). Furthermore, a photonic crystal structure array is formed as a mesa-shaped luminescent surface in the upper layer 021 above the luminescent layer 03. Additionally, to achieve high image quality, the width of the mesa structure is no greater than 3 μm.

[0114] Furthermore, the photonic crystal structure 10 is a one-dimensional nanostructure. Multiple one-dimensional nanostructures are arranged in an array. These one-dimensional nanostructures are formed in the mesa structure along the light-emitting direction. Additionally, the one-dimensional nanostructure is formed perpendicular to the light-emitting layer 03. This one-dimensional nanostructure is similar to nanowires, nanorods, nanofibers, etc. Preferably, the diameter of the one-dimensional nanostructure is no greater than 1000 nm.

[0115] Reference Figure 2 A dielectric layer 05 is filled in the gaps between adjacent photonic crystal structures. Furthermore, the dielectric layer 05 may be further formed on the sidewalls of the mesa structure. Preferably, the material of the dielectric layer 05 is selected from one or more of SiO2, SiNx, Al2O3, AlN, HfO2, TiO2, and / or ZrO2. The dielectric layer 05 in the gaps between adjacent photonic crystal structures is transparent and electrically insulating. Additionally, the dielectric layer 05 is also formed in the spaces between adjacent mesa structures, or even fills the spaces between adjacent mesa structures.

[0116] In some embodiments, a top contact 09 is formed on the top of the mesa structure, and a top conductive layer 08 is formed on both the top contact 09 and the top of the mesa structure. Here, the top conductive layer 08 is continuously formed over the entire micro-LED structure array. Additionally, when the top of the dielectric layer 05 is lower than the top of the photonic crystal structure, the top conductive layer 08 fills some gaps between adjacent photonic crystal structures; and the bottom of the top contact 09 fills some gaps between adjacent photonic crystal structures. Here, the light emission direction is from bottom to top, therefore the top conductive layer 08 is transparent.

[0117] In some embodiments, a bottom contact layer 06' is formed on the bottom surface of the first type epitaxial layer 01. The conductivity type of the bottom contact is the same as that of the first type epitaxial layer 01; for example, if the first type epitaxial layer 01 is P-type, the bottom contact layer 06' is also P-type. Furthermore, since light is emitted upwards or downwards from an LED mesa structure composed of or including the first type epitaxial layer 01, the second type epitaxial layer 02, and the light-emitting layer 03, the diameter of the bottom contact layer 06' is larger than the diameter of the top contact 09, while the diameter of the top contact 09 can be as small as possible, and the top contact 09 can also be as small as a point on the top surface of the second type epitaxial layer 02. For example, the width of the top contact 09 is less than 1 / 5, 1 / 6, 1 / 10, or 1 / 20 of the width of the second type epitaxial layer 02 or the mesa structure. In some embodiments, the diameter of the bottom contact layer 06' can also be equal to or smaller than the diameter of the top contact 09. A bottom connection layer 07' is formed at the bottom of the bottom contact layer 06'. The bottom connection layer 07' is used to connect to a bottom electrode, such as a contact pad, in an IC backplane 00. Furthermore, the diameter of the bottom connection layer 07' is 20 nm to 1 μm. Preferably, the diameter of the bottom connection layer 07' is 800 nm to 1 μm. Additionally, the center of the bottom contact layer 06' is aligned vertically with the center of the top contact 09. Furthermore, the materials of the bottom contact layer 06' and the bottom connection layer 07' are transparent conductive materials, such as ITO or FTO. In some embodiments, the materials of the bottom contact layer 06' and the bottom connection layer 07' are not transparent. In some embodiments, the materials of the bottom contact layer 06' and the bottom connection layer 07' can be conductive metals. Preferably, the material of the bottom contact layer 06' can be at least one selected from Au, Zn, Be, Cr, Ni, Ti, Ag, and Pt. The material of the bottom connection layer 07' can be at least one selected from Au, Zn, Be, Cr, Ni, Ti, Ag, and Pt.

[0118] like Figure 2 As shown, the center of the bottom contact layer 06' is vertically aligned with the center of the first type epitaxial layer 01. However, in another embodiment, the center of the bottom contact layer 06' is not vertically aligned with the center of the first type epitaxial layer 01.

[0119] In some embodiments, the method for manufacturing the aforementioned micro LED panel in the first embodiment includes the following steps:

[0120] Figures 3 to 10 The steps of a method for manufacturing a micro LED panel according to some embodiments (e.g., the first embodiment) are illustrated respectively.

[0121] Reference Figure 3Step 1 includes providing a semiconductor substrate 00 with an epitaxial structure.

[0122] Here, the epitaxial structure, from top to bottom, includes a first type epitaxial layer 01, a light-emitting layer 03, and a second type epitaxial layer 02. The semiconductor substrate 00' can be made of materials such as GaN or GaAs. The epitaxial structure is grown on the substrate 00'.

[0123] Reference Figure 4 Step 2 includes forming a bottom contact layer 06' and a bottom connection layer 07' sequentially on the top surface of the first type epitaxial layer 01.

[0124] Here, a bottom contact layer 06' and a bottom bonding layer 07' are deposited sequentially using a conventional physical vapor deposition method. The bottom bonding layer 07' also serves as a metal bonding layer for the subsequent metal bonding process in step 3.

[0125] Reference Figure 5 Step 3 includes bonding the bottom interconnect layer 07' to the IC backplane 00 by inverting the semiconductor substrate 00'. Then, the semiconductor substrate 00' is removed.

[0126] Here, the semiconductor substrate 00' with the epitaxial structure is first inverted. Then, the bottom interconnect layer 07' is bonded to the pads of the IC backplane 00. After the bonding process, the semiconductor substrate 00' is removed by a conventional removal process such as laser lift-off.

[0127] Reference Figure 6 Step 4 includes forming a photonic crystal structure array by etching a second type epitaxial layer 02.

[0128] Here, the upper layer 021 of the second type epitaxial layer 02 is etched using a plasma etching process, and etching stops on the lower layer 022 of the second type epitaxial layer 02 above the light-emitting layer 03. Therefore, the photonic crystal structure array is formed in the upper layer 021 above the light-emitting layer 03 and does not contact the light-emitting layer 03. The etching power is 200W to 800W, and the etching time is 50S to 300S.

[0129] Reference Figure 7 Step 5 includes forming a space to define a mesa structure by etching the photonic crystal structure array, the light-emitting layer 03, the first type epitaxial layer 01, the bottom contact layer 06' and the bottom connection layer 07' from top to bottom.

[0130] Here, refer to Figure 7The photonic crystal structure array is further etched using a conventional plasma etching process to define the mesa structure, forming spaces between adjacent mesa structures. The bottom contact layer 06' and the bottom connection layer 07' are further etched from top to bottom, so that the bottom of the space extends to the top of the IC backplane 00. Therefore, the bottom connection layer 06' and the bottom contact layer 07' are spatially isolated.

[0131] Reference Figure 8 Step 6 includes forming a dielectric layer 05 on the sidewall of the photonic crystal structure.

[0132] Here, a dielectric layer 05 is deposited on the sidewalls of the photonic crystal structure using a conventional chemical vapor deposition method. The dielectric layer 05 further fills the gaps between adjacent photonic crystal structures. Furthermore, the dielectric layer 05 is formed in the space between adjacent mesa structures. Preferably, the dielectric layer 05 fills this space. In another embodiment, the dielectric layer 05 is formed only on the sidewalls of each mesa structure, without filling the space.

[0133] Reference Figure 9 and Figure 10 Step 7 includes forming a top contact 09 and a top conductive layer 08 on the top of the dielectric layer 05 and the top of the mesa structure.

[0134] Here, refer to Figure 9 A top contact 09 is deposited on top of the second type epitaxial layer 02, wherein other areas are protected using a mask, and then the mask is removed. Next, refer to... Figure 10 A top conductive layer 08 is deposited on the second type epitaxial layer 02 using a conventional vapor deposition process. Here, the top conductive layer 08 is formed on top of the photonic crystal structure, on top of the dielectric layer 05, and covers the top contact 09. In another embodiment, the dielectric layer 05 is formed only on the sidewall of the mesa structure and does not fill the space, so the top conductive layer 08 is further formed in the space between adjacent mesa structures.

[0135] Second Embodiment

[0136] The micro-LED panel of the second embodiment includes a micro-LED array. Figure 11 This is a cross-sectional structural diagram of a micro LED panel according to some embodiments of the present disclosure (e.g., the second embodiment).

[0137] Reference Figure 11 The micro-LED structure in the micro-LED array includes a mesa structure and a photonic crystal structure array formed in the mesa structure. The differences between the first and second embodiments will be further described below.

[0138] In the second embodiment, the mesa structure further includes a first mesa structure (below the dashed line) and a second mesa structure (above the dashed line). The first mesa structure is formed at the bottom of the second mesa structure. Furthermore, the photonic crystal array is formed in the second structure above the light-emitting layer 03, but does not contact the light-emitting layer 03. Here, the light emission direction is from bottom to top.

[0139] In some embodiments, the second mesa structure is formed by at least a portion of the second type epitaxial layer 02 (in... Figure 11 Above the dashed line in the diagram, the first mesa structure is formed by another portion of the second type epitaxial layer 02, the light-emitting layer 03, and the first type epitaxial layer 01. Furthermore, the second type epitaxial layer 02 includes an upper layer 021 and a lower layer 022 located at the bottom of the upper layer 021. Therefore, the first mesa structure is formed by the lower layer 022, the light-emitting layer 03, and the second type epitaxial layer 02, while the second structure is formed by the upper layer 021. Additionally, here, the bottom width of the second mesa structure is greater than the top width of the first mesa structure.

[0140] Figure 12 This is a cross-sectional structural diagram of another micro LED panel according to some embodiments of the present disclosure (e.g., the second embodiment).

[0141] Here, refer to Figure 12 A regenerated layer 04 is formed on at least a portion of the sidewall of the platform structure. Preferably, the regenerated layer 04 is formed on at least a portion of the sidewall of the light-emitting layer 03. Furthermore, the regenerated layer 04 is formed on the sidewall of the first platform structure.

[0142] The regenerated layer 04 formed on the sidewall of the light-emitting layer 03 is not parallel to the horizontal direction of the light-emitting layer 03. Furthermore, the light-emitting layer 03 includes a top surface, an edge surface, and a bottom surface; and the regenerated layer 04 grows only on the edge surface of the light-emitting layer 03, and not on the top and bottom surfaces. Preferably, the tilt angle of the regenerated layer 04 on the sidewall of the light-emitting layer is 30 to 90 degrees relative to the horizontal direction of the light-emitting layer 03. That is, the regenerated layer 04 grows on the end face of the light-emitting layer 03, not on the top and bottom surfaces. Additionally, the light-emitting layer 03 includes multiple pairs of quantum wells; the regenerated layer 04 is not parallel to the surface of each of the multiple pairs of quantum wells. Here, the light-emitting layer 03 has a straight, unbent shape. Preferably, the diameter of the mesa structure is no greater than 3 μm. Furthermore, the bottom of the photonic crystal structure array is aligned with the bottom of the second mesa structure and with the top of the regenerated layer 04.

[0143] Here, the material of the regenerated layer 04 with intrinsically doped ions is the same as the material of the first type epitaxial layer 01 and / or the second type epitaxial layer 02, but without intentionally intriguing doped ions. For example, when the materials of the first type epitaxial layer 01 and the second type epitaxial layer 02 are the same, and the intentional ion doping levels of the materials of the first type epitaxial layer 01 and the second type epitaxial layer 02 are different, the material of the regenerated layer 04 can be the same as the materials of the underlying first type epitaxial layer 01 and the second type epitaxial layer 02, but without intentionally intriguing doped ions. In another example, when the materials of the first type epitaxial layer 01 and the second type epitaxial layer 02 are not the same, and the intentional ion doping levels of the materials of the first type epitaxial layer 01 and the second type epitaxial layer 02 are different, the material of the regenerated layer 04 can be the same as the material of the first type epitaxial layer 01 or the second type epitaxial layer 02, but without intentionally intriguing doped ions. The light-emitting layer is the active region of the PN junction formed by the first type epitaxial layer 01 and the second type epitaxial layer 02, and can be considered to be composed of two materials of the first type epitaxial layer 01 and the second type epitaxial layer 02. In some embodiments, the portion of the material of the regenerated layer covering the first type epitaxial layer 01 is the same as the underlying first type epitaxial layer 01, but without any intrinsically intentional doping of the first type epitaxial layer 01, and the portion of the material of the regenerated layer covering the second type epitaxial layer 02 is the same as the underlying second type epitaxial layer 02, but without any intrinsically intentional doping of the second type epitaxial layer 02. In some embodiments, the regenerated layer 04 may have some intrinsic doping level or no doping level. In some embodiments, the material growth parameters, such as ambient / gas pressure, power, and the material used for the regenerated process, are the same as or similar to the material growth parameters of the first type epitaxial layer 01 and / or the second type epitaxial layer 02. The material of the regenerated layer 04 must be lattice-matched with the light-emitting layer 03, the first type epitaxial layer 01, and / or the second type epitaxial layer 02. Preferably, the material of the regenerated layer 04 is a single crystal, the material of the first epitaxial layer 01 is a single crystal, and the material of the second epitaxial layer 02 is a single crystal. Furthermore, the material of the regenerated layer 04 is at least one of or any combination of GaAs, InGaAs, GaP, GaN, InGaN, AlGaN, AlInP, GaInP, AlGaInP, AlP, InP, AlN, and / or InN, preferably one or any combination of GaP, AlP, GaAs, InP, AlInP, GaInP, AlN, GaN, and / or InN. In another embodiment, the material of the regenerated layer 04 is not intentionally doped with ions and is different from the material of the first type of epitaxial layer or the material of the second type of epitaxial layer 02.

[0144] The resistance of the regenerated layer 04 is higher than that of the light-emitting layer 03, and the regenerated layer 04 is non-conductive, thereby ensuring the normal operation of the micro-LED structure and preventing carrier diffusion outside the light-emitting layer 03. Preferably, the band gap of the regenerated layer 04 is larger than that of the light-emitting layer 03. Furthermore, the thickness of the regenerated layer 04 is smaller than that of the light-emitting layer 03; preferably, the thickness of the regenerated layer 04 is no greater than 100 nm or 10 nm. In another embodiment, the thickness of the regenerated layer 04 is equal to or greater than the thickness of the light-emitting layer 03.

[0145] Figures 13 to 14 This is a cross-sectional structural diagram of a tabletop structure according to some embodiments of the present disclosure (e.g., the second embodiment).

[0146] In another embodiment, reference is made to Figure 13 The first mesa structure is formed from top to bottom by a light-emitting layer 03 and a first-type epitaxial layer 01, and the second mesa structure is formed by a second-type epitaxial layer 02. Therefore, a regenerated layer 04 is formed on the sidewalls of the first mesa structure (on the sidewalls of the light-emitting layer 03 and the first-type epitaxial layer 01). In some embodiments, reference is made to... Figure 14 The first mesa structure is formed by a portion of a first type epitaxial layer 01 and a light-emitting layer 03; and the second mesa structure is formed from top to bottom by a portion of the light-emitting layer 03 and a second type epitaxial layer 02. Therefore, the regenerated layer 04 is formed on the sidewall of the first mesa structure (on the sidewall of the first type epitaxial layer 01 and a portion of the sidewall of the light-emitting layer 03).

[0147] The micro-LED structure in the second embodiment also includes a top contact and a top conductive layer. Details of the top contact and the top conductive layer can be found in the first embodiment, which will not be repeated below.

[0148] In some embodiments, a bottom contact 06 is formed on the bottom surface of the first type epitaxial layer 02. The conductivity type of this bottom contact is the same as that of the first type epitaxial layer 01; for example, if the first type epitaxial layer 01 is P-type, the bottom contact 06 is also P-type. Furthermore, since light is emitted upwards or downwards from the mesa structure, the diameter of the bottom contact 06 is larger than the diameter of the top contact 09, while the diameter of the top contact 09 can be as small as possible, and the top contact 09 can also be as small as a point on the top surface of the second type epitaxial layer 02. In another embodiment, the diameter of the bottom contact 06 can also be equal to or smaller than the diameter of the top contact 09. A bottom connection structure 07 is formed at the bottom of the bottom contact 06. The bottom connection structure 07 is used to connect to a bottom electrode, such as a contact pad, in the IC backplane 00. Furthermore, the diameter of the bottom connection structure 07 is 20 nm to 1 μm. Preferably, the diameter of the bottom connection structure 07 is 800 nm to 1 μm. Furthermore, the center of the bottom contact 06 is vertically aligned with the center of the top contact 09. Additionally, the materials of the bottom contact 06 and the bottom connection structure 07 are transparent conductive materials, such as ITO or FTO. Alternatively, the materials of the bottom contact 06 and the bottom connection structure 07 may not be transparent. The materials of the bottom contact 06 and the bottom connection structure 07 may be conductive metals. Preferably, the material of the bottom contact 06 may be at least one selected from Au, Zn, Be, Cr, Ni, Ti, Ag, and Pt. The material of the bottom connection structure 07 may be at least one selected from Au, Zn, Be, Cr, Ni, Ti, Ag, and Pt.

[0149] In some embodiments, the center of the bottom contact 06 is vertically aligned with the center of the first type epitaxial layer 01. However, in another embodiment, the center of the bottom contact 06 is not vertically aligned with the center of the first type epitaxial layer 01.

[0150] In this second embodiment Figure 12 The aforementioned method for manufacturing a micro LED panel includes the following steps.

[0151] Figures 15 to 25 The steps of a method for manufacturing a micro LED panel according to some embodiments (e.g., the second embodiment) are illustrated respectively.

[0152] Reference Figure 15 Step 1 includes providing a semiconductor substrate 00' with an epitaxial structure.

[0153] Here, the epitaxial structure, from top to bottom, includes a first type epitaxial layer 01, a light-emitting layer 03, and a second type epitaxial layer 02. The semiconductor substrate 00' can be made of materials such as GaN or GaAs. The epitaxial structure is grown on the substrate 00'.

[0154] Reference Figure 16Step 2 includes forming a first mesa structure by patterning a first type epitaxial layer 01, a light-emitting layer 03, and a portion of a second type epitaxial layer 02.

[0155] Here, a first type epitaxial layer 01, a light-emitting layer 03, and a portion of a second type epitaxial layer 02 are etched from top to bottom using a conventional plasma etching process. The first mesa structure is formed by the first type epitaxial layer 01, the light-emitting layer 03, and a portion of the second type epitaxial layer 02.

[0156] Reference Figure 17 Step 3 includes forming a regeneration layer 04 on the sidewalls and top of the first mezzanine structure and on the exposed top of the second type epitaxial layer 02 between adjacent first mezzanine structures.

[0157] Here, in this regrowth process, the temperature is 400°C to 1000°C, and the regeneration time is 5 seconds to 1000 seconds. Here, the material used for the regrowth process is preferably the same as the material of the first type epitaxial layer and / or the material of the second type epitaxial layer, but without intentionally doped ions.

[0158] Reference Figures 18 to 20 Step 4 includes forming a bottom contact 06 in the regenerated layer 04, forming a first dielectric layer 051 on the regenerated layer 04, and forming an opening in the first dielectric layer 051 to expose the bottom contact 06.

[0159] Here, refer to Figure 18 First, an opening is formed in the regenerated layer 04 on top of the first type epitaxial layer 01. Then, a bottom contact 06 is formed in the opening on top of the first type epitaxial layer 01. (See reference...) Figure 19 Next, using conventional chemical vapor deposition, the first dielectric layer 051 is deposited on the regrowth layer 04. (Refer to...) Figure 20 Another opening is formed in the first dielectric layer 051 on top of the first type epitaxial layer 01 by plasma etching process to expose the bottom contact 06.

[0160] Reference Figure 21 Step 5 includes forming a bottom connection structure 07 in the opening.

[0161] Here, a conductive material is deposited into another opening using a physical vapor deposition process to form a bottom connection post. In this embodiment, the conductive material can be a conventional metal.

[0162] Reference Figure 22 Step 6 includes bonding the bottom connection structure 07 to the IC backplane 00 by inverting the semiconductor substrate 00'. Then, the semiconductor substrate 00' is removed.

[0163] Here, the semiconductor substrate 00' with the epitaxial structure is first inverted. Then, the bottom connection structure 07 is bonded to the pads of the IC backplane 00. After the bonding process, the semiconductor substrate 00' is removed by a conventional removal process such as laser lift-off.

[0164] Reference Figure 23 Step 7 includes forming a second mesa structure by etching a second type epitaxial layer 02 and forming a photonic crystal structure array. A space is formed between adjacent second mesa structures.

[0165] Here, a second type epitaxial layer 02 is etched using a plasma etching process to form a photonic crystal structure array and a second mesa structure. Spaces are formed between adjacent second mesa structures.

[0166] The bottom of the photonic crystal structure in the photonic crystal structure array is above the light-emitting layer 03 and does not contact the light-emitting layer 03. In some embodiments, the etching process is stopped until the regeneration layer 04 is etched, thereby aligning the bottom of the photonic crystal structure array with the bottom of the second mesa structure and the top of the regeneration layer 04. In step 7, preferably, the etching power is 200W to 800W, and the etching time is 50S to 300S.

[0167] In addition, the bottom width of the second structure is greater than the top width of the first platform structure.

[0168] More details about the photonic crystal structure and the regenerated layer can be found in the description of the micro-LED panel above, and will not be repeated here.

[0169] Reference Figure 24 Step 8 includes forming a second dielectric layer 052 on the sidewall of the photonic crystal structure.

[0170] Here, the second dielectric layer 052 is deposited on the sidewall of the photonic crystal structure. Furthermore, the second dielectric layer 052 is also formed on top of the regenerated layer 04 between adjacent second mesa structures. Preferably, the second dielectric layer 052 also fills the space between adjacent mesa structures.

[0171] Reference Figure 25 Step 9 includes forming a top contact 09 and a top conductive layer 08 on the top of the second dielectric layer 052 and the top of the second mesa structure.

[0172] Here, refer to Figure 25 A top contact 09 is deposited on top of the second type epitaxial layer 02, and other areas are protected using a photoresist mask, which is then removed. Next, a top conductive layer 08 is deposited on the second type epitaxial layer 02 using a conventional vapor deposition process.

[0173] In some embodiments, the countertop structure is formed by a first countertop structure and a second countertop structure. Figure 12 The dielectric layer 05 in the middle is composed of Figure 25 A first dielectric layer 051 and a second dielectric layer 052 are formed in the process. The materials of the first dielectric layer 051 and the second dielectric layer 052 may be the same or different from each other. Preferably, the material of the first dielectric layer 051 or the second dielectric layer 052 is selected from one or more of SiO2, SiNx, Al2O3, AlN, HfO2, TiO2 and / or ZrO2.

[0174] Third Embodiment

[0175] To address the problems in the related technologies, a miniature LED panel is provided in the embodiments of this disclosure.

[0176] Figure 26 This is a cross-sectional structural diagram of another micro LED panel according to some embodiments of the present disclosure (e.g., the third embodiment).

[0177] The micro-LED panel includes a micro-LED array. (See reference...) Figure 26 The micro-LED structure in the micro-LED array includes at least a mesa structure and a photonic crystal structure array. The mesa structure, from bottom to top, includes a first-type epitaxial layer 01, a light-emitting layer 03, and a second-type epitaxial layer 02. The photonic crystal structure array is formed within the mesa structure. Gaps exist between adjacent photonic crystal structures 00. Here, the second epitaxial layer 02 includes an upper layer 021 and a lower layer 022. Furthermore, the photonic crystal structure array is formed in the upper layer 021 above the light-emitting layer 03 as the light-emitting surface of the mesa structure. Additionally, to achieve high image quality, the width of the mesa structure is no greater than 3 μm.

[0178] Figure 27 It is based on some embodiments of this disclosure (e.g., the third embodiment). Figure 26 A top view of the platform structure.

[0179] In addition, refer to Figure 27 The photonic crystal structure array includes a central photonic crystal structure 2702. Other photonic crystal structures, such as 2704, are formed around the center of the photonic crystal structure. Furthermore, the diameter of the central photonic crystal structure 2702 is larger than the diameter of each of the other photonic crystal structures.

[0180] Furthermore, the photonic crystal structure 10 is a one-dimensional nanostructure. Multiple one-dimensional nanostructures are arranged in an array. The one-dimensional nanostructures are formed in the mesa structure along the light-emitting direction. Moreover, the one-dimensional nanostructure is formed perpendicular to the light-emitting layer 03. This one-dimensional nanostructure is similar to nanowires, nanorods, nanofibers, etc. Preferably, the diameter of the one-dimensional nanostructure is no greater than 1000 nm.

[0181] A dielectric layer 05 is filled in the gaps between adjacent photonic crystal structures. Furthermore, the dielectric layer 05 may be further formed on the sidewalls of the mesa structure. Preferably, the material of the dielectric layer 05 is selected from one or more of SiO2, SiNx, Al2O3, AlN, HfO2, TiO2, and / or ZrO2. The dielectric layer 05 in the gaps between adjacent photonic crystal structures is transparent and electrically insulating. Additionally, the dielectric layer 05 is also formed in the spaces between adjacent mesa structures, or even fills the spaces between adjacent mesa structures.

[0182] A top contact 09 is formed on the top of the mesa structure, and a top conductive layer 08 is formed on both the top contact 09 and the top of the mesa structure. Here, the top conductive layer 08 is continuously formed over the entire micro-LED structure array. Furthermore, when the top of the dielectric layer 05 is lower than the top of the photonic crystal structure, the top conductive layer 08 fills some gaps between adjacent photonic crystal structures; and the bottom of the top contact 09 fills some gaps between adjacent photonic crystal structures. Here, the light emission direction is from bottom to top, therefore the top conductive layer 08 is transparent. Moreover, the top contact 09 is formed only on the top of the central photonic crystal structure.

[0183] A bottom contact layer 06' is formed on the bottom surface of the first type epitaxial layer 02. The conductivity type of the bottom contact is the same as that of the first type epitaxial layer 01; for example, if the first type epitaxial layer 01 is P-type, the bottom contact layer 06' is also P-type. Furthermore, since light is emitted upwards or downwards from the mesa structure, the diameter of the bottom contact layer 06' is larger than the diameter of the top contact 09, while the diameter of the top contact 09 can be as small as possible, and the top contact 09 can also be as small as a point on the top surface of the second type epitaxial layer 02. In another embodiment, the diameter of the bottom contact layer 06' can also be equal to or smaller than the diameter of the top contact 09. A bottom connection layer 07' is formed at the bottom of the bottom contact layer 06'. The bottom connection layer 07' is used to connect to a bottom electrode, such as a contact pad, in an IC backplane 00. Furthermore, the diameter of the bottom connection layer 07' is from 20 nm to 1 μm. Preferably, the diameter of the bottom connection layer 07' is from 800 nm to 1 μm. Furthermore, the center of the bottom contact 06 is vertically aligned with the center of the top contact 09. Additionally, the materials of the bottom contact layer 06' and the bottom connection layer 07' are transparent conductive materials, such as ITO or FTO. Alternatively, the materials of the bottom contact layer 06' and the bottom connection layer 07' are not transparent. The materials of the bottom contact layer 06' and the bottom connection layer 07' can be conductive metals. Preferably, the material of the bottom contact layer 06' can be at least one selected from Au, Zn, Be, Cr, Ni, Ti, Ag, and Pt. The material of the bottom connection layer 07' can be at least one selected from Au, Zn, Be, Cr, Ni, Ti, Ag, and Pt.

[0184] In some embodiments, the center of the bottom contact layer 06' is vertically aligned with the center of the first type epitaxial layer 01. However, in another embodiment, the center of the bottom contact 06 is not vertically aligned with the center of the first type epitaxial layer 01.

[0185] The manufacturing method of the aforementioned micro-LED panel in the third embodiment includes the following steps:

[0186] Figures 28 to 37 The steps of a method for manufacturing a micro LED panel according to some embodiments (e.g., the third embodiment) are illustrated respectively.

[0187] Reference Figure 28 Step 1 includes providing a semiconductor substrate 00 with an epitaxial structure.

[0188] Here, the epitaxial structure, from top to bottom, includes a first type epitaxial layer 01, a light-emitting layer 03, and a second type epitaxial layer 02. The semiconductor substrate 00' can be made of materials such as GaN or GaAs. The epitaxial structure is grown on the substrate 00'.

[0189] Reference Figure 29 Step 2 includes forming a bottom contact layer 06' and a bottom connection layer 07' sequentially on the top surface of the first type epitaxial layer 01.

[0190] Here, the bottom contact layer and the bottom bonding layer 07' are deposited sequentially using a conventional physical vapor deposition method. The bottom bonding layer 07' also serves as a metal bonding layer for the subsequent metal bonding process in step 3.

[0191] Reference Figure 30 Step 3 includes bonding the bottom interconnect layer 07' to the IC backplane 00 by inverting the semiconductor substrate 00'. Then, the semiconductor substrate 00' is removed.

[0192] Here, the semiconductor substrate 00' with the epitaxial structure is first inverted. Then, the bottom interconnect layer 07' is bonded to the pads of the IC backplane 00. After the bonding process, the semiconductor substrate 00' is removed by a conventional removal process such as laser lift-off.

[0193] Reference Figure 31 Step 4 includes forming a top contact 09 on the top of the second type epitaxial layer 02.

[0194] Here, a top contact 09 is deposited on top of the second type epitaxial layer 02 using a conventional physical vapor deposition process, and other areas are protected using a mask. The mask is then removed using a conventional wet etching process.

[0195] Reference Figure 32Step 5 includes forming a photonic crystal structure array by etching a second type epitaxial layer 02.

[0196] Here, the upper layer 021 of the second type epitaxial layer 02 is etched by plasma etching process, and etching stops on the bottom layer 022 of the second type epitaxial layer 02 above the light-emitting layer 03. Therefore, the photonic crystal structure array is formed in the upper layer 021 above the light-emitting layer 03 and does not contact the light-emitting layer 03.

[0197] In the etching process of step 5, a central photonic crystal structure is formed below the unetched top contact. The diameter of the central photonic crystal structure is larger than the diameter of each of the other photonic crystal structures. Preferably, the etching power is 200W to 800W, and the etching time is 50S to 300S.

[0198] Reference Figure 33 and Figure 34 Step 6 includes forming a space to define a mesa structure by etching the photonic crystal structure array, the light-emitting layer 03, the first type epitaxial layer 01, the bottom contact layer 06' and the bottom connection layer 07' from top to bottom.

[0199] Here, refer to Figure 33 The photonic crystal structure array is further etched using a conventional plasma etching process to define the mesa structure; spaces are formed between adjacent mesa structures. (See reference...) Figure 34 The bottom contact layer 06' and the bottom connection layer 07' are further etched from top to bottom, so that the bottom of the space extends to the top of the IC backplane 00. Therefore, the bottom connection layer 06' and the bottom contact layer 07' are isolated by the space.

[0200] In some embodiments, refer to Figure 35 The sidewalls of the space are not perpendicular to the bottom surface of the table structure. Furthermore, because the materials of the bottom contact layer 06' and the bottom connecting layer 07' are different from the material of the table structure, the sidewalls of the bottom contact layer 06' and the bottom connecting layer 07' are inclined relative to the bottom surface of the table structure.

[0201] Reference Figure 36 Step 7 includes forming a dielectric layer 05 on the sidewall of the photonic crystal structure.

[0202] Here, a dielectric layer 05 is deposited on the sidewalls of the photonic crystal structure using a conventional chemical vapor deposition method. The dielectric layer 05 further fills the gaps between adjacent photonic crystal structures. Furthermore, the dielectric layer 05 is formed in the space between adjacent mesa structures. Preferably, the dielectric layer 05 fills this space. In another embodiment, the dielectric layer 05 is formed only on the sidewalls of each mesa structure, without filling the space.

[0203] Reference Figure 37Step 8 includes forming a top contact 09 and a top conductive layer 08 on the top of the dielectric layer 05 and the top of the mesa structure.

[0204] Here, refer to Figure 37 A top contact 09 is deposited on top of the second type epitaxial layer 02, with other areas protected by a mask, and then the mask is removed. A top conductive layer 08 is then deposited on the second type epitaxial layer 02 using a conventional vapor deposition process. Here, the top conductive layer 08 is formed on top of the photonic crystal structure, on top of the dielectric layer 05, and covers the top contact 09.

[0205] In another embodiment, reference is made to Figure 38 In step 7, dielectric layer 05 is formed only on the sidewall of the mesa structure and does not fill the space. Therefore, in step 8, referring to... Figure 39 The top conductive layer 08 is further formed in the space between adjacent mesa structures.

[0206] Fourth embodiment

[0207] The micro-LED panel of the fourth embodiment includes a micro-LED array. Figure 40 This is a cross-sectional structural diagram of a micro LED panel according to some embodiments of the present disclosure (e.g., the fourth embodiment).

[0208] Reference Figure 40 The micro-LED structure in the micro-LED array includes a mesa structure and a photonic crystal structure array formed in the mesa structure. The differences between the third and fourth embodiments will be further described below.

[0209] In the fourth embodiment, the mesa structure further includes a first mesa structure (below the dashed line) and a second mesa structure (above the dashed line). The first mesa structure is formed at the bottom of the second mesa structure. Furthermore, the photonic crystal array is formed in the second structure above the light-emitting layer 03, but does not contact the light-emitting layer 03. Here, the light emission direction is from bottom to top.

[0210] In some embodiments, the second mesa structure is formed by at least a portion of the second type epitaxial layer 02 (in... Figure 40 Above the dashed line in the diagram, the first mesa structure is formed by another portion of the second type epitaxial layer 02, the light-emitting layer 03, and the first type epitaxial layer 01. Furthermore, the second type epitaxial layer 02 includes an upper layer 021 and a lower layer 022 located at the bottom of the upper layer 021. Therefore, the first structure is formed by the lower layer 022, the light-emitting layer 03, and the second type epitaxial layer 02, while the second structure is formed by the upper layer 021. Additionally, here, the bottom width of the second mesa structure is greater than the top width of the first mesa structure. Furthermore, a photonic crystal structure array is formed in the upper layer 021 above the light-emitting layer 03 as the light-emitting surface of the mesa structure.

[0211] Here, refer to Figure 40 A regenerated layer 04 is formed on at least a portion of the sidewall of the platform structure. Preferably, the regenerated layer 04 is formed on at least a portion of the sidewall of the light-emitting layer 03. Furthermore, the regenerated layer 04 is formed on the sidewall of the first platform structure.

[0212] The regenerated layer 04 formed on the sidewall of the light-emitting layer 03 is not parallel to the extension direction of the light-emitting layer 03. Furthermore, the light-emitting layer 03 includes a top surface, an edge surface, and a bottom surface; and the regenerated layer 04 grows only on the edge surface of the light-emitting layer 03, and not on the top and bottom surfaces. Preferably, the tilt angle of the regenerated layer 04 on the sidewall of the light-emitting layer is 30 to 90 degrees relative to the horizontal direction of the light-emitting layer 03. That is, the regenerated layer 04 grows on the end face of the light-emitting layer 03, not on the top and bottom surfaces. Additionally, the light-emitting layer 03 includes multiple pairs of quantum wells; the regenerated layer 04 is not parallel to the surface of each of the multiple pairs of quantum wells. Here, the light-emitting layer 03 has a straight, unbent shape. Preferably, the diameter of the mesa structure is no greater than 3 μm. Furthermore, the bottom of the photonic crystal structure array is aligned with the bottom of the second mesa structure and with the top of the regenerated layer 04.

[0213] Here, the material of the regenerated layer 04 with intrinsically doped ions is the same as the material of the first type epitaxial layer 01 and / or the second type epitaxial layer 02, but without intentionally non-intrinsically doped ions. The material of the regenerated layer 04 must be lattice-matched with the light-emitting layer 03, the first type epitaxial layer 01, and / or the second type epitaxial layer 02. Preferably, the material of the regenerated layer 04 is a single crystal, the material of the first epitaxial layer 01 is a single crystal, and the material of the second epitaxial layer 02 is a single crystal. Furthermore, the material of the regenerated layer 04 is at least one of GaAs, InGaAs, GaP, GaN, InGaN, AlGaN, AlInP, GaInP, AlGaInP, AlP, InP, AlN, and / or InN, or any combination thereof, preferably one of GaP, AlP, GaAs, InP, AlInP, GaInP, AlN, GaN, and / or InN, or any combination thereof. In another embodiment, the material of the regenerated layer 04 is not intentionally doped with ions and is different from the material of the first type epitaxial layer or the material of the second type epitaxial layer 02.

[0214] The resistance of the regenerated layer 04 is higher than that of the light-emitting layer 03, and the regenerated layer 04 is non-conductive, thereby ensuring the normal operation of the micro-LED structure and preventing carrier diffusion outside the light-emitting layer 03. Preferably, the band gap of the regenerated layer 04 is larger than that of the light-emitting layer 03. Furthermore, the thickness of the regenerated layer 04 is smaller than that of the light-emitting layer 03; preferably, the thickness of the regenerated layer 04 is no greater than 100 nm or 10 nm. In another embodiment, the thickness of the regenerated layer 04 is equal to or greater than the thickness of the light-emitting layer 03.

[0215] In another embodiment, reference is made to Figure 13 The first mesa structure is formed from top to bottom by a light-emitting layer 03 and a first-type epitaxial layer 01, and the second mesa structure is formed by a second-type epitaxial layer 02. Therefore, a regenerated layer 04 is formed on the sidewalls of the first mesa structure (on the sidewalls of the light-emitting layer 03 and the first-type epitaxial layer 01). In some embodiments, reference is made to... Figure 14 The first structure is formed by a portion of a first type epitaxial layer 01 and a light-emitting layer 03; and the second structure is formed from top to bottom by a portion of the light-emitting layer 03 and a second type epitaxial layer 02. Therefore, the regenerated layer 04 is formed on the sidewall of the first mesa structure (on the sidewall of the first type epitaxial layer 01 and a portion of the sidewall of the light-emitting layer 03).

[0216] The micro-LED structure in the second embodiment also includes a top contact and a top conductive layer. Details of the top contact and the top conductive layer can be found in the first embodiment, and will not be repeated here.

[0217] In some embodiments, a bottom contact 06 is formed on the bottom surface of the first type epitaxial layer 02. The conductivity type of this bottom contact is the same as that of the first type epitaxial layer 01; for example, if the first type epitaxial layer 01 is P-type, the bottom contact 06 is also P-type. Furthermore, since light is emitted upwards or downwards from the mesa structure, the diameter of the bottom contact 06 is larger than the diameter of the top contact 09, while the diameter of the top contact 09 can be as small as possible, and the top contact 09 can also be as small as a point on the top surface of the second type epitaxial layer 02. In another embodiment, the diameter of the bottom contact 06 can also be equal to or smaller than the diameter of the top contact 09. A bottom connection structure 07 is formed at the bottom of the bottom contact 06. The bottom connection structure 07 is used to connect to a bottom electrode, such as a contact pad, in the IC backplane 00. Furthermore, the diameter of the bottom connection structure 07 is 20 nm to 1 μm. Preferably, the diameter of the bottom connection structure 07 is 800 nm to 1 μm. Furthermore, the center of the bottom contact 06 is vertically aligned with the center of the top contact 09. Additionally, the materials of the bottom contact 06 and the bottom connection structure 07 are transparent conductive materials, such as ITO or FTO. Alternatively, the materials of the bottom contact 06 and the bottom connection structure 07 may not be transparent. The materials of the bottom contact 06 and the bottom connection structure 07 may be conductive metals. Preferably, the material of the bottom contact 06 may be at least one selected from Au, Zn, Be, Cr, Ni, Ti, Ag, and Pt. The material of the bottom connection structure 07 may be at least one selected from Au, Zn, Be, Cr, Ni, Ti, Ag, and Pt.

[0218] In this fourth embodiment Figure 40 The aforementioned method for manufacturing a micro LED panel includes the following steps.

[0219] Figures 41 to 52 The steps of a method for manufacturing a micro LED panel according to some embodiments (e.g., the fourth embodiment) are illustrated respectively.

[0220] Reference Figure 41 Step 1 includes providing a semiconductor substrate 00' with an epitaxial structure.

[0221] Here, the epitaxial structure, from top to bottom, includes a first type epitaxial layer 01, a light-emitting layer 03, and a second type epitaxial layer 02. The semiconductor substrate 00' can be made of materials such as GaN or GaAs. The epitaxial structure is grown on the substrate 00'.

[0222] Reference Figure 42 Step 2 includes forming a first mesa structure by patterning a first type epitaxial layer 01, a light-emitting layer 03, and a portion of a second type epitaxial layer 02.

[0223] Here, a first type epitaxial layer 01, a light-emitting layer 03, and a portion of a second type epitaxial layer 02 are etched from top to bottom using a conventional plasma etching process. The first mesa structure is formed by the first type epitaxial layer 01, the light-emitting layer 03, and a portion of the second type epitaxial layer 02.

[0224] Reference Figure 43 Step 3 includes forming a regeneration layer 04 on the sidewalls and top of the first mezzanine structure and on the exposed top of the second type epitaxial layer 02 between adjacent first mezzanine structures.

[0225] Here, in this regrowth process, the temperature is 400°C to 1000°C, and the regeneration time is 5 seconds to 1000 seconds. Here, the material used for the regrowth process is preferably the same as the material of the first type epitaxial layer and / or the material of the second type epitaxial layer, but without intentionally doped ions.

[0226] Reference Figures 44 to 46 Step 4 includes forming a bottom contact 06 in the regenerated layer 04, forming a first dielectric layer 051 on the regenerated layer 04, and forming an opening in the first dielectric layer 051 to expose the bottom contact 06.

[0227] Here, refer to Figure 44 First, an opening is formed in the regenerated layer 04 on top of the first type epitaxial layer 01. Then, a bottom contact 06 is formed in the opening on top of the first type epitaxial layer 01. (See reference...) Figure 45 Next, using conventional chemical vapor deposition, the first dielectric layer 051 is deposited on the regrowth layer 04. (Refer to...) Figure 46 Then, another opening is formed in the first dielectric layer 051 on top of the first type epitaxial layer 01 by plasma etching process to expose the bottom contact 06.

[0228] Reference Figure 47 Step 5 includes forming a bottom connection structure 07 in the opening.

[0229] Here, a conductive material is deposited into another opening using a physical vapor deposition process to form a bottom connection post. In this embodiment, the conductive material can be a conventional metal.

[0230] Reference Figure 48 Step 6 includes bonding the bottom connection structure 07 to the IC backplane 00 by inverting the semiconductor substrate 00'. Then, the semiconductor substrate 00' is removed.

[0231] Here, the semiconductor substrate 00' with the epitaxial structure is first inverted. Then, the bottom connection structure 07 is bonded to the pads of the IC backplane 00. After the bonding process, the semiconductor substrate 00' is removed by a conventional removal process such as laser lift-off.

[0232] Reference Figure 49 Step 7 includes forming a top contact 09 on the top of the second type epitaxial layer 02.

[0233] Here, a top contact 09 is deposited on top of the second type epitaxial layer 02 using a conventional physical vapor deposition method, and other areas are protected with a mask; then the mask is removed using a conventional wet etching method.

[0234] Reference Figure 50 Step 8 includes forming a second mesa structure by etching a second type epitaxial layer 02 and forming a photonic crystal structure array. A space is formed between adjacent second mesa structures.

[0235] Here, a second type epitaxial layer 02 is etched using a plasma etching process to form a photonic crystal structure array and a second mesa structure. Spaces are formed between adjacent second mesa structures.

[0236] In the etching process of step 5, a central photonic crystal structure is formed below the unetched top contact. The diameter of the central photonic crystal structure is larger than the diameter of each of the other photonic crystal structures.

[0237] In some embodiments, the bottom of the photonic crystal structure in the photonic crystal structure array is above the light-emitting layer 03 and does not contact the light-emitting layer 03. In some embodiments, the etching process is stopped until the regeneration layer 04 is etched, thereby aligning the bottom of the photonic crystal structure array with the bottom of the second mesa structure and with the top of the regeneration layer 04. In step 7, preferably, the etching power is 200W to 800W, and the etching time is 50S to 300S.

[0238] In addition, the bottom width of the second structure is greater than the top width of the first structure.

[0239] More details about the photonic crystal structure and the regenerated layer can be found in the description of the micro-LED panel above, and will not be repeated here.

[0240] Reference Figure 51 Step 9 includes forming a second dielectric layer 052 on the sidewall of the photonic crystal structure.

[0241] Here, the second dielectric layer 052 is deposited on the sidewall of the photonic crystal structure. Furthermore, the second dielectric layer 052 is also formed on top of the regenerated layer 04 between adjacent second mesa structures. Preferably, the second dielectric layer 052 also fills the space between adjacent mesa structures.

[0242] Reference Figure 52 Step 10 includes forming a top conductive layer 08 on the top of the second dielectric layer 052 and the top of the second mesa structure.

[0243] Here, a top conductive layer 08 is deposited on the second type epitaxial layer 02 and on top of the second dielectric layer 052 using a conventional vapor deposition process, and the top conductive layer 08 covers the top contact 09.

[0244] In some embodiments, the countertop structure is formed by a first countertop structure and a second countertop structure. Figure 52 The dielectric layer 05 in the middle is also made of the same Figure 25 The diagram shows the formation of a first dielectric layer 051 and a second dielectric layer 052. The materials of the first dielectric layer 051 and the second dielectric layer 052 may be the same or different from each other. Preferably, the material of the first dielectric layer 051 is selected from one or more of SiO2, SiNx, Al2O3, AlN, HfO2, TiO2 and / or ZrO2.

[0245] Those skilled in the art should understand that microdisplay panels are not limited to the above-described structure and may include more or fewer components than those illustrated, or may combine some components, or may use different components.

[0246] Those skilled in the art will understand that all or part of the steps used to implement the foregoing embodiments can be implemented by hardware, or by a program that instructs the relevant hardware. This program can be stored in flash memory, conventional computer equipment, a central processing module, a control module, etc.

[0247] The above description is merely an embodiment of this disclosure, and this disclosure is not limited thereto. Modifications, equivalent substitutions, and improvements made without departing from the concepts and principles of this disclosure will fall within the protection scope of this disclosure.

[0248] Other embodiments also include, for example, including, Figures 1 to 52 The embodiments shown are subsets of the above embodiments combined or rearranged in various other embodiments.

[0249] While the detailed description contains many details, these should not be construed as limiting the scope of the invention, but merely as illustrating different examples and aspects of the invention. It should be understood that the scope of the invention includes other embodiments not discussed in detail above. For example, the methods described above can be applied to the integration of non-LED and OLED functional devices with control circuitry that is not pixel driver. Examples of non-LED devices include vertical-cavity surface-emitting lasers (VCSELs), photodetectors, microelectromechanical systems (MEMS), silicon photonic devices, power electronic devices, and distributed feedback lasers (DFBs). Examples of other control circuitry include current drivers, voltage drivers, transimpedance amplifiers, and logic circuits.

[0250] The foregoing description of the disclosed embodiments is provided to enable making or using the embodiments and variations thereof described herein. Various modifications to these embodiments will be apparent to those skilled in the art, and the general principles defined herein can be applied to other embodiments without departing from the spirit or scope of the subject matter disclosed herein. Therefore, this disclosure is not intended to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the following claims and the principles and novel features disclosed herein.

[0251] The features of this invention can be implemented using a computer program product or with the aid of a computer program product, such as a storage medium (of various media) or a computer-readable storage medium (of various media), wherein instructions are stored thereon or thereon, which can be used to program a processing system to perform any of the features presented herein. The storage medium may include, but is not limited to, high-speed random access memory, such as DRAM, SRAM, DDRRAM, or other random access solid-state memory devices, and may include non-volatile memory, such as one or more disk storage devices, optical disk storage devices, flash memory devices, or other non-volatile solid-state memory devices. The memory may optionally include one or more storage devices located remotely from the CPU. The non-volatile memory devices within the memory or optionally the memory include non-transitory computer-readable storage media.

[0252] Features of the invention, stored on any machine-readable medium (of various kinds), can be contained in software and / or firmware for controlling the hardware of a processing system and enabling the processing system to interact with other entities using the results of the invention. Such software or firmware may include, but is not limited to, application code, device drivers, operating systems, and execution environments / containers.

[0253] It should be understood that although the terms “first,” “second,” etc., may be used in this document to describe various elements or steps, these elements or steps should not be limited by these terms. These terms are only used to distinguish one element or step from another.

[0254] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the claims. As used in the description of the embodiments and the appended claims, the singular forms “a,” “an,” and “this” are intended to include multiple forms as well, unless the context clearly indicates otherwise. It should also be understood that the term “and / or” as used herein refers to and includes any and all possible combinations of one or more of the associated listed items. It should also be understood that the terms “comprising” and / or “including”, when used in this specification, specify the presence of said features, integers, steps, operations, elements, and / or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups.

[0255] As used herein, the term "if" can be interpreted as meaning, depending on the context, that the prerequisite of a statement is true "in the case of," "when," or "in response to detection." Similarly, the phrases "if it is determined that [the prerequisite of that statement is true]," "if [the prerequisite of the statement is true]," or "when [the prerequisite of the statement is true]" can be interpreted as meaning, depending on the context, that the stated prerequisite is true "when determined," "in response to determined," "according to determined," "when detected," or "in response to detection."

[0256] The foregoing description, used for illustration, has been described with reference to specific embodiments. However, the foregoing illustrative discussion is not intended to be exhaustive or to limit the claims to the precise forms disclosed. Many modifications and variations can be made in light of the foregoing teachings. The embodiments were chosen and described in order to best explain the principles of practical application and operation, thereby enabling others skilled in the art to best utilize the invention and its various embodiments.

Claims

1. A micro LED panel comprising a micro LED array, comprising: at least one micro LED structure, wherein the micro LED structure comprises: a mesa structure, wherein the mesa structure comprises, from bottom to top, a first type of epitaxial layer, a light emitting layer, and a second type of epitaxial layer, wherein the mesa structure further comprises a first mesa structure and a second mesa structure; the first mesa structure is formed at the bottom of the second mesa structure; and wherein the first mesa structure is formed by the first type of epitaxial layer and a portion of the light emitting layer; and the second mesa structure is formed, from bottom to top, by a portion of the light emitting layer and the second type of epitaxial layer; and a photonic crystal structure array comprising a plurality of photonic crystal structures, formed in the mesa structure, wherein there is a gap between adjacent photonic crystal structures within the photonic crystal structure array. 2.The micro LED panel of claim 1, wherein the photonic crystal structure array is formed above the light emitting layer, as a light emitting surface of the mesa structure. 3.The micro LED panel of claim 2, wherein the photonic crystal array is formed in the second mesa structure and is not in contact with the light emitting layer. 4.The micro LED panel of claim 2, wherein the bottom of the photonic crystal structure array is aligned with the bottom of the second mesa structure and with the top of a regrowth layer. 5.The micro LED panel of claim 3, wherein the second mesa structure is formed by at least a portion of the second type of epitaxial layer. 6.The micro LED panel of claim 3, wherein the first mesa structure is formed, from top to bottom, by the light emitting layer and the first type of epitaxial layer. 7.The micro LED panel of claim 5, wherein the second type of epitaxial layer comprises an upper layer and a bottom layer at the bottom of the upper layer; the first mesa structure is formed by the bottom layer, the light emitting layer, and the second type of epitaxial layer; and the second mesa structure is formed by the upper layer. 8.The micro LED panel of claim 3, wherein the bottom width of the second mesa structure is greater than the top width of the first mesa structure. 9.The micro LED panel of claim 1, wherein the photonic crystal structure is a one-dimensional nanostructure. 10.The micro LED panel of claim 9, wherein a plurality of the one-dimensional nanostructures are distributed in the photonic crystal structure array. 11.The micro LED panel of claim 9, wherein the one-dimensional nanostructure is formed above the light emitting layer in the mesa structure and along the light emitting direction of the mesa structure. 12.The micro LED panel of claim 9, wherein the diameter of the one-dimensional nanostructure is no greater than 1000 nm. 13.The micro LED panel of claim 9, wherein the one-dimensional nanostructure is formed perpendicular to the light emitting layer. 14.The micro LED panel of claim 1, wherein the gap is filled with a dielectric layer.

15. The micro-LED panel of claim 14, wherein the dielectric layer is also formed on sidewalls of the mesa structure.

16. The micro-LED panel of claim 14, wherein the dielectric layer is transparent and electrically insulating.

17. The micro-LED panel of claim 1, wherein a width of the mesa structure is no more than 3 pm.

18. The micro-LED panel of claim 1, wherein the light emitting layer comprises several stacked pairs of quantum wells.

19. The micro-LED panel of claim 1, wherein the light emitting layer has a straight shape without any bending.

20. The micro-LED panel of claim 1, wherein a material of the first epitaxial layer is single crystalline and a material of the second epitaxial layer is single crystalline.

21. The micro-LED panel of claim 3, wherein the micro-LED structure further comprises a regrowth layer formed on at least a portion of sidewalls of the mesa structure.

22. The micro-LED panel of claim 21, wherein the regrowth layer is formed on sidewalls of the light emitting layer.

23. The micro-LED panel of claim 21, wherein the regrowth layer is formed on sidewalls of the first mesa structure.

24. The micro-LED panel of claim 21, wherein a material of the regrowth layer with intrinsic dopant ions is the same as a material of the first type epitaxial layer and / or a material of the second type epitaxial layer, but without intentional dopant ions.

25. The micro-LED panel of claim 21, wherein the material of the regrowth layer is one or more of GaP, AlP, GaAs, InP, AlInP, GaInP, AIN, GaN, and / or InN.

26. The micro-LED panel of claim 21, wherein the material of the regrowth layer is single crystalline.

27. The micro-LED panel of claim 21, wherein a bandgap of the regrowth layer is greater than a bandgap of the light emitting layer.

28. The micro-LED panel of claim 21, wherein a thickness of the regrowth layer is less than a thickness of the light emitting layer.

29. The micro-LED panel of claim 28, wherein the thickness of the regrowth layer is no more than 100 nm.

30. The micro-LED panel of claim 21, wherein an electrical resistance of the regrowth layer is higher than an electrical resistance of the light emitting layer.

31. The micro-LED panel of claim 30, wherein the regrowth layer is electrically non-conductive.

32. The micro-LED panel of claim 1, wherein a top contact is formed on top of the mesa structure; and a top conductive layer is formed on top of the top contact and the mesa structure.

33. The micro-LED panel of claim 32, wherein the top conductive layer fills part of the gap; and a bottom of the top contact fills part of the gap.

34. The micro-LED panel of claim 32, wherein the top conductive layer is transparent.

35. The micro-LED panel of claim 14, wherein the dielectric layer is formed between adjacent mesa structures.

36. A method for fabricating a micro-LED panel, comprising: Step 1, providing a semiconductor substrate with an epitaxial structure; Step 2, sequentially forming a bottom contact layer and a bottom connection layer on a top surface of a first type epitaxial layer; Step 3, bonding the bottom connection layer with an IC backplane by inverting the semiconductor substrate; then, removing the semiconductor substrate; Step 4, forming a photonic crystal structure array comprising a plurality of photonic crystal structures by etching a second type epitaxial layer; Step 5, forming an isolation space to define a mesa structure by etching down the photonic crystal structure array, a light emitting layer, the first type epitaxial layer, the bottom contact layer, and the bottom connection layer; Step 6, forming a dielectric layer on sidewalls of the photonic crystal structure; and Step 7, forming a top contact and a top conductive layer on top of the dielectric layer and on top of the mesa structure; wherein the mesa structure further comprises a first mesa structure and a second mesa structure; the first mesa structure is formed at a bottom of the second mesa structure; and wherein the first mesa structure is formed from the first type epitaxial layer and a portion of the light emitting layer; and, the second mesa structure is formed from a portion of the light emitting layer and the second type epitaxial layer from bottom to top.

37. The method of claim 36, wherein in Step 4, a power for etching is 200W to 800W, a time for etching is 50S to 300S; and a bottom of the photonic crystal structure in the photonic crystal structure array is above the light emitting layer and does not contact the light emitting layer.

38. The method of claim 36, wherein in Step 6, the dielectric layer is further formed on top of a regrowth layer between adjacent second mesa structures, and further completely fills the isolation space.

39. The method of claim 36, wherein in Step 4, the photonic crystal structure is a one-dimensional nanostructure; and the one-dimensional nanostructure is formed above the light emitting layer in the second mesa structure and along a light emitting direction of the mesa structure; and, the one-dimensional nanostructure is formed perpendicular to the light emitting layer.

40. The method of claim 39, wherein a diameter of the one-dimensional nanostructure is no more than 1000nm.

41. The method of claim 36, wherein in Step 5, a width of the mesa structure is no more than 3pm.

42. A method for fabricating a micro-LED panel, comprising: Step 1, providing a semiconductor substrate with an epitaxial structure; Step 2, forming a first mesa structure by patterning down a first type epitaxial layer, a light emitting layer, and a portion of a second type epitaxial layer; Step 3, forming a regrowth layer on sidewalls and a top of the first mesa structure, and on an exposed top of the second type epitaxial layer between adjacent first mesa structures; Step 4, forming a bottom contact in the regrowth layer, forming a dielectric layer on the regrowth layer, and forming an opening in the dielectric layer to expose the bottom contact; Step 5, forming a bottom connection structure in the opening; Step 6, bonding the bottom connection structure with an IC backplane by inverting the semiconductor substrate; then, removing the semiconductor substrate; Step 7, forming a second mesa structure by etching the second type epitaxial layer and forming a photonic crystal structure array comprising a plurality of photonic crystal structures, wherein an isolation space is formed between adjacent second mesa structures; Step 8, forming a second dielectric layer on the sidewall of the photonic crystal structure; and Step 9, forming a top contact and a top conductive layer on top of the dielectric layer and on top of the second mesa structure, wherein a mesa structure is formed by the first mesa structure and the second mesa structure. The second epitaxial layer is etched and stopped at the top of the regrowth layer; the bottom of the photonic crystal structure in the photonic crystal structure array is above the light emitting layer and does not contact the light emitting layer; and the bottom of the photonic crystal structure array is aligned with the bottom of the second mesa structure and aligned with the top of the regrowth layer, wherein the etching power is 200W to 800W and the etching time is 50S to 300S.

43. The method of claim 42, wherein in step 7, further comprising:

44. The method of claim 42, wherein in step 8, the second dielectric layer is further formed on top of the regrowth layer between the adjacent second mesa structures and further completely fills the isolation space.

45. The method of claim 42, wherein in step 7, the bottom width of the second mesa structure is greater than the top width of the first mesa structure.

46. The method of claim 42, wherein in step 7, the photonic crystal structure is a one-dimensional nanostructure; and the one-dimensional nanostructure is formed above the light emitting layer in the second mesa structure and along the light emitting direction of the mesa structure; and the one-dimensional nanostructure is formed perpendicular to the light emitting layer.

47. The method of claim 46, wherein the diameter of the one-dimensional nanostructure is no greater than 1000nm.

48. The method of claim 42, wherein in step 7, the width of the second mesa structure is no greater than 3pm.

49. The method of claim 42, wherein the material of the regrowth layer with intrinsic doping ions is the same as the material of the first type epitaxial layer and / or the material of the second type epitaxial layer, but without intentional doping ions; and the material of the regrowth layer is single crystal.

50. The method of claim 49, wherein the material of the regrowth layer is one or more of GaP, AlP, GaAs, InP, AlInP, GaInP, AlN, GaN, and / or InN. ​ 51. The method of claim 42, wherein the regrowth layer has a bandgap greater than a bandgap of the light emitting layer; the regrowth layer has a thickness less than a thickness of the light emitting layer; and the regrowth layer has a higher electrical resistance than the light emitting layer.

Images