Image sensor and method for manufacturing the same
By using semiconductor fill structures and deep trench isolation structures to form light emitting diodes in image sensors, the problem of ion implantation damages the film layer is solved, signal conversion efficiency is improved and the risk of signal crosstalk and dark current is reduced.
Patent Information
- Application Number
- CN202411179398.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2024-08-27
- Publication Date
- 2024-12-27
- Estimated Expiration
- 2044-08-27
AI Technical Summary
In the prior art, when ion implantation is used to form a photodiode, other film layers are easily damaged, resulting in crosstalk and dark current problems.
A semiconductor fill structure is used to penetrate the second semiconductor layer and the first semiconductor layer in sequence, and a light emitting diode is formed through a deep trench isolation structure, avoiding film layer damage during ion implantation and reducing the probability of signal crosstalk.
It effectively reduces the occurrence of signal crosstalk in the image sensor, improves the conversion efficiency of the photoelectric induction region, and avoids the occurrence of dark currents.
Smart Images
Figure CN118712205B_ABST
Abstract
Description
Technical Field
[0001] The present disclosure relates to the technical field of integrated circuits, and in particular to an image sensor and a method for preparing the same. Background Art
[0002] An image sensor is a device that converts optical images into electronic signals. Image sensors use the photoelectric conversion function of photoelectric devices to convert received light into electrical signals that are proportional to the light image through photosensitive elements such as photodiodes.
[0003] Among many image sensors, back side illumination (BSI) image sensors are widely used. BSI image sensors change the position of the photodiode, allowing light to enter the photodiode first, thereby increasing the light sensitivity and improving the working efficiency of the image sensor.
[0004] In the related art, photodiodes are usually formed by ion implantation (or ion injection). However, other film layers may be damaged during the ion implantation process, causing signal crosstalk and other effects on the image sensor. Summary of the invention
[0005] Based on this, it is necessary to provide an image sensor and a method for manufacturing the same in order to solve the problem of damaging other film layers in the process of forming a photodiode using an ion implantation method in the prior art.
[0006] In order to achieve the above object, on the one hand, an image sensor is provided, comprising:
[0007] A substrate having a plurality of shallow trench isolation structures;
[0008] A first semiconductor layer, located on one side of the substrate, the first semiconductor layer having a first conductivity type;
[0009] A second semiconductor layer, located on a side of the first semiconductor layer away from the substrate, the second semiconductor layer having a second conductivity type;
[0010] a semiconductor filling structure, which sequentially penetrates the second semiconductor layer and the first semiconductor layer along the thickness direction of the image sensor and extends to the substrate, wherein the semiconductor filling structure has a second conductivity type;
[0011] A deep trench isolation structure sequentially penetrates the second semiconductor layer and the first semiconductor layer along a thickness direction of the image sensor and extends to the shallow trench isolation structure.
[0012] In one embodiment, the material of the first semiconductor layer includes boron, and the materials of the second semiconductor layer and the semiconductor filling structure include phosphorus and / or arsenic.
[0013] In one embodiment, a plurality of semiconductor filling structures are arranged between adjacent deep trench isolation structures.
[0014] In one embodiment, the image sensor comprises:
[0015] The filter layer includes a plurality of filter elements, wherein the filter elements cover the second semiconductor layer and the semiconductor filling structure between adjacent deep trench isolation structures.
[0016] In one embodiment, the image sensor comprises:
[0017] The light-blocking structure is arranged in one-to-one correspondence with the deep trench isolation structure, and the filter element is located between adjacent light-blocking structures.
[0018] In one aspect, a method for preparing an image sensor is provided, comprising the following steps:
[0019] Providing a substrate, wherein the substrate has a plurality of shallow trench isolation structures;
[0020] forming a first semiconductor layer on the substrate and the shallow trench isolation structure, wherein the first semiconductor layer has a first conductivity type;
[0021] forming a second semiconductor layer on the first semiconductor layer, wherein the second semiconductor layer has a second conductivity type;
[0022] A semiconductor filling structure and a deep trench isolation structure are formed which sequentially penetrate the second semiconductor layer and the first semiconductor layer. The semiconductor filling structure has a second conductivity type. The deep trench isolation structure extends from the upper surface of the second semiconductor layer to the shallow trench isolation structure. The semiconductor filling structure extends from the upper surface of the second semiconductor layer to the substrate.
[0023] In one embodiment, the forming of the semiconductor filling structure and the deep trench isolation structure sequentially penetrating the second semiconductor layer and the first semiconductor layer includes:
[0024] Etching the second semiconductor layer and the first semiconductor layer to form a plurality of first trenches penetrating the second semiconductor layer and the first semiconductor layer;
[0025] forming the deep trench isolation structure in the first trench;
[0026] Etching the second semiconductor layer and the first semiconductor layer after the deep trench isolation structure is formed to form a plurality of second trenches penetrating the second semiconductor layer and the first semiconductor layer;
[0027] The semiconductor filling structure is formed in the plurality of second trenches.
[0028] In one embodiment, the forming of the semiconductor filling structure and the deep trench isolation structure sequentially penetrating the second semiconductor layer and the first semiconductor layer includes:
[0029] Etching the second semiconductor layer and the first semiconductor layer to simultaneously form a plurality of first trenches and a plurality of second trenches penetrating the second semiconductor layer and the first semiconductor layer;
[0030] forming a photoresist layer in the second trench and on the upper surface of the second semiconductor layer;
[0031] forming a deep trench isolation material layer in the first trench and on the upper surface of the photoresist layer;
[0032] Removing the photoresist layer and the deep trench isolation material layer located on the upper surface of the photoresist layer, and the remaining deep trench isolation material layer forms a deep trench isolation structure;
[0033] The semiconductor filling structure is formed in the second trench.
[0034] In one embodiment, the material of the first semiconductor layer includes boron, and the materials of the second semiconductor layer and the semiconductor filling structure include silicon phosphide and silicon arsenide, respectively.
[0035] In one embodiment, providing a substrate comprises:
[0036] Providing an initial semiconductor substrate, the initial semiconductor substrate comprising a first surface and a second surface disposed opposite to each other;
[0037] forming the shallow trench isolation structure close to the second surface in the initial semiconductor substrate;
[0038] implanting functional ions into the initial semiconductor substrate from the first surface to form an oxygen-containing layer, wherein the oxygen-containing layer is located on a side of the shallow trench isolation structure close to the first surface;
[0039] thermally treating the initial semiconductor substrate so that the oxygen-containing layer forms the first semiconductor layer;
[0040] A portion of the initial semiconductor substrate is removed from the first surface to expose the first semiconductor layer to form the base.
[0041] The image sensor and the preparation method thereof of the present specification have the following beneficial effects: by setting a semiconductor filling structure to penetrate the second semiconductor layer and the first semiconductor layer in sequence, and the first semiconductor layer has a first conductivity type, and the second semiconductor layer and the second semiconductor layer have a second conductivity type, a light-emitting diode is formed in the photoelectric sensing area. Since the image sensor and the preparation method thereof of the present specification do not use ion implantation to form a photodiode, the possibility of causing damage to other film layers when forming a light-emitting diode can be reduced, and the probability of signal crosstalk in the image sensor can also be reduced, and dark current can be avoided. BRIEF DESCRIPTION OF THE DRAWINGS
[0042] In order to more clearly illustrate the technical solutions in the embodiments of the present disclosure or the conventional technology, the drawings required for use in the embodiments or the conventional technology descriptions will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present disclosure, and for ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.
[0043] Figure 1 is a flow chart of a method for preparing an image sensor provided in an embodiment;
[0044] Figure 2a A schematic diagram of an initial semiconductor substrate provided in an embodiment;
[0045] Figure 2b A schematic diagram of an initial semiconductor substrate provided in another embodiment;
[0046] Figure 3 is a schematic diagram of a substrate provided in an embodiment;
[0047] Figure 4 is a schematic diagram of a first groove provided in an embodiment;
[0048] Figure 5 A schematic diagram of a deep trench isolation structure provided in an embodiment;
[0049] Figure 6 is a schematic diagram of a second groove provided in an embodiment;
[0050] Figure 7 A schematic diagram of a second semiconductor layer and a semiconductor filling structure provided in an embodiment;
[0051] Figure 8 A schematic diagram of a light-blocking structure preparation process provided in an embodiment;
[0052] Fig. 9 is a schematic diagram of a light-blocking structure provided in an embodiment;
[0053] Fig.10 is a schematic diagram of a filter layer provided in an embodiment;
[0054] Fig.11 A schematic diagram of a first groove and a second groove provided in an embodiment;
[0055] Fig.12 is a schematic diagram of a photoresist provided in an embodiment;
[0056] Fig.13 It is a schematic diagram of related technology provided in an embodiment.
[0057] Explanation of the accompanying drawings: photodiode-10; image sensor-100; substrate-110; shallow trench isolation structure-111; semiconductor substrate-112; initial semiconductor substrate-1120; polysilicon layer-113; dielectric layer-114; first semiconductor layer-120; oxygen-containing layer 1200; second semiconductor layer-130; semiconductor filling structure-140; deep trench isolation structure-150; photoelectric sensing area-160; filter layer-170; light blocking structure-171; tantalum oxide layer-1711; aluminum layer-1712; titanium nitride layer-1713; photoresist layer-180; first trench-200; second trench-210.
[0058] In order to better describe and illustrate the embodiments and / or examples of the inventions disclosed herein, reference may be made to one or more drawings. The additional details or examples used to describe the drawings should not be considered as limiting the scope of any of the disclosed inventions, the embodiments and / or examples currently described, and the best modes of these inventions currently understood. DETAILED DESCRIPTION
[0059] In order to facilitate understanding of the present disclosure, the present disclosure will be described more fully below with reference to the relevant drawings. The preferred embodiments of the present disclosure are shown in the drawings. However, the present disclosure can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, the purpose of providing these embodiments is to make the disclosure of the present disclosure more thorough and comprehensive.
[0060] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art to which the present disclosure belongs. The terms used herein in the specification of the present disclosure are only for the purpose of describing specific embodiments and are not intended to limit the present disclosure.
[0061] In each embodiment, unless otherwise clearly specified and limited, the terms "installed", "connected", "connected", "fixed" and the like should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements, unless otherwise clearly defined. For ordinary technicians in this field, the specific meanings of the above terms in each embodiment can be understood according to the specific situation.
[0062] It should be understood that when an element or layer is referred to as "on ...", "adjacent to ...", "connected to" other elements or layers, it can be directly on, adjacent to, connected to or coupled to other elements or layers, or there can be intervening elements or layers. On the contrary, when an element is referred to as "directly on ...", "directly adjacent to ...", "directly connected to" other elements or layers, there are no intervening elements or layers. It should be understood that although the terms first, second, third, etc. can be used to describe various elements, components, regions, layers and / or parts, these elements, components, regions, layers and / or parts should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or part from another element, component, region, layer or part. Therefore, without departing from the teaching of the present embodiment, the first element, component, region, layer or part discussed below can be represented as a second element, component, region, layer or part.
[0063] Spatial relationship terms such as "under", "below", "below", "under", "above", "above", etc., may be used herein to describe the relationship between an element or feature shown in the figures and other elements or features. It should be understood that in addition to the orientations shown in the figures, spatial relationship terms also include different orientations of the device in use and operation. For example, if the device in the accompanying drawings is turned over, the element or feature described as "under other elements" or "under it" or "under it" will be oriented as "on" other elements or features. Therefore, the exemplary terms "under" and "under" may include both upper and lower orientations. In addition, the device may also include additional orientations (e.g., rotated 90 degrees or other orientations), and the spatial descriptors used herein are interpreted accordingly.
[0064] When used herein, the singular forms "a", "an", and "said / the" may also include plural forms, unless the context clearly indicates otherwise. It should also be understood that when the terms "consisting of" and / or "comprising" are used in this specification, the presence of the features, integers, steps, operations, elements and / or parts can be determined, but the presence or addition of one or more other features, integers, steps, operations, elements, parts and / or groups is not excluded. At the same time, when used herein, the term "and / or" includes any and all combinations of the relevant listed items.
[0065] Embodiments of the embodiments are described herein with reference to cross-sectional illustrations that are schematic representations of idealized embodiments (and intermediate structures) of the present specification, and variations from the illustrated shapes due to, for example, manufacturing techniques and / or tolerances are anticipated. Thus, embodiments of the present embodiments should not be limited to the particular shapes of the regions illustrated herein, but are to include deviations in shapes due to, for example, manufacturing techniques. The regions shown in the figures are schematic in nature, and their shapes do not represent the actual shapes of the regions of the device and do not limit the scope of the present embodiments.
[0066] See also Figure 1 , this embodiment provides a method for preparing an image sensor 100 . Figure 2a , Figure 2b to Figure 12 Schematic diagram of an intermediate structure obtained by the method for preparing the image sensor 100. The method for preparing the image sensor 100 comprises the following steps:
[0067] Step S2: providing a substrate 110 having a plurality of shallow trench isolation structures 111 therein.
[0068] Step S4 : forming a first semiconductor layer 120 on the substrate 110 and the shallow trench isolation structure 111 , wherein the first semiconductor layer 120 has a first conductivity type.
[0069] Step S6: forming a second semiconductor layer 130 on the first semiconductor layer 120 , wherein the second semiconductor layer 130 has a second conductivity type.
[0070] Step S8: Form a semiconductor filling structure 140 and a deep trench isolation structure 150 that sequentially penetrate the second semiconductor layer 130 and the first semiconductor layer 120, wherein the semiconductor filling structure 140 has a second conductivity type, the deep trench isolation structure 150 extends from the upper surface of the second semiconductor layer 130 to the shallow trench isolation structure 111, and the semiconductor filling structure 140 extends from the upper surface of the second semiconductor layer 130 to the substrate 110.
[0071] In step S2, see Figure 2a , Figure 2b to Figure 3The base 110 includes a semiconductor substrate 112 and a shallow trench isolation structure 111. The semiconductor substrate 112 can be made of silicon, silicon germanium, silicon germanium carbon or other semiconductor materials.
[0072] A plurality of shallow trench isolation structures 111 (STI) may be formed in the substrate 110. The shallow trench isolation structure 111 extends from a surface of one side of the substrate 110 to the inside of the substrate 110. In addition, the substrate 110 may further include a polysilicon layer 113 and a dielectric layer 114. The polysilicon layer 113 covers the shallow trench isolation structure 111 and the semiconductor substrate 112, and the dielectric layer 114 covers the polysilicon layer 113. The polysilicon layer 113 and the dielectric layer 114 may be used to form a device layer.
[0073] In step S4, see Figure 3 , forming a first semiconductor layer 120 covering the substrate 110 and the shallow trench isolation structure 111. The first semiconductor layer 120 has a first conductivity type. As an example, the material of the first semiconductor layer 120 may include P-type ions. The P-type ions may include, but are not limited to, any one or more of boron (Boron, B) ions, gallium (Magnesium, Mg) ions, or indium (Indium, In) ions.
[0074] In step S6, refer to Figure 4 and Fig.11 , a second semiconductor layer 130 is formed on the first semiconductor layer 120. The second semiconductor layer 130 has a second conductivity type. As an example, the material of the second semiconductor layer 130 may include N-type ions. N-type ions may include, but are not limited to, one or more of phosphorus (Phosphorus, P) ions, arsenic (As) ions, or antimony (Sb) ions. For example, the material of the second semiconductor layer 130 may include SiP, etc. It can be understood that SiP may include silicon doped with P elements. Of course, other elements may also be doped in the process. In addition, the second semiconductor layer 130 may be formed using a selective epitaxial deposition process or the like. As an example, the second semiconductor layer 130 may form a crystal nucleus on the exposed upper surface of the first semiconductor layer 120.
[0075] In step S8, refer to Figure 7, the semiconductor filling structure 140 sequentially penetrates the second semiconductor layer 130 and the first semiconductor layer 120, so that the semiconductor filling structure 140 contacts the substrate 110. The semiconductor filling structure 140 has a second conductivity type. As an example, the material of the semiconductor filling structure 140 may also include N-type ions. That is, the material of the semiconductor filling structure 140 may include SiP, etc. Of course, the material of the semiconductor filling structure 140 may also include other semiconductor materials doped with P elements, etc.
[0076] In one example, the material of the semiconductor filling structure 140 may be consistent with the material of the second semiconductor layer 130, that is, the material of the semiconductor filling structure 140 and the material of the second semiconductor layer 130 may both include phosphorus ions, or the material of the semiconductor filling structure 140 and the material of the second semiconductor layer 130 may both include arsenic ions. Of course, in another example, the material of the semiconductor filling structure 140 may be inconsistent with the material of the second semiconductor layer 130, that is, the material of the semiconductor filling structure 140 may include phosphorus ions, and the material of the second semiconductor layer 130 may include arsenic ions, or the material of the semiconductor filling structure 140 may include arsenic ions, and the material of the second semiconductor layer 130 may include phosphorus ions. It can be understood that the material of the semiconductor filling structure 140 and the material of the second semiconductor layer 130 may also be silicon doped with P element or As element, etc.
[0077] The semiconductor filling structure 140 and the second semiconductor layer 130 both have the second conductivity type. Exemplarily, when forming the semiconductor filling structure 140 , the structure may be heated so as to better diffuse the N-type ions.
[0078] The deep trench isolation structure 150 sequentially penetrates the second semiconductor layer 130 and the semiconductor filling structure 140 of the first semiconductor layer 120, and extends to the shallow trench isolation structure 111. The deep trench isolation structure 150 is arranged corresponding to the shallow trench isolation structure 111. The material of the deep trench isolation structure 150 may include silicon dioxide, silicon nitride, aluminum oxide or silicon oxynitride. Of course, the deep trench isolation structure 150 may include multiple film layers to jointly increase the isolation capability of the deep trench isolation structure 150.
[0079] Afterwards, for example, see Figures 8 to 10 , a filter layer 170 may be formed on the side of the second semiconductor layer 130, the semiconductor filling structure 140, and the deep trench isolation structure 150 away from the substrate 110. The filter layer 170 may be used to receive light. Fig.10, the film layer between adjacent deep trench isolation structures 150 constitutes a photoelectric sensing region 160. The first semiconductor layer 120, the second semiconductor layer 130 and the semiconductor filling structure 140 in each photoelectric sensing region 160 constitute a columnar light emitting diode (PD). After light enters the photoelectric sensing region 160, the photons pass through the light emitting diode to form a current. Each photoelectric sensing region 160 has a plurality of semiconductor filling structures 140, and the plurality of semiconductor filling structures 140 can be evenly distributed, so that the sensed current can be obtained more accurately.
[0080] The filter layer 170 may include a plurality of filter elements. Accordingly, the image sensor 100 may also include a plurality of light blocking structures 171. The light blocking structures 171 may be arranged one by one corresponding to the deep trench isolation structures 150. The light blocking structures 171 may include a tantalum oxide layer 1711, an aluminum layer 1712, and a titanium nitride layer 1713 stacked in sequence. Figure 8 and Fig. 9 When preparing the light-blocking structure 171, a tantalum oxide layer 1711, an aluminum layer 1712, and a titanium nitride layer 1713 may be formed on the entire surface first, and then the three film layers may be etched to form the light-blocking structure 171 arranged at intervals. When forming the tantalum oxide layer 1711, the aluminum layer 1712, and the titanium nitride layer 1713, one or more thin film deposition processes may be used, including but not limited to chemical vapor deposition, physical vapor deposition, atomic layer deposition, thermal oxidation, electroplating, chemical plating, or any combination thereof.
[0081] The filter element can cover the second semiconductor layer 130 and the semiconductor filling structure 140 between adjacent light-blocking structures 171, and each filter element can cover the photoelectric sensing area 160 thereunder. As an example, the filter element includes a plurality of color filters, and the plurality of color filters form a color filter array. Each color filter corresponds to a photoelectric sensing area 160. In this embodiment, the filter element may include at least a blue filter, a green filter, and a red filter, and they may be arranged in any suitable combination. When light passes through the color filter, the color may change, maintaining a high transmittance in a certain band, thereby enhancing the effect of photoelectric conversion.
[0082] In this embodiment, a semiconductor filling structure 140 is provided to sequentially penetrate the second semiconductor layer 130 and the first semiconductor layer 120, and the first semiconductor layer 120 has a first conductivity type, and the second semiconductor layer 130 and the second semiconductor layer 130 have a second conductivity type, so that a columnar light emitting diode is formed in the photoelectric sensing region 160. Fig.13, the related art usually uses ion implantation (or ion implantation) to form the photodiode 10. However, the present embodiment does not use ion implantation (or ion implantation) to form the photodiode, so the method of the present embodiment can reduce the possibility of causing damage to other film layers when forming the light-emitting diode, and can also reduce the probability of signal crosstalk in the image sensor 100, avoiding the occurrence of dark current.
[0083] At the same time, in this embodiment, the semiconductor filling structure 140 is provided to sequentially penetrate the second semiconductor layer 130 and the first semiconductor layer 120 , which can also increase the electron concentration of the photodiode and improve the conversion efficiency of the image sensor 100 .
[0084] Moreover, in this embodiment, a deep trench isolation structure 150 is further provided to extend to the shallow trench isolation structure 111 to completely isolate the adjacent photoelectric sensing regions 160 , further avoiding the possibility of signal crosstalk between the adjacent photoelectric sensing regions 160 .
[0085] In addition, in this embodiment, the semiconductor filling structure 140 is arranged to penetrate the second semiconductor layer 130 and the first semiconductor layer 120, so that the semiconductor filling structure 140 is in contact with both the first semiconductor layer 120 and the second semiconductor layer 130, and the contact area is large, which is beneficial to improve the conversion efficiency of the photoelectric sensing area 160.
[0086] In one embodiment, see Figures 4 to 7 , step S8 comprises:
[0087] Step S82 : etching the second semiconductor layer 130 and the first semiconductor layer 120 to form a plurality of first trenches 200 penetrating the second semiconductor layer 130 and the first semiconductor layer 120 .
[0088] Step S84 : forming a deep trench isolation structure 150 in the first trench 200 .
[0089] Step S86 : etching the second semiconductor layer 130 and the first semiconductor layer 120 after the deep trench isolation structure 150 is formed, to form a plurality of second trenches 210 penetrating the second semiconductor layer 130 and the first semiconductor layer 120 .
[0090] Step S88 : forming a semiconductor filling structure 140 in the plurality of second trenches 210 .
[0091] In step S82, refer to Figure 4, the first semiconductor layer 120 and the second semiconductor layer 130 can be formed on the entire surface of the substrate 110, and then a plurality of first trenches 200 can be formed by etching. The first trenches 200 expose the shallow trench isolation structure 111 and are arranged corresponding to the shallow trench isolation structure 111. As an example, a plurality of first trenches 200 can be formed by dry etching or wet etching. For example, dry etching can include any one of reactive ion etching, inductively coupled plasma etching, or high concentration plasma etching.
[0092] At this time, different methods may be used to etch the first semiconductor layer 120 and the second semiconductor layer 130 step by step to obtain a more precise first trench 200 .
[0093] In step S84, refer to Figure 5 , the first trench 200 is filled with materials such as silicon dioxide to form a deep trench isolation structure 150.
[0094] In step S86, refer to Figure 6 After forming the deep trench isolation structure 150, the second semiconductor layer 130 and the first semiconductor layer 120 are continuously etched to form a plurality of second trenches 210. The second trenches 210 penetrate the second semiconductor layer 130 and the first semiconductor layer 120 to expose the substrate 110. The plurality of second trenches 210 between adjacent deep trench isolation structures 150 may be arranged at equal intervals.
[0095] In step S88, refer to Figure 7 , fill the second trench 210 to form a semiconductor filling structure 140. For example, the semiconductor filling structure 140 may be formed using a chemical vapor deposition process (CVD) or other methods. At this time, in the cross-sectional view of the image sensor 100, the second semiconductor layer 130 and the semiconductor filling structure 140 may be alternately arranged in a columnar shape between adjacent deep trench isolation structures 150.
[0096] In this embodiment, the deep trench isolation structure 150 is first formed and then the semiconductor filling structure 140 is formed, so that the first trench 200 is completely filled, thereby ensuring that the deep trench isolation structure 150 is in contact with the shallow trench isolation structure 111, so that the adjacent photoelectric sensing areas 160 are completely separated, reducing the possibility of signal crosstalk.
[0097] In one embodiment, step S8 includes:
[0098] Step S822 : etching the second semiconductor layer 130 and the first semiconductor layer 120 to simultaneously form a plurality of first trenches 200 and a plurality of second trenches 210 penetrating the second semiconductor layer 130 and the first semiconductor layer 120 .
[0099] Step S824 : forming a photoresist layer 180 in the second trench 210 and on the upper surface of the second semiconductor layer 130 .
[0100] Step S826 : forming a deep trench isolation material layer in the first trench 200 and on the upper surface of the photoresist layer 180 .
[0101] Step S828 : removing the photoresist layer 180 and the deep trench isolation material layer on the upper surface of the photoresist layer 180 , and the remaining deep trench isolation material layer forms a deep trench isolation structure 150 .
[0102] Step S8210 : forming a semiconductor filling structure 140 in the second trench 210 .
[0103] In step S822, refer to Fig.11 , a plurality of first grooves 200 and a plurality of second grooves 210 can be formed simultaneously, thereby saving a mask plate and reducing the manufacturing cost of the image sensor 100 .
[0104] In step S824, refer to Fig.12 , the second trench 210 and the upper surface of the second semiconductor layer 130 may be filled with a photoresist layer 180 . At this time, the first trench 200 exposes the shallow trench isolation structure 111 .
[0105] In step S826, refer to Fig.12 A deep trench isolation material layer may be formed in the first trench 200 and on the upper surface of the photoresist layer 180 using a spin on glass (SOG) method or the like.
[0106] In step S828, refer to Figure 6 , the photoresist layer 180 is stripped off, thereby removing the deep trench isolation material layer on the upper surface of the photoresist layer 180. At this time, the deep trench isolation material layer in the first trench 200 forms a deep trench isolation structure 150, and the second trench 210 exposes the substrate 110.
[0107] In step S8210, refer to Figure 7 , the semiconductor filling structure 140 may be formed by a solid phase diffusion (SPD) method.
[0108] In this embodiment, a plurality of first trenches 200 and a plurality of second trenches 210 are formed simultaneously, thereby saving one mask plate and accelerating the manufacture of the image sensor 100 .
[0109] In one embodiment, in step S2, it includes:
[0110] Step S22: providing an initial semiconductor substrate 1120 , wherein the initial semiconductor substrate 1120 includes a first surface and a second surface that are opposite to each other.
[0111] Step S24 : forming a shallow trench isolation structure 111 close to the second surface in the initial semiconductor substrate 1120 .
[0112] Step S26 : implanting functional ions into the initial semiconductor substrate 1120 from the first surface to form an oxygen-containing layer 1200 . The oxygen-containing layer 1200 is located on a side of the shallow trench isolation structure 111 close to the first surface.
[0113] Step S27 : performing a heat treatment on the initial semiconductor substrate 1120 to form the oxygen-containing layer 1200 into the first semiconductor layer 120 .
[0114] Step S28 : removing a portion of the initial semiconductor substrate 1120 from the first surface to expose the first semiconductor layer 120 , so as to form the base 110 .
[0115] In step S22, refer to Figure 2a and Figure 2b The initial semiconductor substrate 1120 includes a first surface and a second surface that are opposite to each other. The initial semiconductor substrate 1120 has a certain thickness. For example, the thickness H of the initial semiconductor substrate 1120 may be 3 μm.
[0116] In step S24, the semiconductor substrate 112 may be etched from the second surface of the initial semiconductor substrate 1120 to form a plurality of shallow trenches. The shallow trenches are filled to form shallow trench isolation structures 111. The shallow trench isolation structures 111 are close to the second surface and away from the first surface.
[0117] In step S26, refer to Figure 2a , the initial semiconductor substrate 1120 can be turned over so that the first surface faces upward. Then, functional ions are implanted from the first surface into the initial semiconductor substrate 1120 to form an oxygen-containing layer 1200. For example, the functional ions can be oxygen ions. At this time, the oxygen-containing layer 1200 is in contact with the shallow trench isolation structure 111 and is located on the side of the shallow trench isolation structure 111 close to the first surface.
[0118] In step S27, refer to Figure 2b After forming the oxygen-containing layer 1200, the initial semiconductor substrate 1120 is subjected to heat treatment. For example, in an inert gas or nitrogen atmosphere, the oxygen ions in the oxygen-containing layer 1200 react with the semiconductor elements in the initial semiconductor substrate 1120 to generate the first semiconductor layer 120. The first semiconductor layer 120 may include silicon oxide or the like.
[0119] In step S28, the first surface of the initial semiconductor substrate 1120 may be polished by using a chemical mechanical polishing (CMP) method, thereby removing a portion of the initial semiconductor substrate 1120 until the first semiconductor layer 120 is exposed. Figure 3 Of course, in this embodiment, other methods such as laser can also be used to remove part of the initial semiconductor substrate 1120.
[0120] In this embodiment, the first semiconductor layer 120 is obtained by performing functional ion implantation on the initial semiconductor substrate 1120 from the second surface. After removing part of the initial semiconductor substrate 1120, a flat first semiconductor layer 120 can be obtained, thereby facilitating the formation of other complex film layers on the first semiconductor layer 120, which contributes to the stability of image sensing.
[0121] It should be understood that although Figure 1 The steps in the flowchart are shown in sequence as indicated by the arrows, but these steps are not necessarily executed in the order indicated by the arrows. Unless otherwise specified in this document, there is no strict order restriction for the execution of these steps, and these steps can be executed in other orders. Moreover, Figure 1 At least part of the steps may include multiple steps or multiple stages. These steps or stages are not necessarily performed at the same time, but can be performed at different times. The execution order of these steps or stages is not necessarily sequential, but can be performed in turn or alternately with other steps or at least part of the steps or stages in other steps.
[0122] Please continue reading Fig.10 This embodiment further provides an image sensor 100 . The image sensor 100 includes a substrate 110 , a first semiconductor layer 120 , a second semiconductor layer 130 , a semiconductor filling structure 140 , and a deep trench isolation structure 150 .
[0123] The substrate 110 includes a semiconductor substrate 112 and a shallow trench isolation structure 111. The semiconductor substrate 112 can be made of silicon, silicon germanium, silicon germanium carbon or other semiconductor materials. The shallow trench isolation structure 111 extends from the surface of one side of the substrate 110 to the inside of the substrate 110. The material of the shallow trench isolation structure 111 can include silicon dioxide and the like.
[0124] The first semiconductor layer 120 is located on one side of the substrate 110. The first semiconductor layer 120 has a first conductivity type. As an example, the material of the first semiconductor layer 120 may include P-type ions. The P-type ions may include, but are not limited to, any one or more of boron (Boron, B) ions, gallium (Magnesium, Mg) ions, or indium (Indium, In) ions, etc.
[0125] The second semiconductor layer 130 is located on a side of the first semiconductor layer 120 away from the substrate 110. The second semiconductor layer 130 has a second conductivity type. As an example, the material of the second semiconductor layer 130 may include N-type ions. N-type ions may include, but are not limited to, one or more of phosphorus (P) ions, arsenic (As) ions, or antimony (Sb) ions. For example, the material of the second semiconductor layer 130 may include SiP, etc. It is understood that SiP may include silicon doped with P elements. Of course, the second semiconductor layer 130 may also be doped with other elements.
[0126] The semiconductor filling structure 140 sequentially penetrates the second semiconductor layer 130 and the first semiconductor layer 120 along the thickness direction of the image sensor 100. The semiconductor filling structure 140 has a second conductivity type. As an example, the material of the semiconductor filling structure 140 may also include N-type ions. That is, the material of the semiconductor filling structure 140 and the material of the semiconductor filling structure 140 may both include SiP, etc. Fig.10 In the cross-sectional view of the image sensor 100 shown, the second semiconductor layer 130 and the semiconductor filling structure 140 may be alternately arranged in a columnar shape between adjacent deep trench isolation structures 150 .
[0127] In one example, the material of the semiconductor filling structure 140 may be consistent with the material of the second semiconductor layer 130, that is, the semiconductor filling structure 140 and the second semiconductor layer 130 may both include silicon doped with the P element. Of course, in another example, the material of the semiconductor filling structure 140 may be inconsistent with the material of the second semiconductor layer 130, that is, the material of the semiconductor filling structure 140 may include silicon doped with the P element, and the material of the second semiconductor layer 130 may include silicon doped with the As element.
[0128] The deep trench isolation structure 150 sequentially penetrates the second semiconductor layer 130 and the first semiconductor layer 120 along the thickness direction of the image sensor 100, and extends to the shallow trench isolation structure 111. The deep trench isolation structure 150 is arranged corresponding to the shallow trench isolation structure 111. The material of the deep trench isolation structure 150 may include silicon dioxide, silicon nitride, aluminum oxide or silicon oxynitride. Of course, the deep trench isolation structure 150 may include multiple film layers to jointly increase the isolation capability of the deep trench isolation structure 150.
[0129] In addition, the image sensor 100 may further include a filter layer 170. The filter layer 170 is located on a side of the second semiconductor layer 130, the semiconductor filling structure 140 and the deep trench isolation structure 150 away from the substrate 110. The filter layer 170 is used to receive light. The filter layer 170 includes a plurality of filter elements. Accordingly, the image sensor 100 may further include a plurality of light-blocking structures 171. The light-blocking structures 171 are arranged one-to-one corresponding to the deep trench isolation structures 150. For example, the light-blocking structure 171 may include a tantalum oxide layer 1711, an aluminum layer 1712 and a titanium nitride layer 1713 stacked in sequence. The filter element covers the second semiconductor layer 130 and the semiconductor filling structure 140 between adjacent light-blocking structures 171. For example, the filter element includes a plurality of color filters, and the plurality of color filters form a color filter array. When light passes through the color filter, the color can be changed to maintain a high transmittance in a certain band, thereby enhancing the effect of photoelectric conversion.
[0130] The film layer between adjacent deep trench isolation structures 150 constitutes a photoelectric sensing region 160. The first semiconductor layer 120, the second semiconductor layer 130 and the semiconductor filling structure 140 in each photoelectric sensing region 160 constitute a light-emitting diode. After light is incident on the photoelectric sensing region 160, photons pass through the light-emitting diode to form a current. The first semiconductor layer 120, the second semiconductor layer 130 and the semiconductor filling structure 140 in each photoelectric sensing region 160 (i.e., between adjacent deep trench isolation structures 150) can be evenly distributed, so that the sensed current can be obtained more accurately.
[0131] In this embodiment, a semiconductor filling structure 140 is provided to sequentially penetrate the second semiconductor layer 130 and the first semiconductor layer 120, and the first semiconductor layer 120 has a first conductivity type, and the second semiconductor layer 130 and the second semiconductor layer 130 have a second conductivity type, so that a columnar light-emitting diode is formed in the photoelectric sensing area 160. Since the present embodiment does not use ion implantation to form a photodiode, the method of the present embodiment can reduce the possibility of causing damage to other film layers when forming a light-emitting diode, and can also reduce the probability of signal crosstalk in the image sensor 100, thereby avoiding the occurrence of dark current.
[0132] At the same time, in this embodiment, the semiconductor filling structure 140 is provided to sequentially penetrate the second semiconductor layer 130 and the first semiconductor layer 120 , which can also increase the electron concentration of the photodiode and improve the conversion efficiency of the image sensor 100 .
[0133] Moreover, in this embodiment, a deep trench isolation structure 150 is further provided to extend to the shallow trench isolation structure 111 to completely isolate the adjacent photoelectric sensing regions 160 , further avoiding the possibility of signal crosstalk between the adjacent photoelectric sensing regions 160 .
[0134] In addition, in this embodiment, a semiconductor filling structure 140 is provided to penetrate the second semiconductor layer 130 and the first semiconductor layer 120 , so that the semiconductor filling structure 140 is in contact with the first semiconductor layer 120 and the two have a large contact area, which is beneficial to improving the conversion efficiency of the photoelectric sensing area 160 .
[0135] The technical features of the above-mentioned embodiments can be combined arbitrarily. In order to make the description concise, not all possible combinations of the technical features of the above-mentioned embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.
[0136] The above-described embodiments only express several implementation methods of the present disclosure, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the patent application. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present disclosure, and these all belong to the protection scope of the present disclosure. Therefore, the protection scope of the patent of the present disclosure shall be subject to the attached claims.
Claims
1. An image sensor, characterized in that: include: A substrate having a plurality of shallow trench isolation structures; A first semiconductor layer, located on one side of the substrate, the first semiconductor layer having a first conductivity type; A second semiconductor layer, located on a side of the first semiconductor layer away from the substrate, the second semiconductor layer having a second conductivity type; a semiconductor filling structure, which sequentially penetrates the second semiconductor layer and the first semiconductor layer along the thickness direction of the image sensor and extends to the substrate, wherein the semiconductor filling structure has a second conductivity type; A deep trench isolation structure sequentially penetrates the second semiconductor layer and the first semiconductor layer along a thickness direction of the image sensor and extends to the shallow trench isolation structure.
2. The image sensor according to claim 1, characterized in that The material of the first semiconductor layer includes boron, and the materials of the second semiconductor layer and the semiconductor filling structure include phosphorus and / or arsenic.
3. The image sensor according to claim 2, characterized in that A plurality of semiconductor filling structures are arranged between adjacent deep trench isolation structures.
4. The image sensor according to claim 1, characterized in that The image sensor comprises: The filter layer includes a plurality of filter elements, wherein the filter elements cover the second semiconductor layer and the semiconductor filling structure between adjacent deep trench isolation structures.
5. The image sensor according to claim 4, characterized in that: The image sensor comprises: The light-blocking structure is arranged in one-to-one correspondence with the deep trench isolation structure, and the filter element is located between adjacent light-blocking structures.
6. A method for preparing an image sensor, characterized in that: The steps include: Providing a substrate, wherein the substrate has a plurality of shallow trench isolation structures; forming a first semiconductor layer on the substrate and the shallow trench isolation structure, wherein the first semiconductor layer has a first conductivity type; forming a second semiconductor layer on the first semiconductor layer, wherein the second semiconductor layer has a second conductivity type; A semiconductor filling structure and a deep trench isolation structure are formed which sequentially penetrate the second semiconductor layer and the first semiconductor layer. The semiconductor filling structure has a second conductivity type. The deep trench isolation structure extends from the upper surface of the second semiconductor layer to the shallow trench isolation structure. The semiconductor filling structure extends from the upper surface of the second semiconductor layer to the substrate.
7. The method for preparing an image sensor according to claim 6, characterized in that: The forming of a semiconductor filling structure and a deep trench isolation structure sequentially penetrating the second semiconductor layer and the first semiconductor layer comprises: Etching the second semiconductor layer and the first semiconductor layer to form a plurality of first trenches penetrating the second semiconductor layer and the first semiconductor layer; forming the deep trench isolation structure in the plurality of first trenches; Etching the second semiconductor layer and the first semiconductor layer after the deep trench isolation structure is formed to form a plurality of second trenches penetrating the second semiconductor layer and the first semiconductor layer; The semiconductor filling structure is formed in the plurality of second trenches.
8. The method for preparing an image sensor according to claim 6, characterized in that: The forming of a semiconductor filling structure and a deep trench isolation structure sequentially penetrating the second semiconductor layer and the first semiconductor layer comprises: Etching the second semiconductor layer and the first semiconductor layer to simultaneously form a plurality of first trenches and a plurality of second trenches penetrating the second semiconductor layer and the first semiconductor layer; forming a photoresist layer in the second trench and on the upper surface of the second semiconductor layer; forming a deep trench isolation material layer in the first trench and on the upper surface of the photoresist layer; Removing the photoresist layer and the deep trench isolation material layer located on the upper surface of the photoresist layer, and the remaining deep trench isolation material layer forms a deep trench isolation structure; The semiconductor filling structure is formed in the second trench.
9. The method for preparing an image sensor according to claim 6, characterized in that: The material of the first semiconductor layer includes boron, the material of the second semiconductor layer includes any one of silicon phosphide and silicon arsenide, and the material of the semiconductor filling structure includes the other one of silicon phosphide and silicon arsenide.
10. The method for preparing an image sensor according to claim 6, characterized in that: The providing of a substrate comprises: Providing an initial semiconductor substrate, the initial semiconductor substrate comprising a first surface and a second surface disposed opposite to each other; forming the shallow trench isolation structure close to the second surface in the initial semiconductor substrate; implanting functional ions into the initial semiconductor substrate from the first surface to form an oxygen-containing layer, wherein the oxygen-containing layer is located on a side of the shallow trench isolation structure close to the first surface; thermally treating the initial semiconductor substrate so that the oxygen-containing layer forms the first semiconductor layer; A portion of the initial semiconductor substrate is removed from the first surface to expose the first semiconductor layer to form the base.