A driving acquisition controller of a molecular imaging system and a molecular imaging system

Abstract

The application relates to the technical field of electronic science and technology, and provides a driving collection controller of a molecular imaging system, which comprises an MCU, a first DAC circuit, a second DAC circuit and a signal conditioning circuit; the MCU converts a first driving signal into a second driving signal through the first DAC circuit to control a first driver; the MCU converts the first driving signal into a third driving signal through the second DAC circuit to control a second driver; and the MCU receives an input signal of an APD or sends a control signal to the APD through the signal conditioning circuit. The first driving signal output by the MCU is converted into the second driving signal and the third driving signal which can be used by different drivers through the first DAC circuit and the second DAC circuit, so that different instruments of the molecular imaging system can be integrated in the driving collection controller for control, the operation is convenient, and the application has good application value.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of electronic science and technology, in particular to a driving acquisition controller of a molecular imaging system and the molecular imaging system. BACKGROUND

[0002] The single-molecule imaging system requires relatively high precision, and usually needs to use some high-end commercial instruments for control and signal acquisition. The external interfaces of various commercial instruments are different, which causes inconvenience in operation, and a controller needs to be developed to connect various commercial instruments for control and sampling. SUMMARY

[0003] To solve the above problems in the prior art, the present application provides a driving acquisition controller of a molecular imaging system, which comprises an MCU, a first DAC circuit, a second DAC circuit and a signal conditioning circuit. The MCU converts a first driving signal into a second driving signal through the first DAC circuit to control a first driver. The MCU converts the first driving signal into a third driving signal through the second DAC circuit to control a second driver. The MCU receives an input signal of an APD or sends a control signal to the APD through the signal conditioning circuit.

[0004] Further, the driving acquisition controller is further provided with a crystal oscillator connected to the MCU.

[0005] Further, the first ADC circuit comprises a first voltage reduction circuit, a first voltage stabilizing circuit and at least one first DAC output circuit. The output end of the first voltage reduction circuit is connected to the input end of the first voltage stabilizing circuit. The output end of the first voltage stabilizing circuit is connected to the input end of the first DAC output circuit.

[0006] Further, the first voltage reduction circuit comprises a resistor R26, a first voltage reference source chip and a resistor R27. The resistor R26 and the resistor R27 are respectively connected in series to both ends of the first voltage reference source chip. The first voltage stabilizing circuit comprises a first operational amplifier U3, a resistor R37 and a resistor R45. The other end of the resistor R27 is connected to the non-inverting input pin of the first operational amplifier U3. The resistor R37 and the resistor R45 are connected across the output pin and the inverting input pin of the first operational amplifier U3.

[0007] Further, the first DAC output circuit comprises a first DAC chip, a second operational amplifier U8B and a third operational amplifier U8A. The pins 5 and 6 of the first DAC chip are input ends. The pin 2 of the first DAC chip is an output end. The pin 2 is connected to the non-inverting input pin of the second operational amplifier U8B. The output end of the second operational amplifier U8B is connected to the non-inverting input pin of the third operational amplifier U8A.

[0008] Further, the second DAC circuit comprises a second voltage reduction circuit, a second DAC chip, a second DAC output circuit and a third DAC output circuit, an output end of the second voltage reduction circuit is connected with an input pin of the second DAC chip, output pins of the second DAC chip are connected with the second DAC output circuit and the third DAC output circuit respectively; the second voltage reduction circuit adopts a second voltage reference source chip.

[0009] Further, the second DAC output circuit comprises a fourth operational amplifier U1A, a resistor R1 and a resistor R2, a non-inverting input pin of the fourth operational amplifier U1A is connected with a first output end of the second voltage reduction circuit; the resistor R1 is connected between an output pin and an inverting input pin of the fourth operational amplifier U1A; one end of the resistor R2 is grounded, and the other end is connected with the inverting input pin of the fourth operational amplifier U1A; the third DAC output circuit comprises a fifth operational amplifier U1B, a resistor R8 and a resistor R11, a non-inverting input pin of the fifth operational amplifier U1B is connected with a second output end of the second voltage reduction circuit, the resistor R8 is connected between an output pin and an inverting input pin of the fifth operational amplifier U1B; one end of the resistor R11 is grounded, and the other end is connected with the inverting input pin of the fifth operational amplifier U1B.

[0010] Further, the signal conditioning circuit comprises a first rectifier circuit and a second rectifier circuit connected with each other; the first rectifier circuit comprises a resistor R21, a resistor R22 and a triode Q1; one end of the resistor R21 is connected with a base of the triode Q1, the other end is connected with one end of the resistor R22, the other end of the resistor R22 is connected with a collector of the triode Q1, an emitter of the triode Q1 is grounded; the second rectifier circuit comprises a rectifier chip, an input end of the rectifier chip is connected with the collector of the triode Q1.

[0011] Further, the driving acquisition controller is further provided with a USB interface.

[0012] The application further provides a molecular imaging system adopting the driving acquisition controller of the molecular imaging system according to any one of the above embodiments.

[0013] Based on the above, compared with the prior art, the driving acquisition controller of the molecular imaging system provided by the application converts the first driving signal output by the MCU into the second driving signal and the third driving signal which can be used by different drivers through the first DAC circuit and the second DAC circuit, so that different instruments of the molecular imaging system can be integrated in one driving acquisition controller for control, the operation is convenient, and the application has good application value.

[0014] Additional features and advantages of the present application will be set forth in the description that follows, and in part will be apparent from the description, or can be learned by practice of the application. The objectives and other advantages of the present application will be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings. BRIEF DESCRIPTION OF DRAWINGS

[0015] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the prior art, the following will briefly introduce the drawings needed to be used in the embodiments or the prior art description. Obviously, the drawings described in the following description are some embodiments of the present application, and for those skilled in the art, other drawings can also be obtained from these drawings without creative labor. In the following description, the positional relationship described in the drawings is the direction of the components drawn in the drawings as the reference, unless otherwise specified.

[0016] Figure 1 System block diagram of driving the acquisition controller provided by the present application;

[0017] Figure 2 System block diagram of adding an external driver to the acquisition controller provided by the present application;

[0018] Figure 3 Circuit structure diagram of the temperature compensation crystal oscillator provided by the present application;

[0019] Figure 4 Circuit structure diagram of the first voltage reduction circuit and the first voltage stabilization circuit provided by the present application;

[0020] Figure 5 Circuit structure diagram of the first DAC output circuit provided by the present application;

[0021] Figure 6 Circuit structure diagram of the second voltage reduction circuit provided by the present application;

[0022] Figure 7 Circuit structure diagram of the second DAC chip provided by the present application;

[0023] Figure 8 Circuit structure diagram of the second DAC output circuit provided by the present application;

[0024] Figure 9 Circuit structure diagram of the third DAC output circuit provided by the present application;

[0025] Figure 10 Circuit structure diagram of the signal conditioning circuit provided by the present application;

[0026] Figure 11 Signal waveform diagram before and after the shaping of the signal conditioning circuit provided by the present application;

[0027] Figure 12 The system block diagram of the molecular imaging system provided by the present application is shown. DETAILED DESCRIPTION

[0028] In order to make the objects, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be described clearly and completely below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only some of the embodiments of the present application, rather than all the embodiments of the present application. As long as there is no conflict, the technical features designed in the different embodiments of the present application can be combined with each other. Based on the embodiments in the present application, all other embodiments obtained by a person of ordinary skill in the art without creative work fall within the protection scope of the present application.

[0029] In the description of the present application, it should be noted that all the terms (including technical terms and scientific terms) used in the present application have the same meaning as that generally understood by a person of ordinary skill in the art to which the present application belongs, and should not be understood as a limitation on the present application; it should be further understood that the terms used in the present application should be understood as having the same meaning as the terms in the context of the present application and the related field, and should not be understood in an idealized or overly formal sense, unless defined explicitly in the present application.

[0030] Please refer to Figure 1 and Figure 2 The present application provides a driving acquisition controller of a molecular imaging system, comprising an MCU, a first DAC circuit, a second DAC circuit, a signal conditioning circuit; the MCU converts a first driving signal into a second driving signal through the first DAC circuit to control a first driver; the MCU converts the first driving signal into a third driving signal through the second DAC circuit to control a second driver; and the MCU receives an input signal of an APD or sends a control signal to the APD through the signal conditioning circuit.

[0031] In specific implementation, different drivers need different voltage signals for driving, as shown in Figure 2 The present application relates to a driver comprising a Model 302RM driver and a galvanometer driver, one first DAC circuit can drive one Model 302RM driver, one second DAC circuit can drive multiple galvanometer drivers at the same time, and the first DAC circuit and the second DAC circuit can have multiple channels. The first driving signal is an initial voltage signal output by the MCU, the second driving signal is a voltage signal obtained by conversion through the first DAC circuit and can be used by the Model 302RM driver, and the third driving signal is a voltage signal obtained by conversion through the second DAC circuit and can be used by the galvanometer driver.

[0032] The APD is a single photon counting module, which receives a shutter signal (APD_GATE) output by the MCU, and then collects sample information. The collected sample electrical signal (APD_OUT) is then transmitted to the MCU for processing; meanwhile, the input requirement signal of the Model 302RM driver requires amplitude and pulse width, and the MCU can adjust according to the feedback of the APD. A signal conditioning circuit is arranged between the APD and the MCU, which shapes the signal received and output by the APD.

[0033] In an embodiment, as shown in Figure 3 The driving collection controller is further provided with a crystal oscillator, which is connected to the MCU.

[0034] Specifically, the Model 302RM driver requires that the input signal amplitude and pulse width interval are adjustable, and the accuracy requirement is relatively high. The amplitude voltage stability requirement is ±0.2Mv, and the pulse accuracy requirement is ±0.01us. The pulse accuracy requires a high input clock of the MCU, and a sampling temperature compensation crystal oscillator is required, which is preferred in the embodiment. The frequency stability is at most 0.5ppm, which saves cost and improves pulse accuracy.

[0035] In an embodiment, as shown in Figure 4 and Figure 5 The first DAC circuit includes a first voltage reduction circuit, a first voltage stabilizing circuit, and at least one first DAC output circuit. The output end of the first voltage reduction circuit is connected with the input end of the first voltage stabilizing circuit, and the output end of the first voltage stabilizing circuit is connected with the input end of the first DAC output circuit.

[0036] In specific implementation, the amplitude and pulse width of the input requirement signal of the Model 302RM driver can be adjusted according to the feedback of the single photon counting module. Therefore, a high-precision DAC is adopted to realize pulse output. The voltage stability adopts a high-precision 16bit DAC, which has a 1us build time and a synchronous output control pin function, controls three DACs 1-3, and simultaneously outputs signals. The output voltage range is ±2.048V, and the resolution can reach 0.06mV.

[0037] As shown in Figure 4 The first voltage reduction circuit includes a resistor R26, a first voltage reference source chip, and a resistor R27. The resistor R26 and the resistor R27 are respectively connected in series to both ends of the first voltage reference source chip. The first voltage stabilizing circuit includes a first operational amplifier U3, a resistor R37, and a resistor R45. The other end of the resistor R27 is connected to the non-inverting input pin of the first operational amplifier U3. The resistor R37 and the resistor R45 are connected across the output pin and the inverting input pin of the first operational amplifier U3.

[0038] In a specific implementation, the first voltage reduction circuit converts the 5V high-frequency voltage into a low-frequency voltage of ±2.048V that can be used by a commercial high-voltage driver through a first voltage reference source chip, which is a chip U2A in Figure 4 . Then, the output of the first voltage reduction circuit is stabilized by a first operational amplifier U3, and the output of the first voltage reduction circuit needs to be connected to multiple first DAC output circuits, preferably three in this embodiment. The first operational amplifier U3 has a stable amplification and driving capability, so that the ±2.048V output voltage is more stable, and the voltage of the multiple first DAC output circuits is guaranteed.

[0039] As shown in Figure 5 , the first DAC output circuit includes a first DAC chip, a second operational amplifier U8B, and a third operational amplifier U8A. The pin 5 and the pin 6 of the first DAC chip are input terminals, the pin 2 of the first DAC chip is an output terminal, the pin 2 is connected to the non-inverting input pin of the second operational amplifier U8B, and the output terminal of the second operational amplifier U8B is connected to the non-inverting input pin of the third operational amplifier U8A.

[0040] In a specific implementation, the ±2.048V input by the first voltage reduction circuit is used as a reference voltage, the pin 5 and the pin 6 of the first DAC chip of the first DAC output circuit receive the reference voltage, and the reference voltage is converted into an analog signal by the first DAC chip. The first DAC chip outputs a current signal obtained based on the reference voltage, the second operational amplifier U8B converts the current signal into a voltage of ±2.048V, and the third operational amplifier U8A is used as a second-order low-pass filter to filter out the high-frequency voltage output by the first DAC chip and the second operational amplifier U8B.

[0041] The second DAC circuit includes a second voltage reduction circuit, a second DAC chip, a second DAC output circuit, and a third DAC output circuit, as shown in Figure 6 and Figure 7 . The output terminal of the second voltage reduction circuit is connected to the input pin of the second DAC chip, the output pin of the second DAC chip is connected to the second DAC output circuit and the third DAC output circuit, respectively, and the second voltage reduction circuit uses a second voltage reference source chip.

[0042] In a specific implementation, the second voltage reduction circuit reduces the input voltage of 5V to an output voltage of ±2.5V, and outputs the output voltage of ±2.5V to the second DAC chip. The pin 10 of the second chip receives the output voltage of ±2.5V, and the second DAC chip outputs a current signal based on the reference voltage of ±2.5V input by the second voltage reduction circuit. As shown in Figure 7 and Figure 8As shown, the second DAC chip has two output terminals VOUT1 and VOUT2, the VOUT1 of the second DAC chip is connected with the VOUT1 input terminal of the second DAC output circuit, the VOUT2 of the second DAC chip is connected with the VOUT2 input terminal of the third DAC output circuit, and the second DAC output circuit and the third DAC output circuit convert and amplify the current signal output by the second DAC chip into an output voltage of ±10V for output.

[0043] As shown in the figure, Figure 8 As shown, the second DAC output circuit includes a fourth operational amplifier U1A, a resistor R1 and a resistor R2, the non-inverting input pin of the fourth operational amplifier U1A is connected with the first output terminal of the second voltage reduction circuit; the resistor R1 is connected across the output pin and the inverting input pin of the fourth operational amplifier U1A; one end of the resistor R2 is grounded, and the other end is connected to the inverting input pin of the fourth operational amplifier U1A. Preferably, in this embodiment, since the input voltage received by the input terminal of the second DAC output circuit is ±2.5V, and the voltage signal output by the output terminal is ±10V, the resistance values of the resistor R1 and the resistor R2 are 4:1, and the voltage input into the second DAC output circuit can be amplified by 4 times for output. It should be noted that this is only a selection of this embodiment, and the resistance value ratio of the resistor R1 and the resistor R2 can be selected according to the actual circuit requirements.

[0044] As shown in the figure, Figure 9 As shown, the third DAC output circuit includes a fifth operational amplifier U1B, a resistor R8 and a resistor R11, the non-inverting input pin of the fifth operational amplifier U1B is connected with the second output terminal of the second voltage reduction circuit, the resistor R8 is connected across the output pin and the inverting input pin of the fifth operational amplifier U1B; one end of the resistor R11 is grounded, and the other end is connected to the inverting input pin of the fifth operational amplifier U1B. Preferably, in this embodiment, since the input voltage received by the input terminal of the third DAC output circuit is ±2.5V, and the voltage signal output by the output terminal is ±10V, the resistance values of the resistor R8 and the resistor R11 are 4:1, and the voltage input into the second DAC output circuit can be amplified by 4 times for output. It should be noted that this is only a selection of this embodiment, and the resistance value ratio of the resistor R8 and the resistor R11 can be selected according to the actual circuit requirements.

[0045] As shown in the figure, Figure 10 As shown, the signal conditioning circuit includes a first rectifier circuit and a second rectifier circuit connected with each other; the first rectifier circuit includes a resistor R21, a resistor R22 and a triode Q1; one end of the resistor R21 is connected with the base of the triode Q1, and the other end is connected with one end of the resistor R22; the other end of the resistor R22 is connected with the collector of the triode Q1, and the emitter of the triode Q1 is grounded; the second rectifier circuit includes a rectifier chip, and the input terminal of the rectifier chip is connected with the collector of the triode Q1.

[0046] In the embodiment, the output signal of the single photon counting module (APD) is a 37MHZ TTL signal, and the signal amplitude is 0-5V. The existing single photon counting module (APD) signal output is relatively fast, which can cause signal distortion, such as Figure 11 As shown in the upper signal waveform diagram, the low-frequency voltage signal is less than 0V, and the high-frequency is more than 6V, so the signal needs to be shaped and then input to the MCU. The waveform diagram after rectification is shown in the lower waveform diagram of Figure 11 .

[0047] In the embodiment, the triode Q1 of the first shaping circuit passes the voltage signal less than 0V, and preliminarily shapes the output signal of the single photon counting module (APD). Then, the second rectifier circuit adjusts the voltage greater than 0V to 5V output, so as to meet the requirements of the MCU on the signal. In the embodiment, a high-speed level shifter is used to realize signal shaping.

[0048] The driving acquisition controller is further provided with a USB interface.

[0049] The embodiment also provides a molecular imaging system, which adopts the driving acquisition controller of the molecular imaging system according to any one of the above embodiments.

[0050] Specifically, as shown in Figure 12 , a molecular imaging system includes a driving acquisition controller, a commercial high-voltage driver, a commercial driver, a single photon counting module, a laser, an electro-optical amplitude modulator, an electro-optical deflector, a galvanometer, and a sample. The driving acquisition controller controls the connection of the electro-optical amplitude modulator and the electro-optical deflector through the commercial high-voltage driver; the driving acquisition controller controls the connection of the galvanometer through the commercial driver, the single photon counting module receives the shutter signal sent by the driving acquisition controller, and at the same time, the collected sample electrical signal is transmitted to the single photon counting module.

[0051] In addition, those skilled in the art should understand that although there are many problems in the prior art, each embodiment or technical solution of the present application can only be improved in one or several aspects, and it is not necessary to solve all the technical problems listed in the prior art or background art at the same time. Those skilled in the art should understand that what is not mentioned in a claim should not be regarded as a limitation of the claim.

[0052] Although the terms such as MCU, first DAC circuit, second DAC circuit, signal conditioning circuit, etc. are used more frequently in this document, the possibility of using other terms is not excluded. The use of these terms is only for the convenience of describing and explaining the essence of the present application; any interpretation of them as any kind of additional limitation is contrary to the spirit of the present application; the terms "first", "second", etc. (if any) in the specification and claims of the embodiments of the present application and the above-mentioned drawings are used to distinguish similar objects, and do not have to be used to describe a specific order or sequence.

[0053] Finally, it should be noted that: the above embodiments are only used to illustrate the technical solutions of the present application, and not to limit them; although the present application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that: it can still modify the technical solutions recorded in the foregoing embodiments, or make equivalent replacement for part or all of the technical features; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the scope of the technical solutions of the embodiments of the present application.

Claims

1. A drive acquisition controller for a molecular imaging system, characterized in that: It includes an MCU, a first DAC circuit, a second DAC circuit, and a signal conditioning circuit; the MCU converts a first drive signal into a second drive signal through the first DAC circuit to control a first driver; the MCU converts the first drive signal into a third drive signal through the second DAC circuit to control a second driver; the MCU receives input signals from the APD or sends control signals to the APD through the signal conditioning circuit. The first DAC circuit includes a first buck circuit, a first voltage regulator circuit, and at least one first DAC output circuit. The output terminal of the first buck circuit is connected to the input terminal of the first voltage regulator circuit, and the output terminal of the first voltage regulator circuit is connected to the input terminal of the first DAC output circuit. The first step-down circuit includes resistor R26, a first voltage reference chip, and resistor R27. Resistors R26 and R27 are connected in series across the two ends of the first voltage reference chip. The first voltage regulator circuit includes a first operational amplifier U3, resistor R37, and resistor R45. The other end of resistor R27 is connected to the non-inverting input pin of the first operational amplifier U3. Resistors R37 and R45 are connected across the output pin and the inverting input pin of the first operational amplifier U3. The first DAC output circuit includes a first DAC chip, a second operational amplifier U8B, and a third operational amplifier U8A. Pins 5 and 6 of the first DAC chip are input terminals, and pin 2 of the first DAC chip is an output terminal. Pin 2 is connected to the non-inverting input pin of the second operational amplifier U8B. The output terminal of the second operational amplifier U8B is connected to the non-inverting input pin of the third operational amplifier U8A. The second DAC circuit includes a second buck circuit, a second DAC chip, a second DAC output circuit, and a third DAC output circuit. The output terminal of the second buck circuit is connected to the input pin of the second DAC chip, and the output pin of the second DAC chip is connected to the second DAC output circuit and the third DAC output circuit, respectively. The second buck circuit uses a second voltage reference source chip.

2. The driving acquisition controller of the molecular imaging system according to claim 1, characterized in that: The drive acquisition controller is also equipped with a crystal oscillator, which is connected to the MCU.

3. The driving acquisition controller of the molecular imaging system according to claim 1, characterized in that: The second DAC output circuit includes a fourth operational amplifier U1A, resistors R1 and R2. The non-inverting input pin of the fourth operational amplifier U1A is connected to the first output terminal of the second buck circuit. Resistor R1 is connected across the output pin and the inverting input pin of the fourth operational amplifier U1A. One end of resistor R2 is grounded, and the other end is connected to the inverting input pin of the fourth operational amplifier U1A. The third DAC output circuit includes a fifth operational amplifier U1B, resistor R8, and resistor R11. The non-inverting input pin of the fifth operational amplifier U1B is connected to the second output terminal of the second buck circuit. Resistor R8 is connected across the output pin and the inverting input pin of the fifth operational amplifier U1B. One end of resistor R11 is grounded, and the other end is connected to the inverting input pin of the fifth operational amplifier U1B.

4. The driving acquisition controller of the molecular imaging system according to claim 1, characterized in that: The signal conditioning circuit includes a first rectifier circuit and a second rectifier circuit that are connected to each other. The first rectifier circuit includes resistor R21, resistor R22, and transistor Q1; one end of resistor R21 is connected to the base of transistor Q1, and the other end is connected to one end of resistor R22; the other end of resistor R22 is connected to the collector of transistor Q1; and the emitter of transistor Q1 is grounded. The second rectifier circuit includes a rectifier chip, the input terminal of which is connected to the collector of the transistor Q1.

5. The drive acquisition controller of the molecular imaging system according to claim 1, characterized in that: The drive acquisition controller is also equipped with a USB interface.

6. A molecular imaging system, characterized in that: The driving acquisition controller of the molecular imaging system as described in any one of claims 1-5 is adopted.

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