Multi-layer curve layout correction method, device, terminal, medium and program product
By generating distance patterns and merging layouts in a multi-layer curve layout, the problems of limited accuracy and low freedom in the multi-layer layout are solved, and higher correction accuracy and consistency are achieved.
Patent Information
- Application Number
- CN202411231793.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2024-09-04
- Publication Date
- 2025-03-07
- Estimated Expiration
- 2044-09-04
AI Technical Summary
The existing Manhattan layout correction technology has limited accuracy and low degrees of freedom in multi-layer layouts, resulting in inconsistency between different levels and affecting the performance of the overall layout.
By determining the curve layout and reference curve layout to be corrected in the multi-layer curve layout, the reference curve layout is generated based on the target inclusion distance, and the derivative curve layout to be corrected is obtained, and the modified curve layout is merged with the derivative curve layout to obtain.
The shape correction of the curved layout is realized, so that the corrected layout and reference layout meet the correction constraints, improve the correction accuracy and freedom of the multi-layer layout, and reduce inconsistencies between different levels.
Smart Images

Figure CN118734785B_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of semiconductor manufacturing technology, and in particular to a multi-layer curve layout correction method, device, terminal, medium and program product. Background Art
[0002] Photolithography is the core process in chip manufacturing. The nonlinear effects of the optical system, mask and photoresist system will cause transfer distortion from the design image to wafer manufacturing in the chip manufacturing process. At present, OPC (Optical Proximity Correction) technology is generally used to simulate and correct the mask layout based on the objective function of EPE (Edge Placement Error) or CD (Critical Dimension) to minimize the image distortion caused by nonlinear effects such as optics in the semiconductor manufacturing process.
[0003] In the current OPC correction method, the usual process is to segment the mask pattern based on the Manhattan pattern, determine the control points, move the Manhattan edge, iteratively judge the convergence of the EPE, and obtain the Manhattan mask. However, since the Manhattan OPC correction only allows the pattern to be adjusted in the vertical and horizontal directions, its correction freedom is poor and the accuracy is limited. In addition, in a multi-layer layout, the Manhattan correction may cause inconsistencies between different layers, affecting the performance of the overall layout. Summary of the invention
[0004] In view of the shortcomings of the prior art described above, the purpose of the present application is to provide a multi-layer curved layout correction method, device, terminal, medium and program product to solve the problem of limited accuracy and low degree of freedom when using the existing Manhattan layout correction technology to perform multi-layer layout correction.
[0005] To achieve the above-mentioned purpose and other related purposes, the first aspect of the present application provides a multi-layer curve layout correction method, including: determining the curve layout to be corrected and the reference curve layout in the acquired multi-layer curve layout; according to the acquired target inclusion distance, performing inclusion distance pattern generation processing based on the evaluation point on the reference curve layout to obtain a derived curve layout; merging the curve layout to be corrected and the derived curve layout to obtain a corrected curve layout.
[0006] In some embodiments of the first aspect of the present application, the curve layout to be corrected does not satisfy an inclusion rule with the reference curve layout.
[0007] In some embodiments of the first aspect of the present application, according to the acquired target inclusion distance, the reference curve layout is subjected to inclusion distance pattern generation processing based on the evaluation point to obtain a derived curve layout, including: selecting multiple evaluation points on the edge of the reference curve layout; generating a circular pattern for each evaluation point with the acquired target inclusion distance as the radius; and merging the circular patterns of all evaluation points with the reference curve layout to obtain a derived curve layout.
[0008] In some embodiments of the first aspect of the present application, the method of selecting evaluation points includes: using a fixed step size or a variable step size method to select multiple points on the edge of the pattern of the reference curve layout, and using the selected points as evaluation points.
[0009] In some embodiments of the first aspect of the present application, the modified curve layout and the reference curve layout satisfy an inclusion rule.
[0010] To achieve the above-mentioned purpose and other related purposes, the second aspect of the present application provides a multi-layer curve layout correction device, including: an acquisition module, used to determine the curve layout to be corrected and the reference curve layout in the multi-layer curve layout; a layout correction module, connected to the acquisition module, and according to the acquired target inclusion distance, performing inclusion distance pattern generation processing on the reference curve layout based on the evaluation point to obtain a derived curve layout; the curve layout to be corrected and the derived curve layout are merged to obtain a corrected curve layout.
[0011] In some embodiments of the second aspect of the present application, the curve layout to be corrected does not satisfy an inclusion rule with the reference curve layout.
[0012] To achieve the above-mentioned purpose and other related purposes, the third aspect of the present application provides a computer-readable storage medium having a computer program stored thereon, and the computer program implements the multi-layer curve layout correction method when executed by a processor.
[0013] To achieve the above-mentioned purpose and other related purposes, the fourth aspect of the present application provides a computer program product, which includes a computer program code. When the computer program code runs on a computer, the computer implements the multi-layer curve layout correction method.
[0014] To achieve the above-mentioned purpose and other related purposes, the fifth aspect of the present application provides an electronic terminal, including a memory, a processor and a computer program stored in the memory; the processor executes the computer program to implement the multi-layer curve layout correction method.
[0015] As described above, the multi-layer curve layout correction method, device, terminal, medium and program product of the present application have the following beneficial effects:
[0016] The present application utilizes the evaluation points on the reference curve layout and the generated inclusion distance graph to simply and quickly implement the shape correction of the curve layout itself, so that the corrected layout and the reference layout meet the correction constraint conditions. BRIEF DESCRIPTION OF THE DRAWINGS
[0017] Figure 1 Shown is a flow chart of a multi-layer curve layout correction method in one embodiment of the present application.
[0018] Figure 2 Shown is a schematic diagram of a layout that does not satisfy the inclusion rule in a specific embodiment of the present application.
[0019] Figure 3 Shown is a schematic diagram of a specific embodiment of the present application before the layout is modified.
[0020] Figure 4 Shown is a schematic diagram of a circular pattern of evaluation points in a specific embodiment of the present application.
[0021] Figure 5 Shown is a schematic diagram of a modified layout in a specific embodiment of the present application.
[0022] Figure 6 Shown is a schematic structural diagram of a multi-layer curve layout correction device in one embodiment of the present application.
[0023] Figure 7 Shown is a schematic diagram of the structure of an electronic terminal in one embodiment of the present application. DETAILED DESCRIPTION
[0024] The following describes the embodiments of the present application through specific examples, and those skilled in the art can easily understand other advantages and effects of the present application from the contents disclosed in this specification. The present application can also be implemented or applied through other different specific embodiments, and the details in this specification can also be modified or changed in various ways based on different viewpoints and applications without departing from the spirit of the present application. It should be noted that the following embodiments and features in the embodiments can be combined with each other without conflict.
[0025] In the embodiments of the present application, words such as "first" and "second" are used to distinguish the same or similar items with substantially the same functions and effects. Those skilled in the art can understand that words such as "first" and "second" do not limit the quantity and execution order, and words such as "first" and "second" do not necessarily limit the difference.
[0026] It should be noted that in the embodiments of the present application, words such as "exemplary" or "for example" represent examples, illustrations or descriptions. Any embodiment or design described as "exemplary" or "for example" in the present application should not be interpreted as being more preferred or more advantageous than other embodiments or designs. Specifically, the use of words such as "exemplary" or "for example" is intended to present related concepts in a specific way.
[0027] In the embodiments of the present application, "at least one" refers to one or more, and "plurality" refers to two or more. "And / or" describes the association relationship of associated objects, indicating that three relationships may exist. For example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone, where A and B can be singular or plural. The character " / " generally indicates that the previous and next associated objects are in an "or" relationship. "At least one of the following" or similar expressions refers to any combination of these items, including any combination of single or plural items. For example, at least one of a, b or c can represent: a, b, c, ab, ac, bc or abc, where a, b, c can be single or multiple.
[0028] The present application provides a multi-layer curve layout correction method, device, terminal, medium and program product, the method comprising: determining the curve layout to be corrected and the reference curve layout in the acquired multi-layer curve layout; performing a containing distance pattern generation process based on an evaluation point on the reference curve layout according to the acquired target containing distance, so as to obtain a derived curve layout; merging the curve layout to be corrected and the derived curve layout to obtain a corrected curve layout. The present application utilizes the evaluation points on the reference curve layout and the generated containing distance graph to simply and quickly realize the shape correction of the curve layout itself, so that the corrected layout and the reference layout meet the correction constraint conditions.
[0029] To facilitate understanding of the embodiments of the present application, first Figure 1 Detailed description. Figure 1 The flowchart of a multi-layer curve layout correction method in an embodiment of the present invention is shown. The multi-layer curve layout correction method in this embodiment mainly includes the following steps:
[0030] Step S11: determining the curve layout to be corrected and the reference curve layout in the acquired multi-layer curve layout.
[0031] In one embodiment, the curve layout to be corrected does not satisfy an enclosure rule with the reference curve layout.
[0032] It should be understood that in chip layout design, enclosure rules are an important design rule that defines the minimum coverage size between different levels. These rules ensure that certain structures in the layout can properly cover or contact other structures to ensure the effectiveness of electrical connections or meet process requirements.
[0033] For example, from Figure 2 It can be seen that the inclusion rule is not satisfied between curve layout A and curve layout B. Specifically, Figure 2 The curve map B on the left side of the figure has a part that is not included in the curve map A. Figure 2 The curve layout B on the right side is completely covered by the curve layout A, but the edge of this layout is very close to the edge of the curve layout A and does not meet the minimum coverage size. Therefore, it is determined that the curve layout A is the curve layout to be corrected, and the curve layout B is the reference curve layout.
[0034] Step S12: According to the acquired target inclusion distance, the reference curve layout is processed by inclusion distance pattern generation based on the evaluation point to obtain a derived curve layout; the curve layout to be corrected and the derived curve layout are merged to obtain a corrected curve layout.
[0035] In one embodiment, the target inclusion distance is generally the minimum measured distance r.
[0036] It should be understood that the minimum measured distance in chip layout design refers to the minimum space size specified in the layout design rules. These sizes are used to ensure that there is sufficient spacing between different structures in the layout to avoid short circuits, open circuits or other problems that may affect circuit performance.
[0037] In one embodiment, according to the acquired target inclusion distance, the reference curve layout is processed for inclusion distance pattern generation based on the evaluation points to obtain a derived curve layout, including: selecting multiple evaluation points on the edge of the reference curve layout; generating a circular pattern for each evaluation point with the acquired target inclusion distance as the radius; and merging the circular patterns of all evaluation points with the reference curve layout to obtain a derived curve layout.
[0038] In one embodiment, the method of selecting the evaluation points includes: selecting a plurality of points on the edge of the pattern of the reference curve layout by using a fixed step size or a variable step size, and using the selected points as the evaluation points.
[0039] The following will explain the correction process in detail with the accompanying drawings:
[0040] by Figure 3 Take the two layouts in as examples. Figure 3 It can be seen that the first curve layout and the second curve layout do not satisfy the inclusion rule. Specifically, Figure 3 Although the second curve layout on the left and right sides is completely covered by the first curve layout, the edge of the layout is very close to the edge of the first curve layout and does not meet the minimum coverage size. Therefore, the first curve layout is determined to be the curve layout to be corrected, and the second curve layout is the reference curve layout.
[0041] Furthermore, a fixed step size or a variable step size is adopted to select a plurality of points on the edge of the pattern of the reference curve layout, and the selected points are used as evaluation points.
[0042] It should be understood that in fixed-step division, the curve layout can be divided into several segments at equal intervals, and the length or angle of each segment is fixed. The advantage of fixed step size is that it is simple to implement, easy to control and predict, because the length of each segment is consistent. Variable step size division allows the length or angle of each segment to be dynamically adjusted according to the local characteristics of the curve layout. A shorter step size is used where the curve layout changes more dramatically, and a longer step size is used where the changes are gentle. The advantage of variable step size is that the shape of the curve layout can be more accurately represented, especially in areas with drastic changes.
[0043] It should be noted that those skilled in the art can set the step length according to actual needs, and the present invention does not limit this.
[0044] Furthermore, if Figure 4 As shown, with each evaluation point as the center and the target inclusion distance r as the radius, a circular pattern for each evaluation point is generated.
[0045] Furthermore, after the circular patterns of all evaluation points are generated, the circular patterns of all evaluation points are merged with the reference curve layout to obtain a derived curve layout.
[0046] Further, the curve layout to be corrected and the derived curve layout are merged to obtain a corrected curve layout, and the corrected curve layout is as follows: Figure 5 shown.
[0047] In one embodiment, the modified curve layout and the reference curve layout satisfy the inclusion rule, that is, all points on the edge of the modified curve layout maintain a minimum measurement distance r with the reference curve layout.
[0048] Figure 6 is a schematic block diagram of a multi-layer curve layout correction device provided in an embodiment of the present application. Figure 6 As shown, the device 6 comprises:
[0049] An acquisition module 61 is used to determine a curve layout to be corrected and a reference curve layout in the multi-layer curve layout;
[0050] The layout correction module 62 is connected to the acquisition module 61, and performs inclusion distance pattern generation processing based on the evaluation point on the reference curve layout according to the acquired target inclusion distance to obtain a derived curve layout; the curve layout to be corrected and the derived curve layout are merged to obtain a corrected curve layout.
[0051] It should be understood that the specific process of each module executing the above corresponding steps has been described in detail in the above method embodiment, and for the sake of brevity, it will not be repeated here.
[0052] It should also be understood that the division of modules in the embodiments of the present application is schematic and is only a logical function division. There may be other division methods in actual implementation. In addition, each functional module in each embodiment of the present application may be integrated into a processor, or may exist physically separately, or two or more modules may be integrated into one module. The above-mentioned integrated modules may be implemented in the form of hardware or in the form of software functional modules.
[0053] In some embodiments of the first aspect of the present application, the curve layout to be corrected does not satisfy an inclusion rule with the reference curve layout.
[0054] In some embodiments of the first aspect of the present application, according to the acquired target inclusion distance, the reference curve layout is subjected to inclusion distance pattern generation processing based on the evaluation point to obtain a derived curve layout, including: selecting multiple evaluation points on the edge of the reference curve layout; generating a circular pattern for each evaluation point with the acquired target inclusion distance as the radius; and merging the circular patterns of all evaluation points with the reference curve layout to obtain a derived curve layout.
[0055] In some embodiments of the first aspect of the present application, the method of selecting evaluation points includes: using a fixed step size or a variable step size method to select multiple points on the edge of the pattern of the reference curve layout, and using the selected points as evaluation points.
[0056] In some embodiments of the first aspect of the present application, the modified curve layout and the reference curve layout satisfy an inclusion rule.
[0057] To achieve the above-mentioned purpose and other related purposes, the second aspect of the present application provides a multi-layer curve layout correction device, including: an acquisition module, used to determine the curve layout to be corrected and the reference curve layout in the multi-layer curve layout; a layout correction module, connected to the acquisition module, and according to the acquired target inclusion distance, performing inclusion distance pattern generation processing on the reference curve layout based on the evaluation point to obtain a derived curve layout; the curve layout to be corrected and the derived curve layout are merged to obtain a corrected curve layout.
[0058] In some embodiments of the second aspect of the present application, the curve layout to be corrected does not satisfy an inclusion rule with the reference curve layout.
[0059] Figure 7 is a schematic block diagram of an electronic terminal provided in an embodiment of the present application. Figure 7 As shown, the electronic terminal includes: at least one processor 701, a memory 702, at least one network interface 703 and a user interface 705. The various components in the device are coupled together through a bus system 707. It can be understood that the bus system 704 is used to realize the connection and communication between these components. In addition to the data bus, the bus system 704 also includes a power bus, a control bus and a status signal bus. However, for the sake of clarity, Figure 7 In the specification, various buses are labeled as bus systems.
[0060] The user interface 705 may include a display, a keyboard, a mouse, a trackball, a click gun, keys, buttons, a touch pad or a touch screen.
[0061] It is understood that the memory 702 can be a volatile memory or a non-volatile memory, and can also include both volatile and non-volatile memories. Among them, the non-volatile memory can be a read-only memory (ROM), a programmable read-only memory (PROM), which is used as an external cache. By way of exemplary but not limiting explanation, many forms of RAM are available, such as static random access memory (SRAM), synchronous static random access memory (SSRAM). The memory described in the embodiments of the present invention is intended to include but is not limited to these and any other suitable categories of memory.
[0062] The memory 702 in the embodiment of the present invention is used to store various types of data to support the operation of the electronic terminal 700. Examples of these data include: any executable program used to operate on the electronic terminal 700, such as an operating system 7021 and an application 7022; the operating system 7021 includes various system programs, such as a framework layer, a core library layer, a driver layer, etc., for implementing various basic services and processing hardware-based tasks. The application 7022 can include various applications, such as a media player (Media Player), a browser (Browser), etc., for implementing various application services. The multi-layer curve layout correction method provided in the embodiment of the present invention can be included in the application 7022.
[0063] The method disclosed in the above embodiment of the present invention can be applied to the processor 701, or implemented by the processor 701. The processor 701 may be an integrated circuit chip with signal processing capabilities. In the implementation process, each step of the above method can be completed by the hardware integrated logic circuit in the processor 701 or the instruction in the form of software. The above processor 701 may be a general processor, a digital signal processor (DSP, Digital Signal Processor), or other programmable logic devices, discrete gates or transistor logic devices, discrete hardware components, etc. The processor 701 can implement or execute the various methods, steps and logic block diagrams disclosed in the embodiment of the present invention. The general processor 701 can be a microprocessor or any conventional processor, etc. The steps of the accessory correction method provided in the embodiment of the present invention can be directly embodied as a hardware decoding processor to perform, or a combination of hardware and software modules in the decoding processor to perform. The software module can be located in a storage medium, which is located in a memory, and the processor reads the information in the memory and completes the steps of the above method in combination with its hardware.
[0064] In an exemplary embodiment, the electronic terminal 700 may be implemented by one or more application specific integrated circuits (ASIC), DSP, programmable logic device (PLD), complex programmable logic device (CPLD) to execute the aforementioned method.
[0065] According to the method provided in the embodiment of the present application, the present application also provides a computer program product, which includes: a computer program code, when the computer program code is run on a computer, the computer executes Figure 1 The multi-layer curve layout correction method of the illustrated embodiment.
[0066] According to the method provided in the embodiment of the present application, the present application also provides a computer-readable storage medium, which stores a program code, and when the program code is run on a computer, the computer executes Figure 1 The multi-layer curve layout correction method of the illustrated embodiment.
[0067] The terms "component", "module", "system", etc. used in this specification are used to represent computer-related entities, hardware, firmware, a combination of hardware and software, software, or software in execution. For example, a component can be, but is not limited to, a process, a processor, an object, an executable file, an execution thread, a program and / or a computer running on a processor. By way of illustration, both applications and computing devices running on a computing device can be components. One or more components may reside in a process and / or an execution thread, and a component may be located on a computer and / or distributed between two or more computers. In addition, these components may be executed from various computer-readable media having various data structures stored thereon. Components may, for example, communicate through local and / or remote processes according to signals having one or more data packets (e.g., data from two components interacting with another component between a local system, a distributed system and / or a network, such as the Internet interacting with other systems through signals).
[0068] Those of ordinary skill in the art will appreciate that the various illustrative logical blocks and steps described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professional and technical personnel may use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.
[0069] Those skilled in the art can clearly understand that, for the convenience and brevity of description, the specific working processes of the systems, devices and units described above can refer to the corresponding processes in the aforementioned method embodiments and will not be repeated here.
[0070] In the several embodiments provided in the present application, it should be understood that the disclosed systems, devices and methods can be implemented in other ways. For example, the device embodiments described above are only schematic. For example, the division of units is only a logical function division. There may be other division methods in actual implementation. For example, multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of devices or units, which can be electrical, mechanical or other forms.
[0071] The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.
[0072] In addition, each functional unit in each embodiment of the present application may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit.
[0073] In the above embodiments, the functions of each functional unit can be implemented in whole or in part by software, hardware, firmware or any combination thereof. When implemented using software, it can be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer instructions (programs). When the computer program instructions (programs) are loaded and executed on a computer, the process or function according to the embodiment of the present application is generated in whole or in part. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. The computer instructions can be stored in a computer-readable storage medium, or transmitted from one computer-readable storage medium to another computer-readable storage medium. For example, the computer instructions can be transmitted from a website site, computer, server or data center to another website site, computer, server or data center by wired (e.g., coaxial cable, optical fiber, digital subscriber line (DSL)) or wireless (e.g., infrared, wireless, microwave, etc.) mode. The computer-readable storage medium can be any available medium that can be accessed by a computer or a data storage device such as a server or data center that includes one or more available media integrated. Available media may be magnetic media (e.g., floppy disks, hard disks, tapes), optical media (e.g., high-density digital video discs (DVDs), or semiconductor media (e.g., solid state disks (SSDs)).
[0074] If the function is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present application, or the part that contributes to the prior art or the part of the technical solution, can be embodied in the form of a software product. The computer software product is stored in a storage medium, including a number of instructions to enable a computer device (which can be a personal computer, server, or network device, etc.) to execute all or part of the steps of the various embodiments of the present application. The aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (ROM), random access memory (RAM), disk or optical disk, and other media that can store program codes.
[0075] The above is only a specific implementation of the present application, but the protection scope of the present application is not limited thereto. Any person skilled in the art who is familiar with the present technical field can easily think of changes or substitutions within the technical scope disclosed in the present application, which should be included in the protection scope of the present application. Therefore, the protection scope of the present application should be based on the protection scope of the claims.
[0076] In summary, the present application provides a multi-layer curve layout correction method, device, terminal, medium and program product, the method comprising: determining the curve layout to be corrected and the reference curve layout in the acquired multi-layer curve layout; performing a containing distance pattern generation process based on the evaluation point on the reference curve layout according to the acquired target containing distance, so as to obtain a derived curve layout; merging the curve layout to be corrected and the derived curve layout to obtain a corrected curve layout. The present application utilizes the evaluation points on the reference curve layout and the generated containing distance graph to simply and quickly realize the shape correction of the curve layout itself, so that the corrected layout and the reference layout meet the correction constraint conditions. Therefore, the present application effectively overcomes the various shortcomings in the prior art and has a high industrial utilization value.
[0077] The above embodiments are merely illustrative of the principles and effects of the present application and are not intended to limit the present application. Anyone familiar with the technology may modify or change the above embodiments without violating the spirit and scope of the present application. Therefore, all equivalent modifications or changes made by a person of ordinary skill in the art without departing from the spirit and technical ideas disclosed in the present application shall still be covered by the claims of the present application.
Claims
1. A multi-layer curve layout correction method, characterized in that: include: Determining the curve layout to be corrected and the reference curve layout in the acquired multi-layer curve layout; According to the acquired target inclusion distance, the reference curve layout is processed by inclusion distance pattern generation based on the evaluation point to obtain a derived curve layout; wherein, according to the acquired target inclusion distance, the reference curve layout is processed by inclusion distance pattern generation based on the evaluation point to obtain a derived curve layout, including: Selecting a plurality of evaluation points on the edge of the reference curve pattern; Generate a circular pattern for each evaluation point with the acquired target inclusion distance as the radius; Merging the circular patterns of all evaluation points with the reference curve layout to obtain a derived curve layout; The curve layout to be corrected and the derived curve layout are merged to obtain a corrected curve layout.
2. The multi-layer curve layout correction method according to claim 1, characterized in that: The curve layout to be corrected does not satisfy the inclusion rule with the reference curve layout.
3. The multi-layer curve layout correction method according to claim 1, characterized in that: Methods for selecting assessment points include: A fixed step size or a variable step size is adopted to select a plurality of points on the edge of the pattern of the reference curve layout, and the selected points are used as evaluation points.
4. The multi-layer curve layout correction method according to claim 1, characterized in that: The modified curve layout satisfies the inclusion rule with the reference curve layout.
5. A multi-layer curve layout correction device, characterized in that: include: An acquisition module, used for determining a curve layout to be corrected and a reference curve layout in a multi-layer curve layout; The layout correction module is connected to the acquisition module, and performs a processing of generating a pattern of inclusion distance based on the evaluation point on the reference curve layout according to the acquired target inclusion distance, so as to obtain a derived curve layout; wherein, the method of performing a processing of generating a pattern of inclusion distance based on the evaluation point on the reference curve layout according to the acquired target inclusion distance to obtain a derived curve layout includes: Selecting a plurality of evaluation points on the edge of the reference curve pattern; Generate a circular pattern for each evaluation point with the acquired target inclusion distance as the radius; Merging the circular patterns of all evaluation points with the reference curve layout to obtain a derived curve layout; The curve layout to be corrected and the derived curve layout are merged to obtain a corrected curve layout.
6. The multi-layer curve layout correction device according to claim 5, characterized in that: The curve layout to be corrected does not satisfy the inclusion rule with the reference curve layout.
7. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the method according to any one of claims 1 to 4 is implemented.
8. A computer program product, characterized in that The computer program product includes a computer program code, and when the computer program code is executed on a computer, the computer is enabled to implement the method according to any one of claims 1 to 4.
9. An electronic terminal comprising a memory, a processor and a computer program stored in the memory, characterized in that: The processor executes the computer program to implement the method according to any one of claims 1 to 4.
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