An optical screening machine drive and control system and method

Through the integrated board and card of the motor driver and light source driver, combined with the FPGA chip and fuzzy control algorithm, the high cost and synchronization deviation problems of the optical screening electromechanical control system are solved, and an optical screening machine drive control system with lower cost and higher synchronization accuracy is realized.

CN118751562BActive Publication Date: 2025-07-22SHENZHEN MOSHENGTAI TECH CO LTD
View PDF 1 Cites 0 Cited by

Patent Information

Application Number
CN202410854685.X
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2024-06-28
Publication Date
2025-07-22
Estimated Expiration
2044-06-28

AI Technical Summary

Technical Problem

The dispersed distribution of the electrical control system of existing optical screening machines leads to high costs, and the synchronization deviation of the drive motor affects the system accuracy.

Method used

The board integrating motor driver, motion control card, light source driver, output input power supply and network port uses FPGA chip to process sensor signals and motor PWM signals, and adjusts motor synchronization errors through fuzzy control algorithms.

Benefits of technology

It reduces hardware design costs, simplifies wiring, improves motor synchronization performance, and enhances the system's anti-interference ability and synchronization accuracy.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN118751562B_ABST
    Figure CN118751562B_ABST
Patent Text Reader

Abstract

The present invention belongs to the technical field of optical screening machines, and provides an optical screening machine drive and control system and method. The system includes a board card, on which a motor driver, a motion control card, a light source driver, an input / output power supply, a main power supply, and at least two network interfaces are integrally integrated. The motion control card includes a controller and multiple FPGA chips. The controller is used to allocate multiple FPGA chips so that the multiple FPGA chips implement a motion control algorithm, process sensor signals, and output a motor PWM signal corresponding to the motion control algorithm and output a light source PWM signal. The motor driver includes multiple motor drive circuits for receiving multiple paths of motor PWM signals. The light source driver is used to drive the LED lamp beads on the optical screening machine. One of the two network interfaces is an input end, and the other network interface is an output end. The present invention can solve the problem of high cost caused by the decentralized distribution of the electronic control of the optical screening machine in the prior art.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] The present invention relates to the technical field of optical screening machines, and particularly to a drive control system and method for an optical screening machine. Background Art

[0002] The existing electrical control of optical screening machines consists of a motor driver, a motion control card, and a light source driver, which are connected by wiring. The circuit is complex, and the anti-interference ability is poor. Moreover, the hardware circuits of the driver, the motion control card, and the light source driver need to be isolated, which increases a lot of hardware costs. The software also requires complex communication design.

[0003] In addition, there are many motion mechanisms on the existing optical screening machines that require motor control and drive, such as conveyor belts, robotic arms, vibrating bowls, etc. These motion mechanisms are particularly sensitive to action synchronization. When there are deviations in the actions, it is easy to cause errors in the optical recognition system and cannot perform the optical screening actions well. The action synchronization of these mechanisms is determined by the synchronization state of the motors. When there is a deviation in a certain motor, it often affects the entire system. Summary of the Invention

[0004] In view of the above technical problems, the present invention provides a drive control system and method for an optical screening machine to solve the problem of high cost caused by the decentralized distribution of the electrical control of the optical screening machine in the prior art, and to solve the problem of synchronization deviation of the drive motors of the optical screening machine.

[0005] Other features and advantages of the present disclosure will become apparent from the following detailed description, or will be partially learned through the practice of the present disclosure.

[0006] According to one aspect of the present invention, an optical screening machine drive and control system is disclosed. The system includes a board card, on which a motor driver, a motion control card, a light source driver, an input / output power supply, a main power supply, and at least two network interfaces are integrally integrated. The motion control card includes a controller and multiple FPGA chips. The controller is used to allocate multiple FPGA chips so that the multiple FPGA chips implement a motion control algorithm, process sensor signals, and output a motor PWM signal corresponding to the motion control algorithm and output a light source PWM signal. The motor driver includes multiple motor drive circuits for receiving multiple paths of the motor PWM signals. The motor drive circuits are powered by the input / output power supply. Each motor drive circuit includes an opto-isolator, a current-limiting resistor, a driving MOS transistor, and a rectifying diode. The multiple motor drive circuits are used to drive each motor on the optical screening machine after receiving the corresponding motor PWM signals. The light source driver is used to drive the LED lamp beads on the optical screening machine. The main power supply is used to step down 24V to supply power to the input / output power supply and the light source driver. One of the two network interfaces is an input end for connecting to a PC end or cascading with the upper-level system, and the other network interface is an output end for connecting to the optical screening machine or cascading with the lower-level system.

[0007] Further, the FPGA chip is further used to: adjust the motor PWM signal according to the actual rotation speed and driving current of the motor fed back by the sensor signal, in combination with the preset motion control algorithm.

[0008] Further, the sensor signal is optically isolated and current-limited by a resistor before being input to the FPGA chip.

[0009] According to another aspect of the present disclosure, an optical screening machine drive and control method is provided. The method is applied to the above system, and the method includes:

[0010] Based on the motion control algorithm, according to the received sensor signal, obtain the rotation speeds of N motors that need to be synchronized, calculate the total average rotation speed of all motors, and generate a first compensation signal by calculating the deviation between the rotation speed of the i-th motor and the total average rotation speed, where i and N are positive integers, and i is less than or equal to N;

[0011] Calculate the sub-average rotation speed of the other motors except the i-th motor, and generate a second compensation signal by calculating the deviation between the rotation speed of the i-th motor and the sub-average rotation speed;

[0012] According to the first compensation signal, the second compensation signal, and the influence degree of the i-th motor on the synchronization error, calculate the compensation speed error of the i-th motor;

[0013] Based on the compensated speed error, gradually adjust the corresponding motor PWM signal so that the difference between the speed of the i-th motor and the total average speed gradually approaches zero, and the difference between the speed of the i-th motor and the sub-average speed gradually approaches zero.

[0014] Further, the formula for expressing the compensated speed error is:

[0015]

[0016] e i is the compensated speed error, ω i is the speed of the i-th motor, ω avg is the total average speed, is the sub-average speed, K ij is the synchronization coefficient between the i-th motor and the j-th motor, and the synchronization coefficient represents the influence degree of different motors on the synchronization error.

[0017] Further, when making the difference between the speed of the i-th motor and the total average speed gradually approach zero, and the difference between the speed of the i-th motor and the sub-average speed gradually approach zero, it includes:

[0018] Calculation formula:

[0019]

[0020]

[0021] where ω i () is the speed of the i-th motor at time t.

[0022] Further, the method further includes:

[0023] According to the received sensor signal, obtain the speed of a single motor, subtract the speed of the single motor from the desired speed set by the FPGA chip to obtain a speed deviation, continuously calculate the speed deviation to obtain a deviation change rate;

[0024] Select the quantization factor and the fuzzy theory domain corresponding to the magnitudes of the speed deviation and the deviation change rate, and the fuzzy theory domain is the variable range of the input and output;

[0025] Based on the quantization factor, convert the speed deviation and the deviation change rate into fuzzy values, and map the fuzzy values into a fuzzy set;

[0026] Based on the preset fuzzy rules, perform inference on the fuzzy set to obtain a fuzzy output;

[0027] Defuzzify the fuzzy output to obtain the motor PWM signal for controlling the speed of the corresponding motor, so that the actual speed of the motor is equal to the desired speed or the difference is within the threshold range.

[0028] Further, after defuzzifying the fuzzy output, obtain the motor speed adjustment amount, and add the motor speed adjustment amount to the original speed setting parameter of the FPGA chip, so that after the speed setting parameter of the FPGA chip is updated, the motor PWM signal for controlling the speed of the corresponding motor is output.

[0029] The technical solution of the present disclosure has the following beneficial effects:

[0030] The disclosed drive and control system integrates a motor driver, a motion control card, a light source driver, an output and input power supply, a main power supply, and a network connection port, greatly reducing the overall hardware design cost. The accessories are small in size, making the wiring of the screening machine simpler, occupying less space, and being more secure and reliable in communication.

[0031] The proposed drive and control method calculates the total average speed and sub-average speed of multiple motors that need to be synchronized, which can reduce the impact of the motors to be adjusted on the entire system and improve the performance of multi-motor synchronization. Description of the Drawings

[0032] Figure 1 It is a structural block diagram of an optical screening machine drive and control system in an embodiment of this specification;

[0033] Figure 2 It is a circuit schematic diagram of the controller in an embodiment of this specification;

[0034] Figure 3 It is a circuit schematic diagram of the FPGA chip in an embodiment of this specification;

[0035] Figure 4 It is a circuit schematic diagram of the motor drive circuit in an embodiment of this specification;

[0036] Figure 5 It is a circuit schematic diagram of the light source driver in an embodiment of this specification;

[0037] Figure 6 It is a flowchart of an optical screening machine drive and control method in an embodiment of this specification

[0038] Figure 7 It is a computer-readable storage medium storing an optical screening machine drive and control method in an embodiment of this specification. Detailed Embodiments

[0039] Example embodiments will now be described more fully with reference to the accompanying drawings. However, the example embodiments can be implemented in various forms and should not be construed as limited to the examples set forth herein; rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the concept of the example embodiments to those skilled in the art. The features, structures, or characteristics described may be combined in any suitable manner in one or more embodiments. In the following description, numerous specific details are provided to give a thorough understanding of the embodiments of the present disclosure. However, those skilled in the art will recognize that the technical solutions of the present disclosure may be practiced without one or more of the specific details, or other methods, components, systems, steps, etc. may be employed. In other cases, well-known technical solutions are not shown or described in detail to avoid obscuring aspects of the present disclosure.

[0040] In addition, the accompanying drawings are only schematic illustrations of the present disclosure. The same reference numerals in the drawings denote the same or similar parts, and thus repeated descriptions thereof will be omitted. Some of the block diagrams shown in the drawings are functional entities and do not necessarily correspond to physically or logically independent entities. These functional entities may be implemented in software form, or in one or more hardware modules or integrated circuits, or in different networks and / or processor systems and / or controller systems.

[0041] As Figure 1 shown, an optical screening machine drive and control system is provided in an embodiment of this specification. The system includes a board card, on which a motor driver 101, a motion control card, a light source driver 105, an input / output power supply 103, a main power supply 104, and at least two network interfaces are integrally integrated. The motion control card includes a controller 102 and multiple FPGA chips 103. The controller 102 is used to allocate the multiple FPGA chips 103 so that the multiple FPGA chips 103 implement a motion control algorithm, process sensor signals, and output a motor PWM signal and a light source PWM signal corresponding to the motion control algorithm. The motor driver 101 includes multiple motor drive circuits for receiving multiple paths of the motor PWM signals. The motor drive circuits are powered by the input / output power supply 103. Each motor drive circuit includes an opto-isolator, a current-limiting resistor, a driving MOS transistor, and a rectifying diode. The multiple motor drive circuits are used to drive each motor on the optical screening machine after receiving the corresponding motor PWM signals. The light source driver 105 is used to drive the LED lamp beads on the optical screening machine. The main power supply 104 is used to step down 24V and supply power to the input / output power supply 103 and the light source driver 105. One of the two network interfaces is an input end for connecting to a PC or cascading with the upper-level system, and the other network interface is an output end for connecting to the optical screening machine or cascading with the lower-level system.

[0042] The FPGA chip 103 is further configured to: adjust the motor PWM signal according to the actual rotational speed and drive current of the motor fed back by the sensor signal and in combination with the preset motion control algorithm.

[0043] Before being input to the FPGA chip 103, the sensor signal is optically isolated and current-limited by a resistor.

[0044] Exemplarily, as Figures 2 - 5 shown, the circuit schematics of the controller, FPGA chip, motor drive circuit, and light source driver are respectively provided. The circuit schematic is only one or more exemplary ones. In fact, there are multiple FPGA chips, and the port signal names of each FPGA chip are not the same. Similarly, there are multiple motor drive circuits and light source drivers. The controller 102 can be a CPU of model STM32F103ZET6, the FPGA signal can use a chip of model NEW_XC6SLX16-2FG256I_FBGA256, and the motor drive circuit includes opto-isolators U45-U48, current-limiting resistors R134-R137, drive MOS transistors Q13-A, Q13-B, Q14-A, Q14-B, rectifier diodes D30-D34, etc.

[0045] Among them, the disclosed drive and control system integrates the motor driver, motion control card, light source driver, input / output power supply, main power supply, and network connection port, greatly reducing the overall hardware design cost. The accessories are small in volume, making the wiring of the screening machine simpler, occupying less space, and being more secure and reliable in communication.

[0046] Based on the same idea, as Figure 6 shown, the exemplary embodiment of the present disclosure further provides an optical screening machine drive and control method. The execution subject of this method can be a terminal device such as a computer or a server, or hardware such as the controller and FPGA chip in the above system. This method may specifically include the following steps S101 to S104:

[0047] In step S101, based on the motion control algorithm, according to the received sensor signal, obtain the rotational speeds of N motors that need to be synchronized, calculate the total average rotational speed of all motors, and generate a first compensation signal by calculating the deviation between the rotational speed of the i-th motor and the total average rotational speed, where i and N are positive integers, and i is less than or equal to N.

[0048] In step S102, calculate the sub-average rotational speed of the other motors except the i-th motor, and generate a second compensation signal by calculating the deviation between the rotational speed of the i-th motor and the sub-average rotational speed.

[0049] In step S103, according to the first compensation signal, the second compensation signal, and the influence degree of the i-th motor on the synchronization error, the compensation speed error of the i-th motor is calculated.

[0050] In step S104, based on the compensation speed error, the corresponding motor PWM signal is gradually adjusted so that the difference between the rotation speed of the i-th motor and the total average rotation speed gradually approaches zero, and the difference between the rotation speed of the i-th motor and the sub-average rotation speed gradually approaches zero.

[0051] As a supplement, the expression formula of the compensation speed error is:

[0052]

[0053] e i is the compensation speed error, ω i is the rotation speed of the i-th motor, ω avg is the total average rotation speed, is the sub-average rotation speed, K ij is the synchronization coefficient between the i-th motor and the j-th motor. The synchronization coefficient is the influence degree of different motors on the synchronization error, that is, the interaction or coupling strength between motors. Generally, it is a preset value obtained through finite experiments.

[0054] When making the difference between the rotation speed of the i-th motor and the total average rotation speed gradually approach zero, and making the difference between the rotation speed of the i-th motor and the sub-average rotation speed gradually approach zero, it includes:

[0055] Calculation formula:

[0056]

[0057]

[0058] where ω i () is the rotation speed of the i-th motor at time t. In this formula, the meaning of the first expression is: for motor i, when time t approaches infinity, the result of dividing the difference between the speed of motor i and the average speed of all other motors by the total number of motors approaches 0. This means that the speed of this motor will eventually synchronize with the average speed of the entire system. The second expression is: for motor i, when time t approaches infinity, the result of dividing the difference between the speed of motor i and the average speed of other motors except itself by the total number of motors minus one approaches 0. This means that the speed of this motor will eventually synchronize with the average speed of the system except itself, ensuring that after a long time of operation, all motors can reach a synchronous state.

[0059] In the above embodiments, the proposed driving and control method calculates the total average speed and sub-average speed of multiple motors that need to be synchronized, which can reduce the impact of the motors to be adjusted on the entire system, improve the performance of multi-motor synchronization, reduce the complexity of the system algorithm, and shorten the system response time.

[0060] In another embodiment, to ensure the comprehensive performance of multi-motor synchronization, in addition to the above method, a suitable synchronization algorithm can also be combined to ensure the control accuracy of a single motor. The method further includes:

[0061] According to the received sensor signal, obtain the speed of a single motor, subtract the speed of the single motor from the expected speed set by the FPGA chip to obtain a speed deviation, continuously calculate the speed deviation to obtain a deviation change rate; select the quantization factor and fuzzy theory domain corresponding to the magnitudes of the speed deviation and the deviation change rate, where the fuzzy theory domain is the variable range of the input and output; based on the quantization factor, convert the speed deviation and the deviation change rate into fuzzy values, and map the fuzzy values into a fuzzy set; based on pre-set fuzzy rules, perform inference on the fuzzy set to obtain a fuzzy output; defuzzify the fuzzy output to obtain a motor speed adjustment amount, and add the motor speed adjustment amount to the original speed setting parameter of the FPGA chip, so that after the speed setting parameter of the FPGA chip is updated, the motor PWM signal for controlling the corresponding motor is output, making the actual speed of the motor equal to the expected speed or the difference within the threshold range.

[0062] Among them, based on the fuzzy control algorithm, the FPGA parameters are dynamically adjusted to optimize the drive signal, so that the actual output of the system can quickly and accurately track the expected speed and remain stable in the face of internal or external disturbances of the system.

[0063] Based on the same idea, the exemplary embodiments of the present disclosure also provide a computer-readable storage medium, on which a program product capable of implementing the above methods of this specification is stored. In some possible embodiments, various aspects of the present disclosure can also be implemented in the form of a program product, which includes program code. When the program product runs on a terminal device, the program code is used to cause the terminal device to execute the steps described in the "Optical Screening Machine Driving and Control Method" section of this specification according to various exemplary embodiments of the present disclosure.

[0064] Reference Figure 7As shown, a program product 700 for implementing the above method according to an exemplary embodiment of the present disclosure is described. It may be a portable compact disc read-only memory (CD-ROM), include program code, and may run on a terminal device, such as a personal computer. However, the program product of the present disclosure is not limited thereto. In this document, a readable storage medium may be any tangible medium that contains or stores a program that can be used by or in conjunction with an instruction execution system, system, or device.

[0065] The program product may adopt any combination of one or more readable media. The readable media may be a readable signal medium or a readable storage medium. The readable storage medium may, for example, but not be limited to, an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any combination of the above. More specific examples (a non-exhaustive list) of the readable storage medium include: an electrical connection with one or more wires, a portable disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the above.

[0066] The computer-readable signal medium may include a data signal propagated in a baseband or as part of a carrier wave, which carries the readable program code. Such a propagated data signal may take various forms, including but not limited to electromagnetic signals, optical signals, or any suitable combination of the above. The readable signal medium may also be any readable medium other than the readable storage medium, which can send, propagate, or transmit a program for use by or in conjunction with an instruction execution system, system, or device.

[0067] The program code contained on the readable medium may be transmitted using any appropriate medium, including but not limited to wireless, wired, optical fiber, RF, etc., or any suitable combination of the above.

[0068] Program code for performing the operations of the present disclosure may be written in any combination of one or more programming languages, including object-oriented programming languages such as Java, C++, etc., and also including conventional procedural programming languages such as the "C" language or similar programming languages. The program code may be executed entirely on the user's computing device, partially on the user's device, executed as a stand-alone software package, partially on the user's computing device and partially on a remote computing device, or entirely on a remote computing device or server. In cases involving a remote computing device, the remote computing device may be connected to the user's computing device through any type of network, including a local area network (LAN) or a wide area network (WAN), or may be connected to an external computing device (e.g., by connecting through the Internet using an Internet service provider).

[0069] From the description of the above embodiments, those skilled in the art can easily understand that the exemplary embodiments described herein can be implemented by software or by a combination of software and necessary hardware. Therefore, the technical solutions according to the embodiments of the present disclosure can be embodied in the form of a software product, which can be stored in a non-volatile storage medium (which can be a CD-ROM, USB flash drive, mobile hard disk, etc.) or on a network, including several instructions to cause a computing device (which can be a personal computer, server, terminal system, or network device, etc.) to execute the method according to the exemplary embodiments of the present disclosure.

[0070] In addition, the above drawings are only schematic illustrations of the processes included in the method according to the exemplary embodiments of the present disclosure, rather than for limiting purposes. It is easy to understand that the processes shown in the above drawings do not indicate or limit the chronological order of these processes. Additionally, it is also easy to understand that these processes can be executed, for example, synchronously or asynchronously in multiple modules.

[0071] It should be noted that although several modules or units of devices for action execution are mentioned in the above detailed description, this division is not mandatory. In fact, according to the exemplary embodiments of the present disclosure, the features and functions of two or more of the above-described modules or units can be embodied in one module or unit. Conversely, the features and functions of one module or unit described above can be further divided and embodied by multiple modules or units.

[0072] Other embodiments of the present disclosure will be readily apparent to those skilled in the art upon consideration of the specification and practice of the invention disclosed herein. This application is intended to cover any variations, uses, or adaptations of the present disclosure that follow the general principles of the present disclosure and include known common general knowledge or conventional technical means in the technical field not disclosed in the present disclosure. The specification and embodiments are to be considered as illustrative only, and the true scope and spirit of the present disclosure are pointed out by the claims.

Claims

1. An optical screening machine driving and controlling method, characterized in that The method runs in the drive control system of an optical screening machine. The system includes a board card, on which a motor driver, a motion control card, a light source driver, an input / output power supply, a main power supply, and at least two network interfaces are integrated as a whole. The motion control card includes a controller and multiple FPGA chips. The controller is used to allocate multiple FPGA chips so that the multiple FPGA chips implement a motion control algorithm, process sensor signals, and output a motor PWM signal and a light source PWM signal corresponding to the motion control algorithm. The motor driver includes multiple motor drive circuits for receiving multiple paths of the motor PWM signals. The motor drive circuits are powered by the input / output power supply. Each motor drive circuit includes an opto-isolator, a current-limiting resistor, a driving MOS transistor, and a rectifier diode. The multiple motor drive circuits are used to drive each motor on the optical screening machine after receiving the corresponding motor PWM signals. The light source driver is used to drive the LED lamp beads on the optical screening machine. The main power supply is used to step down 24V to supply power to the input / output power supply and the light source driver. One of the two network interfaces is an input end for connecting to a PC or cascading with the upper-level system, and the other network interface is an output end for connecting to the optical screening machine or cascading with the lower-level system. The system is used to execute: Based on the motion control algorithm, according to the received sensor signals, obtain the rotational speeds of N motors that need to be synchronized, calculate the total average rotational speed of all motors, and generate a first compensation signal by calculating the deviation between the rotational speed of the i-th motor and the total average rotational speed, where i and N are positive integers and i is less than or equal to N. Calculate the sub-average rotational speed of the motors other than the i-th motor, and generate a second compensation signal by calculating the deviation between the rotational speed of the i-th motor and the sub-average rotational speed. According to the first compensation signal, the second compensation signal, and the influence degree of the i-th motor on the synchronization error, calculate the compensation speed error of the i-th motor. Based on the compensation speed error, gradually adjust the corresponding motor PWM signal so that the difference between the rotational speed of the i-th motor and the total average rotational speed gradually approaches zero, and the difference between the rotational speed of the i-th motor and the sub-average rotational speed gradually approaches zero.

2. The optical screening machine drive control method according to claim 1, characterized in that, The FPGA chip is further used to: according to the actual rotational speed and driving current of the motor feedback by the sensor signal, and in combination with the preset motion control algorithm, adjust the motor PWM signal.

3. The optical screening machine driving and controlling method according to claim 1, characterized in that The sensor signal is optically isolated and current-limited by a resistor before being input to the FPGA chip.

4. The optical screening machine driving and controlling method according to claim 1, characterized in that, The expression formula for the compensation speed error is: ; For the compensation speed error, is the rotational speed of the i-th motor, is the total average rotational speed, , is the sub-average rotational speed, , is the synchronization coefficient between the i-th motor and the j-th motor, and the synchronization coefficient is the influence degree of different motors on the synchronization error.

5. The optical screening machine drive and control method according to claim 1, characterized in that, When making the difference between the rotational speed of the i-th motor and the total average rotational speed gradually approach zero, and making the difference between the rotational speed of the i-th motor and the sub-average rotational speed gradually approach zero, it includes: Calculation formula: ; ; Among them, is the rotational speed of the i-th motor at time t.

6. The optical screening machine driving and controlling method according to claim 1, wherein The method further includes: According to the received sensor signal, obtain the rotational speed of a single motor, subtract the rotational speed of the single motor from the expected rotational speed set by the FPGA chip to obtain a rotational speed deviation, continuously calculate the rotational speed deviation to obtain a deviation change rate. Select the quantization factors and the fuzzy theory domain corresponding to the magnitudes of the rotational speed deviation and the deviation change rate, where the fuzzy theory domain is the variable range of the input and output; Based on the quantization factors, convert the rotational speed deviation and the deviation change rate into fuzzy values, and map the fuzzy values into a fuzzy set; Based on the preset fuzzy rules, perform inference on the fuzzy set to obtain a fuzzy output; Defuzzify the fuzzy output to obtain the motor PWM signal for controlling the rotational speed of the corresponding motor, such that the actual rotational speed of the motor is equal to or the difference from the desired rotational speed is within the threshold range.

7. The optical screening machine drive and control method according to claim 6, characterized in that, After defuzzifying the fuzzy output, obtain the motor speed adjustment amount, and add the motor speed adjustment amount to the original speed setting parameter of the FPGA chip, such that after the speed setting parameter of the FPGA chip is updated, the motor PWM signal for controlling the rotational speed of the corresponding motor is output.

Citation Information

Patent Citations

  • Control system structure of intelligent weight checking and sorting device

    CN214132843U