Light emitting diode epitaxial wafer and preparation method thereof, and light emitting diode

Abstract

The present invention discloses a light-emitting diode epitaxial wafer and a preparation method thereof, and a light-emitting diode, which relates to the field of semiconductor technology. The light-emitting diode epitaxial wafer comprises a substrate, and further comprises: an AlN layer, a buffer layer, a three-dimensional GaN layer, an undoped GaN layer, an N-type semiconductor layer, a stress release layer, a multi-quantum well layer, an electron blocking layer, and a P-type semiconductor layer sequentially stacked on the substrate; a composite insertion layer is inserted between the stress release layer and the multi-quantum well layer, and the composite insertion layer comprises AlN, a buffer layer, a three-dimensional GaN layer, an undoped GaN layer, an N-type semiconductor layer, a stress release layer, a multi-quantum well layer, an electron blocking layer, and a P-type semiconductor layer; x Ga (1‑x) N-layer, In y Ga (1‑y) N layer and P-type doped GaN layer, wherein the value range of x is 0-1, and the value range of y is 0-1. The present invention can solve the technical problem of low luminous efficiency of traditional LED chips in the hot state in the prior art.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and in particular to a light-emitting diode epitaxial wafer and a preparation method thereof, and a light-emitting diode. Background Art

[0002] A light-emitting diode (LED) is a semiconductor component. Known as the fourth-generation lighting source or green light source, LEDs offer energy-saving, environmentally friendly features, long lifespan, and compact size. They are widely used in various applications, including indicators, displays, decoration, backlighting, general lighting, and urban nightscapes. Based on their function, they can be divided into five categories: information displays, signal lights, automotive lighting, LCD backlights, and general lighting.

[0003] At present, LED chips often use sapphire, silicon or silicon carbide and other materials as substrates, and sequentially stacked on the substrate are AlN layer, buffer layer, three-dimensional GaN layer, undoped GaN layer, N-type semiconductor layer, stress release layer, multi-quantum well layer, electron blocking layer, and P-type semiconductor layer. The hole ionization efficiency of the LED chip is much lower than the electron ionization efficiency, and the LED chip will generate more or less heat during use. In the hot state, the electron ionization efficiency of the LED chip will further increase, resulting in a hole concentration lower than the electron concentration, resulting in non-radiative recombination, resulting in a decrease in luminous efficiency. Therefore, improving the luminous efficiency of LED chips in the hot state is also a current technical challenge. Summary of the Invention

[0004] In view of the shortcomings of the prior art, the purpose of the present invention is to provide a light-emitting diode epitaxial wafer and a preparation method thereof, and a light-emitting diode, aiming to solve the technical problem of low luminous efficiency of traditional LED chips in the prior art under hot state.

[0005] A first aspect of the present invention is to provide a light-emitting diode epitaxial wafer, comprising a substrate, and the light-emitting diode epitaxial wafer further comprising:

[0006] An AlN layer, a buffer layer, a three-dimensional GaN layer, an undoped GaN layer, an N-type semiconductor layer, a stress release layer, a multi-quantum well layer, an electron blocking layer, and a P-type semiconductor layer sequentially stacked on the substrate;

[0007] A composite insertion layer is inserted between the stress release layer and the multi-quantum well layer, wherein the composite insertion layer comprises Al2O3 and Al2O4 arranged in a periodic alternating stack. x Ga (1-x) N-layer, In y Ga (1-y) N layer and P-type doped GaN layer, wherein the value range of x is 0-1, and the value range of y is 0-1.

[0008] Compared with the prior art, the beneficial effect of the present invention is that: the light emitting diode epitaxial wafer provided by the present invention can effectively improve the luminous efficiency of the light emitting diode epitaxial wafer in the hot state, specifically, a composite insertion layer is inserted between the stress release layer and the multi-quantum well layer, and the composite insertion layer includes Al2O3 and Al2O3 arranged in a periodic alternating stack. x Ga (1-x) N-layer, In y Ga (1-y) N layer and P-type doped GaN layer, Al x Ga (1-x) The N layer barrier is higher, In y Ga (1-y) The N layer has a low potential barrier, which can prevent electrons from directly entering the multi-quantum well layer and reduce the electron mobility. The P-type doped GaN layer can improve expansion, reduce electron overflow, increase recombination efficiency, and improve luminescence distribution, thereby improving the luminescence efficiency in the hot state, thus solving the technical problem of low luminescence efficiency of traditional LED chips in the hot state.

[0009] According to one aspect of the above technical solution, the dopant of the P-type doped GaN layer is Mg, and the doping concentration is 1×10 18 cm -3 -1×10 19 cm -3 , the thickness of the P-type doped GaN layer is 1nm-10nm.

[0010] According to one aspect of the above technical solution, the Al x Ga (1-x) The thickness of the N layer is 1nm-10nm, and the In y Ga (1-y) The thickness of the N layer is 1nm-10nm, and the number of periods is 1-5.

[0011] According to one aspect of the above technical solution, the stress release layer includes InGaN layers and GaN layers alternately stacked in a first preset period, the first preset period is 5-10, and the thickness of the stress release layer is 30nm-100nm.

[0012] According to one aspect of the above technical solution, the multi-quantum well layer includes InGaN quantum well layers and GaN quantum barrier layers alternately stacked in a second preset period, the second preset period is 6-14, the thickness of the InGaN quantum well layer is 2-4nm, and the thickness of the GaN quantum barrier layer is 8-12nm.

[0013] According to one aspect of the above technical solution, the thickness of the AlN layer is 10nm-30nm, the thickness of the buffer layer is 15nm-35nm, the thickness of the three-dimensional GaN layer is 500nm-2000nm, the thickness of the undoped GaN layer is 800nm-1200nm, the N-type semiconductor layer is an N-type GaN layer with a thickness of 1000nm-3000nm, the thickness of the electron blocking layer is 10nm-60nm, and the P-type semiconductor layer is a P-type GaN layer with a thickness of 5nm-100nm.

[0014] A second aspect of the present invention is to provide a method for preparing a light-emitting diode epitaxial wafer, which is used to prepare the above-mentioned light-emitting diode epitaxial wafer, and the preparation method comprises:

[0015] providing a substrate;

[0016] sequentially growing an AlN layer, a buffer layer, a three-dimensional GaN layer, an undoped GaN layer, an N-type semiconductor layer, and a stress release layer on the substrate;

[0017] A composite insertion layer is grown on the stress release layer, wherein the composite insertion layer comprises Al2O3 and Al2O4 arranged in a periodic alternating stack. x Ga (1-x) N-layer, In y Ga (1-y) N layer and P-type doped GaN layer, where x ranges from 0 to 1 and y ranges from 0 to 1;

[0018] A multi-quantum well layer, an electron blocking layer and a P-type semiconductor layer are sequentially grown on the composite insertion layer.

[0019] According to one aspect of the above technical solution, the step of growing the composite insertion layer specifically includes:

[0020] Control the temperature to reach the preset temperature, the pressure to reach the preset pressure, and grow Al on the stress release layer in sequence. x Ga (1-x) N-layer, In y Ga (1-y) N layer and P-type doped GaN layer;

[0021] By periodically alternating the growth of the Al x Ga (1-x) N layer, the In y Ga (1-y) The N layer and the P-type doped GaN layer form a composite insertion layer.

[0022] According to one aspect of the above technical solution, the preset temperature is 800° C.-1000° C., and the preset pressure is 100 torr-300 torr.

[0023] A third aspect of the present invention is to provide a light emitting diode, comprising any one of the light emitting diode epitaxial wafers described above. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] The above and / or additional aspects and advantages of the present invention will become apparent and readily understood from the following description of the embodiments with reference to the accompanying drawings, in which:

[0025] Figure 1 Schematic diagram of the structure of the light emitting diode epitaxial wafer in the present invention;

[0026] Figure 2 Schematic diagram of the structure of the composite insertion layer in the present invention;

[0027] Figure 3 Flowchart of the method for preparing a light-emitting diode epitaxial wafer of the present invention;

[0028] Component symbol description in the attached figure:

[0029] Substrate 10, AlN layer 11, buffer layer 12, three-dimensional GaN layer 13, undoped GaN layer 14, N-type semiconductor layer 15, stress release layer 16, composite insertion layer 17, multi-quantum well layer 18, electron blocking layer 19, P-type semiconductor layer 20, Al x Ga (1-x) N layer 170, In y Ga (1-y) N layer 171 and P-type doped GaN layer 172 . DETAILED DESCRIPTION

[0030] To make the objectives, features, and advantages of the present invention more readily apparent, the following detailed description of specific embodiments of the present invention is provided in conjunction with the accompanying drawings. The accompanying drawings illustrate several embodiments of the present invention. However, the present invention may be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided to provide a more thorough and comprehensive understanding of the present invention.

[0031] It should be noted that when an element is referred to as being "fixed to" another element, it may be directly on the other element or there may be an element centered thereon. When an element is considered to be "connected to" another element, it may be directly connected to the other element or there may be an element centered thereon. The terms "vertical", "horizontal", "left", "right", "up", "down" and similar expressions used herein are for illustrative purposes only and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operate in a specific orientation, and therefore should not be understood as limiting the present invention.

[0032] In the present invention, unless otherwise expressly specified or limited, the terms "installed," "connected," "connected," "fixed," and the like should be understood in a broad sense. For example, they may refer to fixed connections, detachable connections, or integral connections; they may refer to mechanical connections or electrical connections; they may refer to direct connections or indirect connections through an intermediate medium; and they may refer to internal communication between two components. Those skilled in the art will understand the specific meanings of the above terms in the present invention based on the specific circumstances. The term "and / or" as used herein includes any and all combinations of one or more of the relevant listed items.

[0033] See also Figure 1-Figure 2 , shown is a light-emitting diode epitaxial wafer provided by the present invention, which includes a substrate 10, and also includes an AlN layer 11, a buffer layer 12, a three-dimensional GaN layer 13, an undoped GaN layer 14, an N-type semiconductor layer 15, a stress release layer 16, a multi-quantum well layer 18, an electron blocking layer 19, and a P-type semiconductor layer 20 stacked in sequence on the substrate 10.

[0034] A composite insertion layer 17 is inserted between the stress release layer 16 and the multi-quantum well layer 18. The composite insertion layer 17 includes Al2O3 and Al2O4 periodically alternately stacked. x Ga (1-x) N-layer, In y Ga (1-y) N layer and P-type doped GaN layer, wherein the value range of x is 0-1, and the value range of y is 0-1.

[0035] The substrate 10 is a base plate for epitaxial layer growth, and the substrate 10 can be one of a silicon substrate 10 , a silicon carbide substrate 10 , and a sapphire substrate 10 .

[0036] An AlN layer 11 is provided on the substrate 10. The AlN layer 11 is deposited on the substrate 10 by a PVD sputtering method and has a thickness of 10 nm to 30 nm.

[0037] Next, a buffer layer 12 is provided on the AlN layer 11. The buffer layer 12 is a GaN layer with a thickness of 15nm-35nm, which is grown epitaxially using MOCVD. The buffer layer 12 is used to alleviate the lattice mismatch and thermal mismatch between the substrate 10 and the subsequently grown extension, reduce crystal defects, and improve the crystal quality of the subsequent extension.

[0038] A three-dimensional GaN layer 13 is provided on the buffer layer 12 , and the thickness of the three-dimensional GaN layer 13 is 500 nm-2000 nm.

[0039] An undoped GaN layer 14 is provided on the three-dimensional GaN layer 13 , and the thickness of the undoped GaN layer 14 is 800 nm-1200 nm.

[0040] An N-type semiconductor layer 15 is provided on the undoped GaN layer 14. The N-type semiconductor layer 15200 is an N-type GaN layer. The thickness of the N-type GaN layer is 1000nm-3000nm. The dopant is Si with a doping concentration of 5×10 18 cm -3 -2×10 20 cm -3 The N-type GaN layer provides electrons to the multi-quantum well layer 18, so that the electrons and holes are radiatively recombined in the multi-quantum well layer 18 to achieve the luminous effect of the light-emitting diode. The dopant of the N-type GaN layer is silane. The N-type GaN layer can reduce the current concentration effect and improve the photoelectric efficiency of the light-emitting diode by doping with the dopant.

[0041] In addition, a stress release layer 16 is provided on the N-type semiconductor layer 15. The stress release layer 16 includes InGaN layers and GaN layers alternately stacked in a first preset period. The first preset period is 5-10, and the thickness of the stress release layer 16 is 30nm-100nm, which can relieve the compressive stress and defect density of the N-type semiconductor layer 15.

[0042] It should be noted that a composite insertion layer 17 is provided on the stress release layer 16. The composite insertion layer 17 is used to improve the luminous efficiency of the light-emitting diode epitaxial wafer in the hot state. The main factor affecting the luminous efficiency of the light-emitting diode epitaxial wafer is the recombination efficiency of electrons and holes in the multi-quantum well layer 18. Since the activation efficiency of Mg in the P-type semiconductor layer 20 is much lower than the activation efficiency of SiH4 in the N-type semiconductor layer 15, the concentration of electrons is much greater than the concentration of holes. Electrons usually overflow to the P-type semiconductor layer 20 and recombine with holes, reducing the recombination efficiency in the multi-quantum well layer 18, thereby reducing the luminous efficiency. This phenomenon will be aggravated in the hot state, and the luminous efficiency will be greatly reduced. Therefore, the composite insertion layer 17 includes Al2O3 layers that are periodically alternately stacked. x Ga (1-x) N layer 170, In y Ga (1-y) N layer 171 and P-type doped GaN layer 172, Al x Ga (1-x) The N layer 170 has a high potential barrier, In y Ga (1-y) The N layer 171 has a low potential barrier and can prevent electrons from directly entering the multi-quantum well layer 18, reducing the electron mobility, while the P-type doped GaN layer 172 can improve expansion, reduce electron overflow, increase recombination efficiency, and improve luminescence distribution, thereby improving luminescence efficiency in the hot state.

[0043] Furthermore, the dopant of the P-type doped GaN layer 172 is Mg, and the doping concentration is 1×10 18cm -3 -1×10 19 cm -3 The thickness of the P-type doped GaN layer 172 is 1 nm to 10 nm, the activation efficiency of Mg is generally 1 / 1000 to 1 / 100, and the hole concentration of the P-type doped GaN layer 172 is 1×10 15 cm -3 -1×10 17 cm -3 , which is far lower than the electron concentration, will not deplete the electrons and play a role in lateral expansion.

[0044] Furthermore, the Al x Ga (1-x) The thickness of the N layer 170 is 1 nm to 10 nm. y Ga (1-y) The thickness of the N layer 171 is 1 nm-10 nm, and the number of periods is 1-5.

[0045] A multi-quantum well layer 18 is stacked on the composite insertion layer 17. The multi-quantum well layer 18 is an electron-hole recombination region. The multi-quantum well layer 18 includes an InGaN quantum well layer and a GaN quantum barrier layer alternately stacked at a second preset period. The thickness of the InGaN quantum well layer is 2-4 nm, the In component ratio is 0-0.4, the thickness of the GaN quantum barrier layer is 8-12 nm, the dopant is Si, and the Si doping concentration is 5×10 16 cm -3 -2×10 18 cm -3 .

[0046] An electron blocking layer 19 is provided on the multi-quantum well layer 18. The thickness of the electron blocking layer 19 is 10nm-60nm. The electron blocking layer 19 includes AlGaN layers and GaN layers alternately stacked in a third preset period. The Al component ratio in the AlGaN layer is 0.2-1, and the third preset period is 5-20. The electron blocking layer 19 is used to limit electron overflow. Since the electron migration rate is faster than the hole migration rate, the electron blocking layer 19 can effectively prevent electrons from the N-type semiconductor layer 15 from overflowing to the P-type semiconductor layer 20, thereby preventing electrons from non-radiatively recombining with holes in the P-type semiconductor layer 20, thereby reducing the luminous efficiency of the light-emitting diode epitaxial wafer.

[0047] A P-type semiconductor layer 20 is stacked on the electron blocking layer 19. The P-type semiconductor layer 20 is a P-type GaN layer with a thickness of 5 nm to 100 nm. The dopant is Mg, and the doping concentration of Mg is 5×10 19 cm -3 -2×10 21 cm -3The P-type semiconductor layer 20 provides holes to the multi-quantum well layer 18, so that electrons and holes are radiatively recombined in the multi-quantum well layer 18, thereby achieving the light-emitting effect of the light-emitting diode epitaxial wafer.

[0048] Also, see Figure 3 , which shows a method for preparing a light-emitting diode epitaxial wafer provided by the present invention, the method comprising steps S10-S13:

[0049] Step S10, providing a substrate;

[0050] The substrate may be a silicon substrate, a silicon carbide substrate, or a sapphire substrate.

[0051] Step S11, sequentially growing an AlN layer, a buffer layer, a three-dimensional GaN layer, an undoped GaN layer, an N-type semiconductor layer, and a stress release layer on the substrate;

[0052] Among them, the growth process of the AlN layer, buffer layer, three-dimensional GaN layer, undoped GaN layer, N-type semiconductor layer, and stress release layer is the same as that of the AlN layer, buffer layer, three-dimensional GaN layer, undoped GaN layer, N-type semiconductor layer, and stress release layer in the prior art, which will not be elaborated on.

[0053] Step S12, growing a composite insertion layer on the stress release layer, wherein the composite insertion layer comprises Al x Ga (1-x) N-layer, In y Ga (1-y) N layer and P-type doped GaN layer, where x ranges from 0 to 1 and y ranges from 0 to 1;

[0054] Specifically, the temperature is controlled to reach a preset temperature, the pressure is controlled to reach a preset pressure, and Al is grown on the stress release layer in sequence. x Ga (1-x) N-layer, In y Ga (1-y) N layer and P-type doped GaN layer;

[0055] By periodically alternating the growth of the Al x Ga (1-x) N layer, the In y Ga (1-y) The N layer and the P-type doped GaN layer form a composite insertion layer.

[0056] Wherein, the preset temperature is 800°C-1000°C, and the preset pressure is 100 torr-300 torr.

[0057] Step S13 , sequentially growing a multi-quantum well layer, an electron blocking layer, and a P-type semiconductor layer on the composite insertion layer.

[0058] Specifically, the electron blocking layer can be a periodic structure of alternating AlGaN layers and GaN layers with a thickness of 10-60nm, and the quantum well layer can be a periodic structure of alternating InGaN layers and GaN layers with a thickness of 2-4nm and 8-12nm.

[0059] In addition, the present invention also provides a light emitting diode, which includes the light emitting diode epitaxial wafer described above.

[0060] The present invention is further described below with specific examples:

[0061] Example 1

[0062] The first embodiment of the present invention provides a light-emitting diode epitaxial wafer provided by the present invention, which includes a substrate and an AlN layer, a buffer layer, a three-dimensional GaN layer, an undoped GaN layer, an N-type semiconductor layer, a stress release layer, a multi-quantum well layer, an electron blocking layer, and a P-type semiconductor layer stacked in sequence on the substrate.

[0063] The substrate is a base plate for epitaxial layer growth, and the substrate is a sapphire substrate.

[0064] Furthermore, a composite insertion layer is inserted between the stress release layer and the multi-quantum well layer, wherein the composite insertion layer comprises Al x Ga (1-x) N-layer, In y Ga (1-y) N layer and P-type doped GaN layer, wherein the value range of x is 0-1, and the value range of y is 0-1.

[0065] Preferably, x is 0.5 and y is 0.5.

[0066] The dopant of the P-type doped GaN layer is Mg, and the doping concentration is 1×10 18 cm -3 -1×10 19 cm -3 , the thickness of the P-type doped GaN layer is 5 nm.

[0067] The Al x Ga (1-x) The thickness of the N layer is 5 nm, and the In y Ga (1-y) The thickness of the N layer is 5 nm and the number of periods is 4.

[0068] Accordingly, the method for preparing a light-emitting diode epitaxial wafer in this embodiment includes steps S10-S13:

[0069] Step S10, providing a substrate;

[0070] Step S11, sequentially growing an AlN layer, a buffer layer, a three-dimensional GaN layer, an undoped GaN layer, an N-type semiconductor layer, and a stress release layer on the substrate;

[0071] Step S12, growing a composite insertion layer on the stress release layer, wherein the composite insertion layer comprises Al x Ga (1-x) N-layer, In y Ga (1-y) N layer and P-type doped GaN layer, where x ranges from 0 to 1 and y ranges from 0 to 1;

[0072] Specifically, the temperature is controlled to reach a preset temperature, the pressure is controlled to reach a preset pressure, and Al is grown on the stress release layer in sequence. x Ga (1-x) N-layer, In y Ga (1-y) N layer and P-type doped GaN layer;

[0073] By periodically alternating the growth of the Al x Ga (1-x) N layer, the In y Ga (1-y) The N layer and the P-type doped GaN layer form a composite insertion layer.

[0074] Wherein, the preset temperature is 900° C., and the preset pressure is 200 torr.

[0075] Step S13 , sequentially growing a multi-quantum well layer, an electron blocking layer, and a P-type semiconductor layer on the composite insertion layer.

[0076] Example 2

[0077] A second embodiment of the present invention provides a light-emitting diode epitaxial wafer. The light-emitting diode epitaxial wafer in this embodiment differs from the light-emitting diode epitaxial wafer in the first embodiment in that:

[0078] The number of cycles is 1.

[0079] Example 3

[0080] A third embodiment of the present invention provides a light-emitting diode epitaxial wafer. The light-emitting diode epitaxial wafer in this embodiment differs from the light-emitting diode epitaxial wafer in the first embodiment in that:

[0081] The number of cycles is 2.

[0082] Example 4

[0083] A fourth embodiment of the present invention provides a light-emitting diode epitaxial wafer. The light-emitting diode epitaxial wafer in this embodiment differs from the light-emitting diode epitaxial wafer in the first embodiment in that:

[0084] The number of cycles is 3.

[0085] Example 5

[0086] A fifth embodiment of the present invention provides a light-emitting diode epitaxial wafer. The light-emitting diode epitaxial wafer in this embodiment differs from the light-emitting diode epitaxial wafer in the first embodiment in that:

[0087] The number of cycles is 5.

[0088] Comparative Example 1

[0089] The first comparative example of the present invention provides a light-emitting diode epitaxial wafer. The light-emitting diode epitaxial wafer in this comparative example differs from the light-emitting diode epitaxial wafer in the first embodiment in that:

[0090] No composite inserts.

[0091] Please refer to Table 1 below, which shows the parameters corresponding to the above embodiments and comparative examples of the present invention.

[0092] Table 1

[0093]

[0094]

[0095] It should be noted that the light-emitting diode epitaxial wafers of the embodiment and the comparative example were made into 22mil×35mil chips under the same process conditions, and 300 light-emitting diode epitaxial wafers were respectively sampled and their performance was tested at a current of 60mA.

[0096] Combining the data of Examples 1 to 5 and Comparative Example 1, it can be seen that inserting a composite insertion layer between the stress release layer and the multi-quantum well layer can effectively improve the luminous efficiency in the hot state.

[0097] Combining the data of Examples 1 to 5, it can be seen that the setting of the number of composite insertion layer periods will affect the luminous efficiency of the light-emitting diode epitaxial wafer in a hot state.

[0098] Combining the data of Example 1, Example 6 and Example 7, it can be seen that Al x Ga (1-x) N-layer, In y Ga (1-y)The setting of the value range of x and y of the N layer will affect the luminous efficiency of the light-emitting diode epitaxial wafer in the hot state.

[0099] Combining the data of Example 1, Example 8 and Example 9, it can be seen that Al x Ga (1-x) N-layer, In y Ga (1-y) The thickness setting of the N layer and the P-type doped GaN layer will affect the luminous efficiency of the light-emitting diode epitaxial wafer in a hot state.

[0100] Combining the data of Example 1, Example 10, and Example 11, it can be seen that the setting of the doping concentration of the P-type doped GaN layer will affect the luminous efficiency of the light-emitting diode epitaxial wafer in a hot state.

[0101] In summary, inserting a composite insertion layer between the stress release layer and the multi-quantum well layer can effectively improve the luminous efficiency in the hot state.

[0102] Throughout this specification, reference to terms such as "one embodiment," "some embodiments," "examples," "specific examples," or "some examples" means that a specific feature, structure, material, or characteristic described in conjunction with that embodiment or example is included in at least one embodiment or example of the present invention. In this specification, schematic representations of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.

[0103] The above-described embodiments merely illustrate several implementations of the present invention. While the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the present invention. It should be noted that a person skilled in the art would be able to make numerous modifications and improvements without departing from the spirit of the present invention, all of which fall within the scope of protection of the present invention. Therefore, the scope of protection of the present invention shall be determined by the appended claims.

Claims

1. A light-emitting diode epitaxial wafer, comprising a substrate, characterized in that: The light emitting diode epitaxial wafer further comprises: An AlN layer, a buffer layer, a three-dimensional GaN layer, an undoped GaN layer, an N-type semiconductor layer, a stress release layer, a multi-quantum well layer, an electron blocking layer, and a P-type semiconductor layer sequentially stacked on the substrate; A composite insertion layer is inserted between the stress release layer and the multi-quantum well layer, wherein the composite insertion layer comprises Al2O3 and Al2O4 arranged in a periodic alternating stack. x Ga （1-x） N-layer, In y Ga （1-y） N layer and P-type doped GaN layer, wherein the value range of x is 0-1, the value range of y is 0-1, and the dopant of the P-type doped GaN layer is Mg with a doping concentration of 1×10 18 cm -3 -1×10 19 cm -3 , the thickness of the P-type doped GaN layer is 1nm-10nm.

2. The light emitting diode epitaxial wafer according to claim 1, characterized in that: The Al x Ga （1-x） The thickness of the N layer is 1nm-10nm, and the In y Ga （1-y） The thickness of the N layer is 1nm-10nm, and the number of periods is 1-5.

3. The light emitting diode epitaxial wafer according to claim 1, characterized in that: The stress release layer includes an InGaN layer and a GaN layer alternately stacked in a first preset period, the first preset period is 5-10, and the thickness of the stress release layer is 30nm-100nm.

4. The light emitting diode epitaxial wafer according to claim 1, characterized in that: The multi-quantum well layer includes InGaN quantum well layers and GaN quantum barrier layers alternately stacked in a second preset period, the second preset period is 6-14, the thickness of the InGaN quantum well layer is 2-4nm, and the thickness of the GaN quantum barrier layer is 8-12nm.

5. The light emitting diode epitaxial wafer according to claim 1, characterized in that: The thickness of the AlN layer is 10nm-30nm, the thickness of the buffer layer is 15nm-35nm, the thickness of the three-dimensional GaN layer is 500nm-2000nm, the thickness of the undoped GaN layer is 800nm-1200nm, the N-type semiconductor layer is an N-type GaN layer with a thickness of 1000nm-3000nm, the thickness of the electron blocking layer is 10nm-60nm, and the P-type semiconductor layer is a P-type GaN layer with a thickness of 5nm-100nm.

6. A method for preparing a light-emitting diode epitaxial wafer, characterized in that: For preparing the light emitting diode epitaxial wafer according to any one of claims 1 to 5, the preparation method comprises: providing a substrate; sequentially growing an AlN layer, a buffer layer, a three-dimensional GaN layer, an undoped GaN layer, an N-type semiconductor layer, and a stress release layer on the substrate; A composite insertion layer is grown on the stress release layer, wherein the composite insertion layer comprises Al2O3 and Al2O4 arranged in a periodic alternating stack. x Ga （1-x） N-layer, In y Ga （1-y） N layer and P-type doped GaN layer, wherein the value range of x is 0-1, the value range of y is 0-1, and the dopant of the P-type doped GaN layer is Mg with a doping concentration of 1×10 18 cm -3 -1×10 19 cm -3 , the thickness of the P-type doped GaN layer is 1nm-10nm; A multi-quantum well layer, an electron blocking layer and a P-type semiconductor layer are sequentially grown on the composite insertion layer.

7. The method for preparing a light emitting diode epitaxial wafer according to claim 6, wherein: The step of growing the composite insertion layer specifically includes: Control the temperature to reach the preset temperature, the pressure to reach the preset pressure, and grow Al on the stress release layer in sequence. x Ga （1-x） N-layer, In y Ga （1-y） N layer and P-type doped GaN layer; By periodically alternating the growth of the Al x Ga （1-x） N layer, the In y Ga （1-y） The N layer and the P-type doped GaN layer form a composite insertion layer.

8. The method for preparing a light emitting diode epitaxial wafer according to claim 7, wherein: The preset temperature is 800° C.-1000° C., and the preset pressure is 100 torr-300 torr.

9. A light emitting diode, characterized in that: The light-emitting diode comprises the light-emitting diode epitaxial wafer according to any one of claims 1 to 5.

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