Memristor-memristor-capacitor-driven neuron circuit generating unidirectional action potential

Abstract

The present invention relates to the field of neuron circuit technology, and in particular to a memristor-memcapacitor-driven cell neuron circuit for generating unidirectional action potentials, comprising a sinusoidal AC power supply, a charge-controlled memristor circuit, a local active memristor circuit, a resistor R a , R b , R W , R 14 、Operational amplifier U 7 , precision operational amplifier CT 3 and negative absolute value circuit, the output terminal of the negative absolute value circuit is connected to R a After connecting, access U 7 The inverting input terminal, U 7 The inverting input terminal is connected to R 14 and R b One end of the connection, R 14 The other end of the 7 The output terminal and CT 3 The positive connection of CT 3 The negative electrode and R W After connecting with U 7 The same-direction input terminal of C M With G M Connect both ends in parallel with I ext Connect both ends, C M With G M The two ends of the parallel connection are also connected to CT 3 Z end and U 7 The present invention provides value for the research of memristor-memristor-capacitor driven cellular neural network and its circuit realization.

Description

Technical Field

[0001] The present invention relates to the technical field of neuron circuits, and in particular to a memristor-memristor-capacitor-driven cell neuron circuit that generates unidirectional action potentials. Background Art

[0002] As a typical artificial neural network, cellular neural network is suitable for large-scale integrated circuit implementation and has significant advantages in real-time information processing and hardware implementation.

[0003] Traditional cellular neural networks use linear resistors to implement synaptic weights, which cannot simulate the nonlinearity, plasticity, and memory of biological synapses, and therefore cannot produce rich brain-like chaotic phenomena.

[0004] As a natural memory device, memristor not only has good biological synaptic plasticity, but also has nanoscale size and non-volatility; therefore, integrating it into cellular neural networks can realize the variability of the connection weights of the neural network model, effectively simulate the dynamic behavior of the neural network, and at the same time significantly reduce the power loss and area consumption of the circuit, and improve the information processing performance of the network.

[0005] As a derivative device of memristor, memcapacitor also has memory characteristics, and its capacitance value can be adjusted by external voltage. This polymorphic capacitor can be used to simulate the weight of artificial synapses and is suitable for highly parallel, low-energy neural network computing. Summary of the invention

[0006] In view of the shortcomings of existing circuits, the present invention uses local active memristors and charge-controlled memristors to replace the linear resistors and capacitors in traditional cell neurons respectively, designs the hardware circuit of the memristor-memristor cell neuron model, and provides value for the research on memristor-memristor driven cellular neural networks and their circuit implementation.

[0007] The technical solution adopted by the present invention is: a memristor-memristor-driven cell neuron circuit generating a unidirectional action potential comprises: a sinusoidal AC power supply I ext 、Charge-controlled memcapacitor circuit C M , Local active memristor circuit G M , resistor R a , R b , R W , R 14 、Operational amplifier U 7 , precision operational amplifier CT 3 and negative absolute value circuit, the output terminal of the negative absolute value circuit is connected to R a After connecting, access U 7 The inverting input terminal, U 7 The inverting input terminal is connected to R 14 and R b One end of the connection, R14 The other end of the 7 The output terminal and CT 3 The positive connection of CT 3 The negative electrode and R W After connecting with U 7 The same-direction input terminal of C M With G M Connect both ends in parallel with I ext Connect both ends, C M With G M The two ends of the parallel connection are also connected to CT 3 Z end and U 7 The same-direction input terminal of .

[0008] As a preferred embodiment of the present invention, the local active memristor circuit includes: an operational amplifier U 1 , U 2 , resistor R 1 To R 5 , resistor R M , capacitor C 1 , inverse hyperbolic tangent function, analog multiplier M 1 、M 2 and precision operational amplifier CT 1 , R 1 One end of each 2 One end of U 1 The inverting input terminal and M 1 The input connection of R 2 The other end is connected to U 1 The output terminal and R 3 One end of the connection, R 3 The other end is connected to R 4 , R 5 , C 1 One end and U 2 The inverting input terminal is connected to C 1 The other end is connected to U 2 The output terminal and M 1 The two input terminals are connected, R 4 The other end is connected in series with the inverse hyperbolic tangent function and then connected to R 5 The other end and U 2 The output connection of M 2 The output terminal and M 1 The other end of the input is connected to M 1 The output terminal of CT 1 The positive input terminal of CT 1 The negative input terminal and R M Connect to ground.

[0009] As a preferred embodiment of the present invention, the charge-controlled memcapacitor circuit comprises: a precision operational amplifier CT 2 , resistor R 6 To R 13 , resistor R β , analog multiplier M 3 , capacitor C 2 , C 3 、Operational amplifier U 3 to U 6 , DC voltage bias V α , CT 2 The W end and R 7 After connecting, they are connected to C 2 One end and U 3 The inverting input terminal is connected to C 2 The other end is connected to U 3 The output terminal, R 8 One end and M 3 The input end is connected to R 8 The other end is connected to R 9 One end and U 4 Reverse input connection, R 9 The other end is connected to U 4 The output terminal and R 11 One end of the connection, R 11 The other end is connected to U 5 The inverting input terminal, R 10 and C 3 One end of the connection; R 10 The other end of the 3 The other end, R β One end and U 5 The output connection of R β The other end is connected to R 12 , R 13 One end and U 6 The inverting input terminal is connected to R 13 The other end of U 6 The output terminal and M 3 The other end of the input is connected to M 3 The output terminal of CT 2 The positive input terminal of CT 2 The Z end and R 6 Connect to ground.

[0010] As a preferred embodiment of the present invention, the model of the memristor-memristor-capacitor driven cell neuron is:

[0011]

[0012] In the formula, q, σ, They are the three state variables of the neuron, v x is the memristor input voltage, a is the absolute value function amplitude, I ext For external motivation.

[0013] As a preferred embodiment of the present invention, the mathematical expression of the local active memristor circuit is:

[0014]

[0015] In the formula, i M and V x are the current flowing through the memristor and the input voltage respectively; is the internal state variable of the memristor; g 1 and g 2 They are multipliers M 1 and M 2 Gain, R 1 , R 2 , R 3 , R M is the resistance, C 1 For capacitance.

[0016] As a preferred embodiment of the present invention, the mathematical expression of the charge-controlled memcapacitor circuit is:

[0017]

[0018] In the formula, i C and V C are the current flowing through the memcapacitor and the input voltage respectively; V σ 、V q g is the load control memory output state variable; 3 is the multiplier M 3 Gain; R 6 , R 7 , R 10 , R 11 , R 13 , R β is the resistance; C 2 , C 3 is the capacitance, V α is a DC voltage bias.

[0019] As a preferred embodiment of the present invention, the mathematical expression of the memristor-memcapacitor driven cell neuron circuit is:

[0020]

[0021] In the formula, V σ and V qare the three state variables of the neuron; V x is the inverse of the memristor and memcapacitor input voltage, R 3 , R 4 , R 5 , R 10 , R 11 , R 14 , R a , R b is the resistance, abs(.) is the absolute value function, C 1 , C 2 , C 3 For capacitance.

[0022] Beneficial effects of the present invention:

[0023] 1. The discharge behavior of the memristor-memcapacitor neuron circuit was analyzed using numerical simulation software, and a hardware circuit was designed for experiments to verify the correctness and feasibility of the numerical simulation results;

[0024] 2. Use local active memristors and charge-controlled memristors to replace the linear resistors and capacitors in traditional cell neurons, respectively, to simulate changes in cell membrane potential and form memristor-memristor cell neuron circuits. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] Figure 1 Schematic diagram of the main circuit structure of a cell neuron;

[0026] Figure 2 is a schematic diagram of a local active memristor circuit;

[0027] Figure 3 This is the circuit diagram of the charge-controlled memory capacitor;

[0028] Figure 4 For a fixed amplitude I m =0.15, f=0.15, the system memristor voltage v at different amplitudes a x Time domain diagram of numerical simulation;

[0029] Figure 5 The hardware experimental verification results under different amplitudes a. DETAILED DESCRIPTION

[0030] The present invention is further described below in conjunction with the accompanying drawings and embodiments. This figure is a simplified schematic diagram, which only illustrates the basic structure of the present invention in a schematic manner, and therefore it only shows the components related to the present invention.

[0031] like Figure 1 , 2 As shown in , 3, the memristor-memcapacitor driven cell neuron circuit generating unidirectional action potential comprises: a cell neuron main circuit, a local active memristor circuit and a charge-controlled memcapacitor circuit; Figure 2Locally active memristor circuits and Figure 3 The charge-controlled memcapacitor circuit is introduced into the main circuit of the cell neuron to form a memristor-memcapacitor driven cell neuron circuit.

[0032] The main circuit of the cell neuron includes a sinusoidal AC power supply I ext 、Charge-controlled memcapacitor circuit C M , Local active memristor circuit G M Input terminal V x , the input terminal V of the negative absolute value circuit x , Input terminal – V x 、Operational amplifier U 7 , precision operational amplifier CT 3 , sinusoidal current source I ext Parallel C M and G M , negative absolute value circuit output and input –V x Respectively connect the resistor R a and R b Then connected to the operational amplifier U 7 The inverting input terminal of the operational amplifier U 7 A parallel resistor R is connected between the inverting input and output terminals 14 , operational amplifier U 7 The output terminal of CT 3 The non-inverting input terminal of CT 3 The inverting input terminal is connected in series with a resistor R W Ground, CT 3 The Z end is also connected to G M and C M The common upper terminal of the operational amplifier U 7 The non-inverting input terminal is grounded.

[0033] The function -abs(.) corresponding to the negative absolute value circuit can be obtained by using the U in Figure (b) of the reference Memristor synapse-coupled piecewise-linear simplified Hopfield neural network: Dynamics analysis and circuit implementation 6 , U 7 And with U 7 Of course, other voltage circuits that can generate negative absolute values ​​can also be used, that is, the input is V x , the output is -|V x |.

[0034] Locally active memristor circuit G MIt includes: an integral channel, two analog multipliers and an inverting proportional amplifier circuit; the implementation of the inverting proportional amplifier circuit includes an operational amplifier U 1 , input terminal V x Series resistance R 1 Connect to operational amplifier U 1 Inverting input terminal, operational amplifier U 1 The inverting input and output terminals are connected in parallel with the resistor R 2 ; The realization of the integration channel includes the operational amplifier U 1 Voltage output terminal -V x , the output of the inverse hyperbolic tangent function - And the operational amplifier U 2 Output Operational amplifier U 1 Voltage output terminal -V x , the output of the inverse hyperbolic tangent function - and operational amplifier U 2 Output Through R 3 , R 4 , R 5 Connect to the operational amplifier U 2 The inverting input terminal of the operational amplifier U 2 A parallel capacitor C is connected between the inverting input and output terminals 1 , and output at the output Analog Multiplier M 2 The two input terminals of U 2 Output Connected; analog multiplier M 1 The input terminals are respectively connected to U 1 The inverting input terminal and M 2 Output Connected, M 1 The output terminal output Connected to the non-inverting input terminal of precision operational amplifier CT1; CT 1 The inverting input terminal is connected in series with a resistor R M Ground, CT 1 The Z-terminal output i M Operational amplifier U 1 and U 2 The non-inverting input terminals are grounded.

[0035] Charge controlled memcapacitor circuit C M It includes: a current-voltage conversion module, two integral channels, two proportional circuits and an analog multiplier; the current-voltage conversion module consists of CT 2 and resistor R 6 Composition, CT 2The inverting input current i C , CT 2 The non-inverting input terminal and M 3 The output connection of CT 2 The Z terminal series resistor R 6 Connect to ground, CT 2 The W output R 6 i C ; In the operational amplifier U 3 In the integral channel composed of 3 The inverting input is connected to the 7 With CT 2 The W end is connected to U 3 The inverting input and output are connected via a parallel capacitor C 2 connected, output V at the output q ;byU 5 In the integral channel composed of 5 The inverting input is connected through the resistor R 10 , R 11 Respectively with U 4 Output terminal -V q and U 5 The output terminal V σ Connect, U 5 A parallel capacitor C is connected between the inverting input and output terminals 3 , the output terminal outputs V σ ;byU 4 The inverting input of the inverter is connected through R 8 with U 3 The output terminal V q The inverting input and output are connected through a parallel resistor R 9 connected, the output terminal outputs -V q ;byU 6 The inverting input terminal of the inverting proportional device is connected through the resistor R 12 and R β Respectively with U 5 The output terminal V σ And a DC voltage bias V connected to ground at one end α Connected, U 6 The inverting input and output are connected through a resistor R 13 connected, the output terminal outputs -(V α R 13 / R 12 +R 13 / R β V σ ); analog multiplier M 3 The two input terminals are connected to U 3 The output terminal V q and U 6Output terminal -(V α R 13 / R 12 +R 13 / R β V σ ) is connected, using the input signal channel in M 3 The output terminal output (V α R 13 / R 12 +R 13 / R β V σ )V q And with CT 2 The non-inverting input terminal of the operational amplifier U 3 , U 4 , U 5 , U 6 The non-inverting input terminals are grounded.

[0036] Model building: Based on the main circuit of cell neurons, the present invention uses local active memristors and charge-controlled memcapacitors to replace the linear resistors and capacitors in traditional cell neurons, respectively, to simulate the changes in cell membrane potential, and to construct a memristor-memcapacitor driven cell neuron model. The model is expressed as:

[0037]

[0038] In the formula, q, σ, They are the three state variables of the neuron, v x represents the memristor input voltage and satisfies v x =v c =(2.1+2σ)q, a is the amplitude of the absolute value function, I ext For external motivation.

[0039] Among them, the mathematical expression of local active memristor is:

[0040]

[0041] In the formula, i M and V x are the current flowing through the memristor and the input voltage respectively; is the internal state variable of the memristor; g 1 and g 2 They are multipliers M 1 and M 2 Gain, R 1 , R 2 , R 3 , R M is the resistance, C 1 For capacitance.

[0042] The mathematical expression of load-controlled memory capacity is:

[0043]

[0044] In the formula, i C and V C are the current flowing through the memcapacitor and the input voltage respectively; V σ 、V q g is the load control memory output state variable; 3 is the multiplier M 3 Gain; R 6 , R 7 , R 10 , R 11 , R 13 , R β is the resistance; C 2 , C 3 is the capacitance, V α is a DC voltage bias.

[0045] Figure 1 In the memristor-memcapacitor cell neuron circuit, there are three main integration channels;

[0046] According to Kirchhoff's circuit laws and the electrical properties of circuit components, as well as the state equations of memristor and memristor, Figure 1 The circuit shown is the differential equation of formula (1), expressed as:

[0047]

[0048] In the formula, V σ and V q are the three state variables of the neuron; V x is the inverse of the memristor and memcapacitor input voltage, which can be described as:

[0049]

[0050] I ext is an external incentive, which can be described as:

[0051] I ext =I m sin(2πft) (6)

[0052] Among them, the control variable I m represents amplitude, f represents frequency; fixed amplitude I m With the frequency f, by controlling the absolute value function amplitude a within a certain reasonable range, model (1) can show complex discharge behavior.

[0053] Numerical simulation: Figure 5When the negative absolute value circuit output voltage -|V x When the amplitude a of | is used as the parameter of the system, the MATLAB ODE45Ps algorithm is used to carry out numerical research on the memristor-memristor cell neuron model; when the frequency f=0.15 and the amplitude I m =0.15, time domain diagrams were drawn under different amplitudes. When the amplitude a=0.65, chaotic discharge behavior was shown; when a=0.6742, period 4 discharge behavior was shown; when a=0.74, period 2 discharge behavior was shown; when a=0.8, period 1 discharge behavior was shown; under different amplitudes a, it was found that the discharge activity of neurons had an obvious correlation with the amplitude of the absolute value function, which indicates the responsiveness and adaptability of neurons to the amplitude of the absolute value function.

[0054] Take R 1 =10kΩ, R 2 =10kΩ, R 3 =5kΩ, R 4 =10kΩ, R 5 =10kΩ, R 6 =1kΩ, R 7 =10kΩ, R 8 =10kΩ, R 9 =10kΩ, R 10 =10kΩ, R 11 =10kΩ, R 12 =10kΩ, R 13 =10kΩ, R β =5kΩ, R W =10kΩ, R M =1kΩ, R b =20kΩ, C 1 =10nF, C 2 =10nF, C 3 =10nF, g 1 =1V -1 , g 2 =1V -1 , g 3 =-1V -1 , V α =2.1V, I m =0.15mA, f=1500Hz, and multiplier g 1 Contains a DC bias of -0.5V.

[0055] So far, the present invention has constructed a memristor-memcapacitor driven cell neuron circuit and its implementation scheme.

[0056] Experimental verification: This design uses AD844AN precision operational amplifier, AD711JN operational amplifier and AD633JN analog multiplier with a supply voltage of ±15V. Other discrete components are precision adjustable resistors, chip resistors and plug-in capacitors. During the experiment, the Tektronix TDS 3054C digital phosphor oscilloscope is used to capture the experimental results. The absolute value function amplitude a is adjusted. The other circuit parameters are shown above. In the hardware circuit experiment, by adjusting the resistor R a To adjust the absolute value function amplitude, when R a When the memristor voltage V is 13.84kΩ, 12.78kΩ, 12.23kΩ, and 11.46kΩ respectively, x The time domain diagram is as follows Figure 5 As shown; ignoring some minor differences between numerical simulation and hardware circuit experiments caused by calculation errors and parasitic circuit parameters, the experimental results are basically consistent with the numerical simulation.

[0057] Therefore, the memristor-memcapacitor driven cell neuron circuit constructed by the present invention has a scientific theoretical basis, and the designed analog circuit unit will provide a reference value for the hardware experimental research on the dynamic behavior of the memristor-memcapacitor driven neuron; ignoring some minor differences between the numerical simulation and the hardware circuit experiment caused by calculation errors and parasitic circuit parameters, the experimental results are almost consistent with the numerical simulation, and it can also be found that the discharge activity shows a close correlation with the activation function amplitude; therefore, the memristor-memcapacitor driven cell neuron model constructed by the present invention has a scientific theoretical basis, and the designed analog circuit unit will provide a reference value for the research on the realization of the memristor-memcapacitor driven cell neural network circuit.

[0058] Based on the above ideal embodiments of the present invention, the relevant staff can make various changes and modifications without departing from the technical concept of the present invention through the above description. The technical scope of the present invention is not limited to the contents of the specification, and its technical scope must be determined according to the scope of the claims.

Claims

1. A memristor-memristor-driven cell neuron circuit that generates unidirectional action potentials, characterized in that: include: Sinusoidal AC power supply I ext 、Charge-controlled memcapacitor circuit C M , Local active memristor circuit G M , resistor R a , R b , R W , R 14 , operational amplifier U7, precision operational amplifier CT3 and negative absolute value circuit, the output terminal of the negative absolute value circuit is connected to R a After connection, it is connected to the reverse input terminal of U7, and the reverse input terminal of U7 is connected to R 14 and R b One end of the connection, R 14 The other end is connected to the output of U7 and the positive terminal of CT3, and the negative terminal of CT3 is connected to R W After connection, it is connected to the same-direction input terminal of U7, C M With G M Connect both ends in parallel with I ext Connect both ends, C M With G M The two ends of the parallel connection are also connected to the Z end of CT3 and the same-direction input end of U7 respectively; The local active memristor circuit includes: operational amplifiers U1, U2, resistors R1 to R5, resistor R M , capacitor C1, inverting hyperbolic tangent function, analog multipliers M1, M2 and precision operational amplifier CT1, one end of R1 is connected to one end of R2, the inverting input of U1 and the input of M1 respectively, the other end of R2 is connected to the output of U1 and one end of R3 respectively, the other end of R3 is connected to R4, R5, one end of C1 and the inverting input of U2 respectively, the other end of C1 is connected to the output of U2 and the two inputs of M1 respectively, the other end of R4 is connected in series with the inverting hyperbolic tangent function and then connected to the other end of R5 and the output of U2 respectively, the output of M2 is connected to the other input of M1, the output of M1 is connected to the positive input of CT1, and the negative input of CT1 is connected to R M Ground after connection; The charge-controlled memcapacitor circuit includes: precision operational amplifier CT2, resistors R6 to R 13 , resistor R β , analog multiplier M3, capacitors C2, C3, operational amplifiers U3 to U6, and DC bias voltage V α The W end of CT2 is connected to one end of R7 and then connected to one end of C2 and the reverse input end of U3. The other end of C2 is connected to the output end of U3, one end of R8 and one end of M3. The other end of R8 is connected to one end of R9 and the reverse input end of U4. The other end of R9 is connected to the output end of U4 and R 11 One end of the connection, R 11 The other end is connected to the reverse input terminal of U5 and R 10 and one end of C3; R 10 The other end of C3 and R β One end of the U5 is connected to the output end, R β The other end is connected to R 12 , R 13 One end of the U6 is connected to the reverse input terminal, R 13 The other end is connected to the output end of U6 and the other end of the input of M3, the output end of M3 is connected to the positive input end of CT2, and the Z end of CT2 is connected to R6 and then grounded.

2. The memristor-memcapacitor driven cell neuron circuit for generating unidirectional action potential according to claim 1, characterized in that: The model of memristor-memristor-capacitor driven cell neuron is: In the formula, q, σ, They are the three state variables of the neuron, v x is the memristor input voltage, a is the absolute value function amplitude, I ext For external motivation.

3. The memristor-memcapacitor driven cell neuron circuit for generating unidirectional action potential according to claim 1, characterized in that: The mathematical expression of the local active memristor circuit is: In the formula, i M and V x are the current flowing through the memristor and the input voltage respectively; is the internal state variable of the memristor; g1 and g2 are the gains of multipliers M1 and M2 respectively, R3, R4, R5, R M is a resistor and C1 is a capacitor.

4. The memristor-memcapacitor driven cell neuron circuit for generating unidirectional action potential according to claim 1, characterized in that: The mathematical expression of the charge-controlled memcapacitor circuit is: In the formula, i C and V C are the current flowing through the memcapacitor and the input voltage respectively; V σ 、V q is the load-controlled memory output state variable; g3 is the gain of multiplier M3; R6, R7, R 10 , R 11 , R 13 , R β is a resistor; C2 and C3 are capacitors, V α is a DC voltage bias.

5. The memristor-memcapacitor driven cell neuron circuit for generating unidirectional action potential according to claim 1, characterized in that: The mathematical expression of the memristor-memristor-capacitor driven cell neuron circuit is: In the formula, V σ and V q are the three state variables of the neuron; V x is the reciprocal of the memristor and memcapacitor input voltage, R3, R4, R5, R 10 , R 11 , R 14 , R a , R b , R W , R M is the resistance, abs(.) is the absolute value function, C1, C2, C3 are the capacitances, I ext For external motivation.

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