A power factor correction circuit, its control method and device

Abstract

The present application discloses a power factor correction circuit, its control method and device, belonging to the technical field of power factor correction. The method includes: obtaining the input AC voltage, input AC current, output DC bus voltage, target DC bus voltage of the power factor correction circuit in the current switching period, and the temperatures of each high-frequency switching power device in the power factor correction circuit; performing power factor correction to obtain the duty cycle of the driving signal required for each high-frequency switching power device in the next switching period; according to the temperatures of each high-frequency switching power device and the condition that the total driving power in the next switching period remains unchanged, adjusting the duty cycle of the driving signal required for each high-frequency switching power device in the next switching period. The present application enables the power devices with lower temperature rise to bear a greater load, and the power devices with higher temperature rise to bear a lower load, so that the temperatures of each power device are gradually balanced, effectively improving the power density and enhancing the reliability of the PFC circuit.

Description

Technical Field

[0001] This application belongs to the technical field of power factor correction, and particularly relates to a control method and device for a power factor correction circuit. Background Art

[0002] As the country's requirements for the energy utilization efficiency of electrical equipment are getting higher and higher, the interleaved totem-pole power factor correction (PFC) circuit based on multi-channel parallel connection is widely used in equipment such as power supplies, variable-frequency air conditioners, and frequency converters due to its high efficiency, simplicity, and the ability to boost the output voltage.

[0003] Currently, the interleaved totem-pole power factor correction circuit based on multi-channel parallel connection generally adopts a control scheme of current sharing for each output channel. However, in practice, due to differences in structural layout and air ducts, the heat generation of each power device is uneven. Long-term operation of the circuit under unbalanced loads will cause uneven heat generation in each part and lead to failure. At the same time, it is necessary to collect the current of each channel, and the current sampling circuit is complex, with many components and high costs. Due to the above defects, the existing interleaved totem-pole PFC circuit may cause problems such as poor reliability of the power supply system and reduced power density. Summary of the Invention

[0004] In view of this, embodiments of the present application provide a power factor correction circuit and its control method and device to solve at least one of the above technical problems.

[0005] The first aspect of the embodiments of the present application provides a control method for a power factor correction circuit, including:

[0006] Obtaining the input AC voltage, input AC current, output DC bus voltage, target DC bus voltage, and the temperature of each high-frequency switching power device in the power factor correction circuit during the current switching cycle;

[0007] Performing power factor correction based on the input AC voltage, input AC current, output DC bus voltage, and target DC bus voltage during the current switching cycle to obtain the duty cycle of the driving signal required for each high-frequency switching power device in the next switching cycle;

[0008] Adjusting the duty cycle of the driving signal required for each high-frequency switching power device in the next switching cycle according to the temperature of each high-frequency switching power device and the condition that the total driving power in the next switching cycle remains unchanged.

[0009] In a possible implementation manner, adjusting the duty cycle of the driving signals required by each high-frequency switching power device in the next switching cycle according to the temperatures of the high-frequency switching power devices and the condition that the total driving power in the next switching cycle remains unchanged includes:

[0010] Determine at least two high-frequency switching power devices in the on state in the next switching cycle as target high-frequency switching power devices;

[0011] If the temperature difference between any two target high-frequency switching power devices is within a preset temperature difference range, then do not adjust the duty cycle of the driving signals required by each high-frequency switching power device in the next switching cycle;

[0012] If the temperature difference between at least two target high-frequency switching power devices exceeds the preset temperature difference range, then adjust the duty cycle of the driving signals required by the at least two target high-frequency switching power devices according to the condition that the total driving power in the next switching cycle remains unchanged until the temperature difference between any two target high-frequency switching power devices is within the preset temperature difference range.

[0013] In a possible implementation manner, adjusting the duty cycle of the driving signals required by the at least two target high-frequency switching power devices includes:

[0014] Reduce the duty cycle of the driving signal required by the target high-frequency switching power device with the highest temperature among the at least two target high-frequency switching power devices according to a preset step size;

[0015] Increase the duty cycle of the driving signal required by the target high-frequency switching power device with the lowest temperature among the at least two target high-frequency switching power devices according to a preset step size.

[0016] In a possible implementation manner, performing power factor correction according to the input AC voltage, input AC current, output DC bus voltage, and target DC bus voltage in the current switching cycle to obtain the duty cycle of the driving signals required by each high-frequency switching power device in the next switching cycle includes:

[0017] Obtain the target value of the input current according to the phase error between the input AC voltage and the input AC current;

[0018] Obtain the input current compensation value according to the error between the output DC bus voltage and the target DC bus voltage;

[0019] Obtain the duty cycle of the driving signals required by each high-frequency switching power device in the next switching cycle according to the target value of the input current and the input current compensation value.

[0020] In a possible implementation manner, obtaining the duty cycle of the driving signals required for each high-frequency switching power device in the next switching period according to the input current target value and the input current compensation value includes:

[0021] Obtaining the total duty cycle of the driving signals required for the power factor correction circuit in the next switching period according to the input current target value and the input current compensation value;

[0022] Averaging the total duty cycle of the driving signals to each high-frequency switching power device of the power factor correction circuit to obtain the duty cycle of the driving signals required for each high-frequency switching power device in the next switching period.

[0023] The control method of the power factor correction circuit according to the first aspect embodiment of the present application obtains the input AC voltage, input AC current, output DC bus voltage, target DC bus voltage of the power factor correction circuit in the current switching period, and the temperature of each high-frequency switching power device in the power factor correction circuit; performs power factor correction according to the input AC voltage, input AC current, output DC bus voltage, and target DC bus voltage in the current switching period to obtain the duty cycle of the driving signals required for each high-frequency switching power device in the next switching period; adjusts the duty cycle of the driving signals required for each high-frequency switching power device in the next switching period according to the temperature of each high-frequency switching power device and the condition that the total driving power in the next switching period remains unchanged. Compared with the existing interleaved totem pole PFC circuit, the present application enables the power devices with lower temperature rise to bear a greater load, and the power devices with higher temperature rise to bear a lower load, and the temperatures of each power device gradually balance, effectively improving the power density and the reliability of the PFC circuit.

[0024] The control device of the power factor correction circuit according to the second aspect embodiment of the present application includes:

[0025] A power factor correction module for obtaining the input AC voltage, input AC current, output DC bus voltage, target DC bus voltage of the power factor correction circuit in the current switching period, and the temperature of each high-frequency switching power device in the power factor correction circuit;

[0026] A driving signal generation module for performing power factor correction according to the input AC voltage, input AC current, output DC bus voltage, and target DC bus voltage in the current switching period to obtain the duty cycle of the driving signals required for each high-frequency switching power device in the next switching period;

[0027] The temperature rise compensation module is used to adjust the duty cycle of the drive signals required for each high-frequency switching power device in the next switching cycle according to the temperatures of the high-frequency switching power devices and the condition that the total drive power in the next switching cycle remains unchanged.

[0028] In a possible implementation manner, the temperature rise compensation module is specifically configured to:

[0029] Determine at least two high-frequency switching power devices in the on state in the next switching cycle as target high-frequency switching power devices;

[0030] If the temperature difference between any two target high-frequency switching power devices is within a preset temperature difference range, then do not adjust the duty cycle of the drive signals required for each high-frequency switching power device in the next switching cycle;

[0031] If the temperature difference between at least two target high-frequency switching power devices exceeds the preset temperature difference range, then adjust the duty cycle of the drive signals required for the at least two target high-frequency switching power devices according to the condition that the total drive power in the next switching cycle remains unchanged until the temperature difference between any two target high-frequency switching power devices is within the preset temperature difference range.

[0032] In a possible implementation manner, the temperature rise compensation module is specifically configured to:

[0033] Reduce the duty cycle of the drive signal required for the target high-frequency switching power device with the highest temperature among the at least two target high-frequency switching power devices in accordance with a preset step size;

[0034] Increase the duty cycle of the drive signal required for the target high-frequency switching power device with the lowest temperature among the at least two target high-frequency switching power devices in accordance with a preset step size.

[0035] The control device of the power factor correction circuit according to the second aspect of the present application obtains the input AC voltage, input AC current, output DC bus voltage, target DC bus voltage of the power factor correction circuit, and the temperature of each high-frequency switching power device in the power factor correction circuit during the current switching cycle; performs power factor correction according to the input AC voltage, input AC current, output DC bus voltage, and target DC bus voltage of the current switching cycle to obtain the duty cycle of the driving signal required for each high-frequency switching power device in the next switching cycle; adjusts the duty cycle of the driving signal required for each high-frequency switching power device in the next switching cycle according to the temperature of each high-frequency switching power device and the condition that the total driving power in the next switching cycle remains unchanged. Compared with the existing interleaved totem pole PFC circuit, the present application enables the power devices with lower temperature rise to bear a greater load, and the power devices with higher temperature rise to bear a lower load, so that the temperatures of each power device are gradually balanced, effectively improving the power density and the reliability of the PFC circuit.

[0036] The electronic device according to the third aspect of the present application includes: a memory, a processor, and a computer program stored on the memory and executable on the processor. When the processor runs the computer program, it implements the control method of the power factor correction circuit according to the first aspect of the embodiment.

[0037] The computer-readable storage medium according to the fourth aspect of the present application stores computer-readable instructions, and the computer-readable instructions can be executed by a processor to implement the control method of the power factor correction circuit according to the first aspect of the embodiment.

[0038] The power factor correction circuit according to the fifth aspect of the present application includes: at least one temperature detection unit and a controller;

[0039] The at least one temperature detection unit is configured to detect the temperature of each high-frequency switching power device in the power factor correction circuit;

[0040] The controller is configured to control the duty cycle of the driving signal required for each high-frequency switching power device in the power factor correction circuit by using the method described in the first aspect of the embodiment. Description of the Drawings

[0041] By reading the detailed description of the preferred embodiments below, various other advantages and benefits will become clear to those of ordinary skill in the art. The drawings are only for the purpose of showing the preferred embodiments and are not considered to be a limitation of the present application. Moreover, throughout the drawings, the same reference numerals are used to represent the same components. In the drawings:

[0042] Attached Figure 1The flowchart of a control method for a power factor correction circuit according to an embodiment of the present application is shown;

[0043] Appendix Figure 2 A specific power factor correction circuit is shown;

[0044] Appendix Figure 3 The schematic diagram of the calculation process of the PWM duty cycle in the next switching period is shown;

[0045] Appendix Figure 4 The schematic diagram of the control process of the low-frequency switching device is shown;

[0046] Appendix Figure 5 Shows the input power supply V AC The working states of each device in the circuit when it is in the positive half cycle;

[0047] Appendix Figure 6 Shows the input power supply V AC The working states of each device in the circuit when it is in the negative half cycle;

[0048] Appendix Figure 7 The schematic diagram of one of the processes of adjusting the duty cycle of the driving signal is shown;

[0049] Appendix Figure 8 The schematic diagram of the other process of adjusting the duty cycle of the driving signal is shown;

[0050] Appendix Figure 9 Shows Figure 2 The PWM control flowchart of the shown circuit;

[0051] Appendix Figure 10 The schematic diagram of a control device for a power factor correction circuit according to an embodiment of the present application is shown.

[0052] The realization, functional features and advantages of the object of the present invention will be further described in conjunction with the embodiments and with reference to the accompanying drawings. Specific embodiments

[0053] Next, the technical solutions in the embodiments of the present invention will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without creative efforts shall fall within the protection scope of the present invention.

[0054] It should be noted that all directional indications (such as up, down, left, right, front, back...) in the embodiments of the present invention are only used to explain the relative positional relationship and movement conditions between components in a specific posture (as shown in the accompanying drawings). If the specific posture changes, the directional indications will also change accordingly.

[0055] In addition, in the present invention, descriptions such as "first", "second", etc. are only for descriptive purposes and should not be construed as indicating or implying their relative importance or implicitly specifying the quantity of the indicated technical features. Thus, features defined with "first" and "second" may explicitly or implicitly include at least one such feature. In the description of the present invention, the meaning of "a plurality" is at least two, such as two, three, etc., unless otherwise specifically defined.

[0056] In the present invention, unless otherwise clearly specified and defined, terms such as "connection" and "fixation" shall be understood in a broad sense. For example, "fixation" may be a fixed connection, a detachable connection, or integrated; it may be a mechanical connection or an electrical connection; it may be directly connected or indirectly connected through an intermediate medium, and may be the internal communication of two components or the interaction relationship between two components, unless otherwise clearly defined. For those of ordinary skill in the art, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0057] In addition, the technical solutions between various embodiments of the present invention can be combined with each other, but it must be based on the ability of those of ordinary skill in the art to implement. When the combination of technical solutions is contradictory or cannot be implemented, it should be considered that such a combination of technical solutions does not exist and is not within the protection scope required by the present invention.

[0058] The present application provides a power factor correction circuit, its control method, device, electronic device, and storage medium. By obtaining the input AC voltage, input AC current, output DC bus voltage, target DC bus voltage, and the temperature of each high-frequency switching power device in the power factor correction circuit during the current switching cycle; performing power factor correction according to the input AC voltage, input AC current, output DC bus voltage, and target DC bus voltage of the current switching cycle to obtain the duty cycle of the driving signal required for each high-frequency switching power device in the next switching cycle; adjusting the duty cycle of the driving signal required for each high-frequency switching power device in the next switching cycle according to the temperature of each high-frequency switching power device and the condition that the total driving power in the next switching cycle remains unchanged. Compared with the existing interleaved totem-pole PFC circuit, the present application enables the power devices with lower temperature rise to bear a greater load, and the power devices with higher temperature rise to bear a lower load, gradually balancing the temperatures of each power device, effectively improving the power density, and enhancing the reliability of the PFC circuit. It solves the problem that the traditional interleaved totem-pole PFC circuit has uneven heat generation of each power device due to differences in structural layout and air duct.

[0059] To make the above objects, features, and advantages of the present application more obvious and understandable, the following will describe in detail the specific embodiments of the present application with reference to the accompanying drawings.

[0060] Embodiment 1

[0061] Figure 1 is a flowchart of a control method for a power factor correction circuit provided by an embodiment of the present application. As Figure 1 shown, the control method for the power factor correction circuit includes:

[0062] Step S101: Obtain the input AC voltage, input AC current, output DC bus voltage, target DC bus voltage, and the temperatures of each high-frequency switching power device in the power factor correction circuit during the current switching cycle;

[0063] Step S102: Perform power factor correction based on the input AC voltage, input AC current, output DC bus voltage, and target DC bus voltage of the current switching cycle to obtain the duty cycle of the driving signals required for each high-frequency switching power device in the next switching cycle;

[0064] Step S103: Adjust the duty cycle of the driving signals required for each high-frequency switching power device in the next switching cycle according to the temperatures of each high-frequency switching power device and the condition that the total driving power in the next switching cycle remains unchanged.

[0065] As Figure 2 shown is Figure 1 a schematic diagram of a specific application scenario of the control method for the power factor correction circuit shown. For ease of understanding, the embodiment of the present application takes Figure 2 the two branches shown as an example. Of course, the present application can also be applied to an interleaved totem-pole power factor correction circuit with more than two branches.

[0066] Taking Figure 2 as an example, in step S101, the input AC voltage can be detected and obtained through an input voltage detection circuit, the input AC current can be detected and obtained through an input current detection circuit, and the output DC bus voltage can be detected and obtained through a DC bus voltage detection circuit. Figure 2 In

[0067] Q1-Q4 are high-frequency switching power devices, S1 and S2 are low-frequency switching devices, and driving circuits 1-4 are used to provide driving signals to high-frequency switching power devices Q1-Q4 respectively. The temperatures of high-frequency switching power devices Q1-Q4 can be detected respectively through temperature detection circuits 1-4. An NTC thermistor (negative temperature coefficient thermistor) can be specifically used for detection in the temperature detection circuit.

[0068] In step S102, specifically, the target value of the input current can be obtained according to the phase error between the acquired input AC voltage and the input AC current; the input current compensation value can be obtained according to the error between the output DC bus voltage and the target DC bus voltage; and the duty cycle of the driving signals required for each high-frequency switching power device in the next switching cycle can be obtained according to the input current target value and the input current compensation value.

[0069] Specifically, the total duty cycle of the driving signals required for the power factor correction circuit in the next switching cycle can be obtained according to the input current target value and the input current compensation value; and the duty cycle of the driving signals required for each high-frequency switching power device in the next switching cycle can be obtained by averaging the total duty cycle of the driving signals to each high-frequency switching power device of the power factor correction circuit.

[0070] For details, please refer to Figure 2 and Figure 3 As shown, the power factor correction module is used to generate the pulse-width modulation (PWM) duty cycle required for each high-frequency switching power device. The first input terminal V AC DET of the power factor correction module is the input AC voltage of the system, the second input terminal I AC DET is the input AC current of the system, the third input terminal VDC_DET is the output DC bus voltage of the system, and V DC REF is the target DC bus voltage set by the system, and CYCLE is the carrier frequency set by the system. After V AC DET undergoes gain processing, it is combined with I AC DET to obtain the phase error between the input AC voltage and the input AC current. After VDC_DET is compared with V DC REF, the error between the actual output voltage and the target output voltage of the DC bus is obtained. After gain conversion, the current target value for the next switching cycle can be obtained, and then by comparing it with the carrier cycle of the specified frequency CYCLE, the duty cycle for the next switching cycle can be obtained. Since the obtained is a total duty cycle, it is also necessary to divide by the number of branches of the totem-pole PFC to evenly convert the total PWM duty cycle to the duty cycle of the driving signals required for each high-frequency switching power device of each branch.

[0071] The above power factor correction module can be implemented using related technologies, and details are not elaborated in this application.

[0072] It can be seen that this application only needs to collect the total input current of the power factor correction circuit and does not need to collect the current of each branch. Therefore, the circuit is simple, the cost is low, and the reliability is high.

[0073] Figure 2 The voltage phase judgment module therein is used to detect the phase of the input AC voltage V AC . As Figure 4 shown, if V AC is in the positive half cycle (V AC > 0), the low-frequency switching device S1 is turned off and the low-frequency switching device S2 is turned on. If V AC is in the negative half cycle (V AC ≤ 0), the low-frequency switching device S2 is turned off and the low-frequency switching device S1 is turned on.

[0074] Please continue to refer to Figure 2 the two-phase interleaved totem pole PFC circuit shown. The six transistors Q1-Q4, S1, and S2 have eight operating states. When the input power supply V AC is in the positive half cycle, there are four operating states as shown in Table 1 below and Figure 5 shown:

[0075]

[0076] Table 1

[0077] When the input power supply V AC is in the negative half cycle, there are four operating states as shown in Table 2 below and Figure 6 shown:

[0078]

[0079] Table 2

[0080] It can be seen from Figure 5 , 6 that the high-frequency switching power devices Q1-Q4 are controllable when conducting and uncontrollable when the diodes are in freewheeling. Therefore, only by controlling the PWM duty cycle of the high-frequency switching power devices Q1-Q4 during the conduction stage can the load of each operating state be adjusted to achieve temperature rise adjustment. As shown in Table 3 below, except for states 2 and 6, at least one switching tube in the remaining six operating states can adjust the PWM duty cycle.

[0081]

[0082] Table 3

[0083] In step S103, the duty cycle of the drive signals required for each high-frequency switching power device in the next switching cycle can be adjusted according to the temperature of each high-frequency switching power device and the condition that the total drive power in the next switching cycle remains unchanged.

[0084] Specifically, at least two high-frequency switching power devices in the on state in the next switching cycle can be determined as target high-frequency switching power devices; if the temperature difference between any two target high-frequency switching power devices is within a preset temperature difference range, the duty cycle of the driving signals required for each high-frequency switching power device in the next switching cycle is not adjusted; if the temperature difference between at least two target high-frequency switching power devices exceeds the preset temperature difference range, the duty cycle of the driving signals required for the at least two target high-frequency switching power devices is adjusted according to the condition that the total driving power in the next switching cycle remains unchanged until the temperature difference between any two target high-frequency switching power devices is within the preset temperature difference range.

[0085] The user can set the preset temperature difference range according to the actual situation, which can be set to a larger range or a smaller range, and the present application does not limit this.

[0086] Adjusting the duty cycle of the driving signals required for the at least two target high-frequency switching power devices includes: decreasing the duty cycle of the driving signal required for the target high-frequency switching power device with the highest temperature among the at least two target high-frequency switching power devices according to a preset step size; increasing the duty cycle of the driving signal required for the target high-frequency switching power device with the lowest temperature among the at least two target high-frequency switching power devices according to a preset step size.

[0087] The preset step size refers to the amplitude of each adjustment of the duty cycle of the driving signal, which can be adjusted at a certain time interval, and the amplitude of increase and decrease of the duty cycle of the driving signal is the same each time to ensure that the instantaneous total driving power remains unchanged.

[0088] The following also takes Figure 2 the circuit as an example to introduce the adjustment process of the above-mentioned duty cycle of the driving signal in detail.

[0089] In the positive half cycle of the input power supply, when the temperature sensor NTC2 of Q2 is higher than the temperature sensor NTC4 of Q4, in states 3 and 4, the conduction pulse width PWM2 of Q2 is reduced, and in states 1 and 4, the conduction pulse width PWM4 of Q4 is correspondingly increased until the temperatures of NTC2 and NTC4 are balanced. On the contrary, when the temperature sensor NTC4 of Q4 is higher than the temperature sensor NTC2 of Q2, in states 1 and 4, the conduction pulse width PWM4 of Q4 is reduced, and in states 3 and 4, the conduction pulse width PWM2 of Q2 is correspondingly increased until the temperatures of NTC2 and NTC4 are balanced.

[0090] As Figure 7 shown, when NTC2 > NTC4, the temperature error amplifier: ΔT 24 = (NTC2 - NTC4) * ki. The difference amplifier for the conduction pulse widths of PWM2 and PWM4: PWM 24= (PWM2 - PWM4) * ki. Compensation target value and current difference error: ΔPWM 24 = PWM 24 -ΔT 24 After compensation, the effective pulse width of Q2 should be: PWM2 - ΔPWM 24 ; The effective pulse width of Q4 should be adjusted to: PWM2 + ΔPWM 24 , until the temperature is not the highest, and vice versa.

[0091] During the negative half - cycle of the input power supply, when the temperature sensor NTC1 of Q1 is higher than the temperature sensor NTC3 of Q3, in states 7 and 8, reduce the conduction pulse width PWM1 of Q1, and in states 5 and 8, correspondingly increase the conduction pulse width PWM3 of Q3; conversely, when the temperature sensor NTC3 of Q3 is higher than the temperature sensor NTC1 of Q1, in states 5 and 8, reduce the conduction pulse width PWM3 of Q3, and in states 7 and 8, correspondingly increase the conduction pulse width PWM1 of Q1 until the temperatures of NTC1 and NTC3 are balanced.

[0092] As Figure 8 shown, when NTC1 > NTC3, the temperature error amplifier: ΔT 13 = (NTC1 - NTC3) * ki, the difference amplifier for the conduction pulse widths of PWM1 and PWM3: PWM 13 = (PWM1 - PWM3) * ki, compensation target value and current difference error: ΔPWM 13 = PWM 13 -ΔT 13 After compensation, the effective pulse width of Q1 should be: PWM1 - ΔPWM 13 ; The effective pulse width of Q3 should be adjusted to: PWM3 - ΔPWM 13 , until the temperature is not the highest, and vice versa.

[0093] For ease of understanding, the embodiment of the present application also provides a PWM control flowchart as Figure 9 shown.

[0094] The control method of the power factor correction circuit according to the embodiment of the present application includes obtaining the input AC voltage, input AC current, output DC bus voltage, target DC bus voltage, and the temperature of each high-frequency switching power device in the power factor correction circuit during the current switching period; performing power factor correction based on the input AC voltage, input AC current, output DC bus voltage, and target DC bus voltage of the current switching period to obtain the duty cycle of the driving signal required for each high-frequency switching power device in the next switching period; adjusting the duty cycle of the driving signal required for each high-frequency switching power device in the next switching period according to the temperature of each high-frequency switching power device and the condition that the total driving power in the next switching period remains unchanged. Compared with the existing interleaved totem-pole PFC circuit, the present application enables the power devices with lower temperature rise to bear a greater load, and the power devices with higher temperature rise to bear a lower load, so that the temperatures of each power device gradually balance, effectively improving the power density and the reliability of the PFC circuit.

[0095] Embodiment 2

[0096] The embodiment of the present application provides a control device for a power factor correction circuit. The control device for the power factor correction circuit corresponds to the control method of the power factor correction circuit in Embodiment 1. For the relevant parts, refer to the partial description in Embodiment 1. The method embodiments described below are only illustrative.

[0097] Figure 10 is a schematic diagram of a control device for a power factor correction circuit provided by an embodiment of the present application. As Figure 10 shown, the device 10 includes:

[0098] A power factor correction module 101, configured to obtain the input AC voltage, input AC current, output DC bus voltage, target DC bus voltage, and the temperature of each high-frequency switching power device in the power factor correction circuit during the current switching period;

[0099] A driving signal generation module 102, configured to perform power factor correction based on the input AC voltage, input AC current, output DC bus voltage, and target DC bus voltage of the current switching period to obtain the duty cycle of the driving signal required for each high-frequency switching power device in the next switching period;

[0100] A temperature rise compensation module 103, configured to adjust the duty cycle of the driving signal required for each high-frequency switching power device in the next switching period according to the temperature of each high-frequency switching power device and the condition that the total driving power in the next switching period remains unchanged.

[0101] In a possible implementation manner, the temperature rise compensation module 103 is specifically configured to:

[0102] Determine at least two high-frequency switching power devices in the on state in the next switching cycle as target high-frequency switching power devices;

[0103] If the temperature difference between any two target high-frequency switching power devices is within a preset temperature difference range, then do not adjust the duty cycle of the drive signals required for each high-frequency switching power device in the next switching cycle;

[0104] If the temperature difference between at least two target high-frequency switching power devices exceeds the preset temperature difference range, then adjust the duty cycle of the drive signals required for the at least two target high-frequency switching power devices according to the condition that the total drive power in the next switching cycle remains unchanged, until the temperature difference between any two target high-frequency switching power devices is within the preset temperature difference range.

[0105] In a possible implementation manner, the temperature rise compensation module 103 is specifically configured to:

[0106] Reduce the duty cycle of the drive signal required for the target high-frequency switching power device with the highest temperature among the at least two target high-frequency switching power devices according to a preset step size;

[0107] Increase the duty cycle of the drive signal required for the target high-frequency switching power device with the lowest temperature among the at least two target high-frequency switching power devices according to a preset step size.

[0108] In a possible implementation manner, the drive signal generation module 102 is specifically configured to:

[0109] Obtain a target input current value according to the phase error between the input AC voltage and the input AC current;

[0110] Obtain an input current compensation value according to the error between the output DC bus voltage and the target DC bus voltage;

[0111] Obtain the duty cycle of the drive signals required for each high-frequency switching power device in the next switching cycle according to the target input current value and the input current compensation value.

[0112] In a possible implementation manner, the drive signal generation module 102 is specifically configured to:

[0113] Obtain the total duty cycle of the drive signals required for the power factor correction circuit in the next switching cycle according to the target input current value and the input current compensation value;

[0114] Average the total duty cycle of the drive signals to each high-frequency switching power device of the power factor correction circuit to obtain the duty cycle of the drive signals required for each high-frequency switching power device in the next switching cycle.

[0115] The control device of the power factor correction circuit in this embodiment obtains the input AC voltage, input AC current, output DC bus voltage, target DC bus voltage, and the temperatures of each high-frequency switching power device in the power factor correction circuit during the current switching period; performs power factor correction based on the input AC voltage, input AC current, output DC bus voltage, and target DC bus voltage in the current switching period to obtain the duty cycle of the driving signals required for each high-frequency switching power device in the next switching period; adjusts the duty cycle of the driving signals required for each high-frequency switching power device in the next switching period according to the temperatures of each high-frequency switching power device and the condition that the total driving power in the next switching period remains unchanged. Compared with the existing interleaved totem-pole PFC circuit, the present application enables the power devices with lower temperature rise to bear a greater load, and the power devices with higher temperature rise to bear a lower load, gradually balancing the temperatures of each power device, effectively improving the power density and enhancing the reliability of the PFC circuit.

[0116] Embodiment 3

[0117] The embodiment of the present application also provides a power factor correction circuit, including: at least one temperature detection unit and a controller;

[0118] The at least one temperature detection unit is configured to detect the temperatures of each high-frequency switching power device in the power factor correction circuit;

[0119] The controller is configured to control the duty cycle of the driving signals required for each high-frequency switching power device in the power factor correction circuit by using the control method of the power factor correction circuit provided in any of the foregoing embodiments of the present application.

[0120] The power factor correction circuit provided in the embodiment of the present application and the control method of the power factor correction circuit provided in the embodiment of the present application are based on the same inventive concept and have the same beneficial effects as the methods adopted, run, or implemented by them.

[0121] Embodiment 4

[0122] The embodiment of the present application also provides an electronic device, including: a memory, a processor, and a computer program stored on the memory and executable on the processor. When the processor runs the computer program, it is configured to implement the control method of the power factor correction circuit in any of the embodiments in Embodiment 1. This electronic device can be a household appliance using a magnetic levitation bearing, such as an air conditioner, and the present application does not make any limitations in this regard.

[0123] Specifically, the electronic device may include: a processor, a memory, a bus, and a communication interface. The processor, the communication interface, and the memory are connected through the bus. A computer program that can run on the processor is stored in the memory. When the processor runs the computer program, it executes the control method of the power factor correction circuit provided in any of the foregoing embodiments of the present application.

[0124] Among them, the memory may include a high-speed random access memory (RAM: Random Access Memory), and may also include a non-volatile memory, such as at least one disk memory. Through at least one communication interface (which can be wired or wireless), a communication connection is realized between this system network element and at least one other network element. The Internet, wide area network, local area network, metropolitan area network, etc. can be used.

[0125] The bus can be an ISA bus, a PCI bus, an EISA bus, etc. The bus can be divided into an address bus, a data bus, a control bus, etc. Among them, the memory is used to store programs. After receiving the execution instruction, the processor executes the program. The control method of the power factor correction circuit disclosed in any of the foregoing embodiments of the present application can be applied to the processor or implemented by the processor.

[0126] The processor may be an integrated circuit chip with signal processing capabilities. In the implementation process, each step of the above method can be completed by the integrated logic circuit in the hardware of the processor or the instructions in software form. The above-mentioned processor can be a general-purpose processor, including a central processing unit (CPU for short), a network processor (NP for short), etc.; it can also be a digital signal processor (DSP), an application-specific integrated circuit (ASIC), a field-programmable gate array (FPGA), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components. It can implement or execute the various methods, steps, and logic block diagrams disclosed in the embodiments of the present application. The general-purpose processor can be a microprocessor or the processor can also be any conventional processor, etc. The steps of the method disclosed in combination with the embodiments of the present application can be directly embodied as being executed and completed by the hardware decoding processor, or executed and completed by the combination of the hardware and software modules in the decoding processor. The software module can be located in a mature storage medium in the art, such as a random access memory, flash memory, read-only memory, programmable read-only memory, or electrically erasable programmable memory, register, etc. This storage medium is located in the memory, and the processor reads the information in the memory and combines its hardware to complete the steps of the above method.

[0127] The electronic device provided by the embodiment of the present application and the control method of the power factor correction circuit provided by the embodiment of the present application are based on the same inventive concept and have the same beneficial effects as the method adopted, run or implemented by it.

[0128] Embodiment 5

[0129] The embodiment of the present application also provides a computer-readable storage medium, on which computer-readable instructions are stored, and the computer-readable instructions can be executed by a processor to implement the control method of the power factor correction circuit in any one of the embodiments in Embodiment 1.

[0130] Examples of the computer-readable storage medium may also include, but are not limited to, phase change memory (PRAM), static random access memory (SRAM), dynamic random access memory (DRAM), other types of random access memory (RAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), flash memory or other optical and magnetic storage media, which will not be elaborated here one by one.

[0131] The computer-readable storage medium provided by the above embodiment of the present application and the control method of the power factor correction circuit provided by the embodiment of the present application are based on the same inventive concept and have the same beneficial effects as the method adopted, run or implemented by the application program stored therein.

[0132] It should be noted that:

[0133] In the specification provided here, a large number of specific details are described. However, it can be understood that the embodiments of the present application can be practiced without these specific details. In some instances, well-known methods, structures and technologies are not shown in detail so as not to obscure the understanding of this specification.

[0134] Similarly, it should be understood that in order to streamline the present application and help understand one or more of the various inventive aspects, in the above description of the exemplary embodiments of the present application, the various features of the present application are sometimes grouped together into a single embodiment, figure, or description thereof. However, the disclosed method should not be construed as reflecting the intention that the claimed present application requires more features than those expressly recited in each claim. Rather, as reflected by the following claims, the inventive aspects lie in less than all the features of the single foregoing disclosed embodiment. Thus, the claims following the detailed description are hereby expressly incorporated into the detailed description, where each claim stands on its own as a separate embodiment of the present application.

[0135] Those skilled in the art can understand that the modules in the devices in the embodiments can be adaptively changed and arranged in one or more devices different from those of the embodiments. The modules or units or components in the embodiments can be combined into one module or unit or component, and in addition, they can be divided into multiple sub-modules or sub-units or sub-components. Except that at least some of such features and / or processes or units are mutually exclusive, any combination can be adopted to combine all the features disclosed in this specification (including the accompanying claims, abstract, and drawings) and all the processes or units of any method or device so disclosed. Unless otherwise explicitly stated, each feature disclosed in this specification (including the accompanying claims, abstract, and drawings) can be replaced by an alternative feature that provides the same, equivalent, or similar purpose.

[0136] In addition, those skilled in the art can understand that although some of the embodiments described herein include certain features included in other embodiments rather than other features, the combination of the features of different embodiments means that it is within the scope of this application and forms different embodiments. For example, in the following claims, any one of the claimed embodiments can be used in any combination.

[0137] Each component embodiment of the present application can be implemented in hardware, or in software modules running on one or more processors, or in a combination thereof. Those skilled in the art should understand that in practice, a microprocessor or a digital signal processor (DSP) can be used to implement some or all of the functions of some or all of the components in the virtual machine creation device according to the embodiments of the present application. The present application can also be implemented as a device or device program (such as a computer program and a computer program product) for executing part or all of the methods described herein. Such a program implementing the present application can be stored on a computer-readable medium, or can be in the form of one or more signals. Such signals can be downloaded from an Internet website, or provided on a carrier signal, or provided in any other form.

[0138] It should be noted that the above embodiments are illustrative of the present application rather than restrictive thereof, and those skilled in the art can design alternative embodiments without departing from the scope of the appended claims. In the claims, any reference signs placed between parentheses shall not be construed as limiting the claim. The word "comprising" does not exclude the presence of elements or steps not listed in the claim. The word "a" or "an" preceding an element does not exclude the presence of a plurality of such elements. The present application can be implemented by means of hardware including several different elements and by means of a suitably programmed computer. In a unit claim listing several devices, several of these devices can be embodied by the same item of hardware. The use of the words first, second, and third, etc. does not denote any order. These words can be interpreted as names.

[0139] The above are only the preferred embodiments of the present invention, and do not limit the patent scope of the present invention accordingly. Any equivalent structural transformation made under the concept of the present invention by using the content of the specification and drawings of the present invention, or directly / indirectly applied to other related technical fields, is included in the patent protection scope of the present invention.

Claims

1. A control method for a power factor correction circuit, characterized in that: include: Acquire the input AC voltage, input AC current, output DC bus voltage, target DC bus voltage of the power factor correction circuit in the current switching cycle, and the temperature of each high-frequency switching power device in the power factor correction circuit; Performing power factor correction according to the input AC voltage, input AC current, output DC bus voltage and target DC bus voltage of the current switching cycle to obtain a duty cycle of a drive signal required by each high-frequency switching power device in the next switching cycle; Determine at least two high-frequency switching power devices in an on state in the next switching cycle as target high-frequency switching power devices; If the temperature difference between any two target high-frequency switching power devices is within a preset temperature difference range, then the duty cycle of the driving signal required by each high-frequency switching power device in the next switching cycle is not adjusted; According to the temperature difference between at least two target high-frequency switching power devices exceeding the preset temperature difference range, the duty cycle of the driving signal required by the at least two target high-frequency switching power devices is adjusted according to the condition that the total driving power of the next switching cycle remains unchanged, until the temperature difference between any two target high-frequency switching power devices is within the preset temperature difference range; Wherein, the step of adjusting the duty cycle of the driving signal required by the at least two target high-frequency switching power devices includes: reducing the duty cycle of the driving signal required by the target high-frequency switching power device with the highest temperature among the at least two target high-frequency switching power devices according to a preset step size; increasing the duty cycle of the driving signal required by the target high-frequency switching power device with the lowest temperature among the at least two target high-frequency switching power devices according to a preset step size; The power factor correction circuit comprises: a first high-frequency bridge arm composed of high-frequency switching power devices Q1 and Q2, and a second high-frequency bridge arm composed of high-frequency switching power devices Q3 and Q4; the emitter of the high-frequency switching power device Q1 and the collector of the high-frequency switching power device Q2 are connected to the inductor L2, and the collector of the high-frequency switching power device Q1 and the emitter of the high-frequency switching power device Q2 are respectively connected to the two ends of the load; the emitter of the high-frequency switching power device Q3 and the collector of the high-frequency switching power device Q4 are connected to the inductor L1, and the collector of the high-frequency switching power device Q3 and the emitter of the high-frequency switching power device Q4 are respectively connected to the two ends of the load; When the input AC voltage is in a positive half cycle, the duty cycles of the driving signals of the high-frequency switching power device Q2 and the high-frequency switching power device Q4 are P2 and P4 respectively, and the device temperatures are T2 and T4 respectively; When T2>T4, the temperature error amplifier obtains: ΔT=(T2-T4)*ki, and the difference amplifier of the on-pulse width obtains: ΔPWM=(P2-P4)*ki. The difference error between the compensation target value and the current value is: ΔP=ΔPWM-ΔT; where ki represents the amplification factor; After compensation, the effective pulse width adjustment of the high-frequency switching power device Q2 is: P2-ΔP; the effective pulse width adjustment of the high-frequency switching power device Q4 is: P4+ΔP; and vice versa; When the input AC voltage is in the negative half cycle, the duty ratios of the driving signals of the high-frequency switching power device Q1 and the high-frequency switching power device Q3 are P1 and P3 respectively, and the device temperatures are T1 and T3 respectively; When T1>T3, the temperature error amplifier obtains: ΔT=(T1-T3)*ki, and the difference amplifier of the on-pulse width obtains: ΔPWM=(P1-P3)*ki. The difference error between the compensation target value and the current value is: ΔP=ΔPWM-ΔT; where ki represents the amplification factor; After compensation, the effective pulse width adjustment of the high-frequency switching power device Q1 is: P1-ΔP; the effective pulse width adjustment of the high-frequency switching power device Q3 is: P3+ΔP; and vice versa.

2. The control method of the power factor correction circuit according to claim 1, characterized in that: The power factor correction is performed according to the input AC voltage, input AC current, output DC bus voltage and target DC bus voltage of the current switching cycle to obtain the duty cycle of the driving signal required by each high-frequency switching power device in the next switching cycle, including: Obtaining an input current target value according to a phase error between the input AC voltage and the input AC current; Obtaining an input current compensation value according to an error between the output DC bus voltage and a target DC bus voltage; According to the input current target value and the input current compensation value, the duty cycle of the driving signal required by each high-frequency switching power device in the next switching cycle is obtained.

3. The control method of the power factor correction circuit according to claim 2, characterized in that: The step of obtaining the duty cycle of the driving signal required by each high-frequency switching power device in the next switching cycle according to the input current target value and the input current compensation value includes: Obtaining a total duty cycle of a drive signal required by the power factor correction circuit in a next switching cycle according to the input current target value and the input current compensation value; The total duty cycle of the driving signal is averaged to each high-frequency switching power device of the power factor correction circuit to obtain the duty cycle of the driving signal required by each high-frequency switching power device in the next switching cycle.

4. A control device for a power factor correction circuit, characterized in that: include: A power factor correction module, used to obtain the input AC voltage, input AC current, output DC bus voltage, target DC bus voltage of the power factor correction circuit in the current switching cycle and the temperature of each high-frequency switching power device in the power factor correction circuit; A drive signal generating module, used to perform power factor correction according to the input AC voltage, input AC current, output DC bus voltage and target DC bus voltage of the current switching cycle, and obtain the duty cycle of the drive signal required by each high-frequency switching power device in the next switching cycle; Temperature rise compensation module for: Determine at least two high-frequency switching power devices in an on state in the next switching cycle as target high-frequency switching power devices; If the temperature difference between any two target high-frequency switching power devices is within a preset temperature difference range, then the duty cycle of the driving signal required by each high-frequency switching power device in the next switching cycle is not adjusted; According to the temperature difference between at least two target high-frequency switching power devices exceeding the preset temperature difference range, the duty cycle of the driving signal required by the at least two target high-frequency switching power devices is adjusted according to the condition that the total driving power of the next switching cycle remains unchanged, until the temperature difference between any two target high-frequency switching power devices is within the preset temperature difference range; The temperature rise compensation module is specifically used for: reducing the duty cycle of the driving signal required by the target high-frequency switching power device with the highest temperature among the at least two target high-frequency switching power devices according to a preset step size; increasing the duty cycle of the driving signal required by the target high-frequency switching power device with the lowest temperature among the at least two target high-frequency switching power devices according to a preset step size; The power factor correction circuit comprises: a first high-frequency bridge arm composed of high-frequency switching power devices Q1 and Q2, and a second high-frequency bridge arm composed of high-frequency switching power devices Q3 and Q4; the emitter of the high-frequency switching power device Q1 and the collector of the high-frequency switching power device Q2 are connected to the inductor L2, and the collector of the high-frequency switching power device Q1 and the emitter of the high-frequency switching power device Q2 are respectively connected to the two ends of the load; the emitter of the high-frequency switching power device Q3 and the collector of the high-frequency switching power device Q4 are connected to the inductor L1, and the collector of the high-frequency switching power device Q3 and the emitter of the high-frequency switching power device Q4 are respectively connected to the two ends of the load; When the input AC voltage is in a positive half cycle, the duty cycles of the driving signals of the high-frequency switching power device Q2 and the high-frequency switching power device Q4 are P2 and P4 respectively, and the device temperatures are T2 and T4 respectively; When T2>T4, the temperature error amplifier obtains: ΔT=(T2-T4)*ki, and the difference amplifier of the on-pulse width obtains: ΔPWM=(P2-P4)*ki. The difference error between the compensation target value and the current value is: ΔP=ΔPWM-ΔT; where ki represents the amplification factor; After compensation, the effective pulse width adjustment of the high-frequency switching power device Q2 is: P2-ΔP; the effective pulse width adjustment of the high-frequency switching power device Q4 is: P4+ΔP; and vice versa; When the input AC voltage is in the negative half cycle, the duty ratios of the driving signals of the high-frequency switching power device Q1 and the high-frequency switching power device Q3 are P1 and P3 respectively, and the device temperatures are T1 and T3 respectively; When T1>T3, the temperature error amplifier obtains: ΔT=(T1-T3)*ki, and the difference amplifier of the on-pulse width obtains: ΔPWM=(P1-P3)*ki. The difference error between the compensation target value and the current value is: ΔP=ΔPWM-ΔT; where ki represents the amplification factor; After compensation, the effective pulse width adjustment of the high-frequency switching power device Q1 is: P1-ΔP; the effective pulse width adjustment of the high-frequency switching power device Q3 is: P3+ΔP; and vice versa.

5. An electronic device comprising: A memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor implements the control method of the power factor correction circuit described in any one of claims 1 to 3 when executing the computer program.

6. A computer-readable storage medium having computer-readable instructions stored thereon, wherein the computer-readable instructions can be executed by a processor to implement the control method of the power factor correction circuit according to any one of claims 1 to 3.

7. A power factor correction circuit, characterized in that: include: at least one temperature detection unit and a controller; The at least one temperature detection unit is used to detect the temperature of each high-frequency switch power device in the power factor correction circuit; The controller is configured to control the duty cycle of the driving signal required by each high-frequency switching power device in the power factor correction circuit by using the method according to any one of claims 1 to 3.

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