Output current control circuit, method, device, source-load integrated machine and storage medium

Abstract

This application discloses an output current control circuit, method, apparatus, source-carrier integrated unit, and storage medium. The output current control circuit includes a voltage sampling unit, an error amplification unit, a current sampling unit, a ramp voltage generation unit, and a comparison unit. The voltage sampling unit acquires the output voltage of the buck circuit, obtains and outputs a voltage sampling signal. The error amplification unit compares the output voltage of the buck circuit with a reference voltage, obtains and outputs an error amplification signal. The current sampling unit acquires the output current of the buck circuit, obtains and outputs a current sampling signal. The ramp voltage generation unit generates and outputs a ramp voltage signal based on the falling slope of the current sampling signal. The ratio of the ramp voltage signal's slope to the falling slope of the output current sampling signal is K, where K is greater than 0.5. The comparison unit compares the current sampling signal with a compensation signal, obtains and outputs a PWM control signal.

Description

Technical Field

[0001] The present application relates to the technical field of source-load integrated machines, and in particular to an output current control circuit, method, device, source-load integrated machine and storage medium. Background Art

[0002] In the integrated source and load machine, the buck circuit introduces nonlinear devices such as power switch tubes and feedback control links, which affects the stability of the converter and easily produces subharmonic oscillation problems, resulting in unstable output current of the integrated source and load machine. Summary of the invention

[0003] The present application aims to propose an output current control circuit, method, device, source-load integrated machine and storage medium, which can solve the problem of unstable output current of traditional source-load integrated machine.

[0004] In a first aspect, an embodiment of the present application provides an output current control circuit, which is applied to a source-load integrated machine, wherein the source-load integrated machine includes a step-down circuit, and the output current control circuit includes:

[0005] A voltage sampling unit, used to collect the output voltage of the step-down circuit, obtain and output a voltage sampling signal;

[0006] An error amplifying unit, wherein a first input terminal of the error amplifying unit is used to input a preset reference voltage, a second input terminal of the error amplifying unit is connected to the voltage sampling unit, and the error amplifying unit is used to compare the reference voltage with the output voltage of the buck circuit to obtain and output an error amplified signal;

[0007] A current sampling unit, used to collect the output current of the step-down circuit, obtain and output a current sampling signal;

[0008] A ramp voltage generating unit, configured to generate and output a ramp voltage signal according to a falling slope of the current sampling signal, wherein a ratio of a slope of the ramp voltage signal to a falling slope of the output current sampling signal is K, and K is greater than 0.5;

[0009] A comparison unit, wherein the error amplification unit, the current sampling unit and the ramp voltage generation unit are all connected to the comparison unit, and the comparison unit is used to obtain and output a pulse width modulation (PWM) control signal according to the current sampling signal and the compensation signal, wherein the compensation signal is the sum of the error amplification signal and the ramp voltage signal, and the PWM control signal is used to control the output current of the buck circuit.

[0010] According to some embodiments of the present application, the voltage sampling unit includes:

[0011] a first resistor, one end of the first resistor being connected to the output end of the step-down circuit, and the other end of the first resistor being connected to the error amplifying unit;

[0012] A second resistor, the other end of the first resistor is connected to one end of the second resistor, and the other end of the second resistor is grounded.

[0013] According to some embodiments of the present application, the current sampling unit includes:

[0014] A third resistor, one end of the third resistor is connected to the output end of the step-down circuit, and the other end of the third resistor is connected to the comparison unit.

[0015] According to some embodiments of the present application, the error amplification unit includes:

[0016] An error amplifier, wherein the non-inverting input terminal of the error amplifier is used to input the reference voltage, and the inverting input terminal of the error amplifier is connected to the voltage sampling unit.

[0017] According to some embodiments of the present application, the comparison unit includes:

[0018] A comparator, the error amplifying unit and the ramp voltage generating unit are both connected to the non-inverting input terminal of the comparator, and the inverting input terminal of the comparator is connected to the current sampling unit.

[0019] According to some embodiments of the present application, it further includes:

[0020] A driving unit, wherein the input end of the driving unit is connected to the comparing unit, the output end of the driving unit is connected to the control end of the buck circuit, and the driving unit is used to drive the buck circuit according to the PWM control signal, thereby controlling the output current of the buck circuit.

[0021] In a second aspect, an embodiment of the present application provides an output current control method, which is applied to a source-load integrated machine, wherein the source-load integrated machine includes a step-down circuit, and the method includes:

[0022] Obtaining the output voltage and output current of the step-down circuit;

[0023] Obtaining an error amplification value according to the output voltage of the step-down circuit and a preset reference voltage;

[0024] generating a ramp voltage according to the falling slope of the output current of the step-down circuit, wherein the ratio of the slope of the ramp voltage to the falling slope of the output current of the step-down circuit is K, and K is greater than 0.5;

[0025] Obtaining a PWM control signal according to the output current of the step-down circuit and a compensation value, wherein the compensation value is the sum of the error amplification value and the ramp voltage;

[0026] The PWM control signal is used to control the output current of the buck circuit.

[0027] In a third aspect, an embodiment of the present application provides an output current control device, which is applied to a source-load integrated machine, wherein the source-load integrated machine includes a step-down circuit, and the device includes:

[0028] A sampling module, used to collect the output voltage of the step-down circuit to obtain and output a voltage sampling signal, and to collect the output current of the step-down circuit to obtain and output a current sampling signal;

[0029] An error amplification module, used for comparing the output voltage of the step-down circuit with a preset reference voltage, obtaining and outputting an error amplification signal;

[0030] A ramp voltage generating module, used for generating and outputting a ramp voltage signal according to the falling slope of the current sampling signal, wherein the ratio of the slope of the ramp voltage signal to the falling slope of the output current sampling signal is K, and K is greater than 0.5;

[0031] A comparison module, the comparison module is used to compare the current sampling signal with the compensation signal to obtain and output a PWM control signal, the compensation signal being the sum of the error amplification signal and the ramp voltage signal;

[0032] An output control module is used to control the output current of the buck circuit using the PWM control signal.

[0033] In a fourth aspect, an embodiment of the present application provides a source-load integrated machine, comprising an output current control circuit as described above.

[0034] In a fifth aspect, an embodiment of the present application provides a computer-readable storage medium, which stores a program executable by a processor, and the program executable by the processor is used to implement the output current control method as described above when executed by the processor.

[0035] In the embodiment of the present application, the error amplification signal is used for feedback regulation, and compensation is performed through a ramp voltage signal. Since the ramp voltage signal can change with the falling slope of the output current sampling signal, and the ratio of the slope of the ramp voltage signal to the falling slope of the output current sampling signal is greater than 0.5, the duty cycle of the PWM control signal is less than 0.5, thereby effectively suppressing subharmonic oscillations and improving the stability of the output current.

[0036] Additional aspects and advantages of the present application will be given in part in the description below, and in part will become apparent from the description below, or will be learned through the practice of the present application. BRIEF DESCRIPTION OF THE DRAWINGS

[0037] The present application is further described below with reference to the accompanying drawings and embodiments, wherein:

[0038] Figure 1 This is the waveform diagram of the output current when subharmonic oscillation is generated;

[0039] Figure 2 The waveform of the output current when a ramp voltage signal is used for compensation in order to generate subharmonic oscillation;

[0040] Figure 3 A schematic diagram of the circuit structure of an output current control circuit provided in an embodiment of the present application;

[0041] Figure 4 A flow chart of an output current control method provided in an embodiment of the present application. DETAILED DESCRIPTION

[0042] The embodiments of the present application are described in detail below, and examples of the embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present application, and cannot be understood as limiting the present application.

[0043] In the description of the present application, it should be understood that the descriptions involving orientation, such as the orientation or positional relationship indicated as up, down, etc., are based on the orientation or positional relationship shown in the drawings, and are only for the convenience of describing the present application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as a limitation on the present application.

[0044] In the description of this application, "a plurality" means more than two. If there is a description of "first" or "second", it is only for the purpose of distinguishing technical features, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features or implicitly indicating the order of the indicated technical features.

[0045] In the description of this application, unless otherwise clearly defined, terms such as setting, installing, connecting, etc. should be understood in a broad sense, and technicians in the relevant technical field can reasonably determine the specific meanings of the above terms in this application based on the specific content of the technical solution.

[0046] Refer to the following Figures 1 to 4 An output current control circuit, method, device, source-load integrated machine, and storage medium according to an embodiment of the present application are described.

[0047] The embodiment of the present application provides an output current control circuit, which is applied to a source-load integrated machine, the source-load integrated machine includes a step-down circuit, and the output current control circuit includes:

[0048] A voltage sampling unit is used to collect the output voltage of the step-down circuit, obtain and output a voltage sampling signal VFB;

[0049] An error amplifying unit, wherein a first input terminal of the error amplifying unit is used to input a preset reference voltage VREF, a second input terminal of the error amplifying unit is connected to the voltage sampling unit, and the error amplifying unit is used to compare the reference voltage VREF with the output voltage of the buck circuit to obtain and output an error amplified signal Vc;

[0050] A current sampling unit, used to collect the output current of the step-down circuit, obtain and output a current sampling signal VL;

[0051] A ramp voltage generating unit, used to generate and output a ramp voltage signal Vramp according to the falling slope of the current sampling signal VL, wherein the ratio of the slope of the ramp voltage signal Vramp to the falling slope of the output current sampling signal VL is K, and K is greater than 0.5;

[0052] The comparison unit, the error amplification unit, the current sampling unit and the ramp voltage generation unit are all connected to the comparison unit. The comparison unit is used to obtain and output a PWM control signal according to the current sampling signal VL and the compensation signal. The compensation signal is the sum of the error amplification signal Vc and the ramp voltage signal Vramp. The PWM control signal is used to control the output current of the buck circuit.

[0053] In the embodiment of the present application, the error amplification signal Vc is used for feedback regulation, and compensation is performed through the ramp voltage signal Vramp. Since the ramp voltage signal Vramp can change with the falling slope of the output current sampling signal VL, and the ratio of the slope of the ramp voltage signal Vramp to the falling slope of the output current sampling signal VL is greater than 0.5, the duty cycle of the PWM control signal is less than 0.5, thereby effectively suppressing subharmonic oscillations and improving the stability of the output current.

[0054] In one embodiment of the present application, the step-down circuit adopts a synchronous BUCK circuit, and the PWM control signal is used to control the MOS tube in the synchronous BUCK circuit, thereby controlling the output current of the synchronous BUCK circuit.

[0055] The following describes the waveform change of the output current of the buck circuit when subharmonic oscillation is generated.

[0056] like Figure 1 As shown, Figure 1The output current waveform of the buck circuit is shown in Figure 1. 1 Rising with a slope K 2 When the output current of the step-down circuit reaches the peak current, it is suddenly disturbed by a voltage with an amplitude of +ΔV and a disturbance time of Δt, causing the output current to continue to rise within the Δt time after reaching the original peak current. The rising current amplitude is ΔI, and then the disturbance disappears, and the output current is K 2 The slope decreases, which increases the pulse width. When subharmonic oscillation occurs, the increment of the peak current of the output current of the buck circuit in each cycle is expressed by the following formula:

[0057] ΔIn=(ΔI+ΔI*K 2 / K 1 )*(K 2 / K 1 ) n-1 ,

[0058] Among them, ΔIn represents the increment of the peak current in the nth cycle, ΔI is the current amplitude increased by the output current due to voltage interference, and K 1 is the rising slope of the output current, K 2 is the falling slope of the output current.

[0059] Therefore, when K 2 / K 1 When >1, ΔIn will become larger and larger, resulting in unstable output current.

[0060] And because the relationship between the rising slope and falling slope of the output current of the buck circuit is as follows:

[0061] ,

[0062] Among them, K 1 is the rising slope of the output current, K 2 is the falling slope of the output current, and D is the duty cycle of the PWM control signal.

[0063] Therefore, no matter the source-load integrated machine is unloaded or loaded, if the duty cycle of the PWM control signal is greater than 0.5, the output current will be unstable.

[0064] The following describes the waveform change of the output current of the buck circuit when the subharmonic oscillation is generated and the ramp voltage signal Vramp is used for compensation. Figure 2 As shown, Figure 2The waveform of the output current of the buck circuit when the ramp voltage signal Vramp is used for compensation when generating subharmonic oscillation. When the ramp voltage signal Vramp is used for compensation, the increment of the peak current of the output current of the buck circuit in each cycle is expressed by the following formula:

[0065] ΔIn=ΔI*((K 2 -K 3 ) / (K 1 +K 3 )) n ,

[0066] Among them, ΔIn represents the increment of the peak current in the nth cycle, ΔI is the current amplitude increased by the output current due to voltage interference, and K 1 is the rising slope of the output current, K 2 is the decreasing slope of the output current, K 3 is the slope of the ramp voltage signal Vramp.

[0067] When (K 2 -K 3 ) / (K 1 +K 3 )<1, ΔIn is convergent, that is, the output current of the buck circuit is stable.

[0068] Since the rising slope and falling slope of the output current of the buck circuit have the following relationship:

[0069] K 1 =K 2 *(1-D) / D,

[0070] Among them, K 1 is the rising slope of the output current, K 2 is the falling slope of the output current, and D is the duty cycle of the PWM control signal.

[0071] Then: In (K 2 -K 3 ) / (K 2 *(1-D) / D+K 3 )<1, ΔIn is convergent.

[0072] That is: in K 3 / K 2 >(1-1 / 2D), ΔIn is convergent.

[0073] Since the duty cycle of the PWM control signal is greater than 0.5, the output current will be unstable, and the maximum duty cycle of the PWM control signal is 1. Therefore, K 3 / K 2>0.5, that is, K>0.5, the output current of the buck circuit is stable.

[0074] In one embodiment of the present application, Figure 3 As shown, the voltage sampling unit includes:

[0075] A first resistor Rfb1, one end of the first resistor Rfb1 is connected to the output end of the step-down circuit, and the other end of the first resistor Rfb1 is connected to the error amplification unit;

[0076] The second resistor Rfb2, the other end of the first resistor Rfb1 is connected to one end of the second resistor Rfb2, and the other end of the second resistor Rfb2 is grounded.

[0077] In this embodiment, one end of the first resistor Rfb1 is connected to the output end of the buck circuit, that is, connected to the inductor L of the buck circuit, to collect the output voltage of the buck circuit, and the voltage signal at the other end of the first resistor Rfb1 is the voltage sampling signal VFB.

[0078] In one embodiment of the present application, the current sampling unit includes:

[0079] A third resistor Ri, one end of the third resistor Ri is connected to the output end of the step-down circuit, and the other end of the third resistor Ri is connected to the comparison unit.

[0080] In this embodiment, one end of the third resistor Ri is connected to the output end of the buck circuit, that is, connected to the inductor L of the buck circuit, to collect the output current of the buck circuit, and the voltage at the other end of the third resistor Ri is the current sampling signal VL.

[0081] In one embodiment of the present application, Figure 3 As shown, the error amplification unit includes:

[0082] The error amplifier EA has a non-inverting input terminal for inputting a reference voltage VREF, and an inverting input terminal for connecting to a voltage sampling unit.

[0083] In this embodiment, the reference voltage VREF and the voltage sampling signal VFB are compared by the error amplifier EA to obtain the error amplified signal Vc.

[0084] In one embodiment of the present application, Figure 3 As shown, the comparison unit includes:

[0085] The comparator CMP, the error amplifying unit and the slope voltage generating unit are all connected to the non-inverting input terminal of the comparator CMP, and the inverting input terminal of the comparator CMP is connected to the current sampling unit.

[0086] In this embodiment, the ramp voltage signal Vramp and the error amplification signal Vc are input to the non-inverting input terminal of the comparator CMP, that is, the compensation signal is input to the non-inverting input terminal of the comparator CMP, and the current sampling signal VL is input to the inverting input terminal of the comparator CMP. The comparator CMP compares the current sampling signal VL with the compensation signal to obtain and output a PWM control signal.

[0087] In one embodiment of the present application, Figure 3 As shown, it also includes:

[0088] A driving unit, wherein the input end of the driving unit is connected to the comparison unit, the output end of the driving unit is connected to the control end of the buck circuit, and the driving unit is used to drive the buck circuit according to the PWM control signal, thereby controlling the output current of the buck circuit.

[0089] In this embodiment, the driving unit can drive the MOS tube of the buck circuit according to the input PWM control signal, thereby controlling the output current of the buck circuit.

[0090] In addition, the embodiment of the present application provides an output current control method, which is applied to a source-load integrated machine, wherein the source-load integrated machine includes a step-down circuit, such as Figure 4 As shown, the method includes:

[0091] Step S100: obtaining the output voltage and output current of the step-down circuit;

[0092] Step S200: obtaining an error amplification value according to the output voltage of the step-down circuit and a preset reference voltage VREF;

[0093] Step S300: generating a ramp voltage according to the falling slope of the output current of the buck circuit, wherein the ratio of the slope of the ramp voltage to the falling slope of the output current of the buck circuit is K, and K is greater than 0.5;

[0094] Step S400: obtaining a PWM control signal according to the output current of the step-down circuit and the compensation value, wherein the compensation value is the sum of the error amplification value and the ramp voltage;

[0095] Step S500: using a PWM control signal to control the output current of the buck circuit.

[0096] The output current control method provided in the embodiment of the present application can implement each process implemented in the above-mentioned circuit embodiment and achieve the same beneficial effects. To avoid repetition, it will not be described here.

[0097] In addition, an embodiment of the present application provides an output current control device, which is applied to a source-load integrated machine, the source-load integrated machine includes a step-down circuit, and the device includes:

[0098] The sampling module is used to collect the output voltage of the step-down circuit to obtain and output the voltage sampling signal VFB, and to collect the output current of the step-down circuit to obtain and output the current sampling signal VL;

[0099] The error amplification module is used to compare the output voltage of the step-down circuit with a preset reference voltage VREF, and obtain and output an error amplification signal Vc;

[0100] A ramp voltage generating module, used to generate and output a ramp voltage signal Vramp according to the falling slope of the current sampling signal VL, wherein the ratio of the slope of the ramp voltage signal Vramp to the falling slope of the output current sampling signal VL is K, and K is greater than 0.5;

[0101] A comparison module is used to compare the current sampling signal VL with the compensation signal to obtain and output a PWM control signal, where the compensation signal is the sum of the error amplification signal Vc and the ramp voltage signal Vramp;

[0102] The output control module is used to control the output current of the buck circuit using a PWM control signal.

[0103] The output current control device provided in the embodiment of the present application can implement each process implemented in the above method embodiment and achieve the same beneficial effects. To avoid repetition, it will not be described here.

[0104] In addition, an embodiment of the present application provides a source-load integrated machine, including the output current control circuit as described above.

[0105] The source-load integrated machine provided in the embodiment of the present application can implement each process implemented in the above-mentioned circuit embodiment and achieve the same beneficial effects. To avoid repetition, it will not be described here.

[0106] In addition, an embodiment of the present application provides a computer-readable storage medium, in which a program executable by a processor is stored. When the program executable by the processor is executed by the processor, it is used to implement the output current control method as described above.

[0107] The computer-readable storage medium provided in the embodiment of the present application can implement each process implemented in the above method embodiment and achieve the same beneficial effects. To avoid repetition, it will not be described here.

[0108] It will be appreciated by those skilled in the art that all or some of the steps and systems in the methods disclosed above may be implemented as software, firmware, hardware, and appropriate combinations thereof. Some or all physical components may be implemented as software executed by a processor, such as a central processing unit, a digital signal processor, or a microprocessor, or as hardware, or as an integrated circuit, such as an application-specific integrated circuit. Such software may be distributed on a computer-readable medium, which may include a computer storage medium (or non-transitory medium) and a communication medium (or transient medium). As known to those skilled in the art, the term computer storage medium includes volatile and non-volatile, removable and non-removable media implemented in any method or technology for storing information (such as computer-readable instructions, data structures, program modules, or other data). Computer storage media include, but are not limited to, RAM, ROM, EEPROM, flash memory or other memory technology, CD-ROM, digital versatile disk (DVD) or other optical disk storage, magnetic cassettes, magnetic tapes, disk storage or other magnetic storage devices, or any other medium that can be used to store desired information and can be accessed by a computer. Furthermore, it is well known to those skilled in the art that communication media typically embodies computer readable instructions, data structures, program modules, or other data in a modulated data signal such as a carrier wave or other transport mechanism, and may include any information delivery media.

[0109] The embodiments of the present application are described in detail above in conjunction with the accompanying drawings, but the present application is not limited to the above embodiments, and various changes can be made within the knowledge scope of ordinary technicians in the relevant technical field without departing from the purpose of the present application.

Claims

1. An output current control circuit, characterized in that: Applied to a source-load integrated machine, the source-load integrated machine includes a step-down circuit, and the output current control circuit includes: A voltage sampling unit, used to collect the output voltage of the step-down circuit, obtain and output a voltage sampling signal; An error amplifying unit, wherein a first input terminal of the error amplifying unit is used to input a preset reference voltage, a second input terminal of the error amplifying unit is connected to the voltage sampling unit, and the error amplifying unit is used to compare the reference voltage with the output voltage of the step-down circuit to obtain and output an error amplified signal; A current sampling unit, used to collect the output current of the step-down circuit, obtain and output a current sampling signal; A ramp voltage generating unit, configured to generate and output a ramp voltage signal according to a falling slope of the current sampling signal, wherein a ratio of a slope of the ramp voltage signal to a falling slope of the output current sampling signal is K, and K is greater than 0.5; The comparison unit includes a comparator; the error amplification unit and the ramp voltage generation unit are both connected to the non-inverting input terminal of the comparator, the inverting input terminal of the comparator is connected to the current sampling unit, the comparison unit is used to obtain and output a PWM control signal according to the current sampling signal and the compensation signal, the compensation signal is the sum of the error amplification signal and the ramp voltage signal, and the PWM control signal is used to control the output current of the buck circuit.

2. The output current control circuit according to claim 1, characterized in that: The voltage sampling unit comprises: a first resistor, one end of the first resistor being connected to the output end of the step-down circuit, and the other end of the first resistor being connected to the error amplifying unit; A second resistor, the other end of the first resistor is connected to one end of the second resistor, and the other end of the second resistor is grounded.

3. The output current control circuit according to claim 1, characterized in that: The current sampling unit comprises: A third resistor, one end of the third resistor is connected to the output end of the step-down circuit, and the other end of the third resistor is connected to the comparison unit.

4. The output current control circuit according to claim 1, characterized in that: The error amplification unit comprises: An error amplifier, wherein the non-inverting input terminal of the error amplifier is used to input the reference voltage, and the inverting input terminal of the error amplifier is connected to the voltage sampling unit.

5. The output current control circuit according to claim 1, characterized in that: Also includes: A driving unit, wherein the input end of the driving unit is connected to the comparing unit, the output end of the driving unit is connected to the control end of the buck circuit, and the driving unit is used to drive the buck circuit according to the PWM control signal, thereby controlling the output current of the buck circuit.

6. An output current control method, characterized in that: Applied to a source-load integrated machine, the source-load integrated machine includes a step-down circuit, the source-load integrated machine includes an output current control circuit according to any one of claims 1 to 5, and the method includes: Obtaining the output voltage and output current of the step-down circuit; Obtaining an error amplification value according to the output voltage of the step-down circuit and a preset reference voltage; generating a ramp voltage according to the falling slope of the output current of the step-down circuit, wherein the ratio of the slope of the ramp voltage to the falling slope of the output current of the step-down circuit is K, and K is greater than 0.5; Obtaining a PWM control signal according to the output current of the step-down circuit and a compensation value, wherein the compensation value is the sum of the error amplification value and the ramp voltage; The PWM control signal is used to control the output current of the buck circuit.

7. An output current control device, characterized in that: Applied to a source-carrier integrated machine, the source-carrier integrated machine includes a step-down circuit, the source-carrier integrated machine includes an output current control circuit according to any one of claims 1 to 5, and the device includes: A sampling module, used to collect the output voltage of the step-down circuit to obtain and output a voltage sampling signal, and to collect the output current of the step-down circuit to obtain and output a current sampling signal; An error amplification module, used for comparing the output voltage of the step-down circuit with a preset reference voltage, obtaining and outputting an error amplification signal; A ramp voltage generating module, used for generating and outputting a ramp voltage signal according to the falling slope of the current sampling signal, wherein the ratio of the slope of the ramp voltage signal to the falling slope of the output current sampling signal is K, and K is greater than 0.5; A comparison module, the comparison module is used to compare the current sampling signal with the compensation signal to obtain and output a PWM control signal, the compensation signal being the sum of the error amplification signal and the ramp voltage signal; An output control module is used to control the output current of the buck circuit using the PWM control signal.

8. A source-carrier integrated machine, characterized in that: The invention comprises an output current control circuit as claimed in any one of claims 1 to 5.

9. A computer-readable storage medium, characterized in that: A program executable by a processor is stored therein, and when the program executable by the processor is executed by the processor, it is used to implement the output current control method as claimed in claim 6.

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