A method for constructing a circuit breaker interrupting capacity calibration data model

Abstract

This invention discloses a method for constructing a data model for circuit breaker interrupting capacity verification. At the physical layer, the model is based on a newly constructed comprehensive circuit test circuit for circuit breaker interrupting capacity. At the data layer, the data model collects current and voltage signals from the comprehensive test circuit and inputs them into a data foundation layer. Within the data foundation layer, data preprocessing and deep processing based on the comprehensive test circuit are performed to form a data model with a multidimensional ordered data structure and associated external circuit breaker interrupting capacity labels. This method establishes a model between ordered data sequences and circuit breaker interrupting capacity, extracting a wider range of data types and providing a sufficiently complete sample space dimension representing the circuit breaker interrupting capacity.

Description

Technical Field

[0001] The present invention belongs to the technical field of electric power intelligent testing, and in particular relates to a circuit breaker interrupting capacity verification data model based on an improved test circuit. Background Art

[0002] With the development of the national economy, social electricity demand has gradually expanded, and short-circuit currents in power systems have increased accordingly, placing increasing demands on circuit breaker interrupting capabilities. Common methods for analyzing circuit breaker interrupting capacity include: 1. Verifying the interrupting capacity of the circuit breaker based on the effective value of the short-circuit current and the percentage of the DC component at the moment of contact component contact; 2. Verifying the interrupting capacity of the circuit breaker using the full current equivalence principle at the moment of contact separation.

[0003] CN111610439B proposes a method for evaluating the short-circuit breaking capacity of high-voltage circuit breakers and controlling phase-selective breaking. This method uses electromagnetic transient calculations to obtain the node's short-circuit current and DC time constant. The method then determines whether the short-circuit current is less than the rated short-circuit current and whether the DC time constant is less than the node's corresponding rated DC time constant. If the short-circuit current is less than the rated DC time constant, the method verifies the short-circuit current using the last half-wave energy equivalence principle. The data source is based on real-time information about the grid current.

[0004] CN112528586B provides a method, medium, and system for evaluating the breaking performance of a high-voltage circuit breaker. A simplified enthalpy flow model for the breaking of asymmetric short-circuit currents by a high-voltage circuit breaker is established based on the relevant parameters of the high-voltage circuit breaker. The asymmetric short-circuit current is simulated to obtain a curve showing the arc current and arc voltage in the current zero zone changing with time. The simulated asymmetric short-circuit current is gradually reduced to obtain a critical short-circuit current value. If the current waveform remains at zero after crossing the zero point, the circuit breaker can be broken; if the waveform remains a sine wave, the circuit breaker cannot be broken. The authenticity of the data source for the simulation is significantly different from that of the data in the actual test, and the processing of multiple harmonics is also difficult to simulate.

[0005] CN102004223B provides a method for online verification of the breaking current of a circuit breaker. It obtains network-wide measurement data from the EMS in real time and establishes a power grid model. It performs a credibility assessment on the network-wide measurement data and retains data that passes the assessment. It sets fault points in the power grid and uses dynamic and static calculation and analysis methods for each fault point to calculate short-circuit current data under various short-circuit fault types. It calculates the short-circuit current flowing through each circuit breaker. The obtained short-circuit current data flowing through each circuit breaker is compared with its nominal breaking current. If the nominal breaking current is exceeded, the verification result and corresponding short-circuit fault information are sent to the EMS for alarm. Otherwise, the verification calculation for the next short-circuit fault type is performed. The data source is also obtained from the EMS.

[0006] In the existing technology, when calibrating the circuit breaker's interrupting capacity, the data in the model are mostly operating data of the power system obtained from the EMS. The data obtained is processed, and the data extraction is not rigorous, which limits the analysis of the circuit breaker's true interrupting capacity. In addition, the data types are limited, the sample space is incomplete, and it is difficult to obtain the original data in the circuit. There is an urgent need for a data model that can fully characterize the circuit breaker's interrupting capacity and calibrate it. Summary of the Invention

[0007] The purpose of the present invention is to provide a circuit breaker interrupting capacity verification data model, which extracts voltage data and current data from a constructed comprehensive test circuit, uses the ordered data sequence obtained by effective data processing as the input for model training, and establishes a model between the ordered data sequence and the circuit breaker interrupting capacity. The types of extracted data are more extensive, the sample space dimension characterizing the circuit breaker interrupting capacity is complete, and the circuit breaker interrupting capacity can be fully characterized.

[0008] In order to solve the above technical problems, the present invention adopts the following technical solutions:

[0009] A circuit breaker interrupting capacity verification data model is provided. At the physical layer, the data model is based on a newly constructed circuit breaker interrupting capacity comprehensive test circuit. At the data layer, the data model collects current signal and voltage signal data from the comprehensive test circuit and inputs them into the data base layer. Within the data base layer, data preprocessing and deep data processing based on the comprehensive test circuit are performed to form a data model with a multi-dimensional ordered data structure and associated external circuit breaker interrupting capacity labels.

[0010] The comprehensive test circuit consists of a high-current circuit and a high-voltage oscillation circuit. The high-current circuit includes an auxiliary circuit breaker and a test circuit breaker connected in series.

[0011] The data types that can be accommodated in the data base layer include current and voltage data when the circuit breaker is opened and closed in normal and short-circuit states, and can also be additionally compatible with the normal and failed interruption times as the interruption capacity labels corresponding to the data base layer.

[0012] In the data basic layer, the data preprocessing performs format and value normalization processing on the collected data; the data deep processing performs data association characterization processing on the collected data oriented towards circuit breaker interrupting capacity.

[0013] The data in the data base layer are preprocessed to construct a phase space, a resolution unit and a window function set in the phase space. The current signal and voltage signal are multi-scale refined by telescoping and translation operations. By selecting a suitable threshold λ, the resolution unit coefficient is soft-thresholded and the cleaned signal data is obtained by inverse operation. and By setting the parameter μ I and σ I ,use With μ I and / or With μ V The difference between the data is used to enhance the difference between the data, and the obtained difference data is compared with the parameter σ I and / or σ V The ratio is used to reduce the weight of the data and obtain the data and / or

[0014] Furthermore, regarding the deep processing of data, the convergent data obtained after preprocessing is processed within the selected time range. and / or Perform data analysis, using time as the base axis, and obtain data through calculation and / or The average value within this time range is the Mean I and / or Mean V , and / or Deviation from Mean I and / or Mean V The degree is Std I and / or Std V , take Peak I and / or Peak V For data (and / or ), take the Peak-to-Peak value I and / or Peak-to-Peak V For data and / or The difference between the maximum and minimum values ​​will result in and / or Expanding in the two-dimensional space composed of frequency and amplitude, we get F I (f) and / or F V (f), calculate the energy in the spectrum I and / or Energy V , the weighted average of all frequency components in the spectrum Center Frequency I and / or CenterFrequency V , the degree to which all frequency components in the spectrum deviate from the center frequency Bandwidth I and / or Bandwidth V .

[0015] Furthermore, the data indicators obtained based on the comprehensive test circuit test process and deep data processing are constructed together with the interrupting capacity labels to form an ordered data sequence; and this ordered data sequence is used to characterize the data model with a multi-dimensional ordered data structure and associated external circuit breaker interrupting capacity labels.

[0016] Furthermore, for the data indicators obtained based on the comprehensive test circuit test process and data deep processing, some indicators are selected to construct an ordered data representation model; different indicator selections correspond to a set X {X k The specific selection of the subscript k can be adjusted according to different circuit settings and different circuit test environments, or can be adjusted in a feedback manner according to subsequent model training and application conditions.

[0017] Preferably, in the integrated test circuit, before the short-circuit current crosses zero, the high-voltage oscillating current is superimposed on the large current to optimize the process data properties of the integrated test circuit.

[0018] Furthermore, after the short-circuit current passes through zero, a secondary high-voltage oscillation circuit is used to generate a transient recovery voltage to optimize the process data properties and data output properties of the integrated test circuit.

[0019] Compared with the prior art, the present invention has the following advantages:

[0020] The present invention establishes a specific test circuit and constructs a highly adaptive data model based on the specific test circuit. This data model can finally output an ordered data sequence that can effectively characterize the circuit breaker's interrupting capacity. The ordered data sequence obtained by effectively processing the data is used as input for model training, and a model between the ordered data sequence and the circuit breaker's interrupting capacity is established. The types of data extracted are more extensive, and the sample space dimension for characterizing the circuit breaker's interrupting capacity is complete, which can fully characterize the circuit breaker's interrupting capacity.

[0021] This data model supports access vector machines to characterize the circuit breaker interrupting capacity. Based on the ordered data sequence, the data obtained through repeated experiments are labeled (different ordered data sequences correspond to different interrupting capacities), and then machine learning is performed through the support vector machine algorithm. After the training is completed, in subsequent applications, the device under test is connected to the test circuit to obtain the original data, and then the original data is imported into the data model constructed above, and the corresponding ordered data sequence is output. This ordered data sequence is converted into a multidimensional space vector data format and input into the trained artificial intelligence model to directly output the corresponding interrupting capacity data.

[0022] On the physical side, for the integrated test circuit, we superimposed a high-voltage oscillating current on the high current before the short-circuit current crossed zero, improving the integrated test circuit's ability to simulate the circuit breaker's arc extinguishing at zero crossing and enhancing the collected data. Furthermore, by using a secondary high-voltage oscillating circuit to generate a transient recovery voltage after the short-circuit current crossed zero, we more realistically simulated the transient recovery voltage generated at the short-circuit current's zero crossing, making the collected data more realistic and optimizing the integrated test circuit's process data attributes and data output properties. DETAILED DESCRIPTION

[0023] To make the objectives, technical solutions, and advantages of the present invention more clearly understood, the present invention will be further described in detail below in conjunction with specific embodiments and with reference to the accompanying drawings. It should be understood that these descriptions are merely exemplary and are not intended to limit the scope of the present invention. In addition, in the following description, descriptions of well-known structures and technologies are omitted to avoid unnecessary confusion of the concepts of the present invention.

[0024] In the following description of the embodiments, specific details such as specific system structures and techniques are provided for illustration rather than limitation to facilitate a thorough understanding of the embodiments of the present application. However, it will be apparent to those skilled in the art that the present application may be implemented in other embodiments without these specific details. In other cases, detailed descriptions of well-known systems, devices, circuits, and methods are omitted to avoid obscuring the description of the present application with unnecessary detail.

[0025] It should be understood that when used in the present specification and the appended claims, the term "comprising" indicates the presence of described features, integers, steps, operations, elements and / or components, but does not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components and / or collections thereof.

[0026] It will also be understood that the term "and / or" used in this specification and the appended claims refers to and includes any and all possible combinations of one or more of the associated listed items.

[0027] As used in this specification and the appended claims, the term "if" can be interpreted as "when" or "upon" or "in response to determining" or "in response to detecting," depending on the context. Similarly, the phrase "if it is determined" or "if [described condition or event] is detected" can be interpreted as meaning "upon determination" or "in response to determining" or "upon detection of [described condition or event]" or "in response to detecting [described condition or event]," depending on the context.

[0028] In addition, in the description of the present application specification and the appended claims, the terms "first", "second", "third", etc. are only used to distinguish the descriptions and cannot be understood as indicating or implying relative importance.

[0029] References to "one embodiment" or "some embodiments" in this specification mean that a particular feature, structure, or characteristic described in conjunction with that embodiment is included in one or more embodiments of the present application. Thus, phrases such as "in one embodiment," "in some embodiments," "in other embodiments," and "in other embodiments" appearing in various places in this specification do not necessarily refer to the same embodiment, but rather mean "one or more but not all embodiments," unless otherwise specifically emphasized. The terms "including," "comprising," "having," and variations thereof all mean "including but not limited to," unless otherwise specifically emphasized.

[0030] The technical framework of the present invention is as follows:

[0031] At the physical layer, the data model of the present invention is modeled based on a newly constructed comprehensive test circuit for circuit breaker interrupting capacity; the comprehensive test circuit consists of a high-current circuit and a high-voltage oscillation circuit, and the high-current circuit includes an auxiliary circuit breaker and a test circuit breaker connected in series; and the process data attributes and data output attributes of the comprehensive test circuit are further specially optimized.

[0032] At the data layer, the data model collects the current signal I(t) and voltage signal V(t) from the integrated test circuit and inputs it into the data foundation layer. Within the data foundation layer, data preprocessing and deep data processing based on the integrated test circuit are performed to form a data model with a multidimensional, ordered data structure and associated external circuit breaker interrupting capacity labels. Data preprocessing normalizes the collected data for format and value; deep data processing characterizes the collected data for data association with circuit breaker interrupting capacity. Specific implementation method 1

[0034] The integrated test circuit consists of a high-current circuit and a high-voltage oscillating circuit. The high-current circuit includes an auxiliary circuit breaker and a test circuit breaker connected in series. The high-current circuit is powered by a generator and includes the auxiliary circuit breaker and the test circuit breaker connected in series. After the capacitor in the high-voltage oscillating circuit is charged to a predetermined potential, it is triggered at a precisely calculated moment by a controlled spark gap, ensuring that the oscillating current complements the existing high current in terms of timing and amplitude. To accurately simulate the actual data changes during a short circuit, the high-voltage oscillating current I osc (t) is superimposed on the large current I high (t) on, I total (t) = I high (t)+Iosc (t) to improve the ability of the comprehensive test circuit to simulate the zero-crossing arc extinguishing of the circuit breaker, making the collected data more complete. osc (t) can be expressed as: osc (t) = A sin(ωt+φ); where A is the amplitude of the oscillating current, ω is the angular frequency, and φ is the phase. After the circuit breaker is actuated, a secondary high-voltage oscillator circuit is used to generate a transient recovery voltage V after the short-circuit current passes through zero. trv (t), V trv (t)=Be -αt cos(βt+γ), after the short-circuit current passes through zero, a secondary high-voltage oscillation circuit is used to generate a transient recovery voltage V trv (t), more realistically simulates the situation where the short-circuit current crosses the zero point and generates a transient recovery voltage, making the collected data more realistic and further optimizing the process data attributes and data output attributes of the comprehensive test circuit.

[0035] The circuit breaker interrupting capacity verification data model collects the current signal I(t) and voltage signal V(t) data in the comprehensive test circuit to form a data base layer. The data base layer includes the current and voltage data of the circuit breaker when opening and closing in normal and short-circuit states, and uses the normal and failed interruption times as the interrupting capacity labels corresponding to the data base layer. The data in the data base layer is preprocessed to construct a phase space, a resolution unit and a window function set in the phase space. The current signal and voltage signal are multi-scale refined through telescoping and translation operations. By selecting an appropriate threshold λ, the resolution unit coefficient is soft-thresholded, and the cleaned signal data is obtained through inverse operations. and For example, taking current data as an example (voltage data is similar), if wavelet transform is used to preprocess the data, then

[0036] and Among them, W I (a, b) is the wavelet transform of I(t), and the wavelet coefficients are further processed by soft thresholding by selecting an appropriate threshold λ to obtain Then perform inverse wavelet transform to obtain the denoised signal Then, by setting the parameter μ I and σ I use With μ I The difference between the data is used to enhance the difference between the data, and the obtained difference data is used with the parameter σ I The ratio is used to reduce the weight of the data, thereby obtaining normalized data (or similarly, get ).

[0037] In the selected time range, the convergent data obtained after preprocessing is (or ) to analyze the data, taking time as the base axis, and obtain the data by calculation or The average value within this time range is the Mean I (or Mean V ), (or ) Deviation from Mean I (or Mean V ) is Std I (or Std V ); take Peak I (or Peak V ) is the data (or ), take the Peak-to-Peak value I (or Peak-to-Peak V ) is the data (or )The difference between the maximum and minimum values; at the same time, or on the other hand, the data obtained (or ) is expanded in the two-dimensional space composed of frequency and amplitude, that is, Thus we get F I (f)(or F V (f)), based on which the energy in the spectrum can be calculated (or Energy V ) and the weighted average of all frequency components in the spectrum Center Frequency I (or Center Frequency V ), the degree to which all frequency components in the spectrum deviate from the center frequency Bandwidth I (or Bandwidth V ).

[0038] Based on the above data processing, the data obtained from the comprehensive test circuit test process and deep data processing can be constructed together with the interrupting capacity label to form an ordered data sequence X. The data model with a multi-dimensional ordered data structure and associated external circuit breaker interrupting capacity label is characterized as follows:

[0039]

[0040] Where d(i) is the blocking capability label.

[0041] ——Of course, you can also select some indicators to build an ordered data representation model; different indicator selections constitute an X set {X k The specific choice of subscript k can be adjusted appropriately according to different circuit settings and different circuit test environments, or can be adjusted in a feedback manner based on subsequent model training and application. This also constitutes part of the scalability of the model we construct.

[0042] Based on the data model constructed above, in order to introduce artificial intelligence algorithms and conduct machine learning, the "ordered data sequence" can be transformed, rewritten, and formatted into a "multi-dimensional space vector" data model, so that existing machine learning algorithms can be directly introduced for data training (such as introducing support vector machine models, etc.). Furthermore, it is also possible to use f(x)=sign(w T The ordered data sequence X is classified using the formula (w + b), where w and b are parameters optimized from the training data. The ordered data sequence X is divided into k subsets, and k-1 subsets are used for training each time. The remaining subset is used as the test set. This is repeated k times. The average accuracy, precision, recall, and F1 score are calculated. The data is cross-validated to obtain the optimal circuit breaker interrupting capacity calibration data model through evaluation, including: Among them, TP, TN, FP, and FN represent true positive, true negative, false positive, and false negative, respectively. Specific embodiment 2

[0044] Prior to developing the core technical solution and final data model described above, the inventors experimented with and concurrently developed another data system (this is the first solution). Although the second solution (as shown in Specific Implementation Method 1) was ultimately adopted, this technical approach (i.e., the first solution in this implementation) offers deeper data mining capabilities and finer data analysis granularity. However, due to the quality of the original data set (provided by the power grid), the second solution (as shown in Specific Implementation Method 1) is currently the primary approach.

[0045] The technical overview of the first set of “deep” data analysis models mentioned here is as follows:

[0046] S1: Circuit configuration and operation: A comprehensive circuit configuration similar to the second solution can be used (see the first embodiment above).

[0047] S2: Circuit equation.

[0048] S2.1: High current circuit. A high current circuit can be described by the following differential equation: Where: V(t) is the voltage in the circuit, I(t) is the current, L is the inductance, R is the resistance, and C is the capacitance.

[0049] S2.2: High-voltage oscillator circuit. The behavior of the high-voltage oscillator circuit can be described by the following equation: Where: Vhv(t) is the voltage in the high-voltage circuit, Ihv(t) is the current in the high-voltage circuit, Lhv is the inductance of the high-voltage circuit, Rhv is the resistance of the high-voltage circuit, and Chv is the capacitance of the high-voltage circuit.

[0050] S3: Oscillating current superposition. In order to simulate the superposition of the oscillating current to the high current, we need to consider the interaction between the two currents. Assume that at time t0, the oscillating current I hv (t) is introduced into the large current I(t), and we can describe the total current with the following equation: I total (t)=I(t)+I hv (t).

[0051] S4. Transient recovery voltage. After the short-circuit current passes through zero, the high-voltage oscillation circuit generates a transient recovery voltage Vtr(t), whose behavior can be described by the following equation: V tr (t) = V hv (t)·e -αt ; where α is a decay constant that describes the decay of voltage over time.

[0052] S5. Data processing flow. Collect current and voltage data from the experiment, and record the current I(t) and voltage V(t) at different time points. Extract key features from the collected data, including: peak current Ipeak; current rise rate dIdt; arc duration; transient recovery voltage characteristics; use statistical methods such as least squares or Bayesian estimation to estimate model parameters L, R, C, Lhv, Rhv, Chv and α. Use the finite difference method (FDM) or finite element method (FEM) to numerically solve the differential equations to simulate the current and voltage behavior under different fault conditions. Finally, based on existing mature intelligent technologies, such as using machine learning algorithms (such as neural networks or support vector machines) to train the extracted features, the breaking capacity of the circuit breaker under different conditions can be predicted.

[0053] In the above embodiments, the description of each embodiment has its own focus. For parts that are not described or recorded in detail in a certain embodiment, reference can be made to the relevant description of other embodiments.

[0054] Those skilled in the art can clearly understand that, for the convenience and brevity of description, only the division of the above-mentioned functional units and modules is used as an example for illustration. In actual applications, the above-mentioned functions can be distributed and completed by different functional units and modules as needed, that is, the internal structure of the device can be divided into different functional units or modules to complete all or part of the functions described above. The functional units and modules in the embodiment can be integrated into one processing unit, or each unit can exist physically alone, or two or more units can be integrated into one unit. The above-mentioned integrated unit can be implemented in the form of hardware or in the form of software functional units. In addition, the specific names of the functional units and modules are only for the convenience of distinguishing each other, and are not used to limit the scope of protection of this application. The specific working process of the units and modules in the above-mentioned system can refer to the corresponding process in the aforementioned method embodiment, and will not be repeated here.

[0055] In the embodiments provided by the present invention, it should be understood that the disclosed apparatus / terminal equipment and methods can be implemented in other ways. For example, the apparatus / terminal equipment embodiments described above are merely schematic. For example, the division of modules or units is merely a logical function division. In actual implementation, there may be other division methods, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of the apparatus or unit, which can be electrical, mechanical or other forms. The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place, or they may be distributed on multiple network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the scheme of this embodiment.

[0056] The functional units in the various embodiments of the present invention may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit. The above-mentioned integrated units may be implemented in the form of hardware or in the form of software functional units. If the integrated modules / units are implemented in the form of software functional units and sold or used as independent products, they may be stored in a computer-readable storage medium. Based on this understanding, the present invention implements all or part of the processes in the above-mentioned embodiment methods, and may also instruct the relevant hardware to complete them through a computer program. The computer program may be stored in a computer-readable storage medium, and when the computer program is executed by the processor, it may implement the steps of the above-mentioned various method embodiments.

[0057] The embodiments described above are only used to illustrate the technical solutions of the present invention, rather than to limit the same. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. These modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the various embodiments of the present invention, and should all be included in the scope of protection of the present invention.

Claims

1. A method for constructing a circuit breaker interrupting capacity verification data model, characterized by: At the physical layer, the data model is based on a newly constructed comprehensive test circuit for circuit breaker interrupting capacity; At the data layer, the data model collects current and voltage signal data from the integrated test circuit and inputs them into the data foundation layer. Within the data foundation layer, data preprocessing and deep processing based on the integrated test circuit are performed to form a data model with a multi-dimensional ordered data structure and associated external circuit breaker interrupting capacity labels. The data deep processing includes: within the selected time range, the current data obtained after pre-processing can be converged and / or voltage data Perform data analysis, using time as the base axis, and obtain data through calculation and / or The average value within this time range is the Mean I and / or Mean V , and / or Deviation from Mean I and / or Mean V The degree is Std I and / or Std V , take Peak I and / or Peak V For data and / or The maximum value of Peak-to-Peak I and / or Peak-to-Peak V For data and / or The difference between the maximum and minimum values ​​will result in and / or Expanding in the two-dimensional space composed of frequency and amplitude, we get F I (f) and / or F V (f), calculate the energy in the spectrum I and / or Energy V , the weighted average of all frequency components in the spectrum Center Frequency I and / or CenterFrequency V , the degree to which all frequency components in the spectrum deviate from the center frequency Bandwidth I and / or Bandwidth V .

2. The method for constructing a circuit breaker interrupting capacity verification data model according to claim 1, characterized in that: The comprehensive test circuit consists of a high-current circuit and a high-voltage oscillation circuit. The high-current circuit includes an auxiliary circuit breaker and a test circuit breaker connected in series.

3. The method for constructing a circuit breaker interrupting capacity verification data model according to claim 1, characterized in that: The data types that can be accommodated in the data base layer include current and voltage data when the circuit breaker is opened and closed in normal and short-circuit states, and are compatible with the normal and failed interruption times as the interruption capacity labels corresponding to the data base layer.

4. The method for constructing a circuit breaker interrupting capacity verification data model according to claim 1, characterized in that: In the data basic layer, the data preprocessing performs format and value normalization processing on the collected data; the data deep processing performs data association characterization processing on the collected data oriented towards circuit breaker interrupting capacity.

5. The method for constructing a circuit breaker interrupting capacity verification data model according to claim 4, characterized in that: The data in the data base layer are preprocessed to construct a phase space, a resolution unit and a window function set in the phase space. The current signal and voltage signal are multi-scale refined by telescoping and translation operations. By selecting a suitable threshold λ, the resolution unit coefficient is soft-thresholded and the cleaned signal data is obtained by inverse operation. and By setting the parameter μ I and σ I ,use With μ I and / or With μ V The difference between the data is used to enhance the difference between the data, and the obtained difference data is compared with the parameter σ I and / or σ V The ratio is used to reduce the weight of the data and obtain the data and / or 6. The method for constructing a circuit breaker interrupting capacity verification data model according to claim 5, characterized in that: The data indicators obtained based on the comprehensive test circuit test process and deep data processing are constructed together with the interrupting capacity label into an ordered data sequence; and this ordered data sequence is used to characterize a data model with a multi-dimensional ordered data structure and associated external circuit breaker interrupting capacity labels.

7. The method for constructing a circuit breaker interrupting capacity verification data model according to claim 6, characterized in that: For the data indicators obtained from the comprehensive test circuit test process and data deep processing, some indicators are selected to build an ordered data representation model; different indicator selections correspond to an X set {X k The specific selection of the subscript k can be adjusted according to different circuit settings and different circuit test environments, or can be adjusted in a feedback manner according to subsequent model training and application conditions.

8. The method for constructing a circuit breaker interrupting capacity verification data model according to claim 2, characterized in that: In the integrated test circuit, before the short-circuit current crosses the zero point, the high-voltage oscillating current is superimposed on the large current to optimize the process data properties of the integrated test circuit.

9. The method for constructing a circuit breaker interrupting capacity verification data model according to claim 7, characterized in that: Furthermore, after the short-circuit current passes through zero, a secondary high-voltage oscillation circuit is used to generate a transient recovery voltage to optimize the process data properties and data output properties of the integrated test circuit.

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